A host to network card data transmission method and system based on PICe

Abstract

The present invention provides a host-to-network card data transmission method and system based on PICe, wherein the host directly sends target data to the network card hardware cache, and sends a register instruction for the network card to call and forward the target data. After completing data forwarding, the network card feeds back the ID of the data packet that has completed transmission, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing. The present invention directly transmits descriptors, reducing the interactive process in the data transmission process.

Description

Technical Field

[0001] The present invention relates to the technical field of computer communications, and in particular to a method and system for sending data from a host to a network card based on PICe. Background Art

[0002] As a peripheral device of a computer or server, the network card is connected to the host through a PCIe slot. PCIe is a computer high-speed serial expansion bus standard used for data exchange between computer processors, memory and peripheral expansion devices. It is the current mainstream expansion bus standard for computers and is commonly used in the connection between personal computer graphics cards, memory, network cards and motherboards. There are three models of PCIe data transmission: PIO (Programmed I / O), Peer-to-Peer, and DMA.

[0003] In the PIO model, the processor does all the work. When a PCI device sends an interrupt to the host CPU (central processing unit) and indicates that it needs to put data into memory, the CPU will eventually read the data from the PCI device and put it into an internal register, and then copy the value of the internal register into memory. Conversely, if data needs to be moved from memory to a PCI device, the software will instruct the CPU to read the data from memory into the internal register, and then write the value of the internal register to the PCI device.

[0004] The current common PCIe data transmission mechanism is DMA (Direct Memory Access) data transmission based on descriptors. Direct memory access. In this model, the DMA engine is responsible for mastering the various details of data transmission from memory to peripherals on behalf of the processor. Data transmission no longer takes up a lot of CPU time. The host side, as a producer, maintains a list of descriptors, each descriptor represents a DMA transfer transaction. After the network card side obtains the descriptor, it reads data from the memory through DMA, and then pushes the read data to the network link.

[0005] Under this mechanism, the host and the NIC are required to exchange descriptor-related information multiple times before the actual data DMA. When data needs to be transferred, the host first puts the descriptor into the descriptor queue. The host notifies the NIC of the new descriptor through PIO. The NIC reads the descriptor from the memory, and then reads the data from the memory according to the descriptor. After the data is read, the descriptor list is updated to the host.

[0006] In high-frequency industries, especially in the financial field, there are characteristics of data concentration and instruction intensiveness, and there are extremely high requirements for the processing speed of the trading system. Therefore, ultra-low latency of network data is a core requirement of financial transactions. Under the above mechanism, the host forwards data to the network card, and at least 4 interactive tests are required each time, which will cause great delays and load pressure. Therefore, a new data forwarding method is urgently needed. Summary of the invention

[0007] In view of this, an embodiment of the present invention provides a PICe-based host-to-network card data sending method and system to eliminate or improve one or more defects in the prior art and solve the problems of delay and high load in the host-to-network card data forwarding process in the prior art.

[0008] One aspect of the present invention provides a method for sending data from a host to a network card based on PICe, the method comprising the following steps:

[0009] The host sends the target data to the network card based on the PICe bus, wherein the target data includes a packet header and data content, wherein the packet header includes at least: a packet ID, a packet type, and data length information; the network card puts the target data into the network card hardware cache according to the address information;

[0010] The host sends a register instruction to the network card based on the PICe bus, wherein the register instruction at least includes the address information and the data length information; the network card puts the register instruction into the instruction cache queue of the base address register;

[0011] The network card reads the register instruction in the instruction cache queue, reads the target data in the network card hardware cache according to the address information and data length information in the register instruction, and sends the target data to the network link;

[0012] After the network card completes sending the target data, it feeds back the packet ID in the target data packet header to the feedback information address of the host, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing.

[0013] In some embodiments, feeding back the packet ID in the target data packet header to the feedback information address of the host further includes:

[0014] The currently used occupancy of the network card hardware cache is simultaneously checked. If the occupancy is greater than a second set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host, otherwise no feedback is given.

[0015] In some embodiments, feeding back the packet ID in the target data packet header to the feedback information address of the host further includes:

[0016] The length of the target data that has been sent is checked. If the length of the target data that has been sent is greater than a first set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host. Otherwise, no feedback is given.

[0017] In some embodiments, the method further comprises:

[0018] The host checks the target data length and the occupied amount of the current network card hardware cache, and when the target data length is greater than the first set threshold, or the occupied amount is greater than the second set threshold, adds a feedback mark in the packet header;

[0019] The network card feeds back the packet ID in the target data packet header to the feedback information address of the host based on the feedback identifier, otherwise no feedback is given.

[0020] In some embodiments, the network card hardware cache sets a redundant space of a third set threshold to cope with burst data flow.

[0021] In some embodiments, the method further comprises:

[0022] When the remaining capacity of the network card hardware cache is less than the redundant space, the network card generates an alarm message and feeds it back to the host.

[0023] In some embodiments, the method further includes: constructing a feedback log to record the packet ID and timestamp fed back to the host for operation analysis.

[0024] In some embodiments, the method further includes: monitoring the frequency at which the network card feeds back the packet ID to the host, and monitoring the operation status according to the distribution of the frequency.

[0025] On the other hand, the present invention also provides a PICe-based host-to-network card data transmission system, the system includes a host and a network card, the host and the network card are connected via a PICe bus, and the system implements the steps of the above method when executed.

[0026] On the other hand, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above method when executed by a processor.

[0027] The beneficial effects of the present invention are at least:

[0028] The PICe-based host-to-network card data transmission method and system of the present invention directly sends target data to the network card hardware cache, and sends a register instruction for the network card to call and forward the target data. After completing data forwarding, the network card feeds back the ID of the data packet that has completed transmission, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing. The present invention directly transmits descriptors, reducing the interactive process in the data transmission process.

[0029] Furthermore, by restricting the conditions for the network card to feedback the sent data, the feedback frequency after the data is sent is reduced, thereby reducing the transmission overhead of PCIe.

[0030] Additional advantages, purposes, and features of the present invention will be described in part in the following description, and will become apparent to those skilled in the art after studying the following, or may be learned from the practice of the present invention. The purposes and other advantages of the present invention may be achieved and obtained by the structures specifically indicated in the specification and the accompanying drawings.

[0031] Those skilled in the art will appreciate that the objectives and advantages that can be achieved with the present invention are not limited to the above specific description, and the above and other objectives that can be achieved by the present invention will be more clearly understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of the present application, and do not constitute a limitation of the present invention. In the drawings:

[0033] Figure 1 The figure is a flowchart of a method for sending data from a host to a network card based on PICe according to an embodiment of the present invention.

[0034] Figure 2 This is a logical schematic diagram of a low-latency H2C (Host to Card) PIO hardware mechanism based on PCIe according to another embodiment of the present invention.

[0035] Figure 3 The diagram is a structural diagram of a data packet in a low-latency H2C (Host to Card) PIO hardware mechanism based on PCIe according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.

[0037] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0038] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0039] It should also be noted that, unless otherwise specified, the term “connection” herein may refer not only to a direct connection but also to an indirect connection involving an intermediate.

[0040] The low-latency H2C PIO hardware mechanism based on PCIe is a hardware mechanism for transmitting data from a PCIe-based network card. "H2C" refers to the direction of data transmission, that is, the direction of data transmission (Host to Card). "Delay" refers to the time it takes for data to be sent from one end to the other end. Delay includes transmission delay (transmission delay), propagation delay, queuing delay, and processing delay. The low delay mentioned in this patent, that is, the delay for the network card to push data to the link, is the core parameter of the transmission delay.

[0041] In the prior art, the host to the network card is connected based on the PCIe slot, and data is transmitted through the PIO model. When the data is transmitted, the host and the network card interact multiple times, resulting in a low transmission delay. In this application, a new interaction mechanism is constructed to reduce the number of interactions between the host and the network card and reduce the transmission delay.

[0042] Specifically, the present application provides a method for sending data from a host to a network card based on PICe, such as Figure 1 As shown, the method includes the following steps S101 to S104:

[0043] Step S101: The host sends target data to the network card based on the PICe bus. The target data includes a packet header and data content. The packet header includes at least: packet ID, packet type and data length information; the network card puts the target data into the network card hardware cache according to the address information.

[0044] Step S102: the host sends a register instruction to the network card based on the PICe bus, where the register instruction at least includes address information and data length information; the network card puts the register instruction into the instruction cache queue of the base address register.

[0045] Step S103: the network card reads the register instruction in the instruction cache queue, reads the target data in the network card hardware cache according to the address information and data length information in the register instruction, and sends it to the network link.

[0046] Step S104: After the network card completes sending the target data, it feeds back the packet ID in the target data packet header to the feedback information address of the host, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing.

[0047] In step S101, the "host" in the network environment generally refers to a computer that is connected to the network and provides services. This can be a website server, a database server, or a carrier device for other network services. The transmission from the host to the card is termed "Host to Card", which refers to the transmission from the host to the network card in this application. The packet ID is also the identification information used to mark the target data, and the data packet type can be marked by selecting the corresponding attributes according to the requirements. The address information refers to the memory location information used to store the target data.

[0048] In this application, the host directly sends the target data to the network card, and the network card caches it based on the requirements.

[0049] In step S102, the host sends a register instruction to the network card to indicate the data to be forwarded, and the register instruction is stored in a base address register (BAR) to form a first-in-first-out instruction cache queue.

[0050] In step S103, the network card directly obtains the corresponding target data in the network card hardware cache according to the stored instruction in the instruction cache queue for forwarding. In steps S101 to S103, except for data forwarding, there is no other interactive process, and no interactive test is required, which can greatly reduce the delay.

[0051] In step S104, the network card feeds back the packet ID in the target data packet header that has completed transmission to the feedback information address of the host. The host determines the released cache location in the network card based on the packet ID of the target data that has completed transmission to schedule and complete the subsequent data transmission process.

[0052] In some embodiments, the packet ID in the target data packet header is fed back to the feedback information address of the host, and also includes step S201: synchronously checking the occupancy of the current network card hardware cache. If the occupancy is greater than a second set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host, otherwise no feedback is given.

[0053] In order to reduce the number of feedbacks from the network card to the host and reduce the load pressure of PCIe, in this embodiment, feedback is provided on the packet ID of the target data whose transmission is completed only when the occupancy of the network card hardware cache exceeds the second set threshold.

[0054] In some embodiments, the packet ID in the target data packet header is fed back to the feedback information address of the host, and also includes step S301: checking the length of the target data that has been sent. If the length of the target data that has been sent is greater than a first set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host, otherwise no feedback is given.

[0055] On the basis of step S201, in order to further reduce the number of times the network card feeds back to the host, it is further limited that the feedback is only performed when the length of the target data is greater than the first set threshold.

[0056] Of course, in some other embodiments, the method further includes:

[0057] Step S301: The host checks the target data length and the amount of the current network card hardware cache used. When the target data length is greater than a first set threshold, or the amount of the cache used is greater than a second set threshold, a feedback flag is added to the packet header.

[0058] Step S302: The network card feeds back the packet ID in the target data packet header to the feedback information address of the host based on the feedback identifier, otherwise no feedback is given.

[0059] Steps S301 and S302 require that the length of the target data is greater than a first set threshold or the occupied amount is greater than a second set threshold. Feedback is performed only when either of these two conditions is met.

[0060] In some embodiments, the network card hardware cache sets a redundant space of a third set threshold to cope with burst data flow.

[0061] In some embodiments, the method further includes: when the remaining capacity of the network card hardware cache is less than the redundant space, the network card generates an alarm message and feeds it back to the host.

[0062] In some embodiments, the method further includes: constructing a feedback log to record the packet ID and its timestamp fed back to the host for operation analysis. In addition, the following parameters can also be monitored and managed for classification of operation status:

[0063] Latency: The time it takes for data to travel from source to destination. Lower latency generally indicates more efficient data forwarding.

[0064] Packet Loss Rate: The ratio of data packets lost during transmission. A high packet loss rate may cause incomplete data or require retransmission, affecting the quality of data transmission.

[0065] Bandwidth Utilization: The ratio of bandwidth used to available bandwidth. High bandwidth utilization may indicate efficient data transmission, but it may also lead to network congestion.

[0066] Throughput: The amount of data transmitted per unit time. High throughput means more data can be transmitted quickly, but it is also subject to network capacity and limitations.

[0067] Jitter: The instability of the interval between data packet transmissions. High jitter may cause uneven arrival of data packets at the receiving end, affecting the continuity and quality of data transmission.

[0068] Number of Connections: The number of connections established simultaneously. A high number of connections may affect the performance of the server or network equipment.

[0069] Drop Rate: The proportion of data discarded during transmission. Different from packet loss rate, this refers to data being intentionally discarded rather than lost during transmission.

[0070] Response Time: The time it takes for a system or device to respond to a request. Lower response time usually means faster data processing and transmission.

[0071] Connection Establishment Time: The time required to establish a connection for data transmission. Quick connection establishment helps improve efficiency and user experience.

[0072] In some embodiments, the method further includes: monitoring the frequency of the network card feeding back the packet ID to the host, and monitoring the operation status according to the distribution of the frequency.

[0073] On the other hand, the present invention also provides a PICe-based host-to-network card data transmission system, the system includes a host and a network card, the host and the network card are connected via a PICe bus, and the system implements the steps of the above method when executed.

[0074] On the other hand, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above method when executed by a processor.

[0075] The present invention will be described below in conjunction with specific embodiments:

[0076] This embodiment provides a low-latency H2C (Host to Card) PIO hardware mechanism based on PCIe. The host and the network card are connected through the PCIe bus. Figure 2 , including the following steps:

[0077] (1) The host sends data to the data buffer of the network card hardware cache through PIO. Each data packet contains a header and a data payload. The header contains information such as data length, packet ID, and packet type (see the attached header format for details). Figure 3 ), the NIC puts the payload and header into the cache according to the address information of the PCIe bus.

[0078] (2) The host sends a register instruction to the network card through PIO. The register instruction contains the cache address data_addr_offset and data length information of the data packet. The network card puts the register instruction into the instruction cache queue CMD FIFO of the instruction register (bar). Each instruction in the CMD FIFO corresponds to a packet of data.

[0079] (3) The network card takes out data of length length from the cache address data_addr_offset in the network card hardware cache data_buffer according to the cache address data_addr_offset and data length length information in the instruction register and sends it to the network link.

[0080] (4) After the NIC has sent the data, it sends the feedback_id (feedback ID) in the header of the data packet to the host feedback information address host feedback_addr. The host and the NIC exchange the data sending status of the NIC in the above manner. Each packet of data sent by the host has a feedback_id. After receiving the feedback_id, the host determines that the packet of data has been sent by the NIC, that is, the packet cache has been released and can continue to be used, thereby understanding the usage of the NIC hardware cache data buffer in the NIC. Only when the remaining storage space of the NIC hardware cache data buffer meets the data sending requirements will the host continue to send data. If feedback_id is fed back for each packet of data, a lot of PCIe bandwidth will be occupied, reducing transmission efficiency. In this scheme, feedback_id is returned only when feedback_flag is 1 in the data packet header. feedback_flag is set by the host according to the usage of the network card hardware cache data buffer. When the data packet length is greater than the threshold or the network card hardware cache data buffer usage exceeds the threshold, feedback_id needs to be returned. This ensures the timeliness and reliability of the interaction and effectively reduces the interaction bandwidth.

[0081] Compared with the existing technical solutions and the existing DMA transmission solutions, the above mechanism can eliminate the operation of reading the descriptor of the network card once, and greatly reduce the frequency of feedback of information to the host after the hardware completes sending the data. At the same time, it can also ensure the timeliness and reliability of information interaction. The number of interactions between the host and the network card is reduced from 4 times to nearly 2 times, which greatly reduces the interaction overhead.

[0082] In the interaction mechanism of this solution, the host sends instructions through bar0, the network card feeds back feedback_id through bar0, and the host sends data through bar2. In addition to the above bar (PCIe base address register) setting method, other bar configurations can be used to exchange data and information according to the situation, such as bar1 to feed back feedback_id.

[0083] An embodiment of the present invention further provides a computer device, which may include a processor and a memory, wherein the processor and the memory may be connected via a bus or in other ways.

[0084] The processor may be a central processing unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above chips.

[0085] The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer executable programs and modules, such as the program instructions / modules corresponding to the key shielding method of the vehicle-mounted display device in the embodiment of the present invention. The processor executes various functional applications and data processing of the processor by running the non-transitory software programs, instructions and modules stored in the memory.

[0086] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the processor, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0087] The one or more modules are stored in the memory, and when executed by the processor, the method described in this embodiment is performed.

[0088] Corresponding to the above method, the present invention also provides an apparatus / system, which includes a computer device, the computer device includes a processor and a memory, the memory stores computer instructions, the processor is used to execute the computer instructions stored in the memory, and when the computer instructions are executed by the processor, the apparatus / system implements the steps of the method described above.

[0089] In summary, the PICe-based host-to-network card data transmission method and system of the present invention is that the host directly sends the target data to the network card hardware cache, and sends a register instruction for the network card to call and forward the target data. After completing the data forwarding, the network card feeds back the data packet ID that has been transmitted, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing. The present invention directly transmits the descriptor, reducing the interactive process in the data transmission process.

[0090] Furthermore, by restricting the conditions for the network card to feedback the sent data, the feedback frequency after the data is sent is reduced, thereby reducing the transmission overhead of PCIe.

[0091] The embodiment of the present invention also provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the aforementioned edge computing server deployment method are implemented. The computer-readable storage medium can be a tangible storage medium, such as a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a floppy disk, a hard disk, a removable storage disk, a CD-ROM, or any other form of storage medium known in the technical field.

[0092] It should be understood by those skilled in the art that the exemplary components, systems and methods described in conjunction with the embodiments disclosed herein can be implemented in hardware, software or a combination of the two. Whether it is performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link via a data signal carried in a carrier.

[0093] It should be clear that the present invention is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.

[0094] In the present invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with features of other embodiments or replace features of other embodiments.

[0095] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for sending data from a host to a network card based on PICe, characterized in that: The method comprises the following steps: The host sends target data to the network card based on the PICe bus, wherein the target data includes a packet header and data content, wherein the packet header includes at least: a packet ID, a packet type, and data length information; the network card puts the target data into the network card hardware cache according to the address information; The host sends a register instruction to the network card based on the PICe bus, wherein the register instruction at least includes the address information and the data length information; the network card puts the register instruction into the instruction cache queue of the base address register; The network card reads the register instruction in the instruction cache queue, reads the target data in the network card hardware cache according to the address information and data length information in the register instruction, and sends the target data to the network link; After the network card completes sending the target data, it feeds back the packet ID in the target data packet header to the feedback information address of the host, prompting the host that the corresponding storage location in the network card hardware cache has been released for continued writing.

2. The method for sending data from a host to a network card based on PICe according to claim 1, characterized in that: Feedback the packet ID in the target data packet header to the feedback information address of the host, further comprising: The currently used occupancy of the network card hardware cache is simultaneously checked. If the occupancy is greater than a second set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host, otherwise no feedback is given.

3. The method for sending data from a host to a network card based on PICe according to claim 2, characterized in that: Feedback the packet ID in the target data packet header to the feedback information address of the host, further comprising: The length of the target data that has been sent is checked. If the length of the target data that has been sent is greater than a first set threshold, the packet ID in the target data packet header is fed back to the feedback information address of the host. Otherwise, no feedback is given.

4. The method for sending data from a host to a network card based on PICe according to claim 3, characterized in that: The method further comprises: The host checks the target data length and the occupied amount of the current network card hardware cache, and when the target data length is greater than the first set threshold, or the occupied amount is greater than the second set threshold, adds a feedback mark in the packet header; The network card feeds back the packet ID in the target data packet header to the feedback information address of the host based on the feedback identifier, otherwise no feedback is given.

5. The method for sending data from a host to a network card based on PICe according to claim 1, characterized in that: The network card hardware cache is configured with a redundant space of a third set threshold value to cope with burst data flows.

6. The method for sending data from a host to a network card based on PICe according to claim 5, characterized in that: The method further comprises: When the remaining capacity of the network card hardware cache is less than the redundant space, the network card generates an alarm message and feeds it back to the host.

7. The method for sending data from a host to a network card based on PICe according to claim 1, characterized in that: The method further comprises: Construct a feedback log to record the packet ID and timestamp fed back to the host for operational analysis.

8. The method for sending data from a host to a network card based on PICe according to claim 7, characterized in that: The method further comprises: The frequency at which the network card feeds back the packet ID to the host is monitored, and the operation status is monitored according to the distribution of the frequency.

9. A PICe-based host to network card data transmission system, characterized in that: The system comprises a host and a network card, wherein the host and the network card are connected via a PICe bus. When the system is executed, the steps of the method according to any one of claims 1 to 8 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

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