An RTL static verification system
By distinguishing and processing exception code segments in RTL code, and using DFT design rules to map mask files, the problem of low efficiency of RTL code verification is solved, and a more efficient design and verification process is achieved.
Patent Information
- Application Number
- CN202410280479.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-12
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2044-03-12
AI Technical Summary
The static verification efficiency of existing RTL codes is low. The abnormal code segment with high risk is blocked and the design feasibility is reduced. The underlying RTL code still needs to be validated again after being integrated into the top layer, resulting in reduced redundant operations and efficiency.
Design an RTL static verification system, through static verification tools and databases, distinguish exception code segments from the first and second categories. The first category does not allow blocking. The second category of blocked files are mapped as target blocking files according to DFT design rules. , after integration into the top layer, perform matching and masking operations to avoid top layer verification again.
It improves the verification efficiency of RTL code, ensures the repairability of the first type of exception code segment, reduces redundant verification, and improves the feasibility and efficiency of the overall design.
Smart Images
Figure CN117993337B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of IP verification technology, in particular to an RTL static verification system. Background Art
[0002] At present, static verification of RTL code is usually processed by static verification tools using their own verification rule sets to determine abnormal code segments in the RTL code. After the underlying RTL code is statically verified, designers can shield or repair the obtained abnormal code segments. However, due to the different levels of danger of different abnormal code segments to the overall design, abnormal code segments with higher danger levels may be shielded, resulting in lower feasibility of the RTL design, which requires more resources for code analysis, resulting in lower verification efficiency of the RTL code.
[0003] In addition, after the bottom-level RTL code set is integrated into the top level, the shielded code segments in the bottom-level RTL code set still need to be verified again at the top level, resulting in redundant operations and reducing the efficiency of RTL code verification and design. Therefore, how to improve the efficiency of RTL code verification has become an urgent problem to be solved. Summary of the invention
[0004] In view of the above technical problems, the technical solution adopted by the present invention is:
[0005] An RTL static verification system, the system comprising: a static verification tool, a database, a processor and a memory storing a computer program, wherein the database comprises a bottom-level RTL code to be verified, a verification rule set and a reference information set, the bottom-level RTL code comprises a plurality of code segments, the reference information set comprises a plurality of reference information, and when the computer program is executed by the processor, the following steps are implemented:
[0006] S101, according to the verification rule set, use the static verification tool to verify each code segment in the underlying RTL code to obtain M abnormal code segments and their corresponding abnormal information, where M is a positive integer.
[0007] S102, for any abnormal code segment, if the abnormal information corresponding to the abnormal code segment is consistent with any reference information, the abnormal code is determined to be a first-category abnormal code segment, otherwise, the abnormal code is determined to be a second-category abnormal code segment, and m1 first-category abnormal code segments and m2 second-category abnormal code segments are obtained, m1 and m2 are both non-negative integers and m1+m2=M, and the first-category abnormal code segment is not allowed to perform a shielding operation.
[0008] S103: For any second-type abnormal code segment, if the second-type abnormal code segment corresponds to a shielding operation, obtain an underlying shielding file corresponding to the second-type abnormal code segment.
[0009] S104, if the underlying shielding file includes initial module name information and generation blocks and their corresponding first-level path information, the initial module name information in the underlying shielding file is mapped to target module name information using a preset mapping method, and the first-level path information in the underlying shielding file is expanded into second-level path information according to DFT design rules to obtain a target shielding file corresponding to the second type of abnormal code segment.
[0010] S105, integrating the bottom RTL code into the top layer to obtain the top RTL code, using each target shielding file to match each code segment in the top RTL code, and determining the code segments matched by each target shielding file as target code segments.
[0011] S106, after performing a masking operation on each target code segment in the top-level RTL code, verify the top-level RTL code using the static verification tool according to the verification rule set.
[0012] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solution, an RTL static verification system provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects:
[0013] The present invention provides an RTL static verification system, the system comprising: a static verification tool, a database, a processor and a memory storing a computer program, wherein the database comprises a bottom-level RTL code to be verified, a verification rule set and a reference information set, the bottom-level RTL code comprises a plurality of code segments, the reference information set comprises a plurality of reference information, and when the computer program is executed by the processor, the following steps are implemented: according to the verification rule set, each code segment in the bottom-level RTL code is verified using the static verification tool to obtain M abnormal code segments and their corresponding abnormal information, M being a positive integer, for any abnormal code segment, if the abnormal information corresponding to the abnormal code segment is consistent with any reference information, then the abnormal code is determined to be a first-class abnormal code segment, otherwise, the abnormal code is determined to be a second-class abnormal code segment, and m1 first-class abnormal code segments and m2 second-class abnormal code segments are obtained, m1 and m2 are both non-negative integers and m1+m2=M, the first-class abnormal code segment is not allowed A shielding operation is performed, for any second-class abnormal code segment, if the second-class abnormal code segment corresponds to a shielding operation, then the underlying shielding file corresponding to the second-class abnormal code segment is obtained, if the underlying shielding file includes initial module name information and a generation block and its corresponding first-level path information, then the initial module name information in the underlying shielding file is mapped to the target module name information using a preset mapping method, the first-level path information in the underlying shielding file is expanded into the second-level path information according to the DFT design rule, and the target shielding file corresponding to the second-class abnormal code segment is obtained, the underlying RTL code is integrated into the top layer to obtain the top-level RTL code, each target shielding file is used to match each code segment in the top-level RTL code, and the code segments matched by each target shielding file are determined to be the target code segments, and after the shielding operation is performed on each target code segment in the top-level RTL code, the top-level RTL code is verified using the static verification tool according to the verification rule set.
[0014] It can be seen that the abnormal code segment whose abnormal information is consistent with any reference information is regarded as the first type of abnormal code segment. The first type of abnormal code does not allow the shielding operation to be performed, so the designer can only repair it, which ensures the feasibility of the RTL code design, thereby improving the verification efficiency of the RTL code. For the second type of abnormal code segment after the shielding process, the corresponding initial shielding file is adjusted to the target shielding file, so that after the bottom RTL code is integrated into the top layer, the target code segment can be matched through the target shielding file, and then the shielding operation can be directly performed without the need for static verification at the top layer again, thereby improving the verification efficiency of the RTL code. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0016] Figure 1 A schematic diagram of a flow chart of a computer program being executed by a processor in an RTL static verification system provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0018] This embodiment provides an RTL static verification system, characterized in that the system includes: a static verification tool, a database, a processor, and a memory storing a computer program, wherein the database includes a bottom-level RTL code to be verified, a verification rule set, and a reference information set, the bottom-level RTL code includes a plurality of code segments, and the reference information set includes a plurality of reference information, see Figure 1 , is a flow chart of a computer program executed by a processor in an RTL static verification system provided by an embodiment of the present invention. When the computer program is executed by the processor, the following steps are implemented:
[0019] S101, according to the verification rule set, using the static verification tool to verify each code segment in the underlying RTL code, to obtain M abnormal code segments and their corresponding abnormal information, where M is a positive integer;
[0020] S102, for any abnormal code segment, if the abnormal information corresponding to the abnormal code segment is consistent with any reference information, then the abnormal code is determined to be a first-category abnormal code segment, otherwise, the abnormal code is determined to be a second-category abnormal code segment, and m1 first-category abnormal code segments and m2 second-category abnormal code segments are obtained, where m1 and m2 are both non-negative integers and m1+m2=M, and the first-category abnormal code segment is not allowed to perform a shielding operation;
[0021] S103, for any second-type abnormal code segment, if the second-type abnormal code segment corresponds to a shielding operation, obtaining an underlying shielding file corresponding to the second-type abnormal code segment;
[0022] S104, if the bottom-level shielding file includes initial module name information and generation blocks and their corresponding first-level path information, the initial module name information in the bottom-level shielding file is mapped to target module name information using a preset mapping method, and the first-level path information in the bottom-level shielding file is expanded into second-level path information according to DFT design rules to obtain a target shielding file corresponding to the second type of abnormal code segment;
[0023] S105, integrating the bottom RTL code into the top layer to obtain the top RTL code, using each target shielding file to match each code segment in the top RTL code, and determining that the code segments matched by each target shielding file are target code segments;
[0024] S106, after performing a masking operation on each target code segment in the top-level RTL code, verify the top-level RTL code using the static verification tool according to the verification rule set.
[0025] Among them, the underlying RTL code to be verified may include several code segments, and the verification rule set may include several rules for verification. Usually, there are several preset verification rules corresponding to the static verification tool. In this embodiment, in addition to the several preset verification rules corresponding to the static verification tool, the verification rule set also includes several preset a priori verification rules. The a priori verification rules can be obtained by the designer through analysis based on their historical verification information.
[0026] The abnormal code segment may refer to an RTL code segment where an abnormality occurs during verification by a static verification tool.
[0027] Specifically, the first type of abnormal code segment can represent an abnormal code segment with a higher degree of danger. This type of code segment is determined by comparing the abnormal information with the pre-set reference information. The reference information may refer to the abnormal information that will directly cause the back-end integrated task to have an abnormality. Therefore, the first type of abnormal code segment should be marked during the static verification process and cannot be blocked by the designer.
[0028] The second type of abnormal code segment may represent an abnormal code segment with a lower degree of danger. As designers optimize and change the RTL code during the design process, some code segments may become abnormal during detection. If such code segments do not affect the overall design, designers can choose to repair or block the second type of abnormal code segments based on actual conditions.
[0029] If the designer performs a shielding operation on the second type of exception code segment during the bottom-level verification, a corresponding bottom-level shielding file will be generated for the second type of exception code segment. If the bottom-level shielding file includes the initial module name information and the generation block and its corresponding first-level path information, it means that the bottom-level shielding file can be applied to the top-level verification after processing. Otherwise, it means that the bottom-level shielding file cannot be applied to the top-level verification.
[0030] In a specific implementation, the static verification tool is a spyglass tool;
[0031] The method of verifying each code segment in the underlying RTL code using the static verification tool according to the verification rule set to obtain M abnormal code segments and their corresponding abnormal information includes:
[0032] According to the verification rule set, the spyglass tool is used to perform lint verification on each code segment in the underlying RTL code to obtain the M abnormal code segments and their corresponding abnormal information.
[0033] In this embodiment, the lint module of the spyglass tool is used to verify each code segment in the underlying RTL code.
[0034] In a specific embodiment, the system further comprises a backend synthesis tool;
[0035] The method of obtaining the reference information set includes:
[0036] After obtaining the abnormal code segment and its abnormal information, the backend synthesis tool is used to execute the backend synthesis task according to the abnormal code segment. If the backend synthesis task is executed abnormally, the abnormal information is added to the reference information set as reference information.
[0037] Among them, the back-end synthesis tool can be used to convert the RTL code into a netlist, and the back-end synthesis tool can use a DC tool, a Genus tool, etc.
[0038] In a specific implementation manner, if the backend integrated task is executed abnormally, adding the abnormal information as reference information to the reference information set includes:
[0039] If the execution of the backend integrated task is terminated or the absolute value of the difference between the hardware area obtained by executing the backend integrated task and the preset reference area is greater than a preset threshold, the abnormal information is added to the reference information set as reference information.
[0040] The hardware area may refer to the hardware area corresponding to the netlist obtained by executing the back-end synthesis task, and the reference area may be set by the designer according to his / her experience.
[0041] In a specific implementation manner, the step of integrating the bottom RTL code into the top layer to obtain the top RTL code includes:
[0042] The bottom-level RTL code is integrated into the top level, and the DFT design is added to obtain the top-level RTL code. The DFT design sets the initial module name information in the bottom-level RTL code as the unique reference module name information, and expands the generation block. Accordingly, the first-level path information corresponding to the generation block is changed to the second-level path information.
[0043] Among them, the generation block is not expanded in the underlying RTL code. After the underlying RTL code is integrated into the top layer and goes through the DFT design process, the generation block is expanded, and its corresponding first-level path information will also change, that is, it will change to the second-level path information. At the same time, in order to ensure the uniqueness of the module name information in the underlying RTL code, the initial module name information in the underlying RTL code is set to the unique reference module name information.
[0044] In a specific implementation manner, after the first-level path information in the bottom-level shielding file is expanded into the second-level path information according to the DFT design rule, the method further includes:
[0045] The variable information in the bottom shielding file corresponding to the second-type abnormal code segment is removed to obtain a target shielding file corresponding to the second-type abnormal code segment, wherein the variable information at least includes file path information.
[0046] Among them, variable information can also include code line number information, etc. Generally, the more matching items there are in the shielding file, the higher the credibility of the matching result. Therefore, items that change according to different environments or levels will be removed from the shielding file, so that the information in the shielding file can be matched as much as possible.
[0047] In a specific implementation, mapping the initial module name information to the target module name information using a preset mapping method includes:
[0048] The preset identifier is concatenated with the initial module name information to obtain the target module name information, and the target module name information is used for fuzzy matching.
[0049] The preset identifier can be represented by "*", and the target module name information can be fuzzy matched using a regular expression. In this embodiment, the preset identifier can be spliced before and / or after the initial module name information to achieve fuzzy matching.
[0050] In a specific implementation manner, each RTL code in the top-level RTL code corresponds to reference module name information and reference level path information;
[0051] When the target shielding file is used to match the RTL code in the top layer, the target module name information in the target shielding file is fuzzily matched with the reference module name information, and the second level path information in the target shielding file is accurately matched with the reference level path information.
[0052] Among them, since fuzzy matching is introduced when the module name information is used as a matching item, in order to avoid the target shielding file matching multiple code segments in the top-level RTL code, the second-level path information is added as a matching item for matching. Since the hierarchical path information is usually unique, it can ensure that the target shielding file is accurately matched to a single RTL code segment, and the method of multiple matching items can also effectively improve the credibility of the match.
[0053] In this embodiment, the abnormal code segment whose abnormal information is consistent with any reference information is regarded as the first type of abnormal code segment. The first type of abnormal code does not allow the shielding operation to be performed, so the designer can only repair it, which ensures the feasibility of the RTL code design, thereby improving the verification efficiency of the RTL code. For the second type of abnormal code segment after the shielding process, the corresponding initial shielding file is adjusted to the target shielding file, so that after the bottom-level RTL code is integrated into the top level, the target code segment can be obtained by matching the target shielding file, and then the shielding operation can be directly performed without the need to perform static verification again at the top level, thereby improving the verification efficiency of the RTL code.
[0054] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.
Claims
1. An RTL static verification system, characterized in that: The system comprises: a static verification tool, a database, a processor and a memory storing a computer program, wherein the database comprises a bottom-level RTL code to be verified, a verification rule set and a reference information set, the bottom-level RTL code comprises a plurality of code segments, and the reference information set comprises a plurality of reference information. When the computer program is executed by the processor, the following steps are implemented: S101, according to the verification rule set, using the static verification tool to verify each code segment in the underlying RTL code, to obtain M abnormal code segments and their corresponding abnormal information, where M is a positive integer; S102, for any abnormal code segment, if the abnormal information corresponding to the abnormal code segment is consistent with any reference information, then the abnormal code segment is determined to be a first-category abnormal code segment, otherwise, the abnormal code segment is determined to be a second-category abnormal code segment, and m1 first-category abnormal code segments and m2 second-category abnormal code segments are obtained, where m1 and m2 are both non-negative integers and m1+m2=M, and the first-category abnormal code segment is not allowed to perform a shielding operation; S103, for any second-type abnormal code segment, if the second-type abnormal code segment corresponds to a shielding operation, obtaining an underlying shielding file corresponding to the second-type abnormal code segment; S104: If the bottom-level shielding file includes initial module name information and generation blocks and their corresponding first-level path information, the initial module name information in the bottom-level shielding file is mapped to target module name information using a preset mapping method, and the first-level path information in the bottom-level shielding file is expanded into second-level path information according to DFT design rules to obtain a target shielding file corresponding to the second type of abnormal code segment, wherein the initial module name information is mapped to the target module name information using a preset mapping method, including: splicing the preset identifier with the initial module name information to obtain the target module name information, wherein the target module name information is used for fuzzy matching; S105, integrating the bottom RTL code into the top layer to obtain the top RTL code, using each target shielding file to match each code segment in the top RTL code, and determining that the code segments matched by each target shielding file are target code segments, wherein each RTL code in the top RTL code corresponds to reference module name information and reference hierarchical path information, and integrating the bottom RTL code into the top layer to obtain the top RTL code includes: Integrate the bottom RTL code into the top layer, and add DFT design to obtain the top RTL code, wherein the DFT design sets the initial module name information in the bottom RTL code as the unique reference module name information, and expands the generation block, and accordingly, the first-level path information corresponding to the generation block is changed to the second-level path information; When the target shielding file is used to match the RTL code in the top layer, the target module name information in the target shielding file is fuzzily matched with the reference module name information, and the second level path information in the target shielding file is accurately matched with the reference level path information; S106, after performing a masking operation on each target code segment in the top-level RTL code, verify the top-level RTL code using the static verification tool according to the verification rule set.
2. The RTL static verification system according to claim 1, characterized in that: The static verification tool is the spyglass tool; The method of verifying each code segment in the underlying RTL code using the static verification tool according to the verification rule set to obtain M abnormal code segments and their corresponding abnormal information includes: According to the verification rule set, the spyglass tool is used to perform lint verification on each code segment in the underlying RTL code to obtain the M abnormal code segments and their corresponding abnormal information.
3. The RTL static verification system according to claim 1, characterized in that: The system also includes a back-end synthesis tool; The method of obtaining the reference information set includes: After obtaining the abnormal code segment and its abnormal information, the backend synthesis tool is used to execute the backend synthesis task according to the abnormal code segment. If the backend synthesis task is executed abnormally, the abnormal information is added to the reference information set as reference information.
4. The RTL static verification system according to claim 3, characterized in that: If the backend integrated task is executed abnormally, adding the abnormal information as reference information to the reference information set includes: If the execution of the backend integrated task is terminated or the absolute value of the difference between the hardware area obtained by executing the backend integrated task and the preset reference area is greater than a preset threshold, the abnormal information is added to the reference information set as reference information.
5. The RTL static verification system according to claim 1, characterized in that: After the first-level path information in the bottom shielding file is expanded into the second-level path information according to the DFT design rule, the method further includes: The variable information in the bottom shielding file corresponding to the second-type abnormal code segment is removed to obtain a target shielding file corresponding to the second-type abnormal code segment, wherein the variable information at least includes file path information.