A method for automatically selecting the resistance value of parallel resistors during experiments

Abstract

The present invention discloses a method for automatically selecting the resistance value of a parallel resistor during an experiment, comprising step S1: inputting the use requirements, inputting the driving voltage ΔV ge 、The nominal average power P of a single driving resistor avg , derating factor k derate , the gate charge Q of the power module g , external drive capacitor C ge , switching frequency f sw , where the driving voltage ΔV ge =V ge_max ‑V ge_min The present invention discloses a method for automatically selecting the resistance value of parallel resistors during experiments. During a single debugging, by inputting basic information such as the target resistance value, the number of parallel connections, and the maximum difference from the target resistance value, all possible parallel connection situations are traversed and calculated to obtain the optimal parallel resistance selection method, thereby saving development time.

Description

Technical Field

[0001] The invention belongs to the technical field of automatic resistance selection, and in particular relates to a method for automatically selecting the resistance value of a parallel resistor during an experiment. Background Art

[0002] In existing automotive electric drive systems, power modules are widely used. In order to maximize the performance of the module, a double pulse test is usually performed to select the appropriate drive resistor. Due to factors such as resistance accuracy and derating, the drive resistor usually uses multiple resistors in parallel.

[0003] In order to meet the requirements of voltage stress, oscillation, switching loss and other factors of the power module, multiple debugging is required during the double pulse experiment to obtain the optimal equivalent drive resistance. Due to the large number of debugging times, it will take a lot of time to select parallel resistors by manual calculation during each debugging, which is especially obvious when there are many parallel resistors; and if the resistance value of the maximum resistor and the minimum resistor in the manually selected parallel resistors differ too much, it may cause the minimum resistor to bear too much current and fail to meet the derating requirements.

[0004] Therefore, further improvements are made to the above problems. Summary of the invention

[0005] The main purpose of the present invention is to provide a method for automatically selecting the resistance value of parallel resistors during experiments. During a single debugging, by inputting basic information such as the target resistance value, the number of parallel connections, and the maximum difference from the target resistance value, all possible parallel situations can be traversed and calculated to obtain the optimal parallel resistance selection method, thereby saving development time.

[0006] To achieve the above object, the present invention provides a method for automatically selecting the resistance value of a parallel resistor during an experiment, comprising the following steps:

[0007] Step S1: Input usage requirements and input driving voltage ΔV ge 、The nominal average power P of a single driving resistor avg , derating factor k derate , the gate charge Q of the power module g , external drive capacitor C ge , switching frequency f sw , where the driving voltage ΔV ge =V ge_max -V ge_min ;

[0008] Step S2: Enter the parallel resistance value requirement and the target resistance value R goal , parallel number n, parallel resistance equivalent resistance R eq and the target resistance R goalThe maximum difference ΔR goal_max , the maximum difference between the maximum resistance and the minimum resistance ΔR max ;

[0009] Step S3: traverse and calculate the equivalent driving resistance. Assume that there are m resistors of different types in the resistor library, and their resistance values ​​are r1, r2, ..., r m , and suppose the number of parallel inputs is n (n ≥ 2), then the parallel resistors are R1, R2, …, R n , then the equivalent resistance after parallel connection satisfies:

[0010]

[0011] Since R1, R2, …, R n There are m optional resistance values, so there are m n A parallel connection method, namely R eq There are n possibilities, let R1, R2, …, R n The maximum resistance is R max , the minimum resistance is R min , in order to satisfy ΔR in step S2 goal_max and ΔR max , then:

[0012]

[0013] Traverse m n There are k parallel connection methods, and all the parallel connection methods that meet the requirements are screened out. If there are k parallel connection methods in total, then 0≤k≤m n If k = 0, it means that the input ΔR goal_max Or ΔR is too small; if k = m n , indicating the input ΔR goal_max or ΔR max Too large, you need to re-enter the appropriate ΔR goal_max or ΔR max ;

[0014] Step S4: Calculate the driving resistor power and derating. Assuming the average driving power of a single bridge arm is W, we have

[0015] W=f sw *(Q g +ΔV ge *C ge );

[0016] The average driving power when turned on or off is 1 / 2W. The k types (k>0) of parallel connection methods that meet the resistance requirements of the parallel resistors are screened out in step S3. For each parallel connection method, the maximum average power of a single resistor is calculated as:

[0017]

[0018] Assume there are k1 parallel connection modes that satisfy P max ≤P avg *k derate , then 0≤k1≤k; if k1=0, it means that the current parallel number n cannot meet the derating requirement, and a larger parallel number n needs to be selected;

[0019] Step S5: Output the optimal parallel resistance scheme to obtain the ΔR in the k1 type (k1>0) parallel connection method of step S4 goal The smallest parallel connection method is the optimal parallel resistance solution.

[0020] As a further preferred technical solution of the above technical solution, in step S3, ΔR goal_max =0.1Ω, ΔR max =10Ω.

[0021] As a further preferred technical solution of the above technical solution, in step S3, the resistor with the largest resistance in the resistor library should be no less than 2R goal .

[0022] To achieve the above objectives, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the method for automatically selecting the resistance value of a parallel resistor during an experiment are implemented.

[0023] To achieve the above objectives, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for automatically selecting the resistance value of a parallel resistor during an experiment. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 The present invention is a flow chart of a method for automatically selecting the resistance value of a parallel resistor during an experiment. DETAILED DESCRIPTION

[0025] The following description is used to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations. The basic principles of the present invention defined in the following description can be applied to other embodiments, variations, improvements, equivalents, and other technical solutions that do not deviate from the spirit and scope of the present invention.

[0026] In the preferred embodiment of the present invention, those skilled in the art should note that the resistors and the like involved in the present invention may be regarded as prior art.

[0027] Preferred embodiments.

[0028] The present invention discloses a method for automatically selecting the resistance value of a parallel resistor during an experiment, comprising the following steps:

[0029] Step S1: Input usage requirements and input driving voltage ΔV ge 、The nominal average power P of a single driving resistor avg , derating factor k derate , the gate charge Q of the power module g , external drive capacitor C ge , switching frequency f sw , where the driving voltage ΔV ge =V ge_max -V ge_min ;

[0030] Step S2: Enter the parallel resistance value requirement and the target resistance value R goal , parallel number n, parallel resistance equivalent resistance R eq and the target resistance R goal The maximum difference ΔR goal_max , the maximum difference between the maximum resistance and the minimum resistance ΔR max ;

[0031] Step S3: traverse and calculate the equivalent driving resistance. Assume that there are m resistors of different types in the resistor library, and their resistance values ​​are r1, r2, ..., r m , and suppose the number of parallel inputs is n (n ≥ 2), then the parallel resistors are R1, R2, …, R n , then the equivalent resistance after parallel connection satisfies:

[0032]

[0033] Since R1, R2, …, R n There are m optional resistance values, so there are m n A parallel connection method, namely R eq There are n possibilities, let R1, R2, …, R n The maximum resistance is R max , the minimum resistance is R min , in order to satisfy ΔR in step S2 goal_max and ΔR max , then:

[0034]

[0035] Traverse m n There are k parallel connection methods, and all the parallel connection methods that meet the requirements are screened out. If there are k parallel connection methods in total, then 0≤k≤m nIf k = 0, it means that the input ΔR goal_max Or ΔR is too small; if k = m n , indicating the input ΔR goal_max or ΔR max Too large, you need to re-enter the appropriate ΔR goal_max or ΔR max ;

[0036] Step S4: Calculate the driving resistor power and derating. Assuming the average driving power of a single bridge arm is W, we have

[0037] W=f sw *(Q g +ΔV ge *C ge );

[0038] The average driving power when turned on or off is 1 / 2W. The k types (k>0) of parallel connection methods that meet the resistance requirements of the parallel resistors are screened out in step S3. For each parallel connection method, the maximum average power of a single resistor is calculated as:

[0039]

[0040] Assume there are k1 parallel connection modes that satisfy P max ≤P avg *k derate , then 0≤k1≤k; if k1=0, it means that the current parallel number n cannot meet the derating requirement, and a larger parallel number n needs to be selected;

[0041] Step S5: Output the optimal parallel resistance scheme to obtain the ΔR in the k1 type (k1>0) parallel connection method of step S4 goal The smallest parallel connection method is the optimal parallel resistance solution.

[0042] Specifically, in step S3, ΔR goal_max =0.1Ω, ΔR max =10Ω.

[0043] More specifically, in step S3, the resistor with the largest resistance in the resistor library should be no less than 2R goal .

[0044] The present invention also discloses an electronic device, including a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the program, the steps of the method for automatically selecting the resistance value of a parallel resistor in an experiment are implemented.

[0045] The present invention also discloses a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the method for automatically selecting the resistance value of a parallel resistor in an experiment are implemented.

[0046] It is worth mentioning that the technical features such as resistors involved in the patent application of this invention should be regarded as prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected by conventional methods in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated.

[0047] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for automatically selecting the resistance value of a parallel resistor during an experiment, characterized in that: The following steps are involved: Step S1: Input usage requirements and input driving voltage ΔV ge 、The nominal average power P of a single driving resistor avg , derating factor k derate , the gate charge Q of the power module g , external drive capacitor G ge , switching frequency f sw , where the driving voltage ΔV ge =V ge_max -V ge_min ; Step S2: Enter the parallel resistance value requirement and the target resistance value R goal , parallel number n, parallel resistance equivalent resistance R eq and the target resistance R goal The maximum difference ΔR goal_max , the maximum difference between the maximum resistance and the minimum resistance ΔR max ; Step S3: traverse and calculate the equivalent driving resistance. Assume that there are m resistors of different types in the resistor library, and their resistance values ​​are r1, r2, ..., r m , and suppose the number of parallel inputs is n, then the parallel resistors are R1, R2, ..., R n , then the equivalent resistance after parallel connection satisfies: Since R1, R2, ..., R n There are m optional resistance values, so there are m n A parallel connection method, namely R eq There are n possibilities, let R1, R2, ..., R n The maximum resistance is R max , the minimum resistance is R min , in order to satisfy ΔR in step S2 goal_max and ΔR max , then: Traverse m n There are k parallel connection methods, and all the parallel connection methods that meet the requirements are screened out. If there are k parallel connection methods in total, then 0≤k≤m n If k = 0, it means that the input ΔR goal_max Or ΔR is too small; if k = m n , indicating the input ΔR goal_max or ΔR max Too large, you need to re-enter the appropriate ΔR goal_max or ΔR max ; Step S4: Calculate the driving resistor power and derating. Assuming the average driving power of a single bridge arm is W, we have W=f sw *(Q g +ΔV ge *C ge ); The average driving power when turned on or off is 1 / 2W. The k parallel connection modes that meet the parallel resistance value requirements are screened out in step S3. For each parallel connection mode, the maximum average power of a single resistor is calculated as: Assume there are k1 parallel connection modes that satisfy P max ≤P avg *k derate , then 0≤k1≤k; if k1=0, it means that the current parallel number n cannot meet the derating requirement, and a larger parallel number n needs to be selected; Step S5: Output the optimal parallel resistance scheme to obtain ΔR in k1 parallel modes of step S4 goal The smallest parallel connection method is the optimal parallel resistance solution.

2. The method for automatically selecting the resistance value of a parallel resistor during an experiment according to claim 1, characterized in that: In step S3, ΔR goal_max =0.1Ω, ΔR max =10Ω.

3. The method for automatically selecting the resistance value of a parallel resistor during an experiment according to claim 2, characterized in that: In step S3, the resistor with the largest resistance in the resistor library should be no less than 2R goal .

4. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps of a method for automatically selecting the resistance value of a parallel resistor during an experiment as described in any one of claims 1 to 3 are implemented.

5. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of a method for automatically selecting the resistance value of a parallel resistor in an experiment as claimed in any one of claims 1 to 3 are implemented.

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