Epitaxial structure of avalanche photodiode and method for manufacturing the same

Abstract

The present invention provides an epitaxial structure of an avalanche photodiode and a manufacturing method thereof, including growing an absorption layer, a charge layer and a multiplication layer on a substrate, wherein the steps of forming the multiplication layer include: sequentially growing an intrinsic or unintentionally doped semiconductor layer and an N-type control layer, wherein a P-type diffusion region extending from the surface of the multiplication layer to the inside is provided in the N-type control layer. The present invention introduces an N-type control layer with a predetermined thickness, and utilizes the principle of mutual repulsion of the same electrical property of diffused interstitial impurities after the N-type doping source is completely ionized as a donor energy level, so as to accurately control the diffusion depth of the P-type diffusion region and improve the yield of the APD epitaxial wafer. The manufacturing method of the present invention accurately introduces the N-type control layer near the predetermined depth of the multiplication layer during epitaxial growth, especially for the APD epitaxial wafer that needs to perform two Zn diffusion preparations, thereby expanding the redundancy of the Zn diffusion process, especially in the mass production mode, providing accurate control of the Zn diffusion depth without affecting the performance of the device.

Description

Technical Field

[0001] The invention belongs to the field of photoelectric detectors and relates to an epitaxial structure of an avalanche photodiode and a manufacturing method thereof. Background Art

[0002] In optical fiber communication systems, avalanche photodiodes (APDs) are used to convert optical signals into electrical signals. Compared with traditional PIN (pin) photodiodes, avalanche photodiodes (APDs) have the advantages of high sensitivity and low noise, and are therefore widely used in high-speed communications and passive optical access networks (PONs). APDs are mainly divided into table-type and planar APDs, among which planar APDs have the advantages of high reliability and low dark current. However, planar APDs will face the problem of edge breakdown of the PN junction when working under a higher reverse bias. This is because the APD has a PN junction formed by diffusion or injection, and the edge of the P-type diffusion region has a curve effect, which makes the electric field strength at the edge higher than the electric field strength of the active region in the center of the PN junction. As the voltage increases, the edge of the PN junction will break down before the active region in the center of the PN junction breaks down. The edge breakdown effect will cause the reliability of the device to deteriorate and the dark current to increase.

[0003] See also Figure 1 , which shows a schematic diagram of the cross-sectional structure of an avalanche photodiode. The APD device generally includes a substrate 01, a buffer layer 02, an absorption layer 03, a gradient layer 04, a charge layer 05 and a multiplication layer 06, wherein the multiplication layer 06 is usually an intrinsic or unintentionally doped N-type semiconductor layer composed of InP or InGaAs, and includes a P-type diffusion region 061. At present, most of the methods are to adjust the combination of the impurity source flow rate, diffusion time and diffusion window in each diffusion process to achieve the control of the PN junction edge electric field, thereby suppressing the edge breakdown effect. However, the process flow of the P-type diffusion area has the following problems: two Zn diffusions are required to form the P-type diffusion area by thermal diffusion, but the diffusion depths and diffusion windows of the two Zn diffusions are different, which increases the difficulty of debugging and controlling the Zn diffusion process. Especially in mass production mode, the Zn diffusion machine will drift with the increase of the cumulative number of Zn diffusions and the change of the chamber environment, thereby causing the Zn diffusion process to drift, resulting in changes in the Zn diffusion depth, and thus the performance of the APD device drifts and the performance does not meet the standards, resulting in yield loss and even product quality batch problems.

[0004] Therefore, how to overcome the problem of difficult to accurately control the diffusion depth during the formation of the P-type diffusion region in the prior art and the resulting premature breakdown or performance drift of the device has become an important technical problem that needs to be urgently solved by technical personnel in this field.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an epitaxial structure of an avalanche photodiode and a method for manufacturing the same, so as to solve the problem in the prior art that the diffusion depth of the P-type diffusion region is difficult to accurately control while ensuring that the device performance is not affected.

[0007] To achieve the above-mentioned purpose and other related purposes, the present invention provides an epitaxial structure of an avalanche photodiode, comprising a substrate and an absorption layer, a charge layer and a multiplication layer stacked on the substrate, the multiplication layer comprising sequentially grown intrinsic or unintentionally doped semiconductor layers and an N-type regulation layer, a P-type diffusion region extending from the surface of the multiplication layer to the inside is arranged in the N-type regulation layer, and the N-type regulation layer has a predetermined thickness to control the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside so as not to exceed the N-type regulation layer.

[0008] Optionally, the P-type diffusion region is configured such that a central diffusion depth is greater than an edge diffusion depth so that a stepped PN junction is formed between the P-type diffusion region and the multiplication layer.

[0009] Optionally, the N-type regulating layer is configured as an N-type doping region with a continuously gradient doping concentration, wherein the N-type regulating layer is configured so that the diffusion front of the P-type diffusion region from the surface to the inside of the multiplication layer ends within the N-type regulating layer.

[0010] Optionally, the N-type regulation layer is configured to be a plurality of spaced N-type doped regions, and the N-type regulation layer is configured so that the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside terminates within the N-type regulation layer and is joined to at least one N-type doped region along the diffusion direction.

[0011] Optionally, the N-type regulating layer has a thickness less than 200 nm; and / or each N-type doping region has a thickness of 1e15 cm -3 to 1e18 cm -3 of doping concentration.

[0012] Optionally, the epitaxial structure further includes a gradient layer and a buffer layer, wherein the gradient layer is arranged between the absorption layer and the charge layer, and the buffer layer is arranged between the substrate and the absorption layer or the multiplication layer.

[0013] Optionally, the material of the substrate includes one of InP and GaAs; the material of the multiplication layer includes one of InP, InGaAs and InGaAsP; the charge layer includes one of InP and InAlAs; and the material of the absorption layer includes one of InGaAs and GaAs.

[0014] The present invention also provides an avalanche photodiode, comprising the epitaxial structure of the aforementioned avalanche photodiode, a P-side electrode layer located above a P-type diffusion region, and an N-side electrode layer located above the substrate, wherein the multiplication layer also includes a guard ring, and the guard ring is arranged at the periphery of the P-type diffusion region.

[0015] Optionally, it further includes: a light injection window located at a side of the substrate away from the multiplication layer, and a transmittance-enhancing layer is arranged in the light injection window.

[0016] The present invention provides a method for manufacturing an epitaxial structure of an avalanche photodiode, comprising the following steps:

[0017] Providing a substrate, growing an absorption layer, a charge layer and a multiplication layer on the substrate, the step of forming the multiplication layer comprising sequentially growing an intrinsic or unintentionally doped semiconductor layer and an N-type regulating layer;

[0018] A P-type diffusion region is formed in the N-type regulating layer, wherein the N-type regulating layer has a predetermined thickness to control the diffusion front of the P-type diffusion region from the surface to the inside of the multiplication layer to not exceed the N-type regulating layer.

[0019] Optionally, the multiplication layer is grown by a single epitaxial process, the multiplication layer includes a bottom portion and a top portion that are grown continuously, and in-situ doping is performed during the growth of the top portion of the multiplication layer to form the N-type regulating layer.

[0020] Optionally, based on the number of diffusion processes required to be performed to form the P-type diffusion region being m, the N-type control layer is formed into at least m spaced N-type doped regions by intermittently introducing an N-type impurity source so that the diffusion front that advances toward the interior of the multiplication layer each time the diffusion process is performed terminates in the corresponding N-type doped region, where m is a natural number.

[0021] Optionally, the step of forming the P-type diffusion region includes: defining a first diffusion window through a photolithography process, and forming a primary diffusion region by diffusion and thermal annealing using an impurity source with a first doping flow rate; defining a second diffusion window through a photolithography process, and forming a secondary diffusion region by diffusion and thermal annealing using an impurity source with a second doping flow rate, wherein the width of the first diffusion window is greater than the width of the second diffusion window, and the central diffusion depth of the secondary diffusion region is greater than the central diffusion depth of the primary diffusion region so that the P-type diffusion region is formed into a stepped profile in which the central diffusion depth is greater than the edge diffusion depth.

[0022] As described above, the epitaxial structure of the avalanche photodiode and the method for manufacturing the same according to the present invention have the following beneficial effects:

[0023] In the epitaxial structure of the avalanche photodiode of the present invention, an N-type regulating layer is provided in the multiplication layer, and a P-type diffusion region is formed in the N-type regulating layer by diffusion, and the diffusion depth of the P-type diffusion region is precisely controlled by utilizing the principle of mutual repulsion of the same electrical property of the diffused interstitial impurities after the N-type doping source is completely ionized as the donor energy level, thereby avoiding premature breakdown at the edge of the PN junction of the APD and reducing the drift of the performance of the batch-manufactured device, thereby improving the yield of the APD epitaxial wafer;

[0024] The method for manufacturing the epitaxial structure of the avalanche photodiode of the present invention forms a P-type diffusion region in the N-type regulation layer by diffusion after introducing an N-type regulation layer in the multiplication layer. In particular, for APD epitaxial wafers that need to perform two Zn diffusion preparations, the redundancy of the Zn diffusion process can be expanded, especially in mass production mode, by accurately introducing the N-type regulation layer near a predetermined depth of the multiplication layer during epitaxial growth, precise control of the diffusion depth is provided without affecting the performance of the device; in addition, the N-type regulation layer can be formed by an in-situ doping process at the same time as the epitaxial process, the manufacturing process is mature, and large-scale production can be easily achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Shown is a schematic diagram of the structure of an avalanche photodiode used in single-photon detection mode.

[0026] Figure 2 It is a cross-sectional schematic diagram of the epitaxial structure of the avalanche photodiode in the first embodiment of the present invention.

[0027] Figure 3 A cross-sectional schematic diagram showing another example of the epitaxial structure of the avalanche photodiode in the first embodiment of the present invention.

[0028] 4A to 4F The graph shows the relationship between the doping concentration of the N-type control layer and the depth in the first embodiment of the present invention.

[0029] Figure 5 It is a cross-sectional schematic diagram of an avalanche photodiode in the first embodiment of the present invention.

[0030] FIG. 6A to FIG. 6D It is a schematic diagram showing the structure obtained in multiple stages of manufacturing the epitaxial structure of an avalanche photodiode in the second embodiment of the present invention.

[0031] Component number description:

[0032] 01.1 Substrate

[0033] 02.2 Buffer layer

[0034] 03.3 Absorption layer

[0035] 04.4 Gradient layer

[0036] 05.5 Charge layer

[0037] 06.6 Multiplication Layer

[0038] 7 Protection ring

[0039] 8 N-type control layer

[0040] 80 Semiconductor layer

[0041] 061, 81 P-type diffusion region

[0042] 21 Passivation layer

[0043] 810 Primary diffusion zone

[0044] 120 Light injection window

[0045] 121 Anti-reflection layer

[0046] 16 P-side electrode layer

[0047] 11 N-side electrode layer DETAILED DESCRIPTION

[0048] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0049] See also Figure 2To Figure 6. It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout type may also be more complicated.

[0050] Embodiment 1

[0051] To achieve the above-mentioned purpose and other related purposes, the present embodiment provides an epitaxial structure of an avalanche photodiode, comprising a substrate 1 and an absorption layer 3, a charge layer 5 and a multiplication layer 6 stacked on the substrate, the multiplication layer 6 comprising intrinsic or unintentionally doped semiconductor layers and an N-type regulation layer 8 stacked in sequence along its growth direction, the N-type regulation layer 8 being provided with a P-type diffusion region 81 extending from the surface of the multiplication layer to the inside, and the N-type regulation layer 8 having a predetermined thickness so as to control the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside to not exceed the N-type regulation layer.

[0052] Specifically, the material of the substrate 1 may be InP or GaAs, the material of the absorption layer 3 includes one of InGaAs, InAlAs, and GaAs, the material of the charge layer 5 includes one of InP and InAlAs, the material of the multiplication layer 6 includes one of InP, InGaAs, and InGaAsP, and the multiplication layer 6 includes a P-type diffusion region 81 extending from its surface to the inside, which is used to define the multiplication region and provide a PN junction, such as Figure 5 As shown, the multiplication region 62 may have a thickness W m , used to multiply the photocurrent by the avalanche multiplication effect.

[0053] The epitaxial structure of the avalanche photodiode also includes a buffer layer 2 and a gradient layer 4. As an example, the buffer layer 2 is arranged between the substrate 1 and the absorption layer 3 to adjust the lattice mismatch between the substrate 1 and the absorption layer 3, and improve the reliability and performance stability of the device; the gradient layer 4 is arranged between the absorption layer 3 and the charge layer 5. For example, the epitaxial structure of the avalanche photodiode can be configured to make an InP / InGaAs-based SAGCM avalanche photodiode, which includes an N-type InP buffer layer, an intrinsic InGaAs absorption layer, an intrinsic InGaAsP gradient layer, an N-type InP charge layer and an intrinsic InP multiplication layer stacked on the substrate 1, and the substrate 1 itself can use an N-type heavily doped InP substrate. Since there is a certain energy level difference in the interface valence band between the absorption layer 3 composed of intrinsic InGaAs and the charge layer 5 composed of intrinsic InP in the epitaxial layer of the SAGCM avalanche photodiode of the InP / InGaAs system, by inserting several layers of InGaAsP gradient / transition layers, the valence band transition can be smoothed and the influence of hole traps can be reduced.

[0054] As an example, the buffer layer 2 is disposed between the substrate 1 and the multiplication layer 6, and the gradient layer 4 is disposed between the absorption layer 3 and the charge layer 5. For example, the epitaxial structure of the avalanche photodiode can be configured to make a SAGCM avalanche photodiode of the InAlAs / InGaAs system, which includes an N-type InP buffer layer, an intrinsic InAlAs multiplication layer, a P-type InAlAs charge layer, an intrinsic InAlGaAs gradient layer and an intrinsic InAlAs absorption layer stacked on the substrate 1, and the substrate 1 itself can be an N-type heavily doped InP substrate.

[0055] The P-type diffusion region 81 is set to have a central diffusion depth greater than an edge diffusion depth, so as to provide a stepped PN junction in the multiplication layer 6. To ensure the effect of collision ionization between the multiplication layer and the P-type diffusion region, the depth and distribution of the N-type control layer 8 can be determined according to the position of the P-type diffusion region and the central diffusion depth, so that the cutoff surface of the N-type control layer 8 from the surface of the multiplication layer to the inside can be set to be slightly lower than the diffusion front of the P-type diffusion region 81, that is, the diffusion front of the P-type diffusion region 81 including the central diffusion region ends in the N-type control layer. Since the P-type diffusion region 81 is formed in the N-type control layer 8, the pre-formed N-type doping will inhibit the diffusion of P-type impurities such as Zn and Cd, and improve the tailing effect.

[0056] The N-type control layer 8 is configured as a continuous N-type doping region, and the impurity distribution of the N-type doping region can be configured based on the P-type diffusion region. Preferably, when the P-type diffusion region is configured as a stepped profile with more than two diffusion depths formed by multiple diffusions, the N-type control layer is configured as a plurality of N-type doping regions with different impurity distributions, so that the diffusion front formed by each diffusion process ends in the N-type doping region of the N-type control layer; Figure 2 As shown, the P-type diffusion region 81 has a stepped cross-section with an edge diffusion depth D1 and a center diffusion depth D2, wherein D2 is greater than D1, and the cut-off surfaces with the center diffusion depth D1 and the edge diffusion depth D2 terminate at the N-type doping regions with different impurity distributions in the N-type control layer, respectively. The N-type control layer 8 can be set to have a doping concentration that gradually changes along its depth direction according to the impurity distribution of the P-type diffusion region and the actual process requirements. The "gradual doping concentration" referred to herein includes that the P-type diffusion region has a gradually increasing or decreasing doping concentration as a whole along the depth direction, and that a section thereof has a gradually increasing or decreasing doping concentration.

[0057] In other embodiments, the N-type regulating layer 8 is configured as a plurality of spaced N-type doping regions, and at least one of the plurality of N-type doping regions along the growth direction of the N-type regulating layer may have a substantially equal, sequentially increasing or decreasing doping concentration, such as FIG. 4D to FIG. 4FThe N-type regulating layer 8 is configured so that the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside ends in the N-type regulating layer 8 and the diffusion front formed by each diffusion process is joined to the adjacent N-type doping region.

[0058] In this embodiment, the doping concentration of the N-type control layer 8 is generally controlled at 1e18 cm -3 Below, each N-type doping region has 1e15 cm -3 to 1e18 cm -3 The following doping concentrations.

[0059] This embodiment further provides an avalanche photodiode, comprising the epitaxial structure of the avalanche photodiode described above, a P-side electrode layer 16 located on the P-type diffusion region 81 , and an N-side electrode layer 11 located on the substrate 1 .

[0060] See also Figure 5 A P-side electrode layer 16 is also provided on the multiplication layer 6. The P-side electrode layer 16 forms an ohmic contact with the P-type diffusion region 81 through a P-side electrode contact layer (not shown). The exposed surface of the multiplication layer except the P-type diffusion region is isolated from the P-side electrode layer 16 by a passivation layer 21. The passivation layer 21 includes SiO 2 、SiN、Al 2 O 3 In some embodiments, the N-side electrode layer 11 may be located on the substrate 1, for example, on a side of the substrate away from the multiplication layer, or the N-side electrode layer 11 is disposed at the periphery of the APD epitaxial structure, and is located on the same side of the substrate as the P-side electrode layer 16.

[0061] The avalanche photodiode is configured as a planar structure of a front-light-incoming type or a back-light-incoming type. For example, when a back-light-incoming type avalanche photodiode is used, the N-side electrode layer 11 is disposed on the side of the substrate away from the multiplication layer, and the light injection window 120 is defined between the N-side electrode layers 11, and an anti-reflection layer 121 is disposed in the light injection window 120. When a front-light-incoming type avalanche photodiode is used, the light injection window 120 is defined between the P-side electrode layers 16.

[0062] As an example, the avalanche photodiode may be arranged as a SAM APD, SACM APD or SAGCMAPD in a planar structure.

[0063] As an example, in order to adjust the edge electric field strength and ensure the required device performance, the multiplication layer further includes a guard ring 7, and the guard ring 7 is arranged at the periphery of the P-type diffusion region.

[0064] Embodiment 2

[0065] The present embodiment provides a method for manufacturing an epitaxial structure of an avalanche photodiode. The epitaxial structure of the avalanche photodiode described in the previous embodiments is preferably manufactured using the method for manufacturing the epitaxial structure of the avalanche photodiode in the present embodiment.

[0066] See also FIG. 6A to FIG. 6D , which is a flowchart of the steps of the production method, comprising the following steps:

[0067] S1: providing a substrate, and growing an absorption layer, a charge layer, and a multiplication layer on the substrate; wherein the step of forming the multiplication layer comprises sequentially forming an intrinsic or unintentionally doped semiconductor layer, and an N-type conductive type N-type regulating layer;

[0068] S2: forming a P-type diffusion region in the N-type regulating layer.

[0069] First, step S1 is performed to provide a substrate 1, and an absorption layer 3, a charge layer 5 and a multiplication layer 6 are grown on the substrate 1; wherein the step of forming the multiplication layer 6 includes sequentially forming an intrinsic or unintentionally doped semiconductor layer and an N-type regulating layer 8.

[0070] Specifically, the material of the substrate 1 includes InP or GaAs, the material of the absorption layer 3 includes one of InGaAs, InAlAs, and GaAs, the material of the charge layer 5 includes one of InP and InAlAs, and the material of the multiplication layer 6 includes one of InP, InGaAs, and InGaAsP.

[0071] In step S1, an absorption layer 3, a charge layer 5 and a multiplication layer 6 are grown on a substrate 1, wherein the material of the absorption layer 3 comprises one of InGaAs, InAlAs and GaAs, the material of the charge layer 5 comprises one of InP and InAlAs, and the material of the multiplication layer 6 comprises one of InP and InGaAsP. FIG. 6A to FIG. 6B A buffer layer 2, an absorption layer 3, a gradient layer 4, a charge layer 5 and a multiplication layer 6 are sequentially grown on a substrate 1. The epitaxial structure can be epitaxially grown once by a metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) process.

[0072] As an example, see Fig. 6A Before the step of forming the absorption layer 3 , the step includes: growing a buffer layer 2 on the substrate 1 .

[0073] As an example, see Fig. 6A According to the required device performance, after the step of forming the absorption layer 3 , the step further includes: growing a gradient layer 4 on the absorption layer 3 .

[0074] like Figure 6BAs shown, at step S2, the step of forming the multiplication layer 6 includes: growing an intrinsic or unintentionally doped semiconductor layer by an epitaxial process, and in the process of epitaxial growth, doping N-type impurities into the semiconductor layer by an in-situ doping process to form an N-type control layer 8. For example, Si or S ions are used as N-type impurity sources to in-situ dope the intrinsic InP semiconductor layer, and the doping concentration of the obtained N-type control layer is controlled to be 1e18 cm -3 the following.

[0075] In some embodiments, the multiplication layer 6 is grown by a single epitaxial process, and the multiplication layer includes a bottom portion and a top portion that are grown continuously. In the process of growing the top portion of the multiplication layer, in-situ doping is performed to form an N-type control layer 8. The predetermined thickness of the obtained N-type control layer can be determined based on the diffusion depth requirement of the P-type diffusion region. The N-type control layer can reasonably configure the process parameters in the formation process of the N-type control layer 8 according to the structural parameters of the P-type diffusion region and the multiplication region defined by it, so as to obtain the actual required impurity distribution and cutoff depth. Since the N-type control layer 8 is grown by in-situ doping, the adjustment ability of the formation process of the N-type control layer 8 can be improved, especially the growth thickness of the film layer can be controlled at the nanometer level. By flexibly adjusting the formula of the reaction source, the process temperature or similar process parameters during the epitaxial growth of the N-type control layer, its growth rate and impurity distribution are controlled. Preferably, in the process of performing in-situ doping, by controlling the introduction and closing of the N-type impurity source, the N-type control layer forms a continuous or intermittent N-type doping region, wherein the doping concentration of each N-type doping region is controlled at 1e15cm -3 ~1e18 cm -3 Internal changes.

[0076] In a specific example, by maintaining the flow of the N-type impurity source, the N-type control layer 8 is formed into a continuous N-type doped region. Further, by keeping the flow ratio of the N-type impurity source to the reaction source substantially consistent, the N-type control layer is formed as a uniformly doped layer as a whole, such as Figure 4A Alternatively, the impurity distribution of the N-type doping region can be configured to facilitate the diffusion efficiency of impurities in the P-type diffusion region while ensuring sufficient control capability for each diffusion process. By changing the flow ratio of the N-type impurity source to the reaction source, the N-type control layer is formed as a N-type control layer with a gradually changing doping concentration along the growth direction, for example, the doping concentration gradually increases and gradually decreases along the growth direction, as shown in FIG. FIG. 4B to FIG. 4C as shown, or a combination of both.

[0077] In other examples, by intermittently introducing an N-type impurity source, the N-type control layer 8 is formed into a plurality of spaced N-type doping regions, and at least one of the plurality of N-type doping regions along the growth direction of the N-type control layer may have a substantially equal, sequentially increasing or decreasing doping concentration, such as FIG. 4D to FIG. 4F As shown. Based on the fact that the number of diffusion processes required to form the P-type diffusion layer is m, by intermittently introducing an N-type impurity source, the N-type control layer is formed into at least m N-type doping regions so that the diffusion front advancing toward the inside of the multiplication layer each time the diffusion process is performed ends in the corresponding N-type doping region. In other words, based on the diffusion process used to form the P-type diffusion layer and the desired diffusion depth, the predetermined thickness of the grown N-type doping layer, as well as the number of layers and the cutoff depth of the N-type doping regions therein are determined, so that the N-type doping region can be accurately introduced in advance near the diffusion depth expected to be achieved each time the diffusion process is performed through the in-situ doping process.

[0078] As an alternative implementation, after the step of growing the multiplication layer 6 by a single epitaxial process, the top portion of the multiplication layer may be N-type doped by ion implantation to form an N-type regulating layer.

[0079] It should be noted that, in this figure, the N-type control layer is shown as a whole layer covering the intrinsic semiconductor layer to describe the present invention, but it is not intended to limit the scope of the present invention to this. In some cases, it also includes the N-type control layer only covering a portion of the intrinsic semiconductor layer, as long as it can play a role in controlling the diffusion depth of the subsequently formed P-type diffusion zone.

[0080] Next, step S2 is performed: forming a P-type diffusion region 81 in the N-type regulating layer 8 .

[0081] Specifically, a P-type diffusion region 81 is formed in the N-type control layer 8 by a thermal diffusion process, and the N-type control layer 8 has a predetermined thickness to control the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside to not exceed the N-type control layer 8. The diffusion front of the P-type diffusion region 81 along the inside of the N-type control layer is adjusted by using the principle of mutual repulsion of the same electrical property of the diffused interstitial impurity atoms after the N-type impurity source is completely ionized as a donor energy level, thereby providing precise control of its diffusion depth. For example, the thermal diffusion process can be performed using an impurity source containing Zn and Cd.

[0082] like FIG. 6C to FIG. 6DAs shown, at step S2, the step of forming the P-type diffusion region 81 includes: defining a first diffusion window 91 by a photolithography process, using an impurity source with a first doping flow rate to form a primary diffusion region 810 by diffusion and thermal annealing; defining a second diffusion window 92 by a photolithography process, using an impurity source with a second doping flow rate to form a secondary diffusion region in the N-type control layer by diffusion and thermal annealing, the width of the first diffusion window is greater than the width of the second diffusion window, and the central diffusion depth of the secondary diffusion region is greater than the central diffusion depth of the primary diffusion region so that the P-type diffusion region 81 is formed into a stepped cross-section with a central diffusion depth greater than an edge diffusion depth. By forming an N-type control layer 8 with a predetermined thickness before the step of forming the P-type diffusion region 81, especially for an APD epitaxial wafer that needs to be prepared by performing two Zn diffusion processes, by accurately introducing an N-type control layer / N-type doping region near a predetermined depth of the multiplication layer, the tailing effect such as Zn impurity diffusion can be suppressed, and the influence of the process drift of the diffusion machine can be reduced, thereby improving the yield of the APD epitaxial wafer.

[0083] As an example, Figure 6C As shown, in order to adjust the edge electric field strength and ensure the required device performance, a guard ring 7 is formed on the periphery of the primary diffusion region while forming the primary diffusion region 810 .

[0084] In a specific example, the second doping flow rate used to form the secondary diffusion region is greater than the first doping flow rate used to form the primary diffusion region, thereby reducing the negative impact of P-type impurities in the primary diffusion region on the subsequent impurity diffusion. For example, when a Zn-containing impurity source is used to diffuse to form a P-type diffusion region, the Zn doped in the primary diffusion region will affect the diffusion efficiency of further introduced impurities. The P-type diffusion region formed by the above method can play a control role in the edge electric field and surface electric field of the PN junction, and effectively enhance the electric field strength in the central area of ​​the P-type diffusion region to achieve high gain. Preferably, when the N-type control layer is formed with two or more N-type doping regions spaced apart, by adjusting the flow ratio of the N-type impurity source to the reaction source during the formation of the N-type control layer, the concentration gradient is used to further reduce the impact of the doped P-type impurities on the subsequent impurity diffusion while ensuring that the diffusion front of each diffusion process terminates in the corresponding N-type doping region.

[0085] In this embodiment, the diffusion process can be performed in a plasma enhanced chemical vapor deposition device or a diffusion furnace.

[0086] Furthermore, before the step of forming the P-type diffusion region 81, the steps include: forming a diffusion mask layer on the multiplication layer 6; and patterning the diffusion mask layer by photolithography and etching to define a diffusion window. In this embodiment, the material of the diffusion mask layer can be SiO2 The etching process of the diffusion mask layer is performed by an inductively coupled plasma etching (ICP) or reactive ion etching (RIE) process.

[0087] This embodiment also provides a method for manufacturing an avalanche photodiode, which includes the method for manufacturing the epitaxial structure of the avalanche photodiode described above, forming a P-side electrode layer 16 on a P-type diffusion region, and forming an N-side electrode layer 11 on a substrate 1.

[0088] It should be noted that the above specific process steps are only used as examples. In practical applications, the order of the process steps and the specific process methods can be adjusted according to actual needs.

[0089] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An epitaxial structure of an avalanche photodiode, characterized in that: The invention comprises a substrate and an absorption layer, a charge layer and a multiplication layer stacked on the substrate, wherein the multiplication layer comprises a bottom part and a top part which are grown continuously, wherein the bottom part of the multiplication layer is arranged as an intrinsically or unintentionally doped semiconductor layer, and the top part of the multiplication layer is arranged as an N-type regulating layer, wherein a P-type diffusion region extending from the surface of the multiplication layer to the inside is arranged in the N-type regulating layer, and the N-type regulating layer has a predetermined thickness so that the cutoff surface of the N-type regulating layer from the surface of the multiplication layer to the inside is slightly lower than the diffusion front of the P-type diffusion region, so as to control the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside not to exceed the N-type regulating layer.

2. The epitaxial structure of the avalanche photodiode according to claim 1, characterized in that: The P-type doping region is configured such that a central diffusion depth is greater than an edge diffusion depth to provide a stepped PN junction in the multiplication layer.

3. The epitaxial structure of the avalanche photodiode according to claim 1, characterized in that: The N-type regulating layer is configured as an N-type doping region with a continuously gradient doping concentration, wherein the N-type regulating layer is configured so that the diffusion front of the P-type diffusion region from the surface to the inside of the multiplication layer ends within the N-type regulating layer.

4. The epitaxial structure of the avalanche photodiode according to claim 1, characterized in that: The N-type regulating layer is configured as a plurality of spaced N-type doped regions, and the N-type regulating layer is configured so that the diffusion front of the P-type diffusion region from the surface of the multiplication layer to the inside terminates in the N-type regulating layer and is joined to at least one N-type doped region along the diffusion direction.

5. The epitaxial structure of the avalanche photodiode according to claim 3 or 4, characterized in that: The N-type regulating layer has a thickness of less than 200 nm; and / or each N-type doping region has a thickness of 1e15 cm -3 to 1e18 cm -3 of doping concentration.

6. The epitaxial structure of the avalanche photodiode according to claim 1, characterized in that: The epitaxial structure further includes a gradient layer and a buffer layer. The gradient layer is arranged between the absorption layer and the charge layer, and the buffer layer is arranged between the substrate and the absorption layer or the multiplication layer.

7. The epitaxial structure of the avalanche photodiode according to claim 1, characterized in that: The material of the substrate includes one of InP and GaAs; the material of the multiplication layer includes one of InP, InGaAs and InGaAsP; the charge layer includes one of InP and InAlAs; and the material of the absorption layer includes one of InGaAs and GaAs.

8. An avalanche photodiode, characterized in that: It comprises an epitaxial structure of an avalanche photodiode according to any one of claims 1 to 7, a P-side electrode layer located on a P-type diffusion region, and an N-side electrode layer located on the substrate, wherein the multiplication layer also includes a guard ring, and the guard ring is arranged on the periphery of the P-type diffusion region.

9. The avalanche photodiode according to claim 8, characterized in that: Also includes: A light injection window is located at a side of the substrate away from the multiplication layer, and an anti-reflection layer is arranged in the light injection window.

10. A method for manufacturing an epitaxial structure of an avalanche photodiode, characterized in that: The following steps are involved: A substrate is provided, an absorption layer, a charge layer and a multiplication layer are grown on the substrate, and the step of growing the multiplication layer by a single epitaxial process includes continuously growing a bottom portion and a top portion, wherein the bottom portion of the multiplication layer is grown as an intrinsically or unintentionally doped semiconductor layer, and in-situ doping is performed during the process of growing the top portion of the multiplication layer to form an N-type regulating layer; A P-type diffusion region is formed in the N-type regulation layer, wherein the N-type regulation layer has a predetermined thickness so that the cutoff surface of the N-type regulation layer from the surface to the inside of the multiplication layer is slightly lower than the diffusion front of the P-type diffusion region, so as to control the diffusion front of the P-type diffusion region from the surface to the inside of the multiplication layer not to exceed the N-type regulation layer.

11. The manufacturing method according to claim 10, characterized in that: Based on the fact that the number of diffusion processes required to be performed to form the P-type diffusion region is m, by intermittently introducing an N-type impurity source, the N-type control layer is formed into at least m spaced N-type doped regions so that the diffusion front that advances toward the interior of the multiplication layer each time the diffusion process is performed terminates in the corresponding N-type doped region, wherein m is a natural number.

12. The manufacturing method according to claim 10, characterized in that: The step of forming the P-type diffusion region comprises: A first diffusion window is defined by a photolithography process, and a primary diffusion region is formed by diffusion and thermal annealing using an impurity source having a first doping flow rate; a second diffusion window is defined by a photolithography process, and a secondary diffusion region is formed by diffusion and thermal annealing using an impurity source having a second doping flow rate, wherein the width of the first diffusion window is greater than the width of the second diffusion window, and the central diffusion depth of the secondary diffusion region is greater than the central diffusion depth of the primary diffusion region, so that the P-type diffusion region is formed into a stepped profile in which the central diffusion depth is greater than the edge diffusion depth.

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