Broken line temperature drift calibration circuit and voltage generating device, electronic equipment

Abstract

The present disclosure relates to a zigzag temperature drift calibration circuit, a voltage generating device, and an electronic device, wherein the circuit includes: a current adjustment module, which is used to adjust the magnitude and direction of at least one received input current, and sum each adjusted input current to output a summed current, wherein each input current is a high-temperature zigzag current or a low-temperature zigzag current, the magnitude of the high-temperature zigzag current is positively correlated with the magnitude of the temperature, and the magnitude of the low-temperature zigzag current is negatively correlated with the magnitude of the temperature. The direction and magnitude of the summed current output by the embodiment of the present disclosure are adjustable with temperature changes, and therefore have a high degree of flexibility and controllability.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a broken line temperature drift calibration circuit, a voltage generating device, and an electronic device. Background Art

[0002] The temperature drift characteristic of the voltage reference, i.e., the temperature coefficient, is usually one of its most important performance characteristics, especially in high-precision systems. For example, a 12-bit system has an operating temperature range of 25°C to 65°C. In order to make the error contributed by the voltage reference less than 0.5LSB, its temperature drift performance must be within 3ppm / °C. Due to the influence of process deviations and device mismatches in the chip manufacturing process, the temperature coefficient of the chip will be distributed over a very wide range, thus reducing the yield and making it difficult to achieve the expected performance.

[0003] At present, trimming technology is usually used to reduce the temperature drift of voltage reference chips. The most common technology includes single-point calibration. Since single-point calibration only adjusts the first-order term of the temperature coefficient, the temperature drift of the reference chip can generally be within 20ppm / ℃ after calibration. In order to further reduce the temperature coefficient, high-order calibration is usually used to reduce the high-order error of the reference voltage. Common high-order calibrations include exponential compensation, etc., which have certain limitations, such as flexibility and controllability during calibration. Summary of the invention

[0004] According to one aspect of the present disclosure, a broken line temperature drift calibration circuit is provided, the circuit comprising:

[0005] A current adjustment module is used to adjust the magnitude and direction of at least one received input current, sum the adjusted input currents, and output the summed current, wherein each input current is a high-temperature zigzag current or a low-temperature zigzag current, the magnitude of the high-temperature zigzag current is positively correlated with the magnitude of the temperature, and the magnitude of the low-temperature zigzag current is negatively correlated with the magnitude of the temperature.

[0006] In a possible implementation, the current adjustment module includes at least one current adjustment unit, each current adjustment unit includes a first adjustment transistor, a second adjustment transistor, a third adjustment transistor, a first adjustment current mirror, and a second adjustment current mirror, wherein:

[0007] The gate of the first adjustment transistor, the drain of the first adjustment transistor, the gate of the second adjustment transistor and the control end of the first adjustment current mirror are connected to receive the input current.

[0008] The source of the third adjustment transistor and the first end of the second adjustment current mirror are used to receive a power supply voltage.

[0009] The drain of the second adjustment transistor is connected to the drain of the third adjustment transistor, the gate of the third adjustment transistor and the control end of the second adjustment current mirror.

[0010] The second end of the first adjusting current mirror and the second end of the second adjusting current mirror are connected to the output end of the current adjusting module.

[0011] The output end of the current adjustment module is used to output the summed current.

[0012] In a possible implementation, the first adjustment current mirror includes a plurality of PMOS transistors, wherein: the sources of the PMOS transistors are connected as a first end of the current mirror, the drains of the PMOS transistors are connected as a second end of the current mirror, and the gates of the PMOS transistors are connected as a control end of the current mirror.

[0013] The second adjustment current mirror comprises a plurality of NMOS transistors, wherein the sources of the NMOS transistors are connected as a first end of the current mirror, the drains of the NMOS transistors are connected as a second end of the current mirror, and the gates of the NMOS transistors are connected as a control end of the current mirror.

[0014] The number of transistors in the first adjustment current mirror and the second adjustment current mirror is adjustable.

[0015] The direction and magnitude of the summed current output by the current adjustment module changing with temperature are achieved by adjusting the number of transistors in the first adjustment current mirror and the second adjustment current mirror.

[0016] In a possible implementation, the current adjustment module includes at least one current source module, wherein the current source module is used to generate the input current, the zero point temperature of the current source module is adjustable, and the current output by the current source module at the zero point temperature is zero.

[0017] In a possible implementation, the current source module includes a first basic current source, a second basic current source, a third basic current source, and a fourth basic current source, wherein:

[0018] The positive terminal of the first basic current source, the negative terminal of the second basic current source, the positive terminal of the third basic current source, and the negative terminal of the fourth basic current source are connected as the output terminal of the first basic current source module to output the high temperature broken line current or the low temperature broken line current.

[0019] The negative terminal of the first basic current source and the negative terminal of the third basic current source are used to receive a power supply voltage.

[0020] The positive terminal of the second basic current source and the positive terminal of the fourth basic current source are grounded.

[0021] Wherein, the input current is expressed as:

[0022] Iin=I01-I02+I03-I04, Iin represents the input current, I01 represents the current of the first basic current source, I02 represents the current of the second basic current source, I03 represents the current of the third basic current source, and I04 represents the current of the fourth basic current source.

[0023] In a possible implementation, the first basic current source and the second basic current source are programmable current sources, whose current magnitudes are programmable and have nothing to do with temperature. If the current source module is used to generate a high-temperature broken-line current, then:

[0024] The third basic current source is a PTAT current source, the fourth basic current source is a CTAT current source,

[0025] When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module decreases, or

[0026] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module increases.

[0027] In a possible implementation manner, if the current source module is used to generate a low-temperature broken-line current, then:

[0028] The third basic current source is a CTAT current source, the fourth basic current source is a PTAT current source,

[0029] When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module increases, or

[0030] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module decreases.

[0031] According to one aspect of the present disclosure, there is provided a voltage generating device, the device comprising:

[0032] A voltage generating circuit, used for generating a target voltage;

[0033] The broken line temperature drift calibration circuit is connected to the voltage generating circuit and is used to output a summing current to calibrate the voltage generating circuit so that the voltage generating circuit outputs a calibrated target voltage.

[0034] In a possible implementation, the voltage generating circuit includes a bandgap reference circuit and a Zener reference circuit.

[0035] According to one aspect of the present disclosure, an electronic device is provided, the electronic device comprising the above-mentioned broken line temperature drift calibration circuit, or the above-mentioned voltage generating device.

[0036] The zero point temperature of the first current source module and the second current source module of the embodiment of the present disclosure is adjustable, and the direction and magnitude of the summed current output by the current summer are adjustable as the temperature changes, thus having high flexibility of use and controllability.

[0037] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0039] Figure 1 A block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0040] Figure 2a A schematic diagram showing the relationship between the magnitude of the high-temperature broken-line current and the magnitude of the temperature according to an embodiment of the present disclosure is shown.

[0041] Figure 2b A schematic diagram showing the relationship between the magnitude of the low-temperature broken line current and the magnitude of the temperature according to an embodiment of the present disclosure is shown.

[0042] Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3e , Figure 3f A schematic diagram of summing current according to an embodiment of the present disclosure is shown.

[0043] Figure 4 A block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0044] Figure 5 A schematic diagram of a current adjustment unit and a current source module according to an embodiment of the present disclosure is shown.

[0045] Figure 6 A circuit structure schematic diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0046] Figure 7A block diagram of a voltage generating device according to an embodiment of the present disclosure is shown.

[0047] Figure 8a , Figure 8b Schematic diagrams of a voltage generating device composed of a bandgap reference circuit and a Zener reference circuit are shown respectively.

[0048] Fig. 9 Schematic diagrams of voltages calibrated using the zigzag temperature drift calibration circuit 100 according to an embodiment of the present disclosure are respectively shown. DETAILED DESCRIPTION

[0049] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0050] In the description of the present disclosure, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0051] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0052] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0053] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0054] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0055] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0056] See also Figure 1 , Figure 1 A block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0057] like Figure 1 As shown, the circuit comprises:

[0058] The current adjustment module 20 is used to adjust the magnitude and direction of at least one received input current Iin, and sum the adjusted input currents Iin to output a summed current Itrim, wherein each input current Iin is a high-temperature broken line current or a low-temperature broken line current, the magnitude of the high-temperature broken line current is positively correlated with the magnitude of the temperature (T), and the magnitude of the low-temperature broken line current is negatively correlated with the magnitude of the temperature.

[0059] The embodiment of the present disclosure uses the current adjustment module 20 to achieve that the direction and magnitude of the output summed current Itrim can be adjusted with temperature changes, so it has high flexibility and controllability. Among them, the high flexibility is reflected in the fact that the calibration circuit has enough adjustable degrees of freedom to adapt to temperature drift curves of different shapes, and the controllability is reflected in that when affected by process deviations and mismatches, too many additional errors will not be introduced. When the zigzag temperature drift calibration circuit of the embodiment of the present disclosure is applied to a reference voltage generating chip or other voltage generating circuits, the summed current Itrim provided by the zigzag temperature drift calibration circuit of the embodiment of the present disclosure can achieve efficient voltage calibration, can effectively reduce the temperature drift coefficient of the reference chip, and improve the reliability and stability of the calibrated circuit (such as a reference voltage generating chip or other voltage generating circuit).

[0060] The embodiments of the present disclosure do not limit the specific implementation of the current adjustment module 20. Those skilled in the art may adopt appropriate technical solutions according to actual conditions and needs, as long as the corresponding functions can be achieved.

[0061] The disclosed embodiment does not limit the specific positive correlation between the high-temperature broken line current IHT and the temperature, and does not limit the specific negative correlation between the low-temperature broken line current ILT and the temperature. Those skilled in the art can set it according to actual conditions and needs. For example, the positive correlation and the negative correlation can both be proportional or approximately proportional (broken line), or can be curved running, or other forms.

[0062] See also Figure 2a , Figure 2a A schematic diagram showing the relationship between the magnitude of the high-temperature broken-line current and the magnitude of the temperature according to an embodiment of the present disclosure is shown.

[0063] For example, Figure 2a As shown, the size of the high-temperature zigzag current IHT in the embodiment of the present disclosure has a positive proportional (positive slope) correlation with the size of the temperature. The high-temperature zigzag current IHT can achieve arbitrary adjustment of the zero point temperature (also called inflection point temperature) of the high-temperature zigzag current IHT. For example, the temperature T1 of the inflection point A of the high-temperature zigzag current IHT can be adjusted to the left (less than T1) and to the right (greater than T1).

[0064] See also Figure 2b , Figure 2b A schematic diagram showing the relationship between the magnitude of the low-temperature broken line current and the magnitude of the temperature according to an embodiment of the present disclosure is shown.

[0065] For example, Figure 2b As shown, the size of the low-temperature broken line current ILT of the embodiment of the present disclosure has an inversely proportional (negative slope) correlation with the size of the temperature. The low-temperature broken line current ILT can achieve arbitrary adjustment of the zero point temperature (also called inflection point temperature) of the low-temperature broken line current ILT. For example, the temperature T2 of the inflection point B of the low-temperature broken line current ILT can be adjusted to the left (less than T2) and to the right (greater than T2).

[0066] In the embodiment of the present disclosure, the direction in which the summed current Itrim changes with temperature may refer to an increase or decrease with temperature. The embodiment of the present disclosure does not limit the specific implementation method of the current adjustment module 20 to achieve the adjustable direction and magnitude of the output summed current Itrim changing with temperature. Those skilled in the art may set it according to actual conditions and needs. For example, by adjusting the proportional coefficients of the high-temperature broken line current IHT and the low-temperature broken line current ILT, the direction (for example, the positive and negative values ​​of the proportional coefficient correspond to an increase with temperature and a decrease with temperature, respectively) and magnitude adjustment (for example, the absolute value of the proportional coefficient is greater than 1 and less than 1, respectively, corresponding to an increase in the amplitude of the increase with temperature and a decrease in the amplitude of the increase with temperature). Of course, other technical means other than the proportional coefficient may also be used for adjustment. The preferred implementation method will be exemplarily introduced below.

[0067] See also Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3e , Figure 3f A schematic diagram of summing current according to an embodiment of the present disclosure is shown.

[0068] like Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3e , Figure 3f As shown, the embodiment of the present disclosure can adjust the zero point temperature of the high temperature broken line current IHT and the low temperature broken line current ILT, and adjust the direction and magnitude of the summed current Itrim changing with temperature, thereby obtaining various forms of the summed current. Figure 3a , Figure 3b , Figure 3c , Figure 3d , Figure 3e , Figure 3f What is shown are only some examples, and the embodiments of the present disclosure are not limited thereto.

[0069] See also Figure 4 , Figure 4 A block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0070] For example, Figure 4As shown, the current adjustment module 20 includes at least one current adjustment unit 210 and at least one current source module 10, wherein the current source module 10 is used to generate the input current Iin, the zero point temperature of the current source module 10 is adjustable, the current output by the current source module 10 at the zero point temperature is zero, the current adjustment unit 210 is used to adjust the size and direction of the received input current Iin, and the output ends of each current adjustment unit 210 are connected as the output end of the current adjustment module 20 to output the summed current Itrim.

[0071] The embodiments of the present disclosure do not limit the specific implementation of the current adjustment unit 210 and the current source module 10. Those skilled in the art may adopt appropriate technical solutions according to actual conditions and needs, as long as the corresponding functions can be achieved.

[0072] See also Figure 5 , Figure 5 A schematic diagram of a current adjustment unit and a current source module according to an embodiment of the present disclosure is shown.

[0073] For example, Figure 5 As shown, the current adjustment unit 210 may include a first adjustment transistor M01, a second adjustment transistor M02, a third adjustment transistor M03, a first adjustment current mirror 211, and a second adjustment current mirror 212, wherein:

[0074] The gate of the first adjustment transistor M01, the drain of the first adjustment transistor M01, the gate of the second adjustment transistor M02 and the control end of the first adjustment current mirror 211 are connected to receive the input current Iin (here, the output current of the current source module 10).

[0075] The source of the third adjusting transistor M03 and the first end of the second adjusting current mirror 212 are used to receive a power supply voltage.

[0076] The drain of the second adjusting transistor M02 is connected to the drain of the third adjusting transistor M03, the gate of the third adjusting transistor M03 and the control terminal of the second adjusting current mirror 212.

[0077] The second end of the first adjustment current mirror 211 and the second end of the second adjustment current mirror 212 are connected to the output end of the current adjustment module 20.

[0078] The output end of the current adjustment module 20 is used to output the summed current.

[0079] Exemplarily, the first adjustment current mirror includes a plurality of PMOS transistors, wherein: the sources of the PMOS transistors are connected as the first end of the current mirror, the drains of the PMOS transistors are connected as the second end of the current mirror, and the gates of the PMOS transistors are connected as the control end of the current mirror.

[0080] The second adjustment current mirror comprises a plurality of NMOS transistors, wherein the sources of the NMOS transistors are connected as a first end of the current mirror, the drains of the NMOS transistors are connected as a second end of the current mirror, and the gates of the NMOS transistors are connected as a control end of the current mirror.

[0081] The number of transistors in the first adjustment current mirror and the second adjustment current mirror is adjustable.

[0082] The direction and magnitude of the summed current output by the current adjustment module changing with temperature are achieved by adjusting the number of transistors in the first adjustment current mirror and the second adjustment current mirror.

[0083] For example, Figure 5 As shown, the current source module 10 may include a first basic current source I01, a second basic current source I02, a third basic current source I03, and a fourth basic current source I04, wherein:

[0084] The positive terminal of the first basic current source I01, the negative terminal of the second basic current source I02, the positive terminal of the third basic current source I03, and the negative terminal of the fourth basic current source I04 are connected as the output terminal of the first basic current source I01 module 10 to output the high-temperature broken line current or the low-temperature broken line current.

[0085] The negative terminal of the first basic current source I01 and the negative terminal of the third basic current source I03 are used to receive a power supply voltage.

[0086] The positive terminal of the second basic current source I02 and the positive terminal of the fourth basic current source I04 are grounded.

[0087] Exemplarily, the input current Iin may be expressed as:

[0088] Iin=I01-I02+I03-I04, Iin represents the input current, I01 represents the current of the first basic current source I01, I02 represents the current of the second basic current source I02, I03 represents the current of the third basic current source I03, and I04 represents the current of the fourth basic current source I04.

[0089] In the embodiment of the present disclosure, an electronic fuse EFUSE may be provided in the first basic current source I01 and the second basic current source I02. For example, the electronic fuse EFUSE is used to control the number of current mirrors in the first basic current source I01 and the second basic current source I02 to adjust the current size, thereby achieving zero-point temperature adjustment. Of course, the embodiment of the present disclosure does not limit the specific implementation method of each current source, and does not limit the specific implementation method of current regulation. Those skilled in the art may adopt appropriate technical means to achieve this according to actual conditions and needs.

[0090] It should be noted that the input current Iin of the embodiment of the present disclosure may be generated by the current source module 10 or input from the outside, which is not limited in the embodiment of the present disclosure.

[0091] Exemplarily, the first basic current source I01 and the second basic current source I02 are programmable current sources, whose current magnitudes are programmable and have nothing to do with temperature.

[0092] Exemplarily, if the current source module 10 is used to generate a high-temperature broken-line current IHT, then:

[0093] The third basic current source is a PTAT current source, the fourth basic current source is a CTAT current source,

[0094] When the difference between the current of the first basic current source I01 and the current of the second basic current source I02 increases, the zero point temperature of the current source module 10 decreases, or

[0095] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module 10 increases.

[0096] Exemplarily, if the current source module 10 is used to generate a low-temperature broken line current ILT, then:

[0097] The third basic current source is a CTAT current source, the fourth basic current source is a PTAT current source,

[0098] When the difference between the current of the first basic current source I01 and the current of the second basic current source I02 increases, the zero point temperature of the current source module 10 increases, or

[0099] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module 10 decreases.

[0100] The embodiment of the present disclosure does not limit the number of current adjustment units 210 and current source modules 10. As an example, the zigzag temperature drift calibration circuit may include only one current adjustment unit 210, adjust the magnitude and direction of the external input current Iin, and output the adjusted input current Iin as the summed current Itrim. Of course, the zigzag temperature drift calibration circuit may also include one current source module 10 and one current adjustment unit 210, or multiple current source modules 10 and multiple current adjustment units 210. If one current source module 10 and one current adjustment unit 210 are regarded as one component, the zigzag temperature drift calibration circuit may include one or more components. In each component, the input current Iin is generated by using the current source module 10, and the input current Iin is input to the current adjustment unit 210, and the magnitude and direction of the input current Iin are adjusted. The output ends of the current adjustment units 210 in each component are connected to realize the summation operation of each adjusted input current Iin, and output the summed current Itrim.

[0101] The following is an exemplary introduction to the broken line temperature drift calibration circuit including two current source modules 10 and two current adjustment units 210. For the convenience of description, the names and marks of the components in the example are adaptively changed.

[0102] See also Figure 6 , Figure 6 A circuit structure schematic diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure is shown.

[0103] In a possible implementation, Figure 6 As shown, the first current source module 10 may include a first current source I1, a second current source I2, a third current source I3, and a fourth current source I4, wherein:

[0104] The positive terminal of the first current source I1, the negative terminal of the second current source I2, the positive terminal of the third current source I3, and the negative terminal of the fourth current source I4 are connected as the output terminal of the first current source module 10 to output the high temperature broken line current IHT.

[0105] The negative terminal of the first current source I1 and the negative terminal of the third current source I3 are used to receive a power supply voltage.

[0106] A positive terminal of the second current source I2 and a positive terminal of the fourth current source I4 are grounded.

[0107] In a possible implementation manner, the high temperature broken line current IHT can be expressed as:

[0108] IHT=I1-I2+I3-I4, IHT represents the high temperature broken line current IHT, I1 represents the current of the first current source I1, I2 represents the current of the second current source I2, I3 represents the current of the third current source I3, and I4 represents the current of the fourth current source I4.

[0109] In a possible implementation, the first current source I1 and the second current source I2 may be programmable current sources, that is, the first current source I1 and the second current source I2 in this example are respectively the aforementioned first basic current source I01 and the second basic current source I02, wherein:

[0110] When the difference (I1-I2) between the current of the first current source I1 and the current of the second current source I2 increases, the zero point temperature of the first current source module 10 decreases, or

[0111] When the difference ( I1 − I2 ) between the current of the first current source I1 and the current of the second current source I2 decreases, the zero-point temperature of the first current source module 10 increases.

[0112] The embodiment of the present disclosure may set an electronic fuse EFUSE in the first current source I1 and the second current source I2. For example, the electronic fuse EFUSE is used to control the number of current mirrors in the first current source I1 and the second current source I2 to adjust the current size, thereby achieving zero-point temperature adjustment. Of course, the embodiment of the present disclosure does not limit the specific implementation method of each current source, and does not limit the specific implementation method of current regulation. Those skilled in the art may adopt appropriate technical means to achieve this according to actual conditions and needs.

[0113] In a possible implementation, Figure 6 As shown, the second current source module 10' may include a fifth current source I5, a sixth current source I6, a seventh current source I7, and an eighth current source I8, wherein:

[0114] The positive terminal of the fifth current source I5, the negative terminal of the sixth current source I6, the positive terminal of the seventh current source I7, and the negative terminal of the eighth current source I8 are connected as the output terminal of the fifth current source I5 module to output the low-temperature broken line current ILT.

[0115] The negative terminal of the fifth current source I5 and the negative terminal of the seventh current source I7 are used to receive a power supply voltage.

[0116] A positive terminal of the sixth current source I6 and a positive terminal of the eighth current source I8 are grounded.

[0117] In a possible implementation manner, the low temperature broken line current ILT is expressed as:

[0118] ILT=I5-I6+I7-I8, ILT represents the low-temperature broken line current ILT, I5 represents the current of the fifth current source I5, I6 represents the current of the sixth current source I6, I7 represents the current of the seventh current source I7, and I8 represents the current of the eighth current source I8.

[0119] In a possible implementation, the seventh current source I7 and the eighth current source I8 may be programmable current sources, that is, the seventh current source I7 and the eighth current source I8 in this example are respectively the aforementioned first basic current source I01 and the second basic current source I02, wherein,

[0120] When the difference between the currents of the seventh current source I7 and the eighth current source I8 increases, the zero-point temperature of the second current source module 10' increases, or

[0121] When the difference between the currents of the seventh current source I7 and the eighth current source I8 decreases, the zero-point temperature of the second current source module 10 ′ decreases.

[0122] Similarly, the embodiment of the present disclosure may set an electronic fuse EFUSE in the seventh current source I7 and the eighth current source I8. For example, the electronic fuse EFUSE is used to control the number of current mirrors in the seventh current source I7 and the eighth current source I8 to adjust the current size, thereby achieving zero-point temperature adjustment. Of course, the embodiment of the present disclosure does not limit the specific implementation method of each current source, and does not limit the specific implementation method of current regulation. Those skilled in the art may adopt appropriate technical means to achieve this according to actual conditions and needs.

[0123] Exemplarily, the third current source I3 and the sixth current source I6 are, for example, PTAT current sources, and the fourth current source I4 and the fifth current source I5 are, for example, CTAT current sources.

[0124] In a possible implementation, Figure 6 As shown, the first current adjustment unit 210 may include a first transistor M1, a second transistor M2, a third transistor M3, a first current mirror 310, and a second current mirror 320, and the second current adjustment unit 210' may include a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a third current mirror 330, and a fourth current mirror 340, wherein,

[0125] The gate of the first transistor M1, the drain of the first transistor M1, the gate of the second transistor M2 and the control end of the first current mirror 310 are all connected to the output end of the first current source module 10 for receiving the high temperature broken line current IHT.

[0126] The source of the third transistor M3 and the first end of the second current mirror 320 are used to receive a power supply voltage.

[0127] The drain of the second transistor M2 is connected to the drain of the third transistor M3, the gate of the third transistor M3 and the control terminal of the second current mirror 320.

[0128] The second end of the first current mirror 310 and the second end of the second current mirror 320 are connected to the output end of the current adjustment module 20.

[0129] The gate of the fifth transistor M5, the drain of the sixth transistor M6, the gate of the sixth transistor M6 and the control end of the third current mirror 330 are all connected to the output end of the second current source module 10' for receiving the low temperature broken line current ILT.

[0130] The source of the fourth transistor M4 and the first end of the fourth current mirror 340 are used to receive a power supply voltage.

[0131] The drain of the fifth transistor M5 is connected to the drain of the fourth transistor M4, the gate of the fourth transistor M4 and the control terminal of the fourth current mirror 340.

[0132] The second end of the third current mirror 330 and the second end of the fourth current mirror 340 are connected to the output end of the current adjustment module 20.

[0133] The source of the first transistor M1, the source of the second transistor M2, the first end of the first current mirror 310, the source of the fifth transistor M5, the source of the sixth transistor M6, and the first end of the third current mirror 330 are all grounded.

[0134] The output terminal of the current adjustment module 20 is used to output the summed current Itrim.

[0135] In a possible implementation, Figure 6 As shown, the first current mirror 310 (MB1~MBn) and the third current mirror 330 (MC1~MCn) both include multiple PMOS transistors. In the first current mirror 310 or the third current mirror 330: the source of each PMOS transistor is connected as the first end of the current mirror, the drain of each PMOS transistor is connected as the second end of the current mirror, and the gate of each PMOS transistor is connected as the control end of the current mirror.

[0136] In a possible implementation, Figure 6As shown, the second current mirror 320 (MA1~MAn) and the fourth current mirror 340 both include a plurality of NMOS transistors (MD1~MDn). In the second current mirror 320 or the fourth current mirror 340, the source of each NMOS transistor is connected as the first end of the current mirror, the drain of each NMOS transistor is connected as the second end of the current mirror, and the gate of each NMOS transistor is connected as the control end of the current mirror.

[0137] In a possible implementation manner, the number of transistors in the first current mirror 310 , the second current mirror 320 , the third current mirror 330 , and the fourth current mirror 340 is adjustable.

[0138] In a possible implementation, the direction and magnitude of the summed current Itrim output by the current adjustment module 20 changing with temperature is achieved by adjusting the number of transistors in the first current mirror 310 , the second current mirror 320 , the third current mirror 330 , and the fourth current mirror 340 .

[0139] In a possible implementation, illustratively, in the disclosed embodiment, an electronic fuse EFUSE is set in the first current mirror 310, the second current mirror 320, the third current mirror 330, and the fourth current mirror 340, and the scale (number of transistors) of each current mirror is controlled by the electronic fuse EFUSE.

[0140] Compared with the prior art, the disclosed embodiment has more calibration freedom, can adapt to temperature drift curves of different shapes, and ensure sufficient stability without introducing too many additional errors.

[0141] See also Figure 7 , Figure 7 A block diagram of a voltage generating device according to an embodiment of the present disclosure is shown.

[0142] like Figure 7 As shown, the device comprises:

[0143] The voltage generating circuit 200 is used to generate a target voltage Vout;

[0144] The zigzag temperature drift calibration circuit 100 is connected to the voltage generating circuit 200 and is used to output a summing current Itrim to calibrate the voltage generating circuit 200 so that the voltage generating circuit 200 outputs a calibrated target voltage Vout.

[0145] When the zigzag temperature drift calibration circuit 100 of the embodiment of the present disclosure is applied in the voltage generating circuit 200, the summed current Itrim provided by the zigzag temperature drift calibration circuit 100 of the embodiment of the present disclosure can realize efficient voltage calibration, effectively reduce the temperature drift coefficient of the voltage generating circuit 200, and improve the reliability and stability of the voltage generating circuit 200.

[0146] The embodiments of the present disclosure do not limit the specific type and implementation of the voltage generating circuit 200. Those skilled in the art can select the voltage generating circuit 200 to be calibrated according to actual conditions and needs. In a possible implementation, the voltage generating circuit 200 may include a bandgap reference circuit, a Zener reference circuit, etc.

[0147] See also Figure 8a , Figure 8b , Figure 8a , Figure 8b Schematic diagrams of a voltage generating device composed of a bandgap reference circuit and a Zener reference circuit are shown respectively.

[0148] In one example, if Figure 8a As shown, the bandgap reference circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first bandgap transistor Q1, a second bandgap transistor Q2, a first bandgap MOS transistor M11, and a first operational amplifier A1, wherein:

[0149] The source of the first bandgap MOS transistor M11 is used to receive the power supply voltage, the gate of the first bandgap MOS transistor M11 is connected to the output end of the first operational amplifier A1, and the drain of the first bandgap MOS transistor M11 and the first end of the fifth resistor R5 are connected as the output end of the bandgap reference circuit, which is used to output the target voltage Vout (i.e., the bandgap voltage).

[0150] The second end of the fifth resistor R5 is connected to the first end of the third resistor R3, the first end of the fourth resistor R4 and the output end of the zigzag temperature drift calibration circuit 100, and is used to receive the summed current Itrim.

[0151] The second end of the third resistor R3 is connected to the negative input end of the first operational amplifier A1, the base and the collector of the first bandgap transistor Q1, and the second end of the fourth resistor R4 is connected to the positive input end of the first operational amplifier A1 and the first end of the second resistor R2.

[0152] The second end of the second resistor R2 is connected to the base and collector of the second bandgap transistor Q2.

[0153] An emitter of the first bandgap transistor Q1 , an emitter of the second bandgap transistor Q2 , and a first end of the first resistor R1 are connected, and a second end of the first resistor R1 is grounded.

[0154] For example, Figure 8a As shown, the summed current Itrim is injected from point A and generates a calibration voltage on the fifth resistor R5. The generated target voltage Vout can be expressed as: Vout=VBE+a*ΔVBE+Itrim*R5, wherein VBE represents the base-emitter voltage of the first bandgap transistor Q1, a represents a preset parameter, ΔVBE represents the difference between the base-emitter voltages of the first bandgap transistor Q1 and the second bandgap transistor Q2, and Vout represents the target voltage Vout.

[0155] In one example, if Figure 8b As shown, the Zener reference circuit may include a first Zener reference resistor R11, a second Zener reference resistor R12, a first Zener reference transistor Q11, a first voltage regulator Z1 and a first Zener reference current source I11, wherein:

[0156] The positive electrode of the first Zener reference current source I11 is used to receive the power supply voltage, and the negative electrode of the first Zener reference current source I11 is connected to the first end of the first Zener reference resistor R11 and the negative electrode of the first voltage regulator Z1.

[0157] The second end of the first Zener reference resistor R11 and the first end of the second Zener reference resistor R11 are connected to receive the summed current Itrim and output the target voltage Vout (reference voltage).

[0158] The second end of the second Zener reference resistor R12 is connected to the base and collector of the first Zener reference transistor Q11.

[0159] The emitter of the first Zener reference transistor Q11 and the positive electrode of the first voltage regulator tube Z1 are grounded.

[0160] For example, Figure 8b As shown, the summed current Itrim is injected from point B and generates a calibration voltage on the first Zener reference resistor R11 and the second Zener reference resistor R12. The generated target voltage Vout can be expressed as Wherein, Vout represents the target voltage Vout, b and c represent preset parameters, Vz represents the regulated voltage of the first voltage regulator diode, VBE represents the base-emitter voltage of the first Zener reference transistor Q11, and R1 and R2 represent the resistance values ​​of the first Zener reference resistor R11 and the second Zener reference resistor R12, respectively. The last term in the two equations is the zigzag calibration voltage VTRIM generated by the present invention, and the remaining terms can be uncompensated or first-order calibrated reference voltages.

[0161] See also Fig. 9 , Fig. 9 Schematic diagrams of voltages calibrated using the zigzag temperature drift calibration circuit 100 according to an embodiment of the present disclosure are respectively shown.

[0162] Fig. 9 In the figure, (a) is the reference voltage without adding the zigzag calibration; (b) is the zigzag calibration voltage VTRIM used. The high and low temperature inflection points can be set at the same temperature as shown in the upper half of (b), or the high and low temperature inflection points can be separated as shown in the lower half of (b); (c) is the reference voltage after adding the zigzag calibration. Generally speaking, the use of high and low temperature inflection point separation type zigzag calibration can obtain a lower temperature coefficient than the inflection point merging type voltage reference, because it divides the overall temperature into three sections, but the inflection point merging will be simpler during calibration implementation. The specific choice can be determined according to the shape of the reference voltage curve when the zigzag calibration is not used, and the choice of the inflection point temperature should make the voltage error in each temperature section similar. It can be seen that the embodiment of the present disclosure provides sufficient degrees of freedom to achieve this goal. At the same time, since the temperature of the zigzag inflection point and the direction and intensity of the zigzag current can be controlled by EFUSE, the errors caused by the process and mismatch can be ignored.

[0163] According to one aspect of the present disclosure, an electronic device is provided, and the electronic device includes the zigzag temperature drift calibration circuit 100 or the voltage generating device.

[0164] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A broken line temperature drift calibration circuit, characterized in that: The circuit comprises: A current adjustment module is used to adjust the magnitude and direction of at least one received input current, and sum each adjusted input current to output the summed current, wherein each input current is a high-temperature broken line current or a low-temperature broken line current, the magnitude of the high-temperature broken line current is positively correlated with the magnitude of the temperature, and the magnitude of the low-temperature broken line current is negatively correlated with the magnitude of the temperature, The current adjustment module includes at least one current source module, wherein the current source module is used to generate the input current, the zero point temperature of the current source module is adjustable, and the current output by the current source module at the zero point temperature is zero. The current source module includes a first basic current source, a second basic current source, a third basic current source, and a fourth basic current source, wherein the positive terminal of the first basic current source, the negative terminal of the second basic current source, the positive terminal of the third basic current source, and the negative terminal of the fourth basic current source are connected as the output terminal of the first basic current source module to output the high-temperature fold line current or the low-temperature fold line current, the negative terminal of the first basic current source and the negative terminal of the third basic current source are used to receive the power supply voltage, and the positive terminal of the second basic current source and the positive terminal of the fourth basic current source are grounded. Wherein, the input current is expressed as: Iin=I01-I02+I03-I04, Iin represents the input current, I01 represents the current of the first basic current source, I02 represents the current of the second basic current source, I03 represents the current of the third basic current source, and I04 represents the current of the fourth basic current source. The current adjustment module includes at least one current adjustment unit, each of which includes a first adjustment transistor, a second adjustment transistor, a third adjustment transistor, a first adjustment current mirror, and a second adjustment current mirror, wherein: The gate of the first adjustment transistor, the drain of the first adjustment transistor, the gate of the second adjustment transistor and the control end of the first adjustment current mirror are connected to receive the input current. The source of the third adjustment transistor and the first end of the second adjustment current mirror are used to receive a power supply voltage. The drain of the second adjustment transistor is connected to the drain of the third adjustment transistor, the gate of the third adjustment transistor and the control end of the second adjustment current mirror. The second end of the first adjusting current mirror and the second end of the second adjusting current mirror are connected to the output end of the current adjusting module. The output end of the current adjustment module is used to output the summed current.

2. The circuit according to claim 1, characterized in that The first adjustment current mirror comprises a plurality of PMOS transistors, wherein: the sources of the PMOS transistors are connected as a first end of the current mirror, the drains of the PMOS transistors are connected as a second end of the current mirror, and the gates of the PMOS transistors are connected as a control end of the current mirror. The second adjustment current mirror comprises a plurality of NMOS transistors, wherein the sources of the NMOS transistors are connected as a first end of the current mirror, the drains of the NMOS transistors are connected as a second end of the current mirror, and the gates of the NMOS transistors are connected as a control end of the current mirror. The number of transistors in the first adjustment current mirror and the second adjustment current mirror is adjustable. The direction and magnitude of the summed current output by the current adjustment module changing with temperature are achieved by adjusting the number of transistors in the first adjustment current mirror and the second adjustment current mirror.

3. The circuit according to claim 1, characterized in that The first basic current source and the second basic current source are programmable current sources, the current magnitudes of which are programmable and independent of temperature. If the current source module is used to generate a high-temperature zigzag current, then: The third basic current source is a PTAT current source, the fourth basic current source is a CTAT current source, When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module decreases, or When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module increases.

4. The circuit according to claim 1, characterized in that If the current source module is used to generate a low-temperature zigzag current, then: The third basic current source is a CTAT current source, the fourth basic current source is a PTAT current source, When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module increases, or When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module decreases.

5. A voltage generating device, characterized in that: The device comprises: A voltage generating circuit, used for generating a target voltage; The broken line temperature drift calibration circuit as described in any one of claims 1 to 4 is connected to the voltage generating circuit, and is used to output a summed current to calibrate the voltage generating circuit so that the voltage generating circuit outputs a calibrated target voltage.

6. The device according to claim 5, characterized in that The voltage generating circuit includes a bandgap reference circuit and a Zener reference circuit.

7. An electronic device, characterized in that: The electronic device comprises the broken line temperature drift calibration circuit as described in any one of claims 1 to 5, or the voltage generating device as described in claim 5 or 6.

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