A hardware chip access method, device, equipment and medium

Abstract

The present application discloses a method, device, equipment and medium for hardware chip access, which relates to the field of computer technology, including: determining a kernel header file based on a platform operator library released by a deep learning platform; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; determining a configuration file for configuring the implementation method of each operator in the kernel header file, and determining a target template for normalizing the access method of the hardware operator library of different hardware chip manufacturers, and then generating a front-end kernel function through the kernel header file, the configuration file and the target template; connecting the front-end kernel function to the back-end operator interface, and connecting the hardware operator library of the different hardware chip manufacturers through the back-end operator interface to realize the access of the hardware chip. It can be seen that the present application can reduce the development difficulty of hardware chip access, improve development efficiency and the flexibility of hardware chip access.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a hardware chip access method, device, equipment and medium. Background Art

[0002] With the development of technology, the hardware architecture and instruction sets designed by different hardware chip manufacturers may be different. There are also obvious differences in the software stacks and applicable scenarios of different hardware, resulting in diverse access solutions between hardware and deep learning frameworks.

[0003] Taking the deep learning framework PaddlePaddle as an example, the core work of the deep learning framework PaddlePaddle to access different hardware is to implement kernel functions on different hardware. Based on the Custom Kernel module officially provided by PaddlePaddle, development engineers only need to connect the written kernel functions to the highly reusable operator library of the PaddlePaddle framework to achieve unified scheduling and execution of newly connected hardware. However, the above access method has the following defects: First, kernel functions require engineers to develop one by one based on the hardware operator libraries of different hardware chip manufacturers, and each kernel function needs to be written manually. Since different kernel functions of the same hardware have certain similarities, developers need to spend a lot of time to complete repetitive work, resulting in a long development cycle, low work efficiency, and easy errors; second, different kernel function access methods are required to adapt to different hardware, which makes development more difficult.

[0004] Therefore, the above technical problems need to be solved by those skilled in the art urgently. Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a hardware chip access method, device, equipment and medium, which can reduce the development difficulty of hardware chip access, improve development efficiency and flexibility of hardware chip access, and its specific scheme is as follows:

[0006] In a first aspect, the present application discloses a hardware chip access method, comprising:

[0007] Determine a kernel header file based on a platform operator library released by a deep learning platform; parameter information of each operator in the kernel header file is consistent with parameter information in the platform operator library;

[0008] Determine a configuration file for configuring the implementation mode of each operator in the kernel header file, and determine a target template for standardizing the access mode of the hardware operator library of different hardware chip manufacturers, and then generate a front-end kernel function through the kernel header file, the configuration file and the target template;

[0009] The front-end kernel function is connected to the back-end operator interface, and the hardware operator libraries of the different hardware chip manufacturers are connected through the back-end operator interface to achieve the access of the hardware chip.

[0010] Optionally, the parameter information of each operator in the kernel header file includes a parameter type of each operator, a parameter name of each operator, and a first parameter order of each operator.

[0011] Optionally, the configuration file includes the operator names of the operators in the kernel header file, the interface name of the back-end operator interface, and the target parameters for adjusting the parameter passing order; wherein, the back-end operator interfaces with different interface names correspond to the hardware operator libraries of the different hardware chip manufacturers, and the parameter passing order is the order in which the front-end kernel function passes parameters to the back-end operator interface.

[0012] Optionally, generating the front-end kernel function by using the kernel header file, the configuration file and the target template includes:

[0013] The kernel header file and the configuration file are read through the target template so as to automatically generate the front-end kernel function.

[0014] Optionally, the front-end kernel function includes an operator function declaration statement, and the reading of the kernel header file and the configuration file through the target template to automatically generate the front-end kernel function includes:

[0015] The parameter type of each operator, the parameter name of each operator and the first parameter order of each operator in the kernel header file are read through the first statement template in the target template to automatically generate the operator function declaration statement in the front-end kernel function.

[0016] Optionally, the target parameters include a first target parameter for adjusting the input parameter passing order and a second target parameter for adjusting the output parameter passing order, wherein the input parameter passing order is the order in which parameters are passed from the input of the front-end kernel function to the input of the back-end operator interface, and the output parameter passing order is the order in which parameters are passed from the output of the front-end kernel function to the output of the back-end operator interface.

[0017] Optionally, the front-end kernel function includes a memory allocation statement, and the reading of the kernel header file and the configuration file through the target template to automatically generate the front-end kernel function includes:

[0018] The second target parameter in the configuration file is read through the second statement template in the target template, so as to automatically generate the memory allocation statement in the front-end kernel function according to the second target parameter.

[0019] Optionally, the front-end kernel function includes an interface call statement, and the reading of the kernel header file and the configuration file through the target template to automatically generate the front-end kernel function includes:

[0020] The interface name of the backend operator interface in the configuration file is read through the third statement template in the target template so as to automatically generate the interface call statement in the frontend kernel function.

[0021] Optionally, the hardware chip access method further includes:

[0022] For any operator, determining whether the operator needs to perform target operation processing;

[0023] If any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added for the any of the operators in the configuration file.

[0024] Optionally, the determining whether any of the operators needs to perform target operation processing includes:

[0025] By searching a pre-configured target database, determining whether any of the operators needs to perform the target operation processing; the target database includes operators that need to perform the target operation processing;

[0026] Correspondingly, if any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added to the configuration file for the any of the operators, including:

[0027] If any of the operators is found in the target database, it is determined that any of the operators needs to perform the target operation processing, and a corresponding operation processing identifier is added to the configuration file for the any of the operators.

[0028] Optionally, the hardware chip access method further includes:

[0029] An interface customization operation is performed based on the hardware operator libraries of the different hardware chip manufacturers to obtain the backend operator interface.

[0030] Optionally, the hardware chip access method further includes:

[0031] The operator names of the operators in the configuration file are generated in a customized manner.

[0032] In a second aspect, the present application discloses a hardware chip access device, comprising:

[0033] A header file determination module, used to determine a kernel header file based on a platform operator library released by a deep learning platform; parameter information of each operator in the kernel header file is consistent with parameter information in the platform operator library;

[0034] A configuration file and template determination module, used to determine a configuration file for configuring the implementation mode of each operator in the kernel header file, and to determine a target template for standardizing the access mode of the hardware operator library of different hardware chip manufacturers;

[0035] A front-end kernel function generation module, used to generate a front-end kernel function through the kernel header file, the configuration file and the target template;

[0036] The hardware chip access module is used to access the front-end kernel function to the back-end operator interface, and to connect to the hardware operator libraries of different hardware chip manufacturers through the back-end operator interface to achieve hardware chip access.

[0037] In a third aspect, the present application discloses an electronic device, including:

[0038] Memory, used to store computer programs;

[0039] The processor is used to execute the computer program to implement the hardware chip access method disclosed above.

[0040] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the aforementioned disclosed hardware chip access method is implemented.

[0041] It can be seen that the present application proposes a method for hardware chip access, including: determining a kernel header file based on a platform operator library released by a deep learning platform; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; determining a configuration file for configuring the implementation method of each operator in the kernel header file, and determining a target template for normalizing the access method of the hardware operator library of different hardware chip manufacturers, and then generating a front-end kernel function through the kernel header file, the configuration file and the target template; connecting the front-end kernel function to the back-end operator interface, and connecting the hardware operator library of the different hardware chip manufacturers through the back-end operator interface to realize the access of the hardware chip. In summary, it can be seen that the present application decouples the hardware chip access into two parts, the front-end and the back-end, connecting the platform operator library of the deep learning platform through the front-end kernel function at the front end, and connecting the hardware operator library of different hardware chip manufacturers through the back-end operator interface at the back end. Since the front-end kernel function only needs to be connected to the deep learning platform, different hardware chip manufacturers can reuse a set of front-end kernel functions. In this way, the developers in this application only need to configure the relevant files to automatically generate the relevant kernel functions. Since this application does not need to manually write kernel functions, and does not need to spend a lot of time to complete the writing of repeated codes, this application reduces the development cycle, improves work efficiency, and reduces errors caused by human factors. Furthermore, this application connects the front-end kernel function to the back-end operator interface, and connects the hardware operator library of different hardware chip manufacturers through the back-end operator interface. Since there is only one way to connect the front-end kernel function with the back-end operator interface, this application does not need to use different kernel function access methods to adapt to different hardware chips, which reduces the development difficulty and increases the access flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0043] Figure 1 A flowchart of a hardware chip access method disclosed in this application;

[0044] Figure 2 A flowchart of a specific hardware chip access method disclosed in this application;

[0045] Figure 3 A schematic diagram of a specific hardware chip access method disclosed in this application;

[0046] Figure 4This is a schematic diagram of the structure of a hardware chip access device disclosed in this application;

[0047] Figure 5 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0048] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] The traditional hardware chip access method has the following defects: First, engineers need to develop kernel functions one by one based on the hardware operator libraries of different hardware chip manufacturers, and each kernel function needs to be written manually. Since different kernel functions of the same hardware have certain similarities, developers need to spend a lot of time to complete repetitive work, resulting in a long development cycle, low work efficiency, and prone to errors; second, different kernel function access methods are required to adapt to different hardware, which makes development more difficult.

[0050] To this end, an embodiment of the present application proposes a hardware chip access solution, which can reduce the development difficulty of hardware chip access and improve development efficiency and flexibility of hardware chip access.

[0051] The present application embodiment discloses a hardware chip access method, see Figure 1 As shown, the method includes:

[0052] Step S11: Determine a kernel header file based on a platform operator library released by a deep learning platform; parameter information of each operator in the kernel header file is consistent with parameter information in the platform operator library.

[0053] In this embodiment, the kernel header file is first determined based on the platform operator library released by the deep learning platform, wherein the kernel header file contains parameter information of each operator. For example, the parameter information of each operator includes the parameter type of each operator, the parameter name of each operator, and the first parameter order of each operator. It should be pointed out that the deep learning platform includes but is not limited to the deep learning framework Feijiang, etc.

[0054] It can be understood that each operator represents an operation mode, the parameter type is the type of the parameter involved in the operation, including integer type, floating point type, character type, string type, etc., the parameter name is the name of the parameter involved in the operation, such as parameter A, parameter B, etc., the first parameter order is the order of the parameters involved in the operation, for example, add(A, B) means that parameter A is added to the parameter, and the first parameter order is parameter A first and parameter B later.

[0055] Step S12: Determine a configuration file for configuring the implementation method of each operator in the kernel header file, and determine a target template for standardizing the access method of the hardware operator library of different hardware chip manufacturers, and then generate a front-end kernel function through the kernel header file, the configuration file and the target template.

[0056] It should be pointed out that only the kernel header file cannot complete the automatic generation of the front-end kernel function. For this reason, this embodiment improves the relevant parameters required for the automatic generation of the front-end kernel function through the configuration file.

[0057] Therefore, in this embodiment, a configuration file for configuring the implementation of each operator in the kernel header file is determined. Specifically, the configuration file includes the operator name of each operator in the kernel header file, the interface name of the backend operator interface, and the target parameter for adjusting the parameter passing order; wherein, the backend operator interface with different interface names corresponds to the hardware operator library of different hardware chip manufacturers, and the parameter passing order is the order in which the frontend kernel function passes parameters to the backend operator interface.

[0058] Among them, this embodiment can customize the operator name of each operator in the generated configuration file. That is, the operator name of each operator in the configuration file can be customized by the programmer, so that it is convenient for the programmer to develop and read and write codes. Furthermore, the deep learning platform can automatically access the corresponding operator in the platform operator library according to the parameter information in the kernel header file, without the need for the programmer to manually connect.

[0059] Among them, backend operator interfaces with different interface names correspond to hardware operator libraries of different hardware chip manufacturers. In this way, this embodiment can match the corresponding hardware operator library according to the interface name in the configuration file to quickly and accurately implement the access of the hardware chip.

[0060] Among them, since the parameter order of the front-end kernel function and the back-end operator interface may not be completely corresponding, this embodiment defines a target parameter for adjusting the parameter passing order in the configuration file. Through this target parameter, the order in which the front-end kernel function passes parameters to the back-end operator interface can be adjusted. In this way, the problem of parameter passing errors caused by the fact that the parameter order of the front-end kernel function and the back-end operator interface is not completely corresponding is solved.

[0061] Furthermore, in order to standardize the access methods of hardware operator libraries of different hardware chip manufacturers, this embodiment generates a target template. In the target template, multiple statement templates are specified. Different statement templates are used to generate different contents in the front-end kernel function. In a specific implementation, the target template can be a python file.

[0062] Finally, this embodiment generates a front-end kernel function through a kernel header file, a configuration file, and a target template. As a specific implementation method for generating a front-end kernel, this embodiment reads a kernel header file and a configuration file through a target template to automatically generate a front-end kernel function. The contents of the front-end kernel function are explained below.

[0063] In some embodiments, the parameter type of each operator, the parameter name of each operator and the first parameter order of each operator in the kernel header file are read through the first statement template in the target template to automatically generate the operator function declaration statement in the front-end kernel function.

[0064] That is to say, this embodiment reads the parameter information of each operator in the kernel header file through the first statement template in the target template, and automatically generates the operator function declaration statement in the front-end kernel function.

[0065] In some embodiments, the target parameters include a first target parameter for adjusting the order of input parameter passing and a second target parameter for adjusting the order of output parameter passing, wherein the order of input parameter passing is the order in which the input of the front-end kernel function passes the parameters to the input of the back-end operator interface, and the order of output parameter passing is the order in which the output of the front-end kernel function passes the parameters to the output of the back-end operator interface. Further, the front-end kernel function includes a memory allocation statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: reading the second target parameter in the configuration file through the second statement template in the target template, so as to automatically generate the memory allocation statement in the front-end kernel function according to the second target parameter.

[0066] That is to say, this embodiment can not only adjust the order of input parameter passing, but also adjust the order of output parameter passing. Since individual operators may have multiple output parameters, multiple blocks of memory need to be allocated. Therefore, this embodiment determines the number of output parameters according to the second target parameter, and determines the amount of memory allocation based on the number of output parameters. It can be understood that the code statement used to describe memory allocation is also the memory allocation statement in the front-end kernel function.

[0067] In some embodiments, the front-end kernel function includes an interface call statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: reading the interface name of the back-end operator interface in the configuration file through the third statement template in the target template to automatically generate the interface call statement in the front-end kernel function.

[0068] That is to say, since backend operator interfaces with different interface names correspond to hardware operator libraries of different hardware chip manufacturers, this embodiment reads the interface name of the backend operator interface in the configuration file through the third statement template in the target template to match the corresponding hardware operator library.

[0069] In addition, the front-end kernel function also includes copyright declaration, header file introduction, namespace definition, front-end and back-end flow unification, input and output parameter passing, and registration function. Among them, the copyright declaration, header file introduction, namespace definition, and front-end and back-end flow unification of each operator are the same. The input and output parameter passing and registration function can be obtained by reading the configuration file. The input and output parameter passing is to package the input parameters and pass them to the back-end operator interface, and the output parameters are packaged and passed to the back-end operator interface. The registration function is to notify the front-end kernel function of the customized operator name.

[0070] Step S13: connecting the front-end kernel function to the back-end operator interface, and connecting to the hardware operator libraries of the different hardware chip manufacturers through the back-end operator interface to achieve access to the hardware chip.

[0071] In this embodiment, the front-end kernel function is connected to the back-end operator interface, and the hardware operator libraries of different hardware chip manufacturers are connected through the back-end operator interface to achieve access to the hardware chip. It should be pointed out that the back-end operator interface can be obtained by performing interface customization operations on the hardware operator libraries of different hardware chip manufacturers.

[0072] It should be pointed out that, in this embodiment, the hardware chip access for the deep learning platform can be applied to the face recognition scenario. That is, the kernel header file is determined based on the platform operator library released by the deep learning platform for face recognition; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library of the deep learning platform for face recognition; a configuration file for configuring the implementation method of each operator in the kernel header file is determined, and a target template for normalizing the access method of the hardware operator library of different hardware chip manufacturers is determined, and then a front-end kernel function is generated through the kernel header file, the configuration file and the target template; the front-end kernel function is connected to the back-end operator interface, and the hardware operator library of different hardware chip manufacturers is connected through the back-end operator interface to realize the access of the hardware chip for face recognition.

[0073] In addition, in addition to being applicable to face recognition scenarios, the technical solution in this embodiment can also be applied to application scenarios such as voice recognition and unmanned driving.

[0074] It can be seen that the present application proposes a method for hardware chip access, including: determining a kernel header file based on a platform operator library released by a deep learning platform; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; determining a configuration file for configuring the implementation method of each operator in the kernel header file, and determining a target template for normalizing the access method of the hardware operator library of different hardware chip manufacturers, and then generating a front-end kernel function through the kernel header file, the configuration file and the target template; connecting the front-end kernel function to the back-end operator interface, and connecting the hardware operator library of the different hardware chip manufacturers through the back-end operator interface to realize the access of the hardware chip. In summary, it can be seen that the present application decouples the hardware chip access into two parts, the front-end and the back-end, connecting the platform operator library of the deep learning platform through the front-end kernel function at the front end, and connecting the hardware operator library of different hardware chip manufacturers through the back-end operator interface at the back end. Since the front-end kernel function only needs to be connected to the deep learning platform, different hardware chip manufacturers can reuse a set of front-end kernel functions. In this way, the developers in this application only need to configure the relevant files to automatically generate the relevant kernel functions. Since this application does not need to manually write kernel functions, and does not need to spend a lot of time to complete the writing of repeated codes, this application reduces the development cycle, improves work efficiency, and reduces errors caused by human factors. Furthermore, this application connects the front-end kernel function to the back-end operator interface, and connects the hardware operator library of different hardware chip manufacturers through the back-end operator interface. Since there is only one way to connect the front-end kernel function with the back-end operator interface, this application does not need to use different kernel function access methods to adapt to different hardware chips, which reduces the development difficulty and increases the access flexibility.

[0075] The embodiment of the present application discloses a specific hardware chip access method. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution. Figure 2 As shown, specifically including:

[0076] Step S21: for any operator, determine whether the operator needs to perform target operation processing.

[0077] In this embodiment, the operator parameters in the platform operator library of the deep learning platform may not match the backend operator interface. Therefore, it is necessary to perform target operation processing on certain operators so that the operator parameters in the platform operator library of the deep learning platform match the backend operator interface.

[0078] To this end, this embodiment generates a target database in advance according to the operators that need to perform target operation processing. In this way, by searching the pre-configured target database, it is possible to determine whether any operator needs to perform target operation processing. The target operation processing includes absolute value operation, power operation, exponential operation, etc. It can be understood that pre-generating the target database speeds up the speed of performing target operation processing on the operator.

[0079] Step S22: If any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added for the any of the operators in the configuration file.

[0080] It is understandable that if any operator is found in the target database, it is determined that any operator needs to perform target operation processing, and a corresponding operation processing identifier is added to any operator in the configuration file. In this way, a corresponding operation processing solution can be generated based on the operation processing identifier to solve the problem that the operator parameters in the platform operator library of the deep learning platform do not match the backend operator interface.

[0081] See also Figure 3As shown, taking the deep learning platform as the deep learning framework Feijiang as an example, first generate the kernel header file, configuration file and target template, wherein the kernel header file is connected to the deep learning framework Feijiang, and the front-end kernel function is generated according to the kernel header file, configuration file and target template, and then the front-end kernel function is connected to the back-end operator interface, and the hardware operator library of different hardware chip manufacturers is connected through the back-end operator interface, wherein the hardware operator libraries of different hardware chip manufacturers include but are not limited to the hardware operator libraries of Cambrian, Intel, Suiyuan and other hardware chip manufacturers. In a specific embodiment, the present application can realize the front-end and back-end decoupling of hardware chip access based on the multi-heterogeneous AI (Artificial Intelligence) computing power execution framework (TensorGlue), thereby reducing the difficulty of the deep learning framework Feijiang accessing the hardware chip. TensorGlue connects to the deep learning framework Feijiang upwards, calls the hardware operator library of the hardware chip manufacturer downwards, and divides the work of connecting the deep learning framework Feijiang to different hardware chips into two modules: the front-end and the back-end. The back-end connects to the hardware operator library of different hardware chip manufacturers through a customized back-end operator interface, and the front-end only needs to connect the platform operator library in the deep learning framework Feijiang to the back-end operator interface to complete the adaptation of different hardware chips. This application reduces the difficulty of docking complex hardware operator libraries and increases access flexibility by decoupling the front-end and back-end. At the same time, since the front-end only needs to dock with the deep learning framework Feijiang, all hardware chip manufacturers can reuse a set of front-end codes, and can automatically generate repetitive codes through templates. Therefore, this application greatly improves development efficiency. Furthermore, this application standardizes the writing of front-end kernel functions through target templates, increases the feasibility of code reading, and avoids invisible problems caused by developer negligence.

[0082] It should be pointed out that in addition to being applicable to the deep learning framework PyPulse, this application also has the potential to be applied to other deep learning frameworks. For example, this method can be used when Pytorch is connected to various hardware chips to reduce the difficulty of hardware chip access.

[0083] Correspondingly, the embodiment of the present application also discloses a hardware chip access device, see Figure 4 As shown, the device comprises:

[0084] The header file determination module 11 is used to determine the kernel header file based on the platform operator library released by the deep learning platform; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library;

[0085] A configuration file and template determination module 12, used to determine a configuration file for configuring the implementation mode of each operator in the kernel header file, and to determine a target template for standardizing the access mode of the hardware operator library of different hardware chip manufacturers;

[0086] A front-end kernel function generating module 13 is used to generate a front-end kernel function through the kernel header file, the configuration file and the target template;

[0087] The hardware chip access module 14 is used to access the front-end kernel function to the back-end operator interface, and to connect to the hardware operator libraries of different hardware chip manufacturers through the back-end operator interface to achieve hardware chip access.

[0088] Among them, for more specific working processes of the above-mentioned modules, please refer to the corresponding contents disclosed in the aforementioned embodiments, which will not be repeated here.

[0089] It can be seen that the present application proposes a method for hardware chip access, including: determining a kernel header file based on a platform operator library released by a deep learning platform; the parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; determining a configuration file for configuring the implementation method of each operator in the kernel header file, and determining a target template for normalizing the access method of the hardware operator library of different hardware chip manufacturers, and then generating a front-end kernel function through the kernel header file, the configuration file and the target template; connecting the front-end kernel function to the back-end operator interface, and connecting the hardware operator library of the different hardware chip manufacturers through the back-end operator interface to realize the access of the hardware chip. In summary, it can be seen that the present application decouples the hardware chip access into two parts, the front-end and the back-end, connecting the platform operator library of the deep learning platform through the front-end kernel function at the front end, and connecting the hardware operator library of different hardware chip manufacturers through the back-end operator interface at the back end. Since the front-end kernel function only needs to be connected to the deep learning platform, different hardware chip manufacturers can reuse a set of front-end kernel functions. In this way, the developers in this application only need to configure the relevant files to automatically generate the relevant kernel functions. Since this application does not need to manually write kernel functions, and does not need to spend a lot of time to complete the writing of repeated codes, this application reduces the development cycle, improves work efficiency, and reduces errors caused by human factors. Furthermore, this application connects the front-end kernel function to the back-end operator interface, and connects the hardware operator library of different hardware chip manufacturers through the back-end operator interface. Since there is only one way to connect the front-end kernel function with the back-end operator interface, this application does not need to use different kernel function access methods to adapt to different hardware chips, which reduces the development difficulty and increases the access flexibility.

[0090] In some specific embodiments, the parameter information of each operator in the kernel header file includes the parameter type of each operator, the parameter name of each operator, and the first parameter order of each operator.

[0091] In some specific embodiments, the configuration file includes the operator names of the operators in the kernel header file, the interface name of the back-end operator interface, and the target parameters for adjusting the parameter passing order; wherein, the back-end operator interfaces with different interface names correspond to the hardware operator libraries of the different hardware chip manufacturers, and the parameter passing order is the order in which the front-end kernel function passes parameters to the back-end operator interface.

[0092] In some specific embodiments, the front-end kernel function generation module 13 may specifically include:

[0093] The front-end kernel function generating unit is used to read the kernel header file and the configuration file through the target template so as to automatically generate the front-end kernel function.

[0094] In some specific embodiments, the front-end kernel function includes an operator function declaration statement, and the front-end kernel function generation unit is specifically used to:

[0095] The parameter type of each operator, the parameter name of each operator and the first parameter order of each operator in the kernel header file are read through the first statement template in the target template to automatically generate the operator function declaration statement in the front-end kernel function.

[0096] In some specific embodiments, the target parameters include a first target parameter for adjusting the input parameter passing order and a second target parameter for adjusting the output parameter passing order, wherein the input parameter passing order is the order in which the input of the front-end kernel function passes parameters to the input of the back-end operator interface, and the output parameter passing order is the order in which the output of the front-end kernel function passes parameters to the output of the back-end operator interface.

[0097] In some specific embodiments, the front-end kernel function includes a memory allocation statement, and the front-end kernel function generation unit is specifically used to:

[0098] The second target parameter in the configuration file is read through the second statement template in the target template, so as to automatically generate the memory allocation statement in the front-end kernel function according to the second target parameter.

[0099] In some specific embodiments, the front-end kernel function includes an interface call statement, and the front-end kernel function generation unit is specifically used to:

[0100] The interface name of the backend operator interface in the configuration file is read through the third statement template in the target template so as to automatically generate the interface call statement in the frontend kernel function.

[0101] In some specific embodiments, the hardware chip access device may further include:

[0102] An operation processing judgment unit, used for judging whether any operator needs to perform a target operation processing;

[0103] The operation processing identifier adding unit is used to add a corresponding operation processing identifier for any operator in the configuration file if any operator needs to perform the target operation processing.

[0104] In some specific embodiments, the computing and processing judgment unit is specifically used to:

[0105] By searching a pre-configured target database, determining whether any of the operators needs to perform the target operation processing; the target database includes operators that need to perform the target operation processing;

[0106] Accordingly, the operation processing identifier adding unit is specifically used for:

[0107] If any of the operators is found in the target database, it is determined that any of the operators needs to perform the target operation processing, and a corresponding operation processing identifier is added to the configuration file for the any of the operators.

[0108] In some specific embodiments, the hardware chip access device may further include:

[0109] The backend operator interface definition unit is used to perform interface customization operations based on the hardware operator libraries of the different hardware chip manufacturers to obtain the backend operator interface.

[0110] In some specific embodiments, the hardware chip access device may further include:

[0111] The operator name definition unit is used to generate the operator name of each operator in the configuration file in a customized manner.

[0112] Furthermore, an embodiment of the present application also provides an electronic device. Figure 5 This is a structural diagram of an electronic device according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0113] Figure 5A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may specifically include: at least one processor 21, at least one memory 22, a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the hardware chip access method disclosed in any of the aforementioned embodiments. In addition, the electronic device in this embodiment may specifically be an electronic computer.

[0114] In this embodiment, the power supply 26 is used to provide working voltage for each hardware device on the electronic device; the communication interface 25 can create a data transmission channel between the electronic device and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 24 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0115] In addition, the memory 22, as a carrier for storing resources, may be a read-only memory, a random access memory, a disk or an optical disk, etc., and the resources stored thereon may include a computer program 221, and the storage method may be temporary storage or permanent storage. In addition to including a computer program that can be used to complete the hardware chip access method performed by the electronic device disclosed in any of the aforementioned embodiments, the computer program 221 may further include a computer program that can be used to complete other specific tasks.

[0116] Furthermore, an embodiment of the present application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, the aforementioned disclosed hardware chip access method is implemented.

[0117] For the specific steps of the method, reference may be made to the corresponding contents disclosed in the aforementioned embodiments, which will not be described in detail here.

[0118] The various embodiments in this application are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0119] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0120] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0121] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0122] The above is a detailed introduction to a hardware chip access method, device, equipment, and storage medium provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A hardware chip access method, characterized in that: include: Determine the kernel header file based on the platform operator library released by the deep learning platform; The parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; Determine a configuration file for configuring the implementation mode of each operator in the kernel header file, and determine a target template for standardizing the access mode of the hardware operator library of different hardware chip manufacturers, and then generate a front-end kernel function through the kernel header file, the configuration file and the target template; Connecting the front-end kernel function to the back-end operator interface, and connecting to the hardware operator libraries of different hardware chip manufacturers through the back-end operator interface to achieve access to the hardware chip; The parameter information of each operator in the kernel header file includes the parameter type of each operator, the parameter name of each operator and the first parameter order of each operator; The configuration file includes the operator name of each operator in the kernel header file, the interface name of the backend operator interface, and the target parameter for adjusting the parameter passing order; wherein the backend operator interfaces with different interface names correspond to the hardware operator libraries of the different hardware chip manufacturers, and the parameter passing order is the order in which the frontend kernel function passes parameters to the backend operator interface; The generating of the front-end kernel function by using the kernel header file, the configuration file and the target template comprises: Reading the kernel header file and the configuration file through the target template so as to automatically generate the front-end kernel function; The front-end kernel function includes an operator function declaration statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the parameter type of each operator, the parameter name of each operator and the first parameter order of each operator in the kernel header file through the first statement template in the target template, so as to automatically generate the operator function declaration statement in the front-end kernel function; The target parameters include a first target parameter for adjusting the order of input parameter transfer and a second target parameter for adjusting the order of output parameter transfer, wherein the input parameter transfer order is the order in which the input of the front-end kernel function transfers parameters to the input of the back-end operator interface, and the output parameter transfer order is the order in which the output of the front-end kernel function transfers parameters to the output of the back-end operator interface; The front-end kernel function includes a memory allocation statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the second target parameter in the configuration file through the second statement template in the target template, so as to automatically generate the memory allocation statement in the front-end kernel function according to the second target parameter; The front-end kernel function includes an interface call statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the interface name of the backend operator interface in the configuration file through the third statement template in the target template, so as to automatically generate the interface call statement in the frontend kernel function; Wherein, for any operator, determining whether the operator needs to perform target operation processing; If any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added for the any of the operators in the configuration file; Wherein, the determining whether any of the operators needs to perform target operation processing includes: By searching a pre-configured target database, determining whether any of the operators needs to perform the target operation processing; the target database includes operators that need to perform the target operation processing; Correspondingly, if any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added to the configuration file for any of the operators, including: If any of the operators is found in the target database, it is determined that any of the operators needs to perform the target operation processing, and a corresponding operation processing identifier is added for any of the operators in the configuration file; Wherein, the hardware chip access method further includes: Performing interface customization operation based on the hardware operator libraries of the different hardware chip manufacturers to obtain the backend operator interface; Among them, each operator represents an operation mode, the parameter type is the type of the parameter involved in the operation, including integer type, floating point type, character type, string type, the parameter name is the name of the parameter involved in the operation, and the first parameter order is the order of the parameters involved in the operation.

2. The hardware chip access method according to claim 1, characterized in that: Also includes: The operator names of the operators in the configuration file are generated in a customized manner.

3. A hardware chip access device, characterized in that: include: The header file determination module is used to determine the kernel header file based on the platform operator library released by the deep learning platform; The parameter information of each operator in the kernel header file is consistent with the parameter information in the platform operator library; A configuration file and template determination module, used to determine a configuration file for configuring the implementation mode of each operator in the kernel header file, and to determine a target template for standardizing the access mode of the hardware operator library of different hardware chip manufacturers; A front-end kernel function generation module, used to generate a front-end kernel function through the kernel header file, the configuration file and the target template; A hardware chip access module, used to access the front-end kernel function to the back-end operator interface, and to connect to the hardware operator libraries of different hardware chip manufacturers through the back-end operator interface to achieve hardware chip access; The parameter information of each operator in the kernel header file includes the parameter type of each operator, the parameter name of each operator and the first parameter order of each operator; The configuration file includes the operator name of each operator in the kernel header file, the interface name of the backend operator interface, and the target parameter for adjusting the parameter passing order; wherein the backend operator interfaces with different interface names correspond to the hardware operator libraries of the different hardware chip manufacturers, and the parameter passing order is the order in which the frontend kernel function passes parameters to the backend operator interface; The generating of the front-end kernel function by using the kernel header file, the configuration file and the target template comprises: Reading the kernel header file and the configuration file through the target template so as to automatically generate the front-end kernel function; The front-end kernel function includes an operator function declaration statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the parameter type of each operator, the parameter name of each operator and the first parameter order of each operator in the kernel header file through the first statement template in the target template, so as to automatically generate the operator function declaration statement in the front-end kernel function; The target parameters include a first target parameter for adjusting the order of input parameter transfer and a second target parameter for adjusting the order of output parameter transfer, wherein the input parameter transfer order is the order in which the input of the front-end kernel function transfers parameters to the input of the back-end operator interface, and the output parameter transfer order is the order in which the output of the front-end kernel function transfers parameters to the output of the back-end operator interface; The front-end kernel function includes a memory allocation statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the second target parameter in the configuration file through the second statement template in the target template, so as to automatically generate the memory allocation statement in the front-end kernel function according to the second target parameter; The front-end kernel function includes an interface call statement, and the kernel header file and the configuration file are read through the target template to automatically generate the front-end kernel function, including: Reading the interface name of the backend operator interface in the configuration file through the third statement template in the target template, so as to automatically generate the interface call statement in the frontend kernel function; Wherein, for any operator, determining whether the operator needs to perform target operation processing; If any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added for the any of the operators in the configuration file; Wherein, the determining whether any of the operators needs to perform target operation processing includes: By searching a pre-configured target database, determining whether any of the operators needs to perform the target operation processing; the target database includes operators that need to perform the target operation processing; Correspondingly, if any of the operators needs to perform the target operation processing, a corresponding operation processing identifier is added to the configuration file for any of the operators, including: If any of the operators is found in the target database, it is determined that any of the operators needs to perform the target operation processing, and a corresponding operation processing identifier is added for any of the operators in the configuration file; Wherein, the hardware chip access device further includes: Performing interface customization operation based on the hardware operator libraries of the different hardware chip manufacturers to obtain the backend operator interface; Among them, each operator represents an operation mode, the parameter type is the type of the parameter involved in the operation, including integer type, floating point type, character type, string type, the parameter name is the name of the parameter involved in the operation, and the first parameter order is the order of the parameters involved in the operation.

4. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the hardware chip access method as claimed in claim 1 or 2.

5. A computer-readable storage medium, characterized in that: Used to store computer programs; wherein, when the computer program is executed by a processor, the hardware chip access method as claimed in claim 1 or 2 is implemented.

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