Template-grown perovskite thin-film transistor and its preparation method

Abstract

The present invention discloses a perovskite thin film transistor based on template growth and a preparation method thereof. The perovskite thin film transistor has a bottom-gate top contact structure, which includes, from bottom to top, a gate electrode, an insulating layer, a perovskite semiconductor active layer based on template growth, and a symmetrical source-drain electrode. The perovskite semiconductor layer is realized by adding thiocyanate that can form a low-dimensional structure to a three-dimensional tin-based metal halide perovskite precursor solution; wherein, thiocyanate can reduce the formation energy of the low-dimensional structure, so that it is formed in large quantities before annealing, and in the subsequent annealing process, induces the directional growth of the three-dimensional structure perpendicular to the substrate, thereby realizing the sequential growth of perovskites of different dimensions. The obtained transistor has an improved current switching ratio of about one order of magnitude, and a carrier mobility from 8.6 cm 2 V ‑ 1 s ‑1 Increased to 40.5 cm 2 V ‑1 s ‑1 , the subthreshold swing is reduced from 0.33 V / dec to 0.23 V / dec. The present invention has the advantages of low cost, simple process steps, etc.

Description

Technical Field

[0001] The present invention relates to the fields of semiconductor material growth, microelectronic device technology and display applications, and specifically includes designing a tin-based metal halide perovskite thin film transistor based on template growth and a preparation method thereof. Background Art

[0002] In the past decade, metal halide perovskite materials have shown great application potential in photovoltaics, light-emitting diodes, and photon detectors due to their excellent optoelectronic properties, cheap raw materials, and simple preparation processes. Recently, perovskite solar cells have achieved a certified efficiency of 26.1%, which is comparable to commercial Si, CuInGaSe, and CdTe thin film optoelectronic devices. In comparison, the application of field-effect transistors based on metal halide perovskite thin film materials is still very lacking. First-principles theoretical calculations and experimental studies of charge transport, such as the Hall effect, time-resolved spectroscopy, space charge limited current, and time-of-flight measurements, have demonstrated that metal halide perovskites can exhibit 10-100 cm 2 V -1 s -1 Due to its high carrier mobility, it is expected to be a very excellent transistor channel material.

[0003] However, the overall electrical performance of metal halide perovskite field-effect transistors is currently far lower than theoretical calculations. The main reason is that high-dimensional perovskite films are uncontrollable during the crystallization process (such as formamidinium tin iodide FASnI3, methylamine tin iodide MASnI3, and cesium tin iodide CsSnI3), resulting in high film defect density, poor film crystallinity and uniformity, which in turn causes carrier lattice scattering and energy disorder at grain boundaries and interfaces, hindering efficient carrier transport. In contrast, low-dimensional perovskite films have higher formation energies (for example: single-layer low-dimensional structure phenylethylamine tin iodide PEA2SnI4, double-layer low-dimensional structure PEA2FASn2I7), slow crystallization, and are generally hydrophobic and highly stable. However, low-dimensional structure films often have low hole concentrations, and layered organic insulating spacers hinder carrier transport in the vertical direction. Therefore, adding iodine salts that can form low-dimensional structures to high-dimensional perovskite precursors can not only regulate crystal growth, but also enhance oxidation resistance and passivate the film interface, thereby reducing defect states and electronic defects. Using this method, the electrical performance of perovskite transistors can be significantly improved. However, the structures and orientations of the components of metal halide perovskite films of different dimensions are different. The competitive growth between the various structures can easily lead to disordered film structure and difficulty in obtaining large grains, resulting in an increase in film defects and a decrease in carrier mobility of field-effect transistors. Summary of the Invention

[0004] In view of the problems in the prior art, the present invention aims to provide a tin-based metal halide perovskite thin film transistor based on template growth and a preparation method thereof. The present invention improves the film quality of the perovskite semiconductor active layer by replacing the iodine salt commonly used to form the low-dimensional perovskite structure with a thiocyanate (for example, replacing phenylethylamine iodide salt PEAI with phenylethylamine thiocyanate PEASCN), thereby reducing the formation energy of the low-dimensional structure (for example, a double-layer low-dimensional structure PEA2FASn2SCN2I3), thereby preferentially generating a low-dimensional structure. This low-dimensional structure is mainly located on the upper surface of the film parallel to the substrate, and during the subsequent annealing process, it induces the directional growth of a high-dimensional structure perpendicular to the substrate, thereby achieving the sequential growth of metal halide perovskites of different dimensions. This method of perovskite growth kinetics leads to better crystal orientation, and the film exhibits lower defect density, stronger hole carrier transport capability, better oxidation resistance, and environmental stability. At the same time, the current switching ratio and carrier mobility of the transistor device are significantly improved, and the subthreshold swing of the device is greatly reduced.

[0005] The specific technical solution for achieving the purpose of the present invention is:

[0006] A method for preparing a perovskite thin film transistor based on template growth, wherein the perovskite thin film transistor comprises a gate electrode, an insulating layer, a tin-based metal halide perovskite semiconductor active layer grown based on the template, and a symmetrical source electrode and drain electrode, which are arranged in sequence from bottom to top; the preparation method comprises the following steps:

[0007] Step 1: preparing a tin-based perovskite precursor solution comprising a thiocyanate forming a low-dimensional structure, a first ion, a second ion, and an organic solvent; wherein the molar ratio of the thiocyanate forming the low-dimensional structure, the first ion, and the second ion is 0.1 to 40:60 to 100:100;

[0008] Step 2: The substrate is placed in acetone, deionized water, and isopropyl alcohol, respectively, and cleaned in an ultrasonic cleaner for 15 minutes. The substrate is then blown dry with a nitrogen gun, and then pre-treated with ultraviolet ozone or plasma cleaning. The substrate is a heavily doped p-type silicon substrate with a silicon dioxide or hafnium oxide insulating layer.

[0009] Step 3: The perovskite precursor solution of step 1 is spread on the upper surface of the substrate cleaned in step 2 by a pipette gun, and the substrate is spin-coated at a spin coating speed of 4000-6000 rpm for 50-70 seconds, and the anti-solvent is dropped on the substrate in the 8th to 12th second of the spin coating process; and then annealing is performed at 80-120° C. to obtain a tin-based perovskite semiconductor active layer;

[0010] Step 4: evaporating a metal electrode on the tin-based perovskite semiconductor active layer to form a source electrode and a drain electrode; producing the template-grown perovskite thin film transistor; wherein:

[0011] The gate electrode is heavily doped p-type silicon;

[0012] The insulating layer is any one of silicon dioxide and hafnium oxide, the thickness of silicon dioxide is 100 to 300 nm, and the thickness of hafnium oxide is 10 to 30 nm;

[0013] The thickness of the tin-based metal halide perovskite semiconductor active layer grown based on the template is 10 to 50 nm;

[0014] The source and drain electrodes are gold electrodes with a thickness of 30 to 60 nm;

[0015] The first ion is an organic positive ion, wherein the organic positive ion is selected from at least one of a methylammonium ion and a formamidine ion;

[0016] The second ion is a divalent tin ion with a concentration of 0.1 to 0.4 mol / L.

[0017] The low-dimensional thiocyanate is one or more of propylamine thiocyanate (PASCN), butylamine thiocyanate (BASCN), benzylamine thiocyanate (PMASCN), phenylethylamine thiocyanate (PEASCN), thiophenemethylamine thiocyanate (TMASCN), and thiopheneethylamine thiocyanate (TEASCN).

[0018] The organic solvent is selected from one or more of N,N-dimethylformamide, N-methylpyrrolidone, dimethyl sulfoxide and ethylene glycol.

[0019] The anti-solvent is selected from at least one of toluene, chlorobenzene and ethyl acetate.

[0020] The evaporation is carried out at a vacuum degree of 10 -4 Pa~10 -6 The process is carried out under a Pa environment; the evaporation current is 60 to 80 A; and the evaporation rate is 0.01 to 0.05 nm / s.

[0021] A template-grown perovskite thin film transistor prepared by the above method.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] 1) Replacing the large cationic iodide salt used to form the low-dimensional structure with a large cationic thiocyanate reduces the crystallization kinetics of the low-dimensional tin-based perovskite, leading to the sequential growth of low- and high-dimensional structures. The low-dimensional structure is primarily located on the upper surface of the perovskite film, parallel to the substrate. During the subsequent annealing process, the low-dimensional structure acts as a template to induce the directional growth of the high-dimensional structure perpendicular to the substrate. This low-dimensional-on-top-high-dimensional structure combines the excellent oxidation resistance and stability of the low-dimensional structure with the excellent carrier transport capabilities of the high-dimensional structure.

[0024] 2) This method of perovskite growth dynamics leads to better crystal orientation, resulting in larger grains, a smooth surface, and high crystallinity in the resulting perovskite film. This method also significantly improves the transistor device's current switching ratio and carrier mobility. This invention improves the electrical performance of tin-based metal halide perovskite P-type thin-film transistors with a bottom-gate, top-contact structure, offering advantages such as low cost and a simple process. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 The XRD patterns of the tin-based perovskite film before and after annealing in the embodiment;

[0026] Figure 2 is the XRD pattern of the tin-based perovskite film before and after annealing in the comparative example;

[0027] Figure 3 XRD comparison diagram of the tin-based perovskite films prepared in Example and Comparative Example;

[0028] Figure 4 AFM comparison images of the tin-based perovskite films prepared in Example and Comparative Example;

[0029] Figure 5 A comparison diagram of the tin valence states of the tin-based perovskite films prepared in Examples and Comparative Examples;

[0030] Figure 6 A schematic cross-sectional view of a tin-based perovskite thin film transistor prepared in an embodiment based on low-dimensional template-assisted growth during operation;

[0031] Figure 7 A schematic cross-sectional view of a conventional tin-based perovskite thin film transistor prepared in a comparative example during operation;

[0032] Figure 8 A comparison diagram of transfer characteristic curves of P-type tin-based perovskite thin-film transistors prepared in Example and Comparative Example;

[0033] Figure 9 The noise current curves of the devices prepared in the embodiment and the comparative example at 0V are shown. DETAILED DESCRIPTION

[0034] Below in conjunction with preferred embodiment, the specific embodiment of the present invention is described in further detail.When embodiment provides numerical range, it should be understood that, unless otherwise specified in the present invention, the two endpoints of each numerical range and any numerical value between the two endpoints can be selected.Unless otherwise defined, all technical and scientific terms used in the present invention have the same meaning as those generally understood by those skilled in the art.Except the specific method, equipment, material used in the embodiment, as those skilled in the art grasp the prior art and record of the present invention, any method, equipment and material of the prior art similar or equivalent to the method, equipment, material in the embodiments of the present invention can also be used to realize the present invention.

[0035] Example

[0036] (1) Preparation of precursor solution: N,N-dimethylformamide (DMF) and dimethyl sulfoxide (DMSO) were mixed in a volume ratio of 3:1 to obtain a mixed organic solvent; phenylethylamine thiocyanate, formamidine iodide, and stannous iodide were dissolved in the mixed organic solvent in a molar ratio of 35.3:86.5:100, and stirred at 60°C for 12 h to obtain a perovskite precursor solution with a tin ion concentration of 0.2 mol / L for use.

[0037] (2) Substrate treatment: The SiO2 / heavily doped p-type Si substrate (SiO2 thickness of 100 nm) was placed in acetone, deionized water, and isopropanol in turn, cleaned in an ultrasonic cleaner for 15 minutes each, then blown dry with a nitrogen gun, and then pre-treated with plasma cleaning for 60 seconds.

[0038] (3) Preparation of perovskite film layer: The treated substrate was transferred to a nitrogen glove box, 30 μL of perovskite precursor solution was added to the substrate and spin-coated at a speed of 5000 rpm for 60 s. 100 μL of chlorobenzene was added at the 10th s of the spin-coating process. After the spin-coating was completed, the substrate was annealed at 100 °C for 10 min to obtain a perovskite semiconductor active layer (the molecular structure of the perovskite film according to the ratio is PEA2FA5Sn6SCN2I 15 ).

[0039] (4) Evaporation of source and drain electrodes: Vacuum thermal evaporation coating technology is used under vacuum conditions (10 -4 Pa~10 -6 Pa) using a stainless steel mask to evaporate 50 nm of gold as source and drain electrodes on the perovskite semiconductor active layer; wherein the thermal evaporation current is 65 A and the rate is 0.03 nm / s;

[0040] Comparative Example

[0041] (1) Preparation of precursor solution: N,N-dimethylformamide (DMF) and dimethyl sulfoxide (DMSO) were mixed in a volume ratio of 3:1 to obtain a mixed organic solvent; phenylethylamine iodide, formamidine iodide, and stannous iodide were dissolved in the mixed organic solvent in a molar ratio of 35.3:86.5:100, and stirred at 60°C for 12 h to obtain a perovskite precursor solution with a divalent tin ion concentration of 0.2 mol / L for use.

[0042] (2) Substrate treatment: The SiO2 / heavily doped p-type Si substrate (SiO2 thickness of 100 nm) was placed in acetone, deionized water, and isopropanol in turn, cleaned for 15 minutes using an ultrasonic cleaner, and then blown dry with a nitrogen gun. The substrate was then pre-treated with plasma cleaning for 60 seconds.

[0043] (3) Preparation of perovskite film layer: The treated substrate was transferred to a nitrogen glove box, 30 μL of perovskite precursor solution was added to the substrate and spin-coated at a speed of 5000 rpm for 60 s. 100 μL of chlorobenzene was added at the 10th s of the spin-coating process. After the spin-coating was completed, the substrate was annealed at 100 °C for 10 min to obtain a perovskite semiconductor active layer (the molecular structure of the perovskite film according to the ratio is PEA2FA5Sn6I 17 ).

[0044] (4) Evaporation of source and drain electrodes: Vacuum thermal evaporation coating technology is used under vacuum conditions (10 -4 Pa~10 -6 Pa) Using a stainless steel mask, 50 nm thick gold was evaporated on the perovskite semiconductor active layer as source and drain electrodes; wherein the thermal evaporation current was 65 A and the rate was 0.03 nm / s.

[0045] The XRD patterns of the perovskite films prepared in the above examples and comparative examples before and after annealing are shown in FIG. Figure 1 and 2 As shown, from Figure 2 It can be seen that in the comparative example, the double-layer low-dimensional structure PEA2FASn2I7 formed before the perovskite is annealed is relatively small, and a large number of high-dimensional 3D FASnI3 structures are formed. Figure 1 A large number of double-layer low-dimensional structures PEA2FASn2SCN2I3 (abbreviated as 2L) are formed in the perovskite before annealing. During the subsequent annealing process, the 2L structure induces the directional growth of a high-dimensional structure perpendicular to the substrate. The XRD diffraction peak of the 2L structure gradually decreases, and the diffraction peak of the high-dimensional structure gradually increases. This also verifies from the perspective of crystallization dynamics that the preferentially generated low-dimensional structure acts as a sacrificial template to induce the generation of a high-dimensional structure, thereby avoiding the uncontrollable growth of the high-dimensional structure.

[0046] The perovskite film prepared in this way has higher crystallinity and lower defect density, which is beneficial to improving the carrier transport capacity of transistor devices. Figure 3 It can be seen from the XRD patterns of the embodiment and the comparative example that the perovskite film of the present invention has a better crystal orientation and the diffraction peak intensity is much higher than that of the conventional film. At the same time, the perovskite film of the embodiment also has a smaller half-peak width, which corresponds to a larger grain size. The AFM images of the perovskite films prepared in the embodiment and the comparative example are shown in FIG. Figure 4 As shown, from Figure 4 It can be seen that the perovskite film of the present invention has significantly fewer grain boundaries and a smoother and more uniform surface. The roughness data are shown in Table 1. Figure 5 The comparison diagram of the tin valence state of the perovskite film of the embodiment and the comparative example obtained by X-ray photoelectron spectroscopy (XPS) analysis is shown in FIG. Figure 5 It can be seen that the Sn 2+ The oxidation of Sn is significantly suppressed, which shows that the gradient growth of perovskites of different dimensions leads to high quality of perovskite films. 2 + ) is the basis of the excellent electrical properties, making perovskite transistors more efficient and stable.

[0047] Table 1

[0048] Roughness Example film Comparative film RMS roughness 3.12nm 3.31nm Average roughness 5.54nm 7.44nm

[0049] Figure 6 and Figure 7 The cross-sectional schematic diagrams of the tin-based perovskite thin film transistors prepared in the comparative example and the example are respectively working. At room temperature, the transfer curves of the transistors prepared in the example and the comparative example are tested respectively. Figure 8 The corresponding electrical parameters are shown in Table 2. The current switching ratio of the field effect transistor prepared in the comparative example is 1.71×10 7 , carrier mobility is 8.6 square centimeters / (volt·second), subthreshold swing is 0.33 volts / unit order of magnitude, threshold voltage is 39 volts, and the current switching ratio of the field effect transistor prepared in the embodiment is 1.05×10 8 , mobility of 40.5 square centimeters / (volt-second), subthreshold swing of 0.23 volts / unit order of magnitude, and threshold voltage of 34 volts. From these core electrical parameter indicators of the transistor, it can be observed that the electrical performance of the P-type perovskite thin film transistor prepared by the template-assisted growth strategy has been significantly improved. At the same time, Figure 9 As shown, the current noise of the device of the embodiment at 1 Hz, 10 Hz, 100 Hz, 1 kHz, 10 kHz and 100 kHz is lower than that of the comparative example, indicating that the transistor device of the embodiment has fewer defects.

[0050] Table 2

[0051] Electrical parameters of perovskite thin-film transistors Example Comparative Example Current switching ratio <![CDATA[1.05×10 8 ]]> <![CDATA[1.71×10 7 ]]> Mobility (square centimeter / (volt-second) 40.5 8.6 Threshold voltage (V) 34 39 Subthreshold swing (volts / unit magnitude) 0.23 0.33

[0052] Therefore, the present invention effectively alleviates the structural disorder caused by the competitive growth of low-dimensional and high-dimensional tin-based metal halide perovskites, greatly improving the carrier transport performance of P-type tin-based metal halide thin-film transistors with a bottom-gate, top-contact structure. The device's on / off ratio and subthreshold swing are significantly improved, while the device's defect density is significantly reduced. The template growth method developed by the present invention lays the foundation for improving the performance and stability of tin-based metal halide perovskite thin-film transistors.

Claims

1. A method for preparing a perovskite thin film transistor based on template growth, characterized in that: The perovskite thin film transistor comprises a gate electrode, an insulating layer, a tin-based metal halide perovskite semiconductor active layer grown on a template, a symmetrical source electrode and a drain electrode, which are arranged in sequence from bottom to top; Its preparation comprises the following steps: Step 1: preparing a tin-based perovskite precursor solution comprising a thiocyanate forming a low-dimensional structure, a first ion, a second ion, and an organic solvent; wherein the molar ratio of the thiocyanate forming the low-dimensional structure, the first ion, and the second ion is 0.1-40:60-100:100; Step 2: The substrate is placed in acetone, deionized water, and isopropyl alcohol, respectively, and cleaned in an ultrasonic cleaner for 15 minutes. The substrate is then blown dry with a nitrogen gun, and then pre-treated with ultraviolet ozone or plasma cleaning. The substrate is a heavily doped p-type silicon substrate with a silicon dioxide or hafnium oxide insulating layer. Step 3: The perovskite precursor solution of step 1 is spread on the upper surface of the substrate cleaned in step 2 by a pipette, and the substrate is spin-coated at a spin coating speed of 4000-6000 rpm for 50-70 seconds, and the anti-solvent is dropped on the substrate in the 8th to 12th second of the spin coating process; and then annealing is performed at 80-120° C. to obtain a tin-based perovskite semiconductor active layer; Step 4: evaporating a metal electrode on the tin-based perovskite semiconductor active layer to form a source electrode and a drain electrode; producing the template-grown perovskite thin film transistor; wherein: The gate electrode is heavily doped p-type silicon; The insulating layer is any one of silicon dioxide and hafnium oxide, the thickness of silicon dioxide is 100-300 nm, and the thickness of hafnium oxide is 10-30 nm; The thickness of the tin-based metal halide perovskite semiconductor active layer grown based on the template is 10-50 nm; The source and drain electrodes are gold electrodes with a thickness of 30-60 nm; The first ion is an organic positive ion, wherein the organic positive ion is selected from at least one of a methylammonium ion and a formamidine ion; The second ion is a divalent tin ion with a concentration of 0.1-0.4 mol / L.

2. The preparation method according to claim 1, characterized in that The low-dimensional thiocyanate is one or more of propylamine thiocyanate, butylamine thiocyanate, benzylamine thiocyanate, phenylethylamine thiocyanate, thiophenemethylamine thiocyanate, and thiopheneethylamine thiocyanate.

3. The preparation method according to claim 1, characterized in that The organic solvent is selected from one or more of N,N-dimethylformamide, N-methylpyrrolidone, dimethyl sulfoxide and ethylene glycol.

4. The preparation method according to claim 1, characterized in that The anti-solvent is selected from at least one of toluene, chlorobenzene and ethyl acetate.

5. The preparation method according to claim 1, characterized in that The evaporation is carried out at a vacuum degree of 10 -4 Pa~10 -6 The evaporation was carried out in a Pa environment; the evaporation current was 60~80 A; and the evaporation rate was 0.01~0.05 nm / s.

6. A perovskite thin film transistor based on template growth prepared by the method according to claim 1.

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