Near-end crosstalk cancellation circuit

Abstract

The embodiment of the present application provides a near-end crosstalk cancellation circuit, including: a first chip and a first crosstalk cancellation module; the transmitting end of the first chip is used to connect with the receiving end of the second chip to send a first signal to the second chip, the receiving end of the first chip is used to connect with the transmitting end of the second chip to receive a second signal sent by the second chip, and the first crosstalk cancellation module is used to connect between the transmitting end of the first chip and the receiving end of the first chip to invert and attenuate the first signal to eliminate the first near-end crosstalk of the first signal to the second signal. In this technical solution, a crosstalk cancellation module is set between the transmitting end and the receiving end of the chip to eliminate the near-end crosstalk caused by the transmitting end to the receiving end.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a near-end crosstalk cancellation circuit. Background Art

[0002] As bandwidth continues to increase, the interconnection density of the die to die (D2D) parallel interface in the central processing unit is getting higher and higher, and crosstalk has become a key factor restricting the improvement of D2D rate.

[0003] Especially in D2D duplex applications, in addition to solving the far-end crosstalk of the routing, the near-end crosstalk problem at the micro bumps in the chip-level package cannot be ignored. Summary of the invention

[0004] Multiple aspects of the present application provide a near-end crosstalk cancellation circuit to solve the near-end interference problem occurring between a transmitting end and a receiving end of a chip.

[0005] In a first aspect, an embodiment of the present application provides a near-end crosstalk cancellation circuit, comprising: a first chip and a first crosstalk cancellation module;

[0006] The transmitting end of the first chip is used to connect to the receiving end of the second chip to send the first signal to the second chip;

[0007] The receiving end of the first chip is used to connect to the sending end of the second chip to receive the second signal sent by the second chip;

[0008] The first crosstalk cancellation module is used to be connected between the transmitting end of the first chip and the receiving end of the first chip, and to perform inversion and attenuation processing on the first signal to eliminate the first near-end crosstalk of the first signal on the second signal.

[0009] In a possible implementation manner, the first crosstalk cancellation module includes: a first inverting device, and a first attenuation device connected to the first inverting device;

[0010] The first inverting device is used to connect to the transmitting end of the first chip to perform an inverting operation on the first signal to obtain a first reverse signal;

[0011] The first attenuation device is used to be connected to the receiving end of the first chip to attenuate the first reverse signal to obtain a first cancellation signal that cancels out the first near-end crosstalk.

[0012] In a possible implementation manner, the first inverting device is an inverter, and the first attenuation device is a capacitor.

[0013] In a possible implementation manner, the number of the first inversion device and the first attenuation device is at least one.

[0014] In a possible implementation manner, the further comprising: the second chip and a second crosstalk cancellation module;

[0015] The second crosstalk cancellation module is used to be connected between the transmitting end of the second chip and the receiving end of the second chip, and to perform inversion and attenuation processing on the two signals to eliminate the second near-end crosstalk of the second signal on the first signal.

[0016] In a possible implementation manner, the second crosstalk cancellation module includes: a second inverting device, and a second attenuation device connected to the second inverting device;

[0017] The second inverting device is used to be connected to the transmitting end of the second chip to perform an inverting operation on the second signal to obtain a second reverse signal;

[0018] The second attenuation device is used to be connected to the receiving end of the second chip to attenuate the second reverse signal to obtain a second cancellation signal that cancels out the second near-end crosstalk.

[0019] In a possible implementation manner, the second inverting device is an inverter, and the second attenuation device is a capacitor.

[0020] In a possible implementation manner, the number of the second inverting device and the second attenuation device is at least one.

[0021] In a second aspect, an embodiment of the present application provides a central processing unit, including: a near-end crosstalk cancellation circuit in the first aspect and various possible implementations:

[0022] In a third aspect, an embodiment of the present application provides an electronic device, comprising: the central processing unit described in the second aspect.

[0023] The near-end crosstalk cancellation circuit provided by the embodiment of the present application includes: a first chip and a first crosstalk cancellation module; the transmitting end of the first chip is used to connect with the receiving end of the second chip to send the first signal to the second chip, the receiving end of the first chip is used to connect with the transmitting end of the second chip to receive the second signal sent by the second chip, and the first crosstalk cancellation module is used to connect between the transmitting end of the first chip and the receiving end of the first chip to invert and attenuate the first signal to eliminate the first near-end crosstalk of the first signal to the second signal. In this technical solution, a crosstalk cancellation module is set between the transmitting end and the receiving end of the chip to eliminate the near-end crosstalk caused by the transmitting end to the receiving end. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0025] Figure 1 A circuit diagram of a D2D duplex application;

[0026] Figure 2 The effect of the first channel on the second channel is shown in Figure 2. Figure 1 ;

[0027] Figure 3 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 1 ;

[0028] Figure 4 The effect of the first channel on the second channel is shown in Figure 2. Figure 2 ;

[0029] Figure 5 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 2 ;

[0030] Figure 6 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 3 ;

[0031] Figure 7 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 4 ;

[0032] Figure 8 Schematic diagram of a central processing unit provided in an embodiment of the present application Figure 1 ;

[0033] Fig. 9 Schematic diagram of a central processing unit provided in an embodiment of the present application Figure 2 ;

[0034] Fig.10 A schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be clearly and completely described below in conjunction with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application. The user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data need to comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0036] First, the terms and technical background involved in the embodiments of the present application are explained:

[0037] The interconnection density of the die-to-die (D2D) parallel interface refers to the number and density of interconnect lines when a pair of dies are connected in parallel.

[0038] Among them, a high interconnection density means that the interconnection lines are more and closer (that is, the number of receiving ends and their corresponding sending ends is greater).

[0039] The interconnect density is higher in a die-to-die parallel interface for the following reasons:

[0040] 1. Parallel interfaces usually need to transmit large amounts of data, so more interconnect lines are needed to achieve higher bandwidth data transmission.

[0041] 2. Parallel interconnection requires multiple signal lines to be transmitted simultaneously, and the integrity and stability of the signal need to be maintained. In order to meet these requirements, the interconnect lines need to be densely arranged on the chip.

[0042] 3. High interconnection density helps reduce the interconnection distance, thereby reducing signal transmission delay and power consumption.

[0043] Micro bumps in chip-scale packaging are miniature spherical metal connectors used to connect circuits between chips. Micro bumps are usually made of metal materials (such as copper or tin) and can provide reliable electrical connections while occupying a small packaging space.

[0044] Near-end crosstalk at micro bumps: refers to the signal crosstalk between micro bumps of a parallel interface. When micro bumps are close to each other, the signals may interfere with each other due to the electromagnetic coupling effect, resulting in signal quality degradation or transmission errors.

[0045] Especially in D2D duplex applications, in addition to solving the far-end crosstalk of the routing, the near-end crosstalk problem at the micro bump cannot be ignored.

[0046] Specifically, Figure 1 A circuit diagram of a D2D duplex application is shown in FIG. Figure 1 As shown, the schematic diagram includes: a transmitting end (Transmit, TX) 11 and a receiving end (Receive, RX) 12 of chip A and TX 13 and RX 14 of chip B.

[0047] Among them, TX 11 is connected to RX 14 to form a first path; RX 12 is connected to TX 13 to form a second path.

[0048] In a possible implementation, chip A sends a first signal to chip B through a first path, and chip B sends a second signal to chip A through a second path;

[0049] At this time, since TX 11 and RX 12 are relatively close, the first signal will generate signal interference to the second signal when being sent, that is, near-end interference.

[0050] Accordingly, since TX 13 and RX 14 are relatively close, the second signal will generate signal interference to the first signal when being sent, which is also called near-end interference.

[0051] That is, for the second channel, the first channel is the attack line and the second channel is the victim line; correspondingly, for the first channel, the second channel is the attack line and the first channel is the victim line.

[0052] Furthermore, Figure 2 The effect of the first channel on the second channel is shown in Figure 2. Figure 1 ,like Figure 2 As shown, it includes: a transmission waveform 21 of the first signal corresponding to the first channel, and a disturbance waveform 22 detected on the second channel.

[0053] A common solution in the prior art is to increase the distance between TX 11 and RX 12, but this method has problems such as waste of physical design resources.

[0054] The technical solution shown in the present application is described in detail below through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be described repeatedly in different embodiments.

[0055] Figure 3 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 1 ,like Figure 3 As shown, the near-end crosstalk cancellation circuit includes: a first chip and a first crosstalk cancellation module;

[0056] In the relevant technical field of chip-level packaging, multiple chips are connected in series, and the interconnection density of the D2D parallel interface is getting higher and higher, meeting the growing bandwidth demand. However, since they are in each chip, there is a problem of near-end crosstalk between the receiving end and the transmitting end of the chip in duplex applications, that is, the signal from the transmitting end will cause crosstalk to the signal from the receiving end, resulting in possible fluctuations and distortions in the messages received by the receiving end from other chips.

[0057] At this time, based on the above problems, a near-end crosstalk cancellation circuit is designed, and a crosstalk cancellation module is set on the chip to eliminate the crosstalk caused by the signal at the transmitting end of the chip to the signal at the receiving end.

[0058] The transmitting end of the first chip is used to connect with the receiving end of the second chip to send the first signal to the second chip, and the receiving end of the first chip is used to connect with the transmitting end of the second chip to receive the second signal sent by the second chip;

[0059] It should be understood that there may be multiple receiving ends and transmitting ends in a chip. The embodiment of the present application is described by taking one receiving end and one transmitting end as an example, that is, the transmitting end of the first chip and the receiving end of the second chip send the first signal of the first chip to the second chip; the receiving end of the first chip is connected to the transmitting end of the second chip, and the second chip sends the second signal to the first chip.

[0060] That is, for the second signal, in a duplex application, the first signal will generate an attack signal, which will interfere with the second signal.

[0061] Furthermore, the first crosstalk cancellation module is used to be connected between the transmitting end of the first chip and the receiving end of the first chip to perform inversion and attenuation processing on the first signal to eliminate the first near-end crosstalk of the first signal to the second signal.

[0062] The first crosstalk cancellation module is arranged between the transmitting end of the first chip and the receiving end of the first chip. When the first signal is sent from the transmitting end of the first chip, the first crosstalk cancellation module also receives the first signal, thereby inverting the received first signal, and then performing attenuation processing to obtain the processed first signal. The processed first signal and the signal corresponding to the first near-end crosstalk of the first signal to the second signal can be canceled, thereby eliminating the first near-end crosstalk of the first signal to the second signal.

[0063] In one possible implementation, Figure 4 The effect of the first channel on the second channel is shown in Figure 2. Figure 2 ,like Figure 4 As shown, it includes: a transmission waveform 21 of the first signal corresponding to the first channel, a disturbance waveform 41 detected on the second channel (shown by a dotted line, that is, a waveform after eliminating the first near-end crosstalk), and Figure 2 The disturbance waveform 22 detected in the figure (shown by the solid line, ie, the waveform with the first near-end crosstalk) is shown.

[0064] from Figure 4 It can be seen that: before the first crosstalk cancellation module is set, the first signal corresponding to the transmission waveform 21 will generate a disturbance corresponding to the disturbance waveform 22 on the second channel, thereby causing fluctuations in the received second signal; after the first crosstalk cancellation module is set, the first signal corresponding to the output waveform 21 will generate a disturbance corresponding to the disturbance waveform 41 on the second channel, which is smaller than the disturbance waveform 22, thereby canceling the amplitude of the near-end crosstalk to ensure the stability of the second signal during transmission, that is, compared with the existing circuit, the D2D rate is improved.

[0065] The near-end crosstalk cancellation circuit provided by the embodiment of the present application includes: a first chip and a first crosstalk cancellation module; the transmitting end of the first chip is used to connect with the receiving end of the second chip to send the first signal to the second chip, the receiving end of the first chip is used to connect with the transmitting end of the second chip to receive the second signal sent by the second chip, and the first crosstalk cancellation module is used to connect between the transmitting end of the first chip and the receiving end of the first chip to invert and attenuate the first signal to eliminate the first near-end crosstalk of the first signal to the second signal. In this technical solution, a crosstalk cancellation module is set between the transmitting end and the receiving end of the chip to eliminate the near-end crosstalk caused by the transmitting end to the receiving end.

[0066] Based on the above embodiments, Figure 5 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 2 ,like Figure 5 As shown, the first crosstalk cancellation module includes: a first inverting device, and a first attenuation device connected to the first inverting device;

[0067] The first inverting device is used to be connected to the transmitting end of the first chip to perform an inverting operation on the first signal to obtain a first reverse signal;

[0068] That is, the first inverting device receives the first signal, performs an inverting operation on the first signal, and performs an inverting operation on the above Figure 4 The transmission waveform corresponding to the first signal in is inverted to obtain a first reverse signal, that is, the waveform is opposite to the transmission waveform.

[0069] The first attenuation device is used to be connected to the receiving end of the first chip to attenuate the first reverse signal to obtain a first cancellation signal that cancels out the first near-end crosstalk.

[0070] That is, since the first reverse signal after the above-mentioned inversion will directly have a greater impact on the second signal, at this time, it is necessary to use a first attenuation device to attenuate the first reverse signal, and send the attenuated first cancellation signal to the receiving end of the first chip to cancel the near-end crosstalk caused by the first signal to the second signal.

[0071] Optionally, the first inverting device is an inverter, and the first attenuation device is a capacitor.

[0072] Among them, the inverter is used to change the polarity of the input signal, that is, the first signal is inverted here. The inverter converts the high level in the input signal to a low level, and converts the low level to a high level. Inverters can also be often used in digital circuits and logic gate circuits.

[0073] A capacitor is a basic passive electronic component that stores charge and transfers current in a circuit. It consists of two metal plates or conductors with a layer of insulating material (called a dielectric) between them. When a capacitor is connected to a power source, positive charge accumulates on the plates on one side and negative charge accumulates on the other side, creating an electric field. Capacitors can store charge in a circuit and then release it again.

[0074] Optionally, the number of the first inverting device and the first attenuation device is at least one.

[0075] In a possible implementation, the first inverting device may be an inverter, and the number may be one or more; the first attenuation device may be a capacitor, and the number may be one or more.

[0076] The embodiment of the present application provides a near-end crosstalk cancellation circuit, in which the first crosstalk cancellation module includes: a first inverting device, and a first attenuation device connected to the first inverting device, the first inverting device is used to connect to the transmitting end of the first chip, invert the first signal to obtain a first reverse signal, and the first attenuation device is used to connect to the receiving end of the first chip, attenuate the first reverse signal, and obtain a first cancellation signal that cancels the first near-end crosstalk. In this technical solution, the signal is inverted by the inverting device, and then the inverted signal is attenuated based on the attenuation device to generate a signal opposite to the near-end crosstalk waveform, thereby canceling the near-end crosstalk.

[0077] Based on the above embodiments, Figure 6 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 3 ,like Figure 6 As shown, the circuit also includes: a second chip and a second crosstalk cancellation module;

[0078] The second crosstalk cancellation module is used to be connected between the transmitting end of the second chip and the receiving end of the second chip, and performs inversion and attenuation processing on the two signals to eliminate the second near-end crosstalk of the second signal to the first signal.

[0079] exist Figure 3 On the basis of, the near-end crosstalk cancellation circuit also includes a second chip and a second crosstalk cancellation module, that is, the second crosstalk cancellation module is arranged on the second chip, and the second crosstalk cancellation module is connected between the transmitting end of the second chip and the receiving end of the second chip.

[0080] When the second signal is transmitted to the first chip through the transmitting end of the second chip, the second signal can also be received on the route where the second crosstalk cancellation module is located, so that the received second signal is inverted and then attenuated to obtain the processed second signal.

[0081] Furthermore, the processed second signal and a signal corresponding to the second near-end crosstalk of the second signal to the first signal can be offset, thereby eliminating the second near-end crosstalk of the second signal to the first signal.

[0082] It should be understood that in actual applications, there may be multiple chips connected in series, and a corresponding crosstalk cancellation module is arranged on each chip. The number of crosstalk cancellation modules is related to the number of receiving ends and transmitting ends. The embodiment of the present application is only an example and an explanation of the corresponding implementation principle.

[0083] The near-end crosstalk cancellation circuit provided in the embodiment of the present application further includes: a second chip and a second crosstalk cancellation module, the second crosstalk cancellation module is used to connect between the transmitting end of the second chip and the receiving end of the second chip, and perform inversion and attenuation processing on the two signals to eliminate the second near-end crosstalk of the second signal to the first signal. In this technical solution, the near-end crosstalk caused by the transmitting end to the receiving end is eliminated by setting the crosstalk cancellation module between the transmitting end and the receiving end of the chip.

[0084] Based on the above embodiments, Figure 7 A schematic diagram of a near-end crosstalk cancellation circuit provided in an embodiment of the present application Figure 4 ,like Figure 7 As shown, the second crosstalk cancellation module in the circuit includes: a second inverting device, and a second attenuation device connected to the second inverting device;

[0085] The second inverting device is used to be connected to the transmitting end of the second chip to perform an inverting operation on the second signal to obtain a second reverse signal;

[0086] That is, the second inverting device receives the second signal, performs an inverting operation on the second signal, and obtains a second reverse signal, that is, a waveform opposite to the transmission waveform corresponding to the second signal.

[0087] The second attenuation device is used to be connected to the receiving end of the second chip to attenuate the second reverse signal to obtain a second cancellation signal that cancels out the second near-end crosstalk.

[0088] That is, since the second reverse signal after the above-mentioned inversion will directly have a greater impact on the first signal, at this time, it is necessary to use a second attenuation device to attenuate the second reverse signal, and send the attenuated second cancellation signal to the receiving end of the second chip to cancel the near-end crosstalk caused by the second signal to the first signal.

[0089] Optionally, the second inverting device is an inverter, and the second attenuation device is a capacitor.

[0090] Among them, the introduction of the inverter and capacitor is as above Figure 3 The embodiments shown will not be described in detail here.

[0091] Optionally, the number of the second counter device and the second attenuation device is at least one.

[0092] In a possible implementation, the second inverting device may be an inverter, and the number may be one or more; the second attenuation device may be a capacitor, and the number may be one or more.

[0093] The near-end crosstalk cancellation circuit provided by the embodiment of the present application, the second crosstalk cancellation module in the circuit includes: a second inverting device, and a second attenuation device connected to the second inverting device, the second inverting device is used to connect to the transmitting end of the second chip, invert the second signal to obtain a second reverse signal, and the second attenuation device is used to connect to the receiving end of the second chip, attenuate the second reverse signal, and obtain a second cancellation signal that cancels the second near-end crosstalk. In this technical solution, the signal is inverted by the inverting device, and then the inverted signal is attenuated based on the attenuation device to generate a signal opposite to the near-end crosstalk waveform, thereby canceling the near-end crosstalk.

[0094] Based on the above embodiments, Figure 8 Schematic diagram of a central processing unit provided in an embodiment of the present application Figure 1 ,like Figure 8 As shown, the schematic diagram includes: a near-end crosstalk cancellation circuit.

[0095] It should be understood that the number of chips involved in the near-end crosstalk cancellation circuit depends on the implementation of chip packaging; the setting of the number of receiving ends and transmitting ends on each chip is also related to the requirements during design.

[0096] And on each chip, the crosstalk cancellation module set at the receiving end and the corresponding transmitting end is also determined according to the crosstalk situation and / or user needs.

[0097] In one possible implementation, Fig. 9 Schematic diagram of a central processing unit provided in an embodiment of the present application Figure 2 ,like Fig. 9 As shown, the schematic diagram includes: multiple chips (two chips are used as an example in this embodiment, namely chip 91 and chip 92), and each chip includes multiple TXs and multiple RXs.

[0098] Among them, chip 91 includes: 3 TX and 3 RX, chip 92 includes: 3 TX and 3 RX, between the corresponding TX and RX, there are inversion devices and attenuation devices (for example, inverter 93 and capacitor 94)

[0099] In one possible implementation, Fig. 9 In the embodiment, other chips may be connected in series on the left side of chip 91, and other chips may be connected in series on the right side of chip 92. Fig. 9 Related to the connecting lines drawn out.

[0100] like Fig. 9As shown, in chip 92 and chip 91, a crosstalk cancellation module is provided between each TX and RX, which can be an anti-device and an attenuation device for eliminating the near-end crosstalk generated by the second channel to the first channel, and / or eliminating the near-end crosstalk generated by the first channel to the second channel.

[0101] Based on the above embodiments, Fig.10 A schematic diagram of an electronic device provided in an embodiment of the present application, such as Fig.10 As shown, the schematic diagram includes: the above-mentioned central processing unit.

[0102] In a possible implementation, after receiving the instruction received by the electronic device, the central processor performs corresponding processing on the instruction, which can obtain a more accurate output and can process a larger bandwidth and higher efficiency.

[0103] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0104] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0105] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0106] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0107] In a typical configuration, a computing device includes one or more processors, input / output interfaces, network interfaces, and memory.

[0108] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0109] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), SRAM, dynamic random access memory (DRAM), other types of RAM, read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0110] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0111] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A near-end crosstalk cancellation circuit, characterized in that: include: a first chip and a first crosstalk cancellation module; The first crosstalk cancellation module includes: a first inverting device, and a first attenuation device connected to the first inverting device; The transmitting end of the first chip is used to connect to the receiving end of the second chip to send the first signal to the second chip; The receiving end of the first chip is used to connect to the sending end of the second chip to receive the second signal sent by the second chip; The first inverting device is used to connect to the transmitting end of the first chip to perform an inverting operation on the first signal to obtain a first reverse signal; The first attenuation device is used to connect to the receiving end of the first chip, attenuate the first reverse signal, and obtain a first cancellation signal that cancels the first near-end crosstalk of the first signal to the second signal, so as to eliminate the first near-end crosstalk; Among them, near-end crosstalk refers to the signal crosstalk occurring between tiny solder joints in the chip-level package of the parallel interface.

2. The circuit according to claim 1, characterized in that The first inverting device is an inverter, and the first attenuation device is a capacitor.

3. The circuit according to claim 1, characterized in that The number of the first counter device and the first attenuation device is at least one.

4. The circuit according to any one of claims 1 to 3, characterized in that: Also includes: the second chip and the second crosstalk cancellation module; The second crosstalk cancellation module is used to be connected between the transmitting end of the second chip and the receiving end of the second chip, and to perform inversion and attenuation processing on the two signals to eliminate the second near-end crosstalk of the second signal on the first signal.

5. The circuit according to claim 4, characterized in that The second crosstalk cancellation module includes: a second inverting device, and a second attenuation device connected to the second inverting device; The second inverting device is used to be connected to the transmitting end of the second chip to perform an inverting operation on the second signal to obtain a second reverse signal; The second attenuation device is used to be connected to the receiving end of the second chip to attenuate the second reverse signal to obtain a second cancellation signal that cancels out the second near-end crosstalk.

6. The circuit according to claim 5, characterized in that The second inverting device is an inverter, and the second attenuation device is a capacitor.

7. The circuit according to claim 5, characterized in that The number of the second counter device and the second attenuation device is at least one.

8. A central processing unit, characterized in that: include: A near-end crosstalk cancellation circuit as claimed in any one of claims 1 to 7.

9. An electronic device, characterized in that: include: The central processing unit as claimed in claim 8.

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