A method for repairing a TOPCON battery tunneling layer

Abstract

The present invention provides a method for repairing a TOPCON battery tunneling layer. The repair method specifically comprises the following steps: after preparing the tunneling oxide layer, placing the battery cell with the tunneling oxide layer in a PECVD device, introducing gas for repair treatment, and then preparing an amorphous silicon layer; the gas is selected from N x O y , O3 or H2O, or a combination of at least two thereof; wherein, x is selected from 1 or 2, and y is selected from 1 to 4. Before PECVD deposition of the Poly-Si layer, the method of the present invention introduces NxOy, O3, and H2O gases, and uses plasma vapor deposition to repair the scratched position of the tunneling oxide layer, thereby effectively improving the quality of the tunneling film layer.

Description

Technical Field

[0001] The invention relates to the technical field of TOPCON batteries, and in particular to a method for repairing a tunneling layer of a TOPCON battery. Background Art

[0002] TOPCON (tunnel oxide passivated contact) is a type of photovoltaic crystalline silicon cell. In recent years, it has been popular due to its high conversion efficiency, low attenuation performance, high cost performance and other obvious advantages. The key structure on the back of the cell is the tunnel oxide layer, intrinsic polysilicon and doping of polysilicon.

[0003] At present, the market mainly uses LPCVD process (low pressure chemical vapor deposition) to prepare the doped polysilicon layer of TOPCon cells, that is, LPCVD preparation of polysilicon film combined with traditional full diffusion process, which deposits polysilicon thin film layer by LPCVD and then diffuses phosphorus. LPCVD mainly grows i-poly Si by high-temperature decomposition of silane, and then adds a step of polysilicon doping; while PECVD can achieve "silicon oxide, amorphous silicon, doping" integration; that is, LPCVD thermal oxidation method deposits tunneling oxide layer + PECVD in-situ doping method prepares Poly-Si layer to form back passivation layer.

[0004] However, after the tunneling layer is deposited by LPCVD thermal oxidation, the tunneling oxide film is scratched due to automation and the supporting basket during the transfer to the PECVD furnace tube, resulting in a decrease in the quality of the film, seriously affecting the back passivation effect, and reducing the yield and efficiency of the battery cell.

[0005] In view of this, the present invention is proposed. Summary of the invention

[0006] The purpose of the present invention is to provide a method for repairing a TOPCON battery tunneling layer, which can repair the technical problem of film quality damage caused by the tunneling oxide layer of the TOPCON battery during the automated transmission process.

[0007] In order to achieve the above-mentioned purpose of the present invention, the following technical solutions are particularly adopted:

[0008] In a first aspect, the present invention provides a method for repairing a tunneling layer of a TOPCON battery, the method specifically comprising the following steps:

[0009] After preparing the tunnel oxide layer, the cell with the tunnel oxide layer is placed in a PECVD device, gas is introduced for repair treatment, and then an amorphous silicon layer is prepared;

[0010] The gas is selected from N x O y , O 3 or H2 Any one or a combination of at least two of O; wherein x is selected from 1 or 2, and y is selected from 1-4.

[0011] In the present invention, after preparing the tunnel oxide layer and before the amorphous silicon layer is deposited, a step of introducing N x O y , O 3 or H 2 O, or a combination of at least two gases, uses a plasma vapor deposition method to repair the scratched position of the tunneling oxide layer and improve the quality of the tunneling film layer. The repair method of the present invention can improve the back passivation effect of the battery cell, reduce the dark film ratio, and improve the battery cell yield by repairing the quality of the tunneling film layer; by repairing the quality of the tunneling film layer, the back passivation effect of the battery cell can be improved, the battery cell Uoc can be improved, and the battery cell efficiency can be improved.

[0012] Preferably, the N x O y Selected from NO, N 2 O、N 2 O 3 、NO 2 or N 2 O 4 Any one or a combination of at least two of 2 O.

[0013] Preferably, the gas is N x O y , O 3 and H 2 O mixture.

[0014] Preferably, the flow rate of the gas is 9000-12000 sccm, for example, it can be 9000 sccm, 9500 sccm, 10000 sccm, 10500 sccm, 11000 sccm, 11500 sccm, 12000 sccm, etc.

[0015] Preferably, the N x O y , O 3 and H 2 The flow ratio of O is (6-8):(2-3):(0.5-2);

[0016] Among them, "6-8" can be, for example, 6, 6.5, 7, 7.5, 8, etc.;

[0017] Among them, "2-3" can be, for example, 2, 2.2, 2.4, 2.6, 2.8, 3, etc.;

[0018] Here, “0.5-2” can be, for example, 0.5, 0.6, 0.8, 1, 1.2, 1.5, 1.8, 2, etc.

[0019] In the present invention, the repair capability of the scratched position of the tunneling oxide layer is improved by optimizing the gas flow rate and the gas selection, and it is ensured that only the quality of the tunneling film layer is repaired, and the thickness of the oxide layer is not changed.

[0020] Preferably, the temperature of the repair treatment is 400-430°C, for example, it can be 400°C, 405°C, 410°C, 415°C, 420°C, 425°C, 430°C, etc.

[0021] Preferably, the repair processing time is 5 to 60 s, for example, it can be 5 s, 10 s, 15 s, 20 s, 25 s, 30 s, 35 s, 40 s, 45 s, 50 s, 55 s, 60 s, etc.

[0022] Preferably, the radio frequency power of the repair treatment is 5000-8000 watt, for example, it can be 5000 watt, 5500 watt, 6000 watt, 6500 watt, 7000 watt, 7500 watt, 8000 watt, etc.

[0023] Preferably, the furnace tube pressure of the repair treatment is 1300-1800 mTorr, for example, it can be 1300 mTorr, 1400 mTorr, 1500 mTorr, 1600 mTorr, 1700 mTorr, 1800 mTorr, etc.

[0024] In the present invention, the process parameters of the repair treatment are further optimized; the repair capability of the scratched position of the tunneling oxide layer is improved, and it is ensured that only the quality of the tunneling film layer is repaired, and the thickness of the oxide layer is not changed.

[0025] Preferably, the steps of preparing the tunnel oxide layer are specifically as follows:

[0026] The cell is oxidized using the LPCVD thermal oxidation method to grow a silicon oxide film and form a tunneling oxide layer on the back of the silicon wafer.

[0027] Preferably, the thickness of the tunnel oxide layer is 1-1.8 nm, for example, 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, etc.

[0028] Preferably, the temperature of the oxidation treatment is 550-650°C, for example, 550°C, 560°C, 580°C, 600°C, 620°C, 650°C, etc. 2The flow rate is 25-35slm, for example, it can be 25slm, 26slm, 28slm, 30slm, 32slm, 34slm, 35slm, etc.; the pressure condition is 700-800torr, for example, it can be 700torr, 720torr, 740torr, 760torr, 780torr, etc.

[0029] Preferably, the cell needs to be pre-treated before preparing the tunnel oxide layer, and the pre-treatment specifically includes: texturing, primary boron diffusion, selective re-doping, secondary boron diffusion, BSG removal and alkali polishing.

[0030] Furthermore, the pre-treatment specifically includes the following steps:

[0031] (a) Texturing: The silicon substrate is placed in an alkaline solution for cleaning and texturing to form a pyramid velvet surface on the surface of the silicon wafer;

[0032] Preferably, the alkali solution comprises the following components in terms of mass percentage: 1-3% alkali (for example, 1%, 1.5%, 2%, 2.5%, 3%, etc.), 0.01-0.05% additive (for example, 0.01%, 0.02%, 0.03%, 0.04%, 0.05%, etc.), and the balance is water.

[0033] Preferably, the base is sodium hydroxide and / or potassium hydroxide.

[0034] Preferably, the additive is ethanol and / or isopropanol.

[0035] Preferably, the temperature for cleaning and texturing is 70-90°C, for example, 70°C, 75°C, 80°C, 85°C, 90°C, etc., and the time for cleaning and texturing is 150-450s, for example, 150s, 200s, 250s, 300s, 350s, 400s, 450s, etc.

[0036] (b) Boron diffusion: Place the silicon wafer with a velvet surface in a diffusion furnace and introduce N 2 , O 2 and a boron source, to perform a first boron diffusion deposition;

[0037] Preferably, in the first boron diffusion: N 2 The flow rate is 10000 to 30000 sccm, for example, 10000 sccm, 15000 sccm, 20000 sccm, 25000 sccm, 30000 sccm, etc. 2The flow rate of the boron source is 30-200sccm, for example, it can be 30sccm, 50sccm, 60sccm, 80sccm, 100sccm, 120sccm, 140sccm, 160sccm, 180sccm, 200sccm, etc., and the flow rate of the boron source is 100-600sccm, for example, it can be 100sccm, 200sccm, 300sccm, 400sccm, 500sccm, 600sccm, etc.

[0038] Preferably, the boron source is selected from boron tribromide and / or boron trichloride.

[0039] Preferably, the temperature of the first boron diffusion deposition is 900-1000°C, for example, it can be 900°C, 920°C, 940°C, 960°C, 980°C, 1000°C, etc. The heating rate of the first boron diffusion deposition is 5-15°C / min, for example, it can be 5°C / min, 6°C / min, 8°C / min, 10°C / min, 12°C / min, 15°C / min, etc. The time of the first boron diffusion deposition is 10-60min, for example, it can be 10min, 15min, 20min, 25min, 30min, 35min, 40min, 45min, 50min, 55min, 60min, etc.

[0040] (c) Selective re-doping: Selective re-doping is performed using the high temperature effect of SE laser.

[0041] Preferably, the transmitter power of the SE laser is 100-120 W, for example, it can be 100 W, 105 W, 110 W, 115 W, 120 W, etc., the engraving speed is 45000-50000 mm / s, for example, it can be 45000 mm / s, 46000 mm / s, 47000 mm / s, 48000 mm / s, 49000 mm / s, 50000 mm / s, etc., and the temperature is 800-1000°C, for example, it can be 800°C, 850°C, 900°C, 950°C, 1000°C, etc.

[0042] (d) Secondary boron diffusion: The selectively heavily doped silicon wafer is placed in a diffusion furnace and N 2 , O 2 and a boron source, to perform a second boron diffusion deposition;

[0043] Preferably, in the secondary boron diffusion: 2 The flow rate is 10000 to 30000 sccm, for example, 10000 sccm, 15000 sccm, 20000 sccm, 25000 sccm, 30000 sccm, etc. 2The flow rate of the boron source is 30 to 200 sccm, for example, it can be 30 sccm, 50 sccm, 60 sccm, 80 sccm, 100 sccm, 120 sccm, 140 sccm, 160 sccm, 180 sccm, 200 sccm, etc., and the flow rate of the boron source is 100 to 600 sccm, for example, it can be 100 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, etc.;

[0044] Preferably, the boron source is selected from boron tribromide and / or boron trichloride;

[0045] Preferably, the temperature of the second boron diffusion deposition is 800-900°C, for example, it can be 800°C, 820°C, 840°C, 860°C, 880°C, 900°C, etc. The heating rate of the second boron diffusion deposition is 5-15°C / min, for example, it can be 5°C / min, 6°C / min, 8°C / min, 10°C / min, 12°C / min, 15°C / min, etc. The time of the second boron diffusion deposition is 60-90min, for example, it can be 60min, 65min, 70min, 75min, 80min, 85min, 90min, etc.

[0046] (e) BSG removal: the silicon wafer after secondary boron diffusion is placed in HF reagent for pickling;

[0047] Preferably, the HF reagent is an aqueous solution of HF, and its mass concentration is 3-10%, for example, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10%, etc.

[0048] Preferably, the pickling temperature is 50-70°C, for example, 50°C, 55°C, 60°C, 65°C, 70°C, etc., and the pickling time is 100-300s, for example, 100s, 150s, 200s, 250s, 300s, etc.

[0049] (f) Alkali polishing: The silicon wafer after the BSG layer is removed is placed in an alkaline polishing solution for alkaline polishing;

[0050] Preferably, the alkaline polishing liquid comprises the following components in terms of mass percentage: 1-3% alkali (for example, 1%, 1.5%, 2%, 2.5%, 3%, etc.), 0.8-1.8% polishing additive (for example, 0.8%, 1.0%, 1.2%, 1.4%, 1.6%, 1.8%, etc.), and the balance is water.

[0051] Preferably, the base is sodium hydroxide and / or potassium hydroxide.

[0052] Preferably, the polishing additive is fatty alcohol polyoxyethylene ether.

[0053] Preferably, the alkali polishing temperature is 60-70°C, for example, 60°C, 62°C, 64°C, 66°C, 68°C, 70°C, etc., and the time is 100-200s, for example, 100s, 120s, 140s, 160s, 180s, 200s, etc.

[0054] Preferably, after the repairing process and before preparing the amorphous silicon layer, the following steps are further included:

[0055] Pass N into the repaired battery cell 2 Carry out purging and pressure reduction.

[0056] Preferably, the N 2 The purge flow rate is 3000-6000sccm, for example, 3000sccm, 3500sccm, 4000sccm, 4500sccm, 5000sccm, 5500sccm, 6000sccm, etc., N 2 The purge time is 150 to 450 s, for example, it can be 150 s, 200 s, 250 s, 300 s, 350 s, 400 s, 450 s, etc.

[0057] Preferably, the pressure is pumped to below 1700mtorr, for example, 1700mtorr, 1680mtorr, 1660mtorr, 1640mtorr, 1620mtorr, 1600mtorr, 1500mtorr, 1400mtorr, 1200mtorr, 1000mtorr, etc.

[0058] Preferably, the steps of preparing the amorphous silicon layer are specifically as follows:

[0059] The PECVD method is used to in-situ dope the cell, and an amorphous silicon layer is deposited on the repaired tunnel oxide layer.

[0060] Preferably, the thickness of the amorphous silicon layer is 100-150 nm, for example, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, etc.

[0061] Preferably, the deposition temperature is 380-480°C, for example, it can be 380°C, 390°C, 400°C, 410°C, 420°C, 430°C, 440°C, 450°C, 460°C, 470°C, 480°C, etc.; the pressure condition is 1300-1800mTorr, for example, it can be 1300mTorr, 14mTorr, 15mTorr, 16mTorr, 17mTorr, 18mTorr, etc.

[0062] Preferably, the gas used for the deposition is PH 3 、SiH 4 and H 2 of mixed gas;

[0063] Preferably, the PH 3 The flow rate is 800 to 2000 sccm, for example, 800 sccm, 1000 sccm, 1200 sccm, 1400 sccm, 1600 sccm, 1800 sccm, 2000 sccm, etc. SiH 4 The flow rate is 2000-2500sccm, for example, 2000sccm, 2100sccm, 2200sccm, 2300sccm, 2400sccm, 2500sccm, etc. 2 The flow rate is 7500-8500sccm, for example, it can be 75sccm, 76sccm, 78sccm, 80sccm, 82sccm, 84sccm, 85sccm, etc.

[0064] Preferably, after preparing the amorphous silicon layer, the following steps are further included:

[0065] Annealing the cell having the amorphous silicon layer to form a polycrystalline silicon layer;

[0066] Preferably, the annealing temperature is 890-950°C, for example, it can be 890°C, 900°C, 910°C, 920°C, 930°C, 940°C, 950°C, etc., and the annealing time is 80-150min, for example, it can be 80min, 85min, 90min, 100min, 110min, 120min, 130min, 140min, 150min, etc.

[0067] Preferably, the annealing treatment further includes surface passivation treatment and metallization treatment in sequence.

[0068] Furthermore, the surface passivation treatment specifically includes the following steps:

[0069] An aluminum oxide passivation layer is prepared on the polysilicon layer on the back side of the silicon substrate, and a silicon nitride anti-reflection layer is prepared on the aluminum oxide passivation layer.

[0070] Preferably, the aluminum oxide passivation layer has a thickness of 3 to 8 μm, for example, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, etc.

[0071] Preferably, the thickness of the silicon nitride anti-reflection layer is 30-40 μm, for example, 30 μm, 32 μm, 34 μm, 36 μm, 38 μm, 40 μm, etc.

[0072] Furthermore, the metallization treatment specifically includes the following steps: forming a front electrode on the front side of the battery cell and forming a back electrode on the back side of the battery cell through the metallization treatment.

[0073] In the present invention, the silicon substrate is an N-type crystalline silicon substrate.

[0074] Compared with the prior art, the present invention has the following beneficial effects:

[0075] (1) Before the PECVD deposition of the Poly-Si layer in the method of the present invention, NxOy, O 3 , H 2 O gas, and plasma vapor deposition method is used to repair the scratch position of the tunneling oxide layer to improve the quality of the tunneling film layer.

[0076] (2) The method of the present invention can improve the back passivation effect of the battery cell by repairing the quality of the tunneling film layer, reduce the proportion of dark films, and improve the yield of the battery cell.

[0077] (3) The method of the present invention can improve the back passivation effect of the battery cell, improve the Uoc of the battery cell, and improve the efficiency of the battery cell by repairing the quality of the tunneling film layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0079] Figure 1 It is a schematic diagram of the structure of the TOPCON battery cell described in the present invention.

[0080] Among them, 1 is the front silicon nitride layer, 2 is the PN junction, 3 is the N-type crystalline silicon substrate, 4 is the tunneling oxide layer, 5 is the polysilicon layer, 6 is the aluminum oxide layer, and 7 is the back silicon nitride layer. DETAILED DESCRIPTION

[0081] Unless otherwise defined herein, scientific and technical terms used in conjunction with the present invention shall have the meanings commonly understood by those of ordinary skill in the art. The meaning and scope of the terms should be clear, however, in the case of any potential ambiguity, the definitions provided herein take precedence over any dictionary or external definitions. In this application, unless otherwise stated, the use of "or" means "and / or". In addition, the use of the term "including" and other forms is non-limiting.

[0082] It should be noted that specific details are described in the following description to facilitate a full understanding of the present invention. However, the present invention can be implemented in a variety of other ways different from those described herein, and those skilled in the art can make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0083] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0084] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0085] The present invention is further described below by way of examples. Unless otherwise specified, the materials in the examples are prepared according to existing methods or directly purchased from the market.

[0086] Figure 1 Schematic diagram of the structure of the TOPCON cell of the present invention. Figure 1 As shown, the front side of the N-type crystalline silicon substrate 3 has a front silicon nitride layer 1 and a PN junction 2; the back side has a tunneling oxide layer 4, a polysilicon layer 5, an aluminum oxide layer 6, and a back silicon nitride layer 7.

[0087] Preparation Example 1

[0088] This preparation example provides a pretreatment method for an N-type crystalline silicon substrate, wherein the pretreatment specifically comprises the following steps:

[0089] (a) Texturing: The silicon substrate is placed in an alkaline solution for cleaning and texturing to form a pyramid texture surface on the surface of the silicon wafer; wherein the alkaline solution comprises the following components in terms of mass percentage: 2% sodium hydroxide, 0.03% isopropanol, and the remainder is water; the cleaning and texturing temperature is 80°C, and the cleaning and texturing time is 300s.

[0090] (b) Boron diffusion: Place the silicon wafer with a velvet surface in a diffusion furnace and introduce N 2 , O 2and a boron source, and perform a first boron diffusion deposition; wherein, in the first boron diffusion: N 2 The flow rate is 20000sccm, O 2 The flow rate of is 100 sccm, the flow rate of boron tribromide is 300 sccm; the temperature of the first boron diffusion deposition is 950°C, the heating rate of the first boron diffusion deposition is 10°C / min, and the time of the first boron diffusion deposition is 30min.

[0091] (c) Selective re-doping: Selective re-doping is performed using the high temperature effect of SE laser; wherein the transmitter power of the SE laser is 110W, the engraving speed is 480000mm / s, and the temperature is 900°C.

[0092] (d) Secondary boron diffusion: The selectively heavily doped silicon wafer is placed in a diffusion furnace and N 2 , O 2 and a boron source, and a second boron diffusion deposition is performed; wherein, in the second boron diffusion: the N 2 The flow rate is 20000sccm, O 2 The flow rate of is 100 sccm, the flow rate of boron tribromide is 400 sccm; the temperature of the second boron diffusion deposition is 850°C, the heating rate of the second boron diffusion deposition is 10°C / min, and the time of the second boron diffusion deposition is 80min.

[0093] (e) BSG removal: The silicon wafer after secondary boron diffusion is placed in a 5 wt % HF aqueous solution for pickling; wherein the pickling temperature is 60° C. and the pickling time is 200 s.

[0094] (f) Alkali polishing: The silicon wafer after the BSG layer is removed is placed in an alkaline polishing solution for alkaline polishing; wherein the alkaline polishing solution comprises the following components in terms of mass percentage: 2% sodium hydroxide, 1.5% fatty alcohol polyoxyethylene ether, and the remainder is water; the temperature for alkaline polishing in the texturing tank is 65°C, and the time is 150s.

[0095] Example 1

[0096] This embodiment provides a method for preparing a TOPCON cell, and the preparation method specifically comprises the following steps:

[0097] S1. Preparation of tunneling oxide layer:

[0098] The cell obtained in Preparation Example 1 is oxidized by LPCVD thermal oxidation to grow a silicon oxide film and form a tunneling oxide layer on the back of the silicon wafer;

[0099] The thickness of the tunnel oxide layer is 1.5 nm; the temperature of the oxidation treatment is 600° C. 2The flow rate is 28slm; the pressure condition is 750torr.

[0100] S2. Repair Process

[0101] The cell with the tunnel oxide layer is placed in a PECVD device, and gas is introduced for repair treatment to complete the repair of the tunnel oxide layer;

[0102] Wherein, the gas is N 2 O, O 3 and H 2 O mixed gas; the total gas flow rate is 10000sccm; the N x O y , O 3 and H 2 The flow ratio of O is 6:3:1; the temperature of the repair treatment is 420°C; the time of the repair treatment is 30s; the RF power of the repair treatment is 6500watt; and the furnace tube pressure is 1500mTorr.

[0103] S3, purge-pressure

[0104] Pass N into the repaired battery cell 2 Carry out purging and pressure extraction to remove excess gas and by-products;

[0105] Among them, N 2 The purge flow rate is 4000sccm, the purge time is 200s, and the pressure is pumped down to below 1700mtorr.

[0106] S4. Preparation of amorphous silicon layer

[0107] The cell is in-situ doped using the PECVD method, and an amorphous silicon layer is deposited on the repaired tunnel oxide layer;

[0108] Wherein, the thickness of the amorphous silicon layer is 105 nm; the deposition temperature is 390° C.; and the pressure condition is 1350 mTor.

[0109] S5. Annealing

[0110] Annealing the cell having the amorphous silicon layer to form a polycrystalline silicon layer;

[0111] The annealing temperature is 920° C. and the annealing time is 100 min.

[0112] S6. Surface passivation

[0113] An aluminum oxide passivation layer is prepared on the polysilicon layer on the back side of the silicon substrate, and a silicon nitride anti-reflection layer is prepared on the aluminum oxide passivation layer; wherein the aluminum oxide passivation layer has a thickness of 5 μm; and the silicon nitride anti-reflection layer has a thickness of 35 μm.

[0114] S7, Metallization

[0115] A front electrode is formed on the front side of the battery cell through metallization treatment, and a back electrode is formed on the back side of the battery cell.

[0116] Example 2

[0117] This embodiment provides a method for preparing a TOPCON cell, and the preparation method specifically comprises the following steps:

[0118] S1. Preparation of tunneling oxide layer:

[0119] The cell obtained in Preparation Example 1 is oxidized by LPCVD thermal oxidation to grow a silicon oxide film and form a tunneling oxide layer on the back of the silicon wafer;

[0120] The thickness of the tunnel oxide layer is 1.6 nm; the temperature of the oxidation treatment is 620° C. 2 The flow rate is 30slm; the pressure condition is 760torr.

[0121] S2. Repair Process

[0122] The cell with the tunnel oxide layer is placed in a PECVD device, and gas is introduced for repair treatment to complete the repair of the tunnel oxide layer;

[0123] Wherein, the gas is N 2 O, O 3 and H 2 O mixed gas; the total gas flow rate is 9000sccm; the N 2 O, O 3 and H 2 The flow ratio of O is 7:2:1; the temperature of the repair treatment is 400°C; the time of the repair treatment is 60s; the RF power of the repair treatment is 8000watt; and the furnace tube pressure is 1300mTorr.

[0124] S3, purge-pressure

[0125] Pass N into the repaired battery cell 2 Carry out purging and pressure extraction to remove excess gas and by-products;

[0126] Among them, N 2The purge flow rate is 4500sccm, the purge time is 250s, and the pressure is pumped down to below 1700mtorr.

[0127] S4. Preparation of amorphous silicon layer

[0128] The cell is in-situ doped using the PECVD method, and an amorphous silicon layer is deposited on the repaired tunnel oxide layer;

[0129] Wherein, the thickness of the amorphous silicon layer is 120 nm; the deposition temperature is 410° C.; and the pressure condition is 1450 mTor.

[0130] S5. Annealing

[0131] Annealing the cell having the amorphous silicon layer to form a polycrystalline silicon layer;

[0132] The annealing temperature is 890° C. and the annealing time is 150 min.

[0133] S6. Surface passivation

[0134] An aluminum oxide passivation layer is prepared on the polysilicon layer on the back side of the silicon substrate, and a silicon nitride anti-reflection layer is prepared on the aluminum oxide passivation layer; wherein the aluminum oxide passivation layer has a thickness of 5 μm; and the silicon nitride anti-reflection layer has a thickness of 35 μm.

[0135] S7, Metallization

[0136] A front electrode is formed on the front side of the battery cell through metallization treatment, and a back electrode is formed on the back side of the battery cell.

[0137] Example 3

[0138] This embodiment provides a method for preparing a TOPCON cell, and the preparation method specifically comprises the following steps:

[0139] S1. Preparation of tunneling oxide layer:

[0140] The cell obtained in Preparation Example 1 is oxidized by LPCVD thermal oxidation to grow a silicon oxide film and form a tunneling oxide layer on the back of the silicon wafer;

[0141] The thickness of the tunnel oxide layer is 1.7 nm; the temperature of the oxidation treatment is 650° C. 2 The flow rate is 32slm; the pressure condition is 780torr.

[0142] S2. Repair Process

[0143] The cell with the tunnel oxide layer is placed in a PECVD device, and gas is introduced for repair treatment to complete the repair of the tunnel oxide layer;

[0144] Wherein, the gas is N 2 O, O 3 and H 2 O mixed gas; the total gas flow rate is 12000sccm; the N 2 O, O 3 and H 2 The flow ratio of O is 6.5:2:1.5; the temperature of the repair treatment is 430°C; the time of the repair treatment is 10s; the RF power of the repair treatment is 5000watt; and the furnace tube pressure is 1800mTorr.

[0145] S3, purge-pressure

[0146] Pass N into the repaired battery cell 2 Carry out purging and pressure extraction to remove excess gas and by-products;

[0147] Among them, N 2 The purge flow rate is 5000sccm, the purge time is 300s, and the pressure is pumped down to below 1700mtorr.

[0148] S4. Preparation of amorphous silicon layer

[0149] The cell is in-situ doped using the PECVD method, and an amorphous silicon layer is deposited on the repaired tunnel oxide layer;

[0150] Wherein, the thickness of the amorphous silicon layer is 140 nm; the deposition temperature is 435° C.; and the pressure condition is 1600 mTor.

[0151] S5. Annealing

[0152] Annealing the cell having the amorphous silicon layer to form a polycrystalline silicon layer;

[0153] The annealing temperature is 950° C. and the annealing time is 80 min.

[0154] S6. Surface passivation

[0155] An aluminum oxide passivation layer is prepared on the polysilicon layer on the back side of the silicon substrate, and a silicon nitride anti-reflection layer is prepared on the aluminum oxide passivation layer; wherein the aluminum oxide passivation layer has a thickness of 5 μm; and the silicon nitride anti-reflection layer has a thickness of 35 μm.

[0156] S7, Metallization

[0157] A front electrode is formed on the front side of the battery cell through metallization treatment, and a back electrode is formed on the back side of the battery cell.

[0158] Example 4

[0159] This embodiment provides a method for preparing a TOPCON cell sheet. The only difference from Embodiment 1 is that the total flow rate of the gas is reduced to 85,000 sccm and the repair time is extended to 90 s. The other steps are exactly the same as those in Embodiment 1.

[0160] Example 5

[0161] This embodiment provides a method for preparing a TOPCON cell sheet. The only difference from Embodiment 1 is that the total flow rate of the gas is increased to 125,000 sccm and the repair time is reduced to 4 s. The other steps are exactly the same as those in Embodiment 1.

[0162] Example 6

[0163] This embodiment provides a method for preparing a TOPCON cell. The only difference from the embodiment 1 is that the gas used in the repair process is only N 2 O, the flow rate is increased to 10000 sccm, and the other steps are exactly the same as those in Example 1.

[0164] Example 7

[0165] This embodiment provides a method for preparing a TOPCON cell. The only difference from the embodiment 1 is that the gas used in the repair process is only O 3 , the flow rate is increased to 10000 sccm, and the other steps are exactly the same as those in Example 1.

[0166] Example 8

[0167] This embodiment provides a method for preparing a TOPCON cell. The only difference from the embodiment 1 is that the gas used in the repair process is only H 2 O, the flow rate is increased to 10000 sccm, and the other steps are exactly the same as those in Example 1.

[0168] Comparative Example 1

[0169] This comparative example provides a method for preparing a TOPCON battery cell, which is different from Example 1 only in that the S2 repair treatment is not performed, and the other steps are exactly the same as those in Example 1.

[0170] Test Example 1

[0171] Scratch repair test

[0172] Test samples: battery cells before and after S2 repair treatment in Examples 1 to 8 and Comparative Example 1;

[0173] The test results are shown in Table 1 below:

[0174] Table 1

[0175]

[0176]

[0177] As shown in Table 1, before the PECVD deposition of the Poly-Si layer in the method of the present invention, NxOy, O 3 , H 2 O gas, and plasma vapor deposition method is used to repair the scratch position of the tunneling oxide layer, effectively improving the quality of the tunneling film layer.

[0178] Test Example 2

[0179] Finished TOPCON cell testing

[0180] Test samples: TOPCON cells finally prepared in Examples 1 to 8 and Comparative Example 1; the test results are shown in Table 2 below:

[0181] Table 2

[0182]

[0183]

[0184] As shown in Table 2, the method of the present invention can improve the back passivation effect of the cell, reduce the dark film ratio, and improve the cell yield by repairing the quality of the tunneling film layer. And by repairing the quality of the tunneling film layer, the back passivation effect of the cell can be improved, the cell Uoc can be improved, and the cell efficiency can be improved.

[0185] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for repairing a TOPCON battery tunneling layer, characterized in that: The repair method specifically comprises the following steps: After preparing the tunnel oxide layer, the cell with the tunnel oxide layer is placed in a PECVD device, gas is introduced for repair treatment, and then an amorphous silicon layer is prepared; The gas is N x O y , O3 and H2O, the N x O y is N2O, the N x O y , the flow ratio of O3 and H2O is (6-8):(2-3):(0.5-2), and the flow rate of the gas is 9000-12000sccm; The preparation steps of the tunneling oxide layer are specifically as follows: oxidizing the cell piece by using the LPCVD thermal oxidation method, growing a silicon oxide film, and forming a tunneling oxide layer on the back of the silicon piece.

2. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The temperature of the repair treatment is 400-430°C.

3. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The repair process takes 5 to 60 seconds.

4. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The radio frequency power of the repair treatment is 5000-8000 watt.

5. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The furnace tube pressure during the repair process is 1300-1800 mTorr.

6. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The thickness of the tunnel oxide layer is 1-1.8 nm.

7. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The temperature of the oxidation treatment is 550-650° C.; the flow rate of O 2 is 25-35 slm; and the pressure condition is 700-800 torr.

8. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: Before preparing the tunnel oxide layer, the cell needs to be pre-treated, and the pre-treatment specifically includes: texturing, primary boron diffusion, selective re-doping, secondary boron diffusion, BSG removal and alkaline polishing.

9. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: After the repairing process and before preparing the amorphous silicon layer, the following steps are also included: N2 is introduced into the repaired battery cells for purging, and then the cells are subjected to pressure reduction treatment.

10. The method for repairing the tunneling layer of a TOPCON battery according to claim 9, characterized in that: The N2 purge flow rate is 3000-6000 sccm, and the N2 purge time is 150-450 s.

11. The method for repairing the tunneling layer of a TOPCON battery according to claim 9, characterized in that: The pressure is reduced to below 1700 mtorr.

12. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: The steps for preparing the amorphous silicon layer are specifically as follows: The PECVD method is used to in-situ dope the cell, and an amorphous silicon layer is deposited on the repaired tunnel oxide layer.

13. The method for repairing the tunneling layer of a TOPCON battery according to claim 1 or 12, characterized in that: The thickness of the amorphous silicon layer is 100-150 nm.

14. The method for repairing the tunneling layer of a TOPCON battery according to claim 12, characterized in that: The deposition temperature is 350-480° C. and the pressure condition is 1300-1800 mTorr.

15. The method for repairing the tunneling layer of a TOPCON battery according to claim 12, characterized in that: The gas used for the deposition is a mixed gas of PH3, SiH4 and H2.

16. The method for repairing the tunneling layer of a TOPCON battery according to claim 15, characterized in that: The flow rate of PH3 is 800-2000 sccm, the flow rate of SiH4 is 2000-2500 sccm, and the flow rate of H2 is 7500-8500 sccm.

17. The method for repairing the tunneling layer of a TOPCON battery according to claim 1, characterized in that: After the amorphous silicon layer is prepared, the following steps are also included: The cell having the amorphous silicon layer is annealed to form a polycrystalline silicon layer.

18. The method for repairing the tunneling layer of a TOPCON battery according to claim 17, characterized in that: The annealing temperature is 890-950° C., and the annealing time is 80-150 min.

19. The method for repairing the tunneling layer of a TOPCON battery according to claim 17, characterized in that: The annealing treatment also includes surface passivation treatment and metallization treatment in sequence.

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