A processor chip architecture and self-determination flow for computing path self-determination

By embedding decision-making units in processor chips, self-decision-making and self-addressing of computing paths are achieved, solving the problems of fixed computing paths and high communication overhead in traditional processor chip architectures, and improving resource utilization efficiency and system performance.

CN118363915BActive Publication Date: 2026-04-14RINGWAY TECH JIANGSU
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
RINGWAY TECH JIANGSU
Filing Date
2024-04-15
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

Traditional processor chip architectures have fixed computation paths that cannot be flexibly adjusted, resulting in insufficient utilization of computing resources. Furthermore, the separate processing of control flow and data flow increases communication overhead and affects system performance.

Method used

Decision-making units are embedded within or between computing units. These units autonomously determine computing paths based on the information and status of the computing units, enabling self-decision-making and self-addressing of computing paths, optimizing the utilization of computing resources, and reducing communication overhead.

Benefits of technology

It improves the efficiency of computing resource utilization, reduces communication overhead, and enhances the system's flexibility and adaptability to different task requirements and application scenarios.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN118363915B_ABST
    Figure CN118363915B_ABST
Patent Text Reader

Abstract

The processor chip architecture for computing path self-decision of the present application comprises a computing array composed of a plurality of interconnected computing units, each computing unit being connected with a decision unit; when a computing unit finishes executing a computing subtask, the corresponding decision unit acquires information data of the remaining computing units, makes a decision, and if the decision unit calculates a more optimal computing scheme, changes the first computing path to the second computing path, and transfers the computing task or computing data to the next computing unit according to the second computing path; otherwise, still transfers according to the first computing path; and so on until the computing task ends; the present application embeds a decision unit inside the computing array, dynamically selects the next computing unit in the computing path through the decision unit, enables the computing unit to autonomously decide the computing path according to information and state, and thus realizes self-decision of the computing path, improves the utilization efficiency of computing resources, and enhances the flexibility and adaptability of the system.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to a processor chip architecture with self-decision-making computing path, belonging to the field of chip architecture technology. Background Technology

[0002] The existing processor chip architecture has the following main drawbacks:

[0003] 1. Fixed Computation Path: Traditional processor chip architectures typically employ fixed computation paths, meaning that the data transfer mechanism between computing units is pre-planned and specified by the top-level module. This makes it impossible to adjust the computation path, fully utilize the local information and state of the computing units, and result in inflexible computation path selection. This affects system performance and makes it difficult to adapt to different task requirements and application scenarios. When different types of artificial neural computing networks need to be run on the same chip, the hardware needs to be reconfigured and adjusted, increasing the complexity of design and development. Consequently, the computation path cannot be dynamically adjusted according to task requirements and system state during runtime, which may lead to insufficient utilization of computing resources and performance degradation.

[0004] 2. Independent control flow and data flow: Traditional processor chip architectures typically separate control flow and data flow. Data transmission between computing units usually requires dedicated communication interfaces and buses, which incurs additional communication overhead to transmit control signals and data. This results in additional latency and energy consumption, limiting the overall performance of the system. Summary of the Invention

[0005] In order to solve the problems existing in the prior art, the present invention provides a method for autonomously deciding on a computing path based on the information and state of the computing unit.

[0006] To achieve the above objectives, the technical solution proposed by this invention is as follows: a processor chip architecture with self-decision-making computing path, comprising a computing array composed of multiple interconnected computing units, wherein the processor chip has a preset first computing path; the first computing path is used to instruct the computing unit that completes the computing subtask to pass the computing task to the next specified computing unit according to the first computing path, and so on, until the computing task ends; the order in which computing tasks are passed between computing units is the computing path of the control flow, and the order in which computing data is passed between computing units is the computing path of the data flow;

[0007] Each computing unit is connected to a corresponding decision unit. After a computing unit completes its computing subtask, the corresponding decision unit obtains information data from the other computing units and makes a decision based on the information data. If the decision unit calculates a better computing solution, it changes the first computing path to the second computing path and passes the computing task or computing data to the next computing unit according to the second computing path. Otherwise, it still passes the computing task or computing data to the next computing unit according to the first computing path. This continues until the computing task is completed.

[0008] The decision-making unit is embedded inside the computing unit, or is set between computing units and spaced apart from each other.

[0009] The architecture also includes a main control module, which reports the decision-making unit to the main control module after making a decision.

[0010] The self-decision-making process of the processor chip architecture with the above-mentioned self-decision-making computing path includes the following steps:

[0011] S1. Preset the first computing path and data flow transmission mode of the computing array, and set the decision-making strategy of the decision unit;

[0012] S2. The computing unit begins to execute the computing task and generates computing results based on the current computing path and data stream transmission method.

[0013] S3. After the computing unit completes the computing subtask, the corresponding decision unit obtains information data from other computing units and generates a decision based on the decision strategy, determining the optimal computing path. If the optimal computing path is better than the current computing path, the current computing path is changed to the optimal computing path; otherwise, the current computing path remains unchanged.

[0014] S4. The decision-making unit will pass the computation data, including the computation results, and / or computation tasks to the next computation unit according to the current computation path, and report the decision to the main control module.

[0015] S5. Repeat steps S2 to S4 until the entire computation task is completed.

[0016] After the decision-making unit generates a computation path, it passes the computation task to the next computation unit according to the computation path, forming a control flow computation path. Then, the decision-making unit uses the control flow computation path to pass the computation data to the next computation unit, forming a data flow computation path.

[0017] The decision-making unit is equipped with an evaluation module, which is used to evaluate the selectable computing paths. The evaluation module evaluates the computing paths by statistically summing the historical computing power consumption of each computing unit in the computing path as a pre-calculated value. The pre-calculated value is the evaluation value, and the one with the best evaluation value is the optimal computing path.

[0018] The computing unit information data acquired by the decision unit includes computing results, computing status, and computing load; the computing results are the output data after the computing is completed, the computing status is whether computing has occurred, and the computing load is the time / computing power / power consumption consumed in performing the computing.

[0019] The decisions generated by the decision-making unit include selecting the next computing unit, updating the computing path, and updating the data stream transmission method.

[0020] The transmission of the information data selects the optimal transmission path based on factors such as the distance between computing units, communication bandwidth, and communication delay.

[0021] The data stream transmission methods include direct memory access, network transmission, and high-speed bus transmission.

[0022] Compared with the prior art, the present invention has the following advantages:

[0023] This invention embeds decision-making units within a computing array, which dynamically select the next computing unit in the computing path. This enables the computing units to autonomously decide their computing paths based on information and status, thereby achieving self-decision-making and self-addressing of computing paths. This improves the efficiency of computing resource utilization, reduces communication overhead, and enhances the flexibility and adaptability of the system.

[0024] In this invention, since the decision-making unit is located inside or between the computing units, data transmission between the decision-making unit and other computing units can be carried out through direct connection between computing units, avoiding additional communication overhead and realizing the integration of control flow and data flow. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the processor chip architecture of the present invention;

[0026] Figure 2 This describes the self-decision-making process of the processor chip in this invention. Detailed Implementation

[0027] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. Example

[0028] The processor chip architecture for self-decision-making of computational paths in this embodiment, such as Figure 1As shown, the processor chip includes a computing array composed of multiple interconnected computing units. The processor chip has a preset first computing path. The first computing path is used to instruct the computing unit that completes the computing subtask to pass the computing task to the next specified computing unit according to the first computing path, and so on, until the computing task is completed. The order in which computing tasks are passed between computing units is the computing path of the control flow, and the order in which computing data is passed between computing units is the computing path of the data flow.

[0029] Each computing unit is connected to a corresponding decision unit. After a computing unit completes its computing subtask, the corresponding decision unit obtains information data from the other computing units and makes a decision based on the information data. If the decision unit calculates a better computing solution, it changes the first computing path to the second computing path and passes the computing task or computing data to the next computing unit according to the second computing path. Otherwise, it still passes the computing task or computing data to the next computing unit according to the first computing path. This continues until the computing task is completed.

[0030] The self-decision-making process of the processor chip architecture with the above-mentioned self-decision-making computing path includes the following steps:

[0031] S1. Preset the first computing path and data flow transmission mode of the computing array, and set the decision-making strategy of the decision unit;

[0032] S2. The computing unit begins to execute the computing task and generates computing results based on the current computing path and data stream transmission method.

[0033] S3. After the computing unit completes the computing subtask, the corresponding decision unit obtains information data from other computing units and generates a decision based on the decision strategy, determining the optimal computing path. If the optimal computing path is better than the current computing path, the current computing path is changed to the optimal computing path; otherwise, the current computing path remains unchanged.

[0034] S4. The decision-making unit will pass the computation data, including the computation results, and / or computation tasks to the next computation unit according to the current computation path, and report the decision to the main control module.

[0035] S5. Repeat steps S2 to S4 until the entire computation task is completed. Example

[0036] like Figure 1As shown, the processor chip architecture for self-decision-making in computational paths of this embodiment includes a computational array composed of multiple interconnected computational units, and each computational unit is connected to a corresponding decision unit. The computational array can also be a DSP array. The computational units can support tasks of different artificial neural network computations, including CNN, DNN, SNN, RNN, FC, Transformer, etc. The decision unit stores and maintains the computational information of other computational units connected to it. After the computational subtask of the previous computational unit is completed, the corresponding decision unit sends the data stream to the next computational unit it decides based on the currently stored and maintained computational unit information, and reports this decision to the upper-level main control module for tracking and error correction when necessary.

[0037] In the chip architecture of this embodiment, the decision-making unit is embedded inside the computing unit, or disposed between computing units and spaced apart from them, such as... Figure 1 As shown.

[0038] Combination Figure 2 As shown, the specific workflow of the processor chip in this embodiment is as follows:

[0039] 1. Initialization: Within the computing array, a decision unit is set up between each computing unit and between computing units. This decision unit stores information about other computing units connected to it and maintains their current computing state. During initialization, an initial computing path and data flow transmission method can be set, such as using a default path or a random path.

[0040] The initialization process of this invention is as follows:

[0041] Computing Unit Configuration: First, each computing unit within the computing array is configured and connected to the network. The type, quantity, and location of the computing units can be selected based on the specific implementation and application requirements. Computing units can be processors, accelerators, neurons, etc., and can include multiple layers or cascaded computing units.

[0042] Decision Unit Initialization: Each computing unit embeds a decision unit to store and maintain information about other computing units connected to it, and to make decisions. The decision unit can be initialized according to actual needs, including setting initial decision strategies, parameters, weights, etc.

[0043] Path and data flow settings: Initial computation paths and data flow transmission methods can be configured, such as using a default fixed path or a random path. This can be achieved through predefined configuration files, initialization functions, parameter settings, etc. The computation path determines the connection and computation order between computation units, while the data flow transmission method determines how computation results and status information are transmitted.

[0044] System startup: The entire computing array is started, putting it into working condition. The computing units begin executing computing tasks according to the preset paths and data flow patterns, generating computing results.

[0045] The initialization process in this embodiment can also be flexibly adjusted according to specific implementation methods and application scenarios. For example, the parameters, strategies, and weights of the decision-making unit can be dynamically configured and adjusted at runtime to adapt to different computing tasks and system requirements. The purpose of initialization is to provide an initial state and basic settings for subsequent computing tasks and self-decision-making, enabling the computing array to start executing tasks and make adaptive decisions and adjustments based on real-time information at runtime.

[0046] 2. Execution of computational tasks: Each computational unit performs corresponding computational operations according to its task type (such as CNN, DNN, SNN, RNN, FC, Transformer, etc.) and generates computational results.

[0047] The computational task execution workflow of this invention is as follows:

[0048] Input to the computation task: First, the input data for the computation task is passed to the computing units in the computing array. The input data can be in various forms such as images, speech, and text. Depending on the different task requirements and the type of computing unit, the input data may need to undergo preprocessing, feature extraction, and other operations.

[0049] Computational task execution: The computing unit executes computational tasks based on its internally embedded artificial neural computing network. The computing unit uses its computing power to perform neural computations, including operations such as forward propagation, backward propagation, and weight updates, to generate computational results.

[0050] Decision-making units make decisions: After a computing unit completes its computational task, the corresponding decision-making unit begins its work. The decision-making unit makes decisions based on information stored and maintained internally about other computing units connected to it. These decisions may include selecting the next computing unit, adjusting the computational path, and updating the data stream transmission method.

[0051] Computational task transfer: Decision-making units transfer computational tasks to the next computational unit based on their decision results. Transfer can be achieved by directly passing computation results and status information to the next computational unit, or by updating data stream transmission methods. Computational tasks can be transferred between computational units, forming flexible computational paths.

[0052] Reporting Decision Results: The decision-making module reports the decision results to the superior main control module for tracking and error correction when necessary. The main control module can perform global management and control based on the decision results of the decision-making module, adjusting the computing path of the computing array, data flow transmission mode, etc.

[0053] Repeated execution: The above steps are executed cyclically until the computation task is completed or the stopping condition is met. The computation task can be iterated multiple times according to actual needs, and the decision-making unit can make dynamic decisions and adjustments based on real-time information to complete the computation task efficiently.

[0054] The computation task execution process in this embodiment is adaptive. The computing unit performs flexible path selection and data stream transmission based on the decision results of the decision unit, thereby realizing self-decision-making and self-addressing of the computing path and improving the flexibility and efficiency of the computing array or DSP array.

[0055] 3. Self-decision-making: After the computing unit completes its computation task, the decision-making unit makes a path decision based on the currently stored and maintained information of neighboring computing units, such as computation results, computation status, and computation load. The decision-making unit can adopt predefined decision-making strategies, such as rule-based, priority-based, and load-balancing strategies, or it can adopt adaptive decision-making strategies, such as reinforcement learning and neural networks. In this embodiment, the computation result is the output data after the computation is completed, the computation status is whether computation has occurred, and the computation load is the time / computing power / power consumption consumed in performing the computation.

[0056] The self-decision-making process of this invention is as follows:

[0057] Information Acquisition: The decision-making unit exchanges and communicates with other computing units connected to it to obtain relevant information such as the computing results, status information, and computing resource utilization of the computing units.

[0058] Decision Generation: Based on the acquired information, the decision-making unit uses predefined decision-making strategies and algorithms to generate decisions for the computational task. Decisions may include selecting the next computational unit, adjusting the computational path, and updating the data stream transmission method. Decision strategies can be adjusted according to different task requirements and system states; for example, the optimal computational path can be selected based on factors such as the computational capacity of the computational unit, resource utilization, and communication latency.

[0059] In this embodiment, the decision-making unit has its own storage unit. The decision-making strategy is to traverse and query the computing power, computing status, and latency from the current computing unit of all computing units before executing the decision. When executing the decision, the unit with the smallest latency from the current computing unit, an idle computing status, and the largest computing power is selected as the next computing unit. If the next computing unit is inconsistent with the next computing unit selected by the first computing path, the computing path is changed from the first computing path to the second computing path.

[0060] Decision Evaluation: The generated decisions undergo an evaluation process to assess their rationality and feasibility. Evaluation may include methods such as simulating, modeling, or learning from historical data to confirm whether the decisions align with system goals and task requirements.

[0061] The decision-making unit has an evaluation module, which is used to evaluate the selectable computing paths. This module calculates the historical computing power consumption of each computing unit in the computing path, sums them up, and uses the sum as a pre-calculated value. The pre-calculated value is the evaluation value, and the path with the best evaluation value is the optimal computing path.

[0062] Decision execution: After evaluation, the decision-making unit implements the generated decision into the actual computing task, including updating the execution path of the computing task, adjusting the data flow transmission method between computing units, and notifying the next computing unit, to ensure that the computing task is executed according to the generated decision.

[0063] Feedback and Adjustment: The decision-making unit adjusts itself based on feedback information and real-time system status during the execution of the computation task. If the executed decision is ineffective, the decision-making unit can revise it based on feedback information, generate a new decision, and re-execute it. This maintains the adaptability and dynamism of the decision-making unit, enabling it to make reasonable decisions based on actual conditions, thereby improving the performance and efficiency of the computing array.

[0064] The self-decision-making process in this embodiment can dynamically generate and adjust decisions based on the needs of the computing task and the system status to optimize the execution path and resource utilization of the computing task, thereby realizing the efficient and flexible execution of computing tasks by the computing array.

[0065] 4. Data Transmission: The decision-making unit transmits the calculation results and status information to the next calculation unit based on the decision outcome, and reports this decision to the superior main control module for tracking and error correction when necessary. Data transmission can be performed through direct connections between calculation units, avoiding additional communication overhead and achieving the integration of control flow and data flow. The direct connection method executes the calculation task according to the initial calculation path.

[0066] Data transmission is used to transfer data between different computing units in a computing array to support the execution of computing tasks. The specific details of data transmission are as follows:

[0067] Data preparation: Before the computation task is executed, the decision-making unit will prepare the data to be processed according to the task requirements and system status, including reading data from external storage media (such as disks, memory, etc.) or obtaining intermediate results that have been computed from other computing units.

[0068] Data transmission path selection: The decision-making unit selects a suitable data transmission path based on the requirements of the computing task and the system status. This can be done by selecting the optimal transmission path based on factors such as the distance between computing units, communication bandwidth, and communication latency, thereby ensuring that data can be transmitted to the target computing unit quickly and efficiently.

[0069] Data transmission method selection: The decision-making unit can also select an appropriate data transmission method based on the needs of the computing task and the system status. For example, it can choose direct memory access (DMA), network transmission, high-speed bus transmission, etc., to maximize the speed and efficiency of data transmission.

[0070] Data transmission execution: Based on the selected transmission path and method, the decision-making unit transmits data to the target computing unit. This can be achieved through methods such as sending data packets, network transmission, and bus transmission, ensuring that data is transmitted to the target computing unit according to the requirements of the computing task.

[0071] Data transmission monitoring and optimization: During data transmission, the decision-making unit monitors the transmission status and effectiveness, and optimizes the data transmission based on real-time system status and feedback information. For example, it can monitor indicators such as transmission speed and latency to adjust transmission paths and methods in a timely manner, thereby improving data transmission efficiency and performance.

[0072] Data reception and processing: After the target computing unit receives the transmitted data, it will perform corresponding data processing operations, such as calculation, storage, and analysis, to complete the execution of the computing task.

[0073] In this embodiment, data transmission is performed based on decisions generated by the decision-making unit, aiming to maximize the efficiency and performance of data transmission in the computing array, thereby improving the execution speed and effectiveness of computing tasks.

[0074] In this embodiment, the order in which computing tasks are transmitted between computing units is the computing path of the control flow, and the order in which data information is transmitted between computing units is the computing path of the data flow. Since the decision unit is located inside the computing array or between computing units, the data transmission it causes can be directly transmitted to the next computing unit and storage unit. That is, the computing path of the control flow and / or data flow is the computing path generated by the decision unit, realizing the integration of control flow and data flow, so as to complete a more flexible computing path self-decision and self-addressing mechanism, and to complete computing tasks more efficiently.

[0075] In this embodiment, after the decision-making unit generates a computation path, it passes the computation task to the next computation unit according to the computation path, forming a computation path for the control flow. Then, the decision-making unit passes the data information to the next computation unit along the computation path for the control flow, forming a computation path for the data flow. That is, the control flow processing is completed in the first time, and the data flow processing is completed in the second time, realizing the path selection based on the data flow continuing the control flow judgment.

[0076] 5. Loop Execution: The above steps are executed cyclically among the computing units within the computing array until the entire computing task is completed, supporting efficient processing of multiple computing tasks within the computing array. The specific cyclic execution process is as follows:

[0077] Task identification and queuing: At the beginning of the loop, the decision unit identifies the computing tasks to be processed in the current system and queues the tasks according to information such as task priority, resource requirements, and system status. This includes adding tasks to the task queue, sorting them by priority, or queuing them according to other scheduling strategies.

[0078] Task allocation and scheduling: In the task queue, the decision-making unit selects a suitable computing unit based on the system's computing resource availability, such as the idle status of computing units and load balancing, and assigns the task to the corresponding computing unit for processing. This can be achieved through scheduling algorithms and strategies to maximize the utilization of computing resources and the efficiency of task processing.

[0079] Task execution and data processing: Once a task is assigned to a computing unit, the computing unit will execute the specific computing task according to the task's processing logic and algorithm, and process the input data to generate computing results. This includes operations such as calculation, operation, logical processing, and storage of the input data to complete the task execution.

[0080] Data transmission and communication: During task execution, data transmission and communication may be required, including reading data from external storage media, transferring data between computing units, and communicating with other systems. This can be decided by the decision-making unit based on task requirements and system status, and the execution of data transmission and communication operations can then support the smooth execution of the task.

[0081] Results Feedback and Decision Updates: After task execution, the computing unit transmits the calculation results back to the decision-making unit. The decision-making unit then provides feedback and updates decisions based on the calculation results and system status. For example, it can update task priorities and adjust computing resource allocation strategies based on metrics such as the accuracy and time performance of the calculation results to optimize the execution of the next round of tasks.

[0082] Looping Execution: The above steps are repeated continuously in a loop to support the continuous processing of multiple computing tasks. The decision-making unit continuously performs task identification, task allocation, task execution, data transmission, result feedback, and decision updates based on real-time task requirements and system status, thereby achieving efficient looping execution to meet the needs of multiple tasks in the computing array.

[0083] The aforementioned loop execution process is dynamic and can be flexibly adjusted and optimized according to actual conditions and needs to maximize the performance and efficiency of the computing array. Simultaneously, the self-decision-making unit updates task priorities and computing resource allocation strategies in each loop based on actual conditions, ensuring optimal decisions are made under different computing tasks and system states, thereby achieving efficient task processing and data transmission. This loop execution method allows this embodiment to flexibly handle different types and numbers of computing tasks, achieving efficient parallel processing and resource utilization within the computing array. This overcomes the limitations of single computing resources and serial processing in traditional computing methods, improving computing performance and efficiency.

[0084] 6. Dynamic Path Adjustment: During the execution of computational tasks, the decision-making unit can dynamically adjust the computational path based on real-time information such as computational load, computational requirements, and system status to adapt to different task requirements and application scenarios. This enables adaptive and optimized computational paths, improving system performance and energy efficiency.

[0085] The dynamic path adjustment in the workflow of this invention refers to the decision-making unit dynamically adjusting the paths between computational tasks based on actual conditions in each cycle, thereby achieving more flexible and efficient computational path decision-making. Specifically, dynamic path adjustment can include the following aspects:

[0086] Task priority adjustment: The decision-making unit can adjust the priority of tasks based on factors such as urgency and importance, thereby determining which tasks should be executed first in the current round and which tasks can be executed in subsequent rounds, so as to achieve more reasonable task scheduling.

[0087] Computing resource allocation adjustment: The decision-making unit can adjust the allocation strategy of computing resources based on factors such as the load and performance of each computing unit in the computing array. For example, it can allocate computing tasks to idle computing units or transfer computing tasks from heavily loaded computing units to lightly loaded computing units, thereby achieving balanced utilization of computing resources and improving computing efficiency.

[0088] Data transmission path adjustment: The decision-making unit can adjust the data transmission path according to the data dependencies between computing tasks and the data transmission bandwidth, such as selecting the shortest or fastest path for data transmission, thereby reducing data transmission latency and improving data transmission efficiency.

[0089] Anomaly Handling: The decision-making unit can detect anomalies based on the execution status of the computing task and the status of the computing unit. For example, if a computing unit malfunctions or a computing task fails, it can make timely path adjustments, such as reallocating the computing task to other computing units or removing the abnormal computing task from the current path, thereby achieving fault tolerance and stability of the system.

[0090] Through the above dynamic path adjustment strategy, this embodiment can flexibly adjust the execution path of computing tasks according to the actual situation at runtime, thereby maximizing the performance and efficiency of the computing array and adapting to the needs of different types and numbers of computing tasks.

[0091] The technical solutions of the present invention are not limited to the above embodiments. All technical solutions obtained by equivalent substitution fall within the scope of protection claimed by the present invention.

Claims

1. A processor chip architecture with self-decision-making computing path, comprising a computing array consisting of multiple interconnected computing units, wherein the processor chip has a preset first computing path; the first computing path is used to instruct the computing unit that completes the computing subtask to pass the computing task to the next specified computing unit according to the first computing path, and so on, until the computing task is completed. The order in which computational tasks are passed between computational units is the computational path of the control flow, and the order in which computational data is passed between computational units is the computational path of the data flow. Its characteristic is that each computing unit is connected to a corresponding decision-making unit; After the computing unit finishes executing the computing subtask, the corresponding decision unit obtains the information data of the other computing units and makes a decision based on the information data. If the decision unit calculates a better computing scheme, the first computing path is changed to the second computing path, and the computing task or computing data is passed to the next computing unit according to the second computing path. Otherwise, the computation task or computation data will still be passed to the next computation unit according to the first computation path; This process continues until the computation task is completed; The decision-making unit is equipped with an evaluation module for evaluating the selectable computing paths. The evaluation module evaluates the computing paths by summing up the historical computing power consumption of each computing unit in the computing path as a pre-calculated value. The pre-calculated value is the evaluation value, and the one with the best evaluation value is the optimal computing path. The decision-making unit is embedded inside the computing unit, or is set between computing units and spaced apart from each other.

2. The processor chip architecture for self-decision-making of computational paths according to claim 1, characterized in that: It also includes a main control module, which reports the decision to the main control module after the decision-making unit makes a decision.

3. A self-decision-making process for a processor chip architecture with self-decision-making computational paths as described in claim 2, characterized in that: S1. Preset the first computing path and data flow transmission mode of the computing array, and set the decision-making strategy of the decision unit; S2. The computing unit begins to execute the computing task and generates computing results based on the current computing path and data stream transmission method. S3. After the computing unit completes the computing subtask, the corresponding decision unit obtains information data from other computing units and generates a decision based on the decision strategy, determining the optimal computing path. If the optimal computing path is better than the current computing path, the current computing path is changed to the optimal computing path; otherwise, the current computing path remains unchanged. S4. The decision-making unit will pass the computation data, including the computation results, and / or computation tasks to the next computation unit according to the current computation path, and report the decision to the main control module. S5. Repeat steps S2 to S4 until the entire computation task is completed.

4. The self-decision-making process of the processor chip architecture with self-decision-making computational path according to claim 3, characterized in that: After the decision-making unit generates a computation path, it passes the computation task to the next computation unit according to the computation path, forming a control flow computation path. Then, the decision-making unit uses the control flow computation path to pass the computation data to the next computation unit, forming a data flow computation path.

5. The self-decision-making process of the processor chip architecture for self-decision-making of computational paths according to claim 3, characterized in that: The computing unit information data acquired by the decision unit includes computing results, computing status, and computing load; the computing results are the output data after the computing is completed, the computing status is whether computing has occurred, and the computing load is the time / computing power / power consumption consumed in performing the computing.

6. The self-decision-making process of the processor chip architecture with self-decision-making computational path according to claim 3, characterized in that: The decisions generated by the decision-making unit include selecting the next computing unit, updating the computing path, and updating the data stream transmission method.

7. The self-decision-making process of the processor chip architecture for self-decision-making of computational paths according to claim 6, characterized in that: The transmission of the information data selects the optimal transmission path based on factors such as the distance between computing units, communication bandwidth, and communication delay.

8. The self-decision-making process of the processor chip architecture for self-decision-making of computational paths according to claim 7, characterized in that: Data stream transmission methods include direct memory access, network transmission, and high-speed bus transmission.

Citation Information

Patent Citations

  • Data processing module, chip and data processing method

    CN113806285A