A five-phase SiC MOSFET drive controller

Abstract

The application discloses a kind of five-phase SiC Mosfet drive controllers, including main control computer SYS1, running drive algorithm, produce low-voltage PWM signal and external IO communication;PWM drive amplification system SYS3, the low-voltage PWM signal generated to main control computer is buffered, difference driven, isolated amplification, input five-phase half-bridge circuit produces five-phase high-voltage PWM signal and drives five-phase motor to run;Strong electric signal isolation acquisition conditioning system SYS4, strong electric signal is collected and conditioned, and protection function based on strong electric signal is provided;Weak electric signal acquisition conditioning system SYS5, weak electric signal is collected and conditioned, and protection function based on weak electric signal is provided;Multi-voltage isolation power supply system SYS2, function is for the other parts of driver, provide strong and weak electric isolation power supply.The application has complete drive, control, feedback, protection function, and can realize the high-performance high-reliability drive control of five-phase motor.

Description

Technical Field

[0001] This invention relates to the field of motor drive control technology, and in particular to a five-phase SiC MOSFET drive controller. Background Technology

[0002] SiC electronic devices have lower drift layer impedance than Si electronic devices. Therefore, SiC MOSFETs have higher breakdown voltage and lower on-resistance. They can achieve voltage and power performance comparable to Si IGBTs without the need for conductivity modulation via IGBTs, and they do not have the tail current during IGBT turn-off. This results in higher efficiency, less heat dissipation, and easier miniaturization and high-frequency applications. Currently, Si IGBT-based drivers are relatively mature and provide comprehensive protection functions. However, SiC MOSFETs have inherent characteristics different from Si IGBTs, exhibiting poorer short-circuit withstand capability and lower gate-level negative voltage withstand capability. Due to their higher operating frequency, the high-frequency, high-voltage leakage current has a greater impact on surrounding devices and personnel during leakage faults, thus placing higher demands on the performance of the drive and protection circuits.

[0003] Five-phase motors, as a typical multiphase motor, possess the advantages of high reliability, low torque ripple, and low power per phase that multiphase motors offer. They also achieve a good balance between multiphase performance and complexity, thus gaining increasing attention. Electric drive systems that combine SiC MOSFETs with five-phase motors have excellent performance potential. However, mature and complete five-phase motor drivers are still relatively scarce, especially five-phase drivers based on SiC MOSFETs. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a five-phase SiC MOSFET drive controller that provides a five-phase half-bridge drive function based on SiC MOSFET, relatively complete strong and weak current isolation protection, and fault protection functions such as short circuit, overcurrent, overvoltage / undervoltage, and leakage current, so as to realize high-performance and high-reliability drive control of five-phase motors.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A five-phase SiC MOSFET drive controller, including

[0007] The main control computer SYS1 runs the drive algorithm, generates low-voltage PWM signals and external IO communication, including the microcontroller UR5. The microcontroller UR5 runs the application layer program, collects various feedback signals, generates primary PWM drive signals, and receives and generates communication information.

[0008] The PWM drive amplification system SYS3 buffers, differentially drives, isolates and amplifies the low-voltage PWM signal generated by the main control computer, and inputs it into the five-phase half-bridge circuit to generate a five-phase high-voltage PWM signal to drive the five-phase motor.

[0009] The high-voltage signal isolation acquisition and conditioning system SYS4 acquires and conditions high-voltage signals, and, in conjunction with the PWM drive amplification system SYS3, provides protection functions based on high-voltage signals.

[0010] The SYS5 low-voltage signal acquisition and conditioning system acquires and conditions low-voltage signals, and, in conjunction with the main control computer SYS1, provides protection functions based on low-voltage signals.

[0011] The multi-voltage isolated power supply system SYS2, which includes the main control computer SYS1, the PWM drive amplification system SYS3, the high-voltage signal isolation acquisition and conditioning system SYS4, and the low-voltage signal acquisition and conditioning system SYS5, provides power with strong and weak voltage isolation. It includes the low-voltage isolation power supply circuit SYS2.1 and the high-voltage isolation power supply circuit SYS2.2. The low-voltage isolation power supply circuit SYS2.1 is responsible for supplying power to the low-voltage area of ​​the drive controller, and the high-voltage isolation power supply circuit SYS2.2 is responsible for supplying power to the high-voltage area of ​​the drive controller.

[0012] The PWM drive amplification system SYS3 includes a buffer and differential transmission circuit SYS3.1 and a SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2. The buffer and differential transmission circuit SYS3.1 provides buffering and differential drive for the PWM signal and cuts off the PWM output when receiving an abnormal signal. The SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 isolates and amplifies the PWM signal to generate a high-voltage PWM voltage.

[0013] The buffer and differential transmission circuit SYS3.1 includes a trigger UR6, an enabled differential driver UR7, a differential signal line K1, and a differential receiver UR8. When the trigger UR6 receives an abnormal signal pulse, it resets the output enable signal EN, causing the differential driver UR7 to stop working, thereby cutting off the PWM output of the five-phase SiC MOSFET drive controller. The differential driver UR7 is located in the low-voltage area, receives the PWM signal generated by the microcontroller UR5, converts it into a differential signal with a higher current, and transmits it through the differential signal line K1 to the differential receiver UR8 located in the high-voltage area, and then restores the differential signal to a single-ended signal.

[0014] The SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 has hardware short-circuit protection function through reverse parallel input signals. It includes five-phase half-bridge output circuits UR9, UR10, UR11, UR12, and UR13. Each phase output circuit includes output optocoupler isolation drivers U1 and U2 and SiC MOSFETs Q1 and Q2. Optocoupler isolation drivers U1 and U2 are connected in reverse parallel to form the half-bridge drive circuit for each phase. The two SiC MOSFETs form a half-bridge circuit.

[0015] The high-voltage signal isolation acquisition and conditioning system SYS4 includes a current isolation acquisition unit SYS4.1, a current signal conditioning circuit SYS4.2, a voltage isolation acquisition and conditioning circuit SYS4.3, and an abnormal signal generation circuit SYS4.4. The current isolation acquisition unit SYS4.1 isolates and acquires the current signal, the current signal conditioning circuit SYS4.2 conditions the current signal, and the voltage isolation acquisition and conditioning circuit SYS4.3 acquires, isolates, and conditions the voltage signal, which are then output to the abnormal signal generation circuit SYS4.4 and the main control computer SYS1, respectively. The abnormal signal generation circuit SYS4.4 generates an abnormal signal and outputs it to the main control computer SYS1 and the PWM drive amplification system SYS3, enabling the system to cut off the PWM output based on the abnormal signal, thereby providing a protection function.

[0016] The current signal conditioning circuit SYS4.2 includes differential amplifiers U13, U14, U15, U16, and U17, an inverting adder U18, and a reference voltage chip V11. The outputs of the differential amplifiers and the inverting adder U18 are connected to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.4. The differential amplifiers, combined with the reference voltage chip V11, are used to bias and amplify the small positive and negative voltage signals output by the sensor to the voltage range of the feedback signal channel of the microcontroller UR5. The reference voltage chip V11... The reference voltage is provided when the current is 0. The reverse adder U18, together with the reference voltage chip V11, is used to sum and amplify the five-phase current. When the five-phase motor is running normally, the five-phase common-mode current should be 0. If there is no leakage in the electric drive system, the algebraic sum of all phase currents should be 0. The output voltage of the reverse adder U18 should always correspond to 0 current. If leakage occurs, the voltage output by the reverse adder U18 is the leakage current value. The amplification factor of the reverse adder U18 is greater than that of the differential amplifier, depending on the leakage current judgment threshold.

[0017] The voltage isolation acquisition and conditioning circuit SYS4.3 includes a voltage divider resistor R1, a linear optocoupler U12, and a differential amplifier U11. The voltage divider resistor R1 is used to divide and reduce the DC bus voltage generated by the external power DC power supply BT2, and input it to the linear optocoupler U12. The linear optocoupler U12 isolates and converts the signal, and inputs it to the differential amplifier U11 to amplify the signal to the voltage range of the feedback signal channel of the microcontroller UR5. The signal is then output to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.4.

[0018] The abnormal signal generation circuit SYS4.4 includes a voltage divider resistor R2, a pull-up resistor R3, and a comparator array U19. The voltage divider resistor R2 is used to generate the abnormal signal threshold voltage. The output voltages of the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 are input to the comparator array U19. All comparator outputs of the comparator array U19 are open-drain outputs. If the output voltages of the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 do not exceed the abnormal signal threshold voltage range generated by the voltage divider resistor R2, the comparator array U19 will output a low-level signal. Otherwise, it will output a high-level signal from the pull-up resistor R3, indicating that an abnormal signal has occurred in the current or voltage signal. The abnormal signal output by the abnormal signal generation circuit SYS4.4 will be output to the microcontroller UR5 and the buffer and differential transmission circuit SYS3.1. When an abnormal signal occurs, the buffer and differential transmission circuit SYS3.1 will cut off the PWM output.

[0019] The weak current signal acquisition and conditioning system SYS5 includes an encoder decoding circuit UR1 and a thermal resistance excitation acquisition circuit UR2. The encoder decoding circuit UR1 excites and decodes the position sensor of the motor and transmits the position information to the main control computer SYS1. The thermal resistance excitation acquisition circuit UR2 excites and acquires the internal thermal resistance of the motor and transmits the temperature information to the main control computer SYS1.

[0020] The low-voltage isolated power supply circuit SYS2.1 includes a reverse connection and overvoltage protection circuit V1, an isolated power supply V2, and a linear regulator V3. The external DC power supply BT1 is input to the isolated power supply V2 through the reverse connection and overvoltage protection circuit V1 to generate an isolated 5V power supply, which is then stepped down by the linear regulator V3 to generate a 3.3V power supply.

[0021] The high-voltage isolation power supply circuit SYS2.2 includes isolated power supplies V5, V6, V7, V8, and V9 for driving the upper bridge of the SiC MOSFET, isolated power supply V10 for driving the lower bridge of the SiC MOSFET, and high-voltage side isolated power supply V4. High-voltage side isolated power supply V4 provides the necessary TTL level power supply PVCC for the high-voltage side signal acquisition and conditioning circuit.

[0022] The beneficial effects of this invention are: it has relatively complete strong and weak current isolation protection, signal transmission anti-interference capability, hardware short circuit protection function, cuts off PWM output when receiving abnormal signals, and provides overvoltage / undervoltage protection, overcurrent protection and leakage protection functions. Attached Figure Description

[0023] Figure 1 A functional system partitioning diagram for the driver.

[0024] Figure 2 This is the overall schematic diagram of the driver circuit.

[0025] Figure 3 This is a first partial enlarged view of the driver circuit principle.

[0026] Figure 4 This is a second enlarged view of the driver circuit principle.

[0027] Figure 5 This is a third enlarged view of the driver circuit principle. Detailed Implementation

[0028] The present invention will be further described below with reference to the accompanying drawings and specific embodiments:

[0029] like Figures 1-5 As shown, a five-phase SiC MOSFET drive controller is suitable for the drive control of five-phase motors. It provides a five-phase half-bridge drive function based on SiC MOSFETs, giving full play to the potential performance of SiC MOSFETs and five-phase motors. It has relatively complete strong and weak current isolation protection and fault protection functions such as short circuit, overcurrent, overvoltage / undervoltage, and leakage current, so as to achieve high-performance and high-reliability drive control of five-phase motors.

[0030] Reference Figures 1-2 The five-phase SiC MOSFET drive controller includes:

[0031] The main control computer SYS1 is responsible for running the drive algorithm, generating low-voltage PWM signals, and external I / O communication.

[0032] The multi-voltage isolated power supply system SYS2 is designed to provide isolated power to the other parts of the driver, including the main control computer SYS1, the PWM drive amplification system SYS3, the high-voltage signal isolation acquisition and conditioning system SYS4, and the low-voltage signal acquisition and conditioning system SYS5, to support the operation of the entire five-phase SiC MOSFET drive controller.

[0033] The PWM drive amplifier system SYS3 is designed to buffer, differentially drive, and isolate the low-voltage PWM signal generated by the main control computer, and input the five-phase half-bridge circuit to generate a five-phase high-voltage PWM signal to drive the five-phase motor.

[0034] The high-voltage signal isolation acquisition and conditioning system SYS4 is used to acquire and condition high-voltage signals, and in conjunction with the PWM drive amplification system SYS3, it provides protection functions based on high-voltage signals.

[0035] The SYS5 low-voltage signal acquisition and conditioning system is designed to acquire and condition low-voltage signals, and, in conjunction with the SYS1 main control computer, provides protection functions based on these signals.

[0036] The five-phase SiC MOSFET drive controller is divided into a high-voltage area and a low-voltage area, which are distributed on different physical carriers, and the high-voltage and low-voltage areas are completely physically isolated.

[0037] Reference Figures 2-3 The main control computer SYS1 includes a microcontroller UR5, a communication interface UR4, and an external memory UR3. The microcontroller UR5 is the core of the drive controller, responsible for running application-level programs, acquiring feedback signals, generating primary PWM drive signals, and receiving and generating communication information. The communication interface UR4 provides physical layer interface support for external communication. The external memory UR3 stores motor parameters, control parameters, and other information that needs to be stored even when power is off.

[0038] Reference Figure 2 , Figure 4 The multi-voltage isolated power supply system SYS2 includes a low-voltage isolated power supply circuit SYS2.1 and a high-voltage isolated power supply circuit SYS2.2. The low-voltage isolated power supply circuit SYS2.1 is responsible for supplying power to the low-voltage area of ​​the drive controller. The high-voltage isolated power supply circuit SYS2.2 is responsible for supplying power to the high-voltage area of ​​the drive controller.

[0039] Reference Figures 2-5 The PWM drive amplification system SYS3 includes a buffer and differential transmission circuit SYS3.1 and a SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2. The function of the buffer and differential transmission circuit SYS3.1 is to provide buffering and differential drive for the PWM signal and to cut off the PWM output when an abnormal signal is received. The function of the SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 is to isolate and amplify the PWM signal to generate a high-voltage PWM voltage.

[0040] Reference Figure 2 , Figure 4 and Figure 5The high-voltage signal isolation, acquisition, and conditioning system SYS4 includes a current isolation acquisition unit SYS4.1, a current signal conditioning circuit SYS4.2, a voltage isolation acquisition and conditioning circuit SYS4.3, and an abnormal signal generation circuit SYS4.4. The current isolation acquisition unit SYS4.1 isolates and acquires the current signal. The current signal conditioning circuit SYS4.2 conditions the current signal, and the voltage isolation acquisition and conditioning circuit SYS4.3 acquires, isolates, and conditions the voltage signal, which are then output to the abnormal signal generation circuit SYS4.4 and the main control computer SYS1, respectively. The abnormal signal generation circuit SYS4.4 generates an abnormal signal and outputs it to the main control computer SYS1 and the PWM drive amplification system SYS3, causing the system to cut off the PWM output based on the abnormal signal, thereby providing a protection function.

[0041] Reference Figure 2 , Figure 3 and Figure 5 The low-voltage signal acquisition and conditioning system SYS5 includes an encoder decoding circuit UR1 and a resistance temperature detector (RTD) excitation and acquisition circuit UR2. The encoder decoding circuit UR1 excites and decodes the motor's position sensor, transmitting the position information to the main control computer SYS1. The RTD excitation and acquisition circuit UR2 excites and acquires the internal RTD of the motor, transmitting the temperature information to the main control computer SYS1.

[0042] Reference Figure 2 , Figure 3 The buffer and differential transmission circuit SYS3.1 includes a trigger UR6, an enable differential driver UR7, a differential signal line K1, and a differential receiver UR8. When the trigger UR6 receives an abnormal signal pulse, it resets the enable signal EN at its output, causing the differential driver UR7 to stop working. This cuts off the PWM output of the five-phase SiC MOSFET drive controller, thus providing protection. The differential driver UR7, located in the low-voltage area, receives the PWM signal generated by the microcontroller UR5 and converts it into a differential signal with a higher current. This signal is then transmitted through the differential signal line K1 to the differential receiver UR8, located in the high-voltage area. The receiver then restores the differential signal to a single-ended signal, improving the anti-interference capability of signal transmission and preventing internal crosstalk from causing the SiC MOSFET to be falsely turned on or off.

[0043] Reference Figure 2 , Figure 4The SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 has hardware short-circuit protection through reverse parallel input signals. It includes five-phase half-bridge output circuits UR9, UR10, UR11, UR12, and UR13. Each phase output circuit includes output optocoupler isolation drivers U1 and U2 and SiC MOSFETs Q1 and Q2. Optocoupler isolation drivers U1 and U2 are connected in reverse parallel, forming the half-bridge drive circuit for each phase, and the two SiC MOSFETs form the half-bridge circuit. Its function is that only when the upper and lower bridge signals of a phase half-bridge are different will the voltage difference cause one of the optocoupler drivers of that phase half-bridge to output a positive voltage, turning on the corresponding SiC MOSFET. If a phase half-bridge receives a short-circuit signal (i.e., both the upper and lower bridges simultaneously output high-level conduction signals), both the upper and lower half-bridge optocouplers of that phase half-bridge will output negative voltages, stopping the phase half-bridge from working, thus achieving reliable hardware short-circuit protection.

[0044] Reference Figure 2 , Figure 5 The current signal conditioning circuit SYS4.2, the voltage isolation acquisition and conditioning circuit SYS4.3, and the abnormal signal generation circuit SYS4.4 implement the hardware abnormal signal generation function through a hardware comparator array. Combined with the buffer and differential transmission circuit SYS3.1, the PWM output can be automatically cut off after an abnormal signal occurs, thus providing overvoltage / undervoltage protection, overcurrent protection, and leakage protection functions.

[0045] Reference Figure 2 , Figure 4 The current isolation acquisition unit SYS4.1 achieves isolated acquisition of current signals through the physically isolated current sensor U20.

[0046] Reference Figure 2 , Figure 5The current signal conditioning circuit SYS4.2 includes differential amplifiers U13, U14, U15, U16, and U17, an inverting adder U18, and a reference voltage chip V11. The outputs of the differential amplifiers and the inverting adder are connected to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.4. The differential amplifiers, in conjunction with the reference voltage chip V11, amplify the small positive and negative voltage signals output by the sensor to the voltage range of the feedback signal channel of the microcontroller UR5. The reference voltage chip V11 provides a reference voltage when the current is zero. Taking a typical 0–3.3V range as an example, the feedback signal channel of the microcontroller UR5 has a Vref of 1.65V, corresponding to a phase current of zero. The resistor configuration of the differential amplifier determines the amplification factor, which depends on the power rating of the drive controller. The reverse adder U18, in conjunction with the reference voltage chip V11, sums and amplifies the five-phase currents. During normal operation of the five-phase motor, the five-phase common-mode current should be zero. Therefore, if there is no leakage in the drive system, the algebraic sum of all phase currents should be zero, and the output voltage of the reverse adder U18 should always correspond to zero current. If leakage occurs, the voltage output by the reverse adder U18 is the leakage current value. The amplification factor of the reverse adder U18 is greater than that of the differential amplifier, depending on the leakage current detection threshold.

[0047] Reference Figure 2 , Figure 5 The voltage isolation acquisition and conditioning circuit SYS4.3 includes a voltage divider resistor R1, a linear optocoupler U12, and a differential amplifier U11. The voltage divider resistor R1 divides and reduces the DC bus voltage generated by the external DC power supply BT2, and inputs it to the linear optocoupler U12. The linear optocoupler U12 isolates and converts this signal, and inputs it to the differential amplifier U11, amplifying the signal to the voltage range of the feedback signal channel of the microcontroller UR5. The signal is then output to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.4.

[0048] Reference Figure 2 , Figure 5The abnormal signal generation circuit SYS4.4 includes a voltage divider resistor R2, a pull-up resistor R3, and a comparator array U19. The voltage divider resistor R2 generates the abnormal signal threshold voltage. The output voltages of the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 are input to the comparator array U19. All comparator outputs of the comparator array U19 are open-drain outputs. If the output voltages of both the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 do not exceed the abnormal signal threshold voltage range generated by the voltage divider resistor R2, the comparator array U19 will output a low-level signal; otherwise, it will output a high-level signal from the pull-up resistor R3, indicating an abnormal signal in the current or voltage signal. The pull-up resistor R3 provides the output voltage to the open-drain output of the comparator array U19 when no abnormal signal occurs and prevents a short circuit when an abnormal signal occurs.

[0049] Reference Figure 2 , Figure 5 The abnormal signal generated by the SYS4.4 circuit is output to the microcontroller UR5 and the trigger UR6 of the buffer and differential transmission circuit SYS3.1. When an abnormal signal occurs, the trigger UR6 is reset, cutting off the PWM output and achieving overvoltage / undervoltage, overcurrent, and leakage protection. This protection circuit is entirely hardware-based, with a response time as short as microseconds, providing highly reliable and rapid protection.

[0050] Reference Figure 2 , Figure 4 The low-voltage isolation power supply circuit SYS2.1 includes a reverse connection and overvoltage protection circuit V1, an isolation power supply V2, and a linear regulator V3. The external DC power supply BT1 is input to the isolation power supply V2 through the reverse connection and overvoltage protection circuit V1 to generate an isolated 5V power supply. This 5V power supply is then stepped down by the linear regulator V3 to generate a 3.3V power supply. These two power supplies are used to power all circuit devices on the low-voltage side.

[0051] Reference Figure 2 , Figure 4 The high-voltage isolation power supply circuit SYS2.2 includes isolated power supplies V5, V6, V7, V8, and V9 for driving the SiC MOSFET upper bridge, isolated power supply V10 for driving the SiC MOSFET lower bridge, and high-voltage side isolated power supply V4. Because the drain voltages of the five upper bridge MOSFETs in the SiC MOSFET five-phase half-bridge are different, five mutually isolated power supplies are required for driving them separately. However, the drain voltages of the five lower bridge MOSFETs are the same, so a single isolated power supply can be used for unified driving. The high-voltage side isolated power supply V4 mainly provides the necessary TTL level power supply PVCC for the high-voltage side signal acquisition and conditioning circuit.

[0052] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A five-phase SiC MOSFET drive controller, characterized in that, include The main control computer SYS1 runs the drive algorithm, generates low-voltage PWM signals and external IO communication, including the microcontroller UR5. The microcontroller UR5 runs the application layer program, collects various feedback signals, generates primary PWM drive signals, and receives and generates communication information. The PWM drive amplification system SYS3 buffers, differentially drives, isolates and amplifies the low-voltage PWM signal generated by the main control computer, and inputs it into the five-phase half-bridge circuit to generate a five-phase high-voltage PWM signal to drive the five-phase motor. The high-voltage signal isolation acquisition and conditioning system SYS4 acquires and conditions high-voltage signals, and, in conjunction with the PWM drive amplification system SYS3, provides protection functions based on high-voltage signals. The SYS5 low-voltage signal acquisition and conditioning system acquires and conditions low-voltage signals, and, in conjunction with the main control computer SYS1, provides protection functions based on low-voltage signals. The multi-voltage isolated power supply system SYS2, which includes the main control computer SYS1, the PWM drive amplification system SYS3, the high-voltage signal isolation acquisition and conditioning system SYS4, and the low-voltage signal acquisition and conditioning system SYS5, provides power for strong and weak voltage isolation. It includes the low-voltage isolation power supply circuit SYS2.1 and the high-voltage isolation power supply circuit SYS2.

2. The low-voltage isolation power supply circuit SYS2.1 is responsible for supplying power to the low-voltage area of ​​the drive controller, and the high-voltage isolation power supply circuit SYS2.2 is responsible for supplying power to the high-voltage area of ​​the drive controller. The high-voltage signal isolation acquisition and conditioning system SYS4 includes a current isolation acquisition unit SYS4.1, a current signal conditioning circuit SYS4.2, a voltage isolation acquisition and conditioning circuit SYS4.3, and an abnormal signal generation circuit SYS4.

4. The current isolation acquisition unit SYS4.1 isolates and acquires the current signal, the current signal conditioning circuit SYS4.2 conditions the current signal, and the voltage isolation acquisition and conditioning circuit SYS4.3 acquires, isolates, and conditions the voltage signal, which are then output to the abnormal signal generation circuit SYS4.4 and the main control computer SYS1, respectively. The abnormal signal generation circuit SYS4.4 generates an abnormal signal and outputs it to the main control computer SYS1 and the PWM drive amplification system SYS3, so that the system cuts off the PWM output according to the abnormal signal, thereby providing a protection function. The current signal conditioning circuit SYS4.2 includes differential amplifiers U13, U14, U15, U16, and U17, an inverting adder U18, and a reference voltage chip V11. The outputs of the differential amplifiers and the inverting adder U18 are connected to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.

4. The differential amplifiers, combined with the reference voltage chip V11, are used to bias and amplify the small positive and negative voltage signals output by the sensor to the voltage range of the feedback signal channel of the microcontroller UR5. The reference voltage chip V11... The reference voltage is provided when the current is 0. The reverse adder U18, together with the reference voltage chip V11, is used to sum and amplify the five-phase current. When the five-phase motor is running normally, the five-phase common-mode current should be 0. If there is no leakage in the electric drive system, the algebraic sum of all phase currents should be 0. The output voltage of the reverse adder U18 should always correspond to 0 current. If leakage occurs, the voltage output by the reverse adder U18 is the leakage current value. The amplification factor of the reverse adder U18 is greater than that of the differential amplifier, depending on the leakage current judgment threshold. The voltage isolation acquisition and conditioning circuit SYS4.3 includes a voltage divider resistor R1, a linear optocoupler U12, and a differential amplifier U11. The voltage divider resistor R1 is used to divide and reduce the DC bus voltage generated by the external power DC power supply BT2, and input it to the linear optocoupler U12. The linear optocoupler U12 isolates and converts the signal, and inputs it to the differential amplifier U11 to amplify the signal to the voltage range of the feedback signal channel of the microcontroller UR5. The signal is then output to the feedback signal channel of the microcontroller UR5 and the abnormal signal generation circuit SYS4.

4. The abnormal signal generation circuit SYS4.4 includes a voltage divider resistor R2, a pull-up resistor R3, and a comparator array U19. The voltage divider resistor R2 is used to generate the abnormal signal threshold voltage. The output voltages of the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 are input to the comparator array U19. All comparator outputs of the comparator array U19 are open-drain outputs. If the output voltages of the current signal conditioning circuit SYS4.2 and the voltage isolation acquisition and conditioning circuit SYS4.3 do not exceed the abnormal signal threshold voltage range generated by the voltage divider resistor R2, the comparator array U19 will output a low-level signal. Otherwise, it will output a high-level signal from the pull-up resistor R3, indicating that an abnormal signal has occurred in the current or voltage signal. The abnormal signal output by the abnormal signal generation circuit SYS4.4 will be output to the microcontroller UR5 and the buffer and differential transmission circuit SYS3.

1. When an abnormal signal occurs, the buffer and differential transmission circuit SYS3.1 will cut off the PWM output.

2. The five-phase SiC MOSFET drive controller as described in claim 1, characterized in that, The PWM drive amplification system SYS3 includes a buffer and differential transmission circuit SYS3.1 and a SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.

2. The buffer and differential transmission circuit SYS3.1 provides buffering and differential drive for the PWM signal and cuts off the PWM output when receiving an abnormal signal. The SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 isolates and amplifies the PWM signal to generate a high-voltage PWM voltage.

3. The five-phase SiC MOSFET drive controller as described in claim 2, characterized in that, The buffer and differential transmission circuit SYS3.1 includes a trigger UR6, an enabled differential driver UR7, a differential signal line K1, and a differential receiver UR8. When the trigger UR6 receives an abnormal signal pulse, it resets the output enable signal EN, causing the differential driver UR7 to stop working, thereby cutting off the PWM output of the five-phase SiC MOSFET drive controller. The differential driver UR7 is located in the low-voltage area, receives the PWM signal generated by the microcontroller UR5, converts it into a differential signal with a higher current, and transmits it through the differential signal line K1 to the differential receiver UR8 located in the high-voltage area, and then restores the differential signal to a single-ended signal.

4. The five-phase SiC MOSFET drive controller as described in claim 2, characterized in that, The SiC MOSFET five-phase half-bridge isolation drive circuit SYS3.2 has hardware short-circuit protection function through reverse parallel input signals. It includes five-phase half-bridge output circuits UR9, UR10, UR11, UR12, and UR13. Each phase output circuit includes output optocoupler isolation drivers U1 and U2 and SiC MOSFETs Q1 and Q2. Optocoupler isolation drivers U1 and U2 are connected in reverse parallel to form the half-bridge drive circuit for each phase. The two SiC MOSFETs form the half-bridge circuit.

5. A five-phase SiC MOSFET drive controller as described in claim 1, characterized in that, The weak current signal acquisition and conditioning system SYS5 includes an encoder decoding circuit UR1 and a thermal resistance excitation acquisition circuit UR2. The encoder decoding circuit UR1 excites and decodes the position sensor of the motor and transmits the position information to the main control computer SYS1. The thermal resistance excitation acquisition circuit UR2 excites and acquires the internal thermal resistance of the motor and transmits the temperature information to the main control computer SYS1.

6. The five-phase SiC MOSFET drive controller as described in claim 1, characterized in that, The low-voltage isolated power supply circuit SYS2.1 includes a reverse connection and overvoltage protection circuit V1, an isolated power supply V2, and a linear regulator V3. The external DC power supply BT1 is input to the isolated power supply V2 through the reverse connection and overvoltage protection circuit V1 to generate an isolated 5V power supply, which is then stepped down by the linear regulator V3 to generate a 3.3V power supply. The high-voltage isolation power supply circuit SYS2.2 includes isolated power supplies V5, V6, V7, V8, and V9 for SiC MOSFET upper bridge drive, isolated power supply V10 for SiC MOSFET lower bridge drive, and high-voltage side isolated power supply V4. High-voltage side isolated power supply V4 provides the necessary TTL level power supply PVCC for the high-voltage side signal acquisition and conditioning circuit.

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