A modular multilevel converter capacitance monitoring method based on bias error compensation

Abstract

The present invention discloses a capacitance monitoring method for a modular multilevel converter based on bias error compensation. First, the capacitor voltage, arm current, and sub-module switching signals are recorded. When the arm current is greater than 0, the time interval Δt1 from t0 to t1 when the switching signal is equal to 1 is selected. When the arm current is less than 0, the time interval Δt2 from t2 to t3 when the off signal is equal to 1 is selected. The number of switchings of the sub-module is reduced by a voltage balance control method based on the virtual capacitor voltage, which facilitates the selection of the time intervals from t0 to t1 and from t2 to t3. According to the sub-module capacitor voltage, arm current, and sub-module switching signals during t0 to t1 and t2 to t3, the capacitance value is obtained. When using this capacitance value monitoring method, there is no need to stop the machine, and it can be monitored online, effectively eliminating the influence of the sensor measurement bias error on capacitance monitoring, thereby ensuring the accuracy of sub-module capacitance monitoring in the MMC.

Description

Technical Field

[0001] The invention belongs to the technical field of high-power multi-level power electronic converters, and in particular relates to a modular multi-level converter capacitance monitoring method based on bias error compensation. Background Art

[0002] Modular multilevel converter (MMC) has been widely used in medium-voltage and high-power industrial applications in recent years due to its modular structure, flexible scalability, low power device stress, high efficiency and low requirements for filters.

[0003] Since each bridge arm of the MMC contains a large number of sub-modules and a large number of capacitors. During operation, the sub-module capacitors will gradually age and the capacitance value will gradually decrease. If the capacitance value of the electrolytic capacitor drops by 20% or the capacitance value of the metallized film capacitor drops by 5%, it can be considered that the capacitor is damaged. The damage of the capacitor will bring hidden dangers to the safe operation of the MMC. Therefore, it is very important to monitor the capacitance value in real time before the capacitor is damaged. The current capacitance monitoring methods are mainly divided into two categories. One is to estimate the capacitance parameters through the voltage, current and other signals sampled by the system under the abnormal operation of the MMC, such as monitoring the capacitance parameters when the bypass module is running or starting operation. This type of method cannot monitor the capacitance value online in real time. The other type is to estimate the capacitance parameters through the sampled voltage, current and other signals under the normal operation of the MMC. This type of method can realize online real-time monitoring of the capacitance value, and research on this type of method is very necessary. Summary of the invention

[0004] The technical problem to be solved by the present invention is: in view of the problem that the prior art ignores the influence of the offset error measured by the sensor on the capacitance monitoring, a modular multi-level converter capacitance monitoring method based on bias error compensation is provided to better achieve the accuracy of the capacitance monitoring of the sub-module in the modular multi-level converter.

[0005] To solve the above technical problems, the present invention provides the following technical solutions: a modular multilevel converter capacitance monitoring method based on bias error compensation, based on the three phases of the modular multilevel converter each including an upper bridge arm and a lower bridge arm, each of the upper bridge arm and the lower bridge arm includes a plurality of sub-modules of the same number, comprising the following steps:

[0006] S1. Select the capacitance of any submodule for monitoring, implement the voltage balance control method based on the virtual capacitor voltage, and obtain the submodule capacitor voltage, bridge arm current, and submodule switch signal;

[0007] S2, when the bridge arm current is greater than 0, determine the time period when the switch signal is equal to 1, and then calculate the time interval Δt;

[0008] S3, when the bridge arm current is less than 0, determine the time period t2 to t3 when the switch signal is equal to 1 according to the time interval Δt of step S2;

[0009] S4. Calculate the capacitance value according to the capacitance and voltage of the submodule in the first time interval and the second time interval, the bridge arm current, and the submodule switch signal to implement capacitance monitoring of the multi-level converter.

[0010] Furthermore, the voltage balance control method based on the virtual capacitor voltage in the aforementioned step S1 is:

[0011] S101, when the measured value of the capacitor voltage of the monitored submodule SMi Eligible When the virtual capacitor voltage u' is set for all submodules except the monitored submodule SMi cau1 ~u' cauN They are the capacitance voltage measurement values ​​corresponding to the submodules Virtual capacitor voltage u' of the monitored submodule SMi caui Based on the measurement of capacitor voltage Obtained through a zero-order holder; U cmax and U cmin are the maximum and minimum values ​​allowed for the submodule capacitor voltage respectively;

[0012] S102: When the measured value of the capacitor voltage of the detected submodule SMi is Eligible or When setting the virtual capacitor voltage u' of each submodule cau1 ~u' cauN The capacitor voltage measurement value corresponding to the submodule

[0013] S103, the virtual capacitor voltage u' cau1 ~u' cauN Sort from low to high to generate a virtual capacitor voltage sorting list of the submodules; then get the sorting result J of the monitored submodule SMi i (i=1,2...n), where if the voltage u' caui The lowest, then J i =1; if voltage u' caui The highest, then J i =N;

[0014] S104, combined with sorting results J i and the direction of the bridge arm current, and N is input into the bridge arm i Sub-module: bridge arm current i au When greater than 0, the input sequence is 1 to N i Ni sub-module capacitors; in the bridge arm current i au When it is less than 0, it should be sorted as NN i +1~N of N i The sub-module capacitors are then measured, and the sub-module capacitor voltage, bridge arm current, and sub-module switch signal are obtained.

[0015] Furthermore, the aforementioned step S2 is specifically as follows: the bridge arm current i au When greater than 0, based on the switch signal S aui =1 during the time period t0-t1, the time interval Δt is calculated to be Δt=t1-t0.

[0016] Furthermore, the aforementioned step S3 is specifically as follows: the bridge arm current i au When it is less than 0, the switch signal S is determined based on the time interval Δt. aui =1, the time period from t2 to t3 is t3-t2=Δt.

[0017] Furthermore, the aforementioned step S4 is specifically as follows: according to the bridge arm current i in the time periods t0-t1 and t2-t3 au and the switching signal S aui , capacitor voltage u at time t0 caui Capacitor voltage u at (t0) and t1 caui Capacitor voltage u at time (t1) and t2 caui Capacitor voltage u at (t2) and t3 caui (t3), submodule capacitance C aui The calculation is as follows:

[0018]

[0019] Compared with the prior art, the beneficial technical effects of the present invention using the above technical solution are as follows:

[0020] 1. The modular multilevel converter capacitance monitoring method based on bias error compensation proposed in the present invention can effectively eliminate the influence of sensor measurement bias error on capacitance monitoring, thereby ensuring the accuracy of submodule capacitance monitoring in a modular multilevel converter (MMC).

[0021] 2. The modular multilevel converter capacitance monitoring method based on sensor bias error compensation proposed in the present invention does not require shutdown and can be monitored online. It is easy to implement in the existing modular multilevel converter (MMC) system and has strong practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is the three-phase MMC topology and module structure diagram of the present invention;

[0023] Figure 2 The invention is a flow chart of a modular multi-level converter capacitance monitoring method based on bias error compensation.

[0024] Figure 3 It is a schematic diagram of a voltage balance control method based on virtual capacitor voltage of the present invention.

[0025] Figure 4 It is a schematic diagram of a modular multi-level converter capacitance monitoring method based on bias error compensation of the present invention. DETAILED DESCRIPTION

[0026] In order to better understand the technical content of the present invention, specific embodiments are given and described as follows in conjunction with the accompanying drawings.

[0027] Various aspects of the invention are described herein with reference to the accompanying drawings, in which many illustrative embodiments are shown. The embodiments of the invention are not limited to those described in the accompanying drawings. It should be understood that the invention is implemented by any of the various concepts and embodiments described above, as well as the concepts and embodiments described in detail below, because the concepts and embodiments disclosed in the invention are not limited to any implementation. In addition, some aspects disclosed in the invention may be used alone or in any appropriate combination with other aspects disclosed in the invention.

[0028] like Figure 2 As shown, the present invention proposes a modular multilevel converter capacitance monitoring method based on bias error compensation, based on the three phases of the modular multilevel converter each including an upper bridge arm and a lower bridge arm, each of the upper bridge arm and the lower bridge arm includes a plurality of sub-modules of the same number, comprising the following steps:

[0029] S1. Select the capacitance of any submodule for monitoring, implement the voltage balance control method based on the virtual capacitor voltage, and obtain the submodule capacitor voltage u caui , bridge arm current i au , and the submodule switch signal S aui ;

[0030] S2, when the bridge arm current is greater than 0, determine the time period when the switch signal is equal to 1, and then calculate the time interval Δt;

[0031] S3, when the bridge arm current is less than 0, determine the time period t2 to t3 when the switch signal is equal to 1 according to the time interval Δt of step S2;

[0032] S4, according to the first time interval and the second time interval submodule capacitance and voltage u caui , bridge arm current i au , and the submodule switch signal S aui , calculate the capacitance Caui , realizing multi-level converter capacitance monitoring.

[0033] When this capacitance value monitoring method is adopted, there is no need to shut down the machine and online monitoring can be performed, which can effectively eliminate the influence of sensor measurement bias error on capacitance monitoring, thereby ensuring the accuracy of MMC neutron module capacitance monitoring.

[0034] The modular multilevel converter (MMC) topology of the present invention is as follows: Figure 1 As shown, each phase of the MMC includes an upper bridge arm and a lower bridge arm. Each bridge arm includes N identical half-bridge submodules and a bridge arm inductor L. Each submodule includes two power switches T1 and T2, two anti-parallel diodes, and a submodule capacitor C. The DC side voltage of the MMC is U dc .

[0035] As a preferred embodiment of the present invention, reference Figure 3 , the reference wave can be obtained by modulating the frame. i The maximum and minimum values ​​allowed for the submodule capacitor voltage are U cmax and U cmin The measured capacitance voltage of N submodules in one bridge arm is

[0036] Step S1 specifically includes: (1) when When the virtual capacitor voltage u' of N submodules in one bridge arm is cau1 ~u' cauN (u' in the monitored SMi caui Except for For the monitored submodule SMi, the capacitor voltage measurement value It needs to pass through a zero-order holder to obtain the virtual capacitor voltage u' caui , which can reduce the voltage The update frequency of the monitored submodule SMi is reduced, thereby reducing the sorting result J of the monitored submodule SMi. i The update frequency; (2) when or When the virtual capacitor voltage u' of N submodules cau1 ~u' cauN Set to the measured value of the capacitor voltage respectively (3) According to the sorted list of bridge arm current direction and virtual capacitor voltage, the selection of the input submodule can be determined. cau1 ~u' cauN Sort from low to high to generate a sorted list of submodules. Then, the sorting result J of SMi can be obtained i(i=1,2...n), where if the voltage u' caui The lowest, then J i =1; if voltage u' caui The highest, then J i = N. Combine the sorting results J i and the direction of the bridge arm current, we can choose a bridge arm to be put into N i sub-modules. In the bridge arm current i au When it is greater than 0, the input should be sorted from 1 to N i N i sub-module capacitors; in the bridge arm current i au When it is less than 0, the sorting should be NN i +1~N of N i The submodule capacitors.

[0037] refer to Figure 2 as well as Figure 4 Step S2 is as follows: the bridge arm current i au When greater than 0, based on the switch signal S aui =1 during the time period t0-t1, the time interval Δt is calculated to be Δt=t1-t0.

[0038] Step S3 is specifically as follows: S3, when the bridge arm current is less than 0, according to the time interval Δt of step S2, determine the time period t2 to t3 when the switch signal is equal to 1;

[0039] Step S4 is specifically as follows: according to the bridge arm current i in the time periods t0-t1 and t2-t3 au and the switching signal S aui , capacitor voltage u at time t0 caui Capacitor voltage u at (t0) and t1 caui Capacitor voltage u at time (t1) and t2 caui Capacitor voltage u at (t2) and t3 caui (t3), submodule capacitance C aui The calculation is as follows:

[0040]

[0041] Although the present invention has been described above with preferred embodiments, it is not intended to limit the present invention. A person skilled in the art of the present invention may make various modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the definition of the claims.

Claims

1. A modular multilevel converter capacitance monitoring method based on bias error compensation, based on the three phases of the modular multilevel converter each comprising an upper bridge arm and a lower bridge arm, each of the upper bridge arm and the lower bridge arm comprises a plurality of submodules of the same number, characterized in that: The steps include: S1. Select the capacitance of any submodule for monitoring, implement the voltage balance control method based on the virtual capacitor voltage, and obtain the submodule capacitor voltage, bridge arm current, and submodule switch signal; The voltage balance control method based on the virtual capacitor voltage in step S1 is: S101, when the measured value of the capacitor voltage of the monitored submodule SMi Eligible When the virtual capacitor voltage u' is set for all submodules except the monitored submodule SMi cau1 ~u' cauN They are the capacitance voltage measurement values ​​corresponding to the submodules Virtual capacitor voltage u' of the monitored submodule SMi caui Based on the measurement of capacitor voltage Obtained through a zero-order holder; U cmax and U cmin are the maximum and minimum values ​​allowed for the submodule capacitor voltage respectively; S102: When the measured value of the capacitor voltage of the detected submodule SMi is Eligible or When setting the virtual capacitor voltage u' of each submodule cau1 ~u' cauN The capacitor voltage measurement value corresponding to the submodule S103, the virtual capacitor voltage u' cau1 ~u' cauN Sort from low to high to generate a sorted list of virtual capacitor voltages of the submodules; Then the ranking result J of the monitored sub-module SMi is obtained i (i=1,2...n), where if the voltage u' caui The lowest, then J i =1; if voltage u' caui The highest, then J i =N; S104, combined with sorting results J i and the direction of the bridge arm current, and N is input into the bridge arm i Sub-module: bridge arm current i au When greater than 0, the input sequence is 1 to N i N i sub-module capacitors; in the bridge arm current i au When it is less than 0, it should be sorted as NN i +1~N of N i The submodule capacitors are then used to obtain the submodule capacitor voltage, bridge arm current, and submodule switch signal; S2. When the bridge arm current is greater than 0, determine the time period when the switch signal is equal to 1, and then calculate the time interval Δt; the bridge arm current i au When greater than 0, based on the switch signal S aui =1, the time interval Δt is calculated to be Δt=t1-t0; S3, when the bridge arm current is less than 0, determine the time period t2-t3 when the switch signal is equal to 1 according to the time interval Δt of step S2; the bridge arm current i au When it is less than 0, the switch signal S is determined based on the time interval Δt. aui =1, the time period from t2 to t3 is t3-t2=Δt; S4, according to the capacitance and voltage of the submodule in the first time interval and the second time interval, the bridge arm current, and the submodule switch signal, the capacitance value is calculated to realize the capacitance monitoring of the multi-level converter; specifically: According to the bridge arm current i in the time periods t0~t1 and t2~t3 au and the switching signal S aui , capacitor voltage u at time t0 caui Capacitor voltage u at (t0) and t1 caui Capacitor voltage u at time (t1) and t2 caui Capacitor voltage u at (t2) and t3 caui (t3), submodule capacitance C aui The calculation is as follows:

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