Linkage circuit, method for adjusting duty ratio of clock signal, and display panel

Abstract

The present application provides a linkage circuit, a method for adjusting the duty cycle of a clock signal, and a display panel, belonging to the technical field of electronic circuits. The linkage circuit includes a first conversion circuit and a second conversion circuit. Among them, the first conversion circuit is used to convert a first clock square wave signal into a triangular wave signal, and the second conversion circuit is used to convert the triangular wave signal into a second clock square wave signal. Among them, the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. Both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage. Through the designed linkage circuit, the linkage between the VGH voltage and the CLK Duty can be realized, so that by adjusting the VGH voltage, the CLK Duty can be correspondingly adjusted, which can realize the automatic operation of the production line and improve the improvement efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of display devices, and particularly to a linkage circuit, a method for adjusting the duty cycle of a clock signal, and a display panel. Background Art

[0002] Due to fluctuations in the manufacturing process during the actual production of a display panel, defective products with display problems such as Crosstalk and Mura may be produced. For these defective products, they can generally be improved by adjusting the VGH voltage (i.e., the turn-on voltage of the thin-film transistor) and the CLK Duty (the duty cycle of the clock signal).

[0003] However, since the VGH voltage is controlled by the PMIC (Power Management Integrated Circuit), and the CLK Duty is controlled by the Tcon (Timing Controller), the two cannot be linked, and automated operation on the production line cannot be achieved. A large amount of manpower and material resources are required for Rework operations. Summary of the Invention

[0004] The main purpose of the embodiments of the present application is to propose a linkage circuit, a method for adjusting the duty cycle of a clock signal, and a display panel. It is intended that through the design of the linkage circuit, the linkage between the VGH voltage and the CLK Duty can be achieved, so that by adjusting the VGH voltage, the CLK Duty can be correspondingly adjusted, and automated operation on the production line can be realized, improving the improvement efficiency.

[0005] To achieve the above object, a first aspect of the embodiments of the present application proposes a linkage circuit, including a first conversion circuit and a second conversion circuit; a first end of the first conversion circuit is used to access a first clock square wave signal output by a gate driving circuit, a second end of the first conversion circuit is connected to a first end of the second conversion circuit, a second end of the second conversion circuit is used to access the turn-on voltage of a turn-on thin-film transistor, and a third end of the second conversion circuit is used as a voltage output end and is connected to a corresponding scan line;

[0006] The first conversion circuit is used to convert the first clock square wave signal into a triangular wave signal;

[0007] The second conversion circuit is used to convert the triangular wave signal into a second clock square wave signal, wherein the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the rising edge of the second clock square wave signal, the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the falling edge of the second clock square wave signal, and both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage.

[0008] In one embodiment of the present application, the first conversion circuit includes an integrating circuit.

[0009] In one embodiment of the present application, the first conversion circuit includes an operational amplifier and an RC circuit; the RC circuit includes a first resistor and a first capacitor;

[0010] The first end of the first resistor is used to connect to the first clock square wave signal output by the gate driving circuit. The second end of the first resistor is connected to the negative input terminal of the operational amplifier. The second end of the first resistor is also connected to the first end of the first capacitor. The second end of the first capacitor is connected to the output terminal of the operational amplifier. The positive input terminal of the operational amplifier is grounded. The output terminal of the operational amplifier is connected to the first end of the second conversion circuit.

[0011] In one embodiment of the present application, the second conversion circuit includes a first triode, a second triode, a first MOS transistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor;

[0012] The base of the first triode is connected to the second end of the first conversion circuit. The collector of the first triode is connected to the first end of the second resistor. The second end of the second resistor is used to connect to the turn-on voltage. The second end of the second resistor is also connected to the first end of the fifth resistor. The second end of the fifth resistor is connected to the voltage output terminal. The second end of the fifth resistor is also connected to the collector of the second triode. The emitter of the second triode is connected to the emitter of the first triode and then together connected to the first end of the fourth resistor. The second end of the fourth resistor is grounded. The first end of the third resistor is connected between the collector of the first triode and the first end of the second resistor. The second end of the third resistor is connected to the drain of the first MOS transistor. The gate of the first MOS transistor is connected between the second end of the second resistor and the first end of the fifth resistor. The source of the first MOS transistor is connected to the second end of the fourth resistor and then grounded.

[0013] In one embodiment of the present application, the linkage circuit further includes an inverter. The first end of the inverter is connected to the third end of the second conversion circuit. The second end of the inverter is connected to the voltage output terminal;

[0014] The inverter is used to perform an inverting process on the input signal to convert the second clock square wave signal into a third clock square wave signal.

[0015] In one embodiment of the present application, the linkage circuit further includes a control switch. The control switch is connected to the inverter. The control switch is used to control the operation of the inverter.

[0016] To achieve the above object, a second aspect of the embodiments of the present application provides a method for adjusting the duty cycle of a clock signal, the method including:

[0017] Convert a first clock square wave signal output by a gate driving circuit into a triangular wave signal, where the triangular wave signal includes a rising voltage threshold and a falling voltage threshold;

[0018] Convert the triangular wave signal into a second clock square wave signal, where the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal, and both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage of the thin film transistor;

[0019] Adjust the turn-on voltage to correspondingly adjust the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so as to correspondingly adjust the duty cycle of the second clock square wave signal.

[0020] In an embodiment of the present application, the adjusting the turn-on voltage to correspondingly adjust the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so as to correspondingly adjust the duty cycle of the second clock square wave signal includes:

[0021] Increase the turn-on voltage to correspondingly increase the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so as to correspondingly decrease the duty cycle of the second clock square wave signal;

[0022] Or, decrease the turn-on voltage to correspondingly decrease the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so as to correspondingly increase the duty cycle of the second clock square wave signal.

[0023] In an embodiment of the present application, after converting the triangular wave signal into a second clock square wave signal, the method further includes:

[0024] Perform a 180-degree phase inversion process on the second clock square wave signal to obtain a third clock square wave signal, and the duty cycle of the third clock square wave signal is positively correlated with the turn-on voltage.

[0025] To achieve the above object, a third aspect of the embodiments of the present application provides a display panel, including:

[0026] A gate driving circuit;

[0027] The linkage circuit described in the first aspect of the embodiments of the present application, and the linkage circuit is connected to the output end of the gate driving circuit.

[0028] In the technical solution provided by the embodiment of the present application, the linkage circuit includes a first conversion circuit and a second conversion circuit. Among them, the first conversion circuit is used to access the first clock square wave signal output by the gate driving circuit and convert the first clock square wave signal into a triangular wave signal. The second conversion circuit is connected to the first conversion circuit and is used to convert the triangular wave signal into a second clock square wave signal. Among them, the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. Both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage. Through the designed linkage circuit, the linkage between the VGH voltage and the CLK Duty can be realized, so that by adjusting the VGH voltage, the CLK Duty can be correspondingly adjusted, the automatic operation of the production line can be realized, and the improvement efficiency can be improved. Description of the Drawings

[0029] Figure 1 is the structural block diagram of the linkage circuit provided by the embodiment of the present application;

[0030] Figure 2 is the waveform conversion schematic diagram of the first clock square wave signal and the triangular wave signal provided by the embodiment of the present application;

[0031] Figure 3 is the waveform conversion schematic diagram of the triangular wave signal and the second clock square wave signal provided by the embodiment of the present application;

[0032] Figure 4 is the circuit diagram of the linkage circuit provided by the embodiment of the present application;

[0033] Figure 5 is another structural block diagram of the linkage circuit provided by the embodiment of the present application;

[0034] Figure 6 is the waveform conversion schematic diagram of the second clock square wave signal and the third clock square wave signal provided by the embodiment of the present application;

[0035] Figure 7 is the flowchart of the method for adjusting the duty ratio of the clock signal provided by the embodiment of the present application;

[0036] Figure 8 is the step flowchart for adjusting the turn-on voltage to correspondingly adjust the rising voltage threshold and the falling voltage threshold in the triangular wave signal so that the duty ratio of the second clock square wave signal is correspondingly adjusted provided by the embodiment of the present application;

[0037] Figure 9 is the structural block diagram of the display panel provided by the embodiment of the present application.

[0038] Description of the reference numerals in the drawings:

[0039] Linkage circuit - 10; First conversion circuit - 100; Second conversion circuit - 200; Gate drive circuit - 20; Inverter - 300; Control switch - 400. Detailed implementation manners

[0040] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0041] It should be noted that although the functional modules are divided in the device schematic diagram and the logical sequence is shown in the flowchart, in some cases, the steps described or depicted may be executed in a different order from the module division in the device or the sequence in the flowchart. Terms such as "first" and "second" in the specification, claims and the above-mentioned drawings are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0043] Due to fluctuations in the manufacturing process during the actual production of the display panel, there are differences in the film positions in a display panel, which may cause a set of Codes not to cover all film positions, resulting in a large number of downgraded products and greatly affecting the product yield. The defective conditions include H-Crosstalk, H Mura, V Mura, etc. The conventional improvement method is to adjust different VGH voltages (the turn-on voltage of the thin-film transistor) and CLK Duty (the duty cycle of the clock signal). For example, the conventional setting is: VGH = 30V, CLK Duty = 42%. However, this setting may not cover all film positions. For example, when a 27-inch FHD (Full High Definition) display screen has a 10% defective H Mura problem at 100Hz display, by adjusting the setting to: VGH = 24V, CLK Duty = 45%, the product can be successfully upgraded and shipped.

[0044] However, since the VGH voltage is controlled by the PMIC (Power Management Integrated Circuit) and the CLK Duty is controlled by the Tcon (Timing Controller), the two cannot be linked, and it is impossible to achieve automated operation of the production line, and a large amount of manpower and material resources are required for Rework operations.

[0045] Based on this, the present application proposes a linkage circuit, aiming to achieve the linkage between the VGH voltage and the CLK Duty through the design of the linkage circuit, so that by adjusting the VGH voltage, the CLK Duty can be correspondingly adjusted, realizing the automated operation of the production line and improving the improvement efficiency.

[0046] Referring to Figure 1 , Figure 1 is the structural block diagram of the linkage circuit provided by the embodiment of the present application. As shown by Figure 1 , the linkage circuit includes a first conversion circuit 100 and a second conversion circuit 200; the first end of the first conversion circuit 100 is used to access the first clock square wave signal output by the gate driving circuit, the second end of the first conversion circuit 100 is connected to the first end of the second conversion circuit 200, the second end of the second conversion circuit 200 is used to access the turn-on voltage (VGH) of the thin-film transistor, and the third end of the second conversion circuit 200 is used as the voltage output terminal (Vout) and is connected to the corresponding scan line. Among them:

[0047] The first conversion circuit 100 is used to convert the first clock square wave signal into a triangular wave signal; the second conversion circuit 200 is used to convert the triangular wave signal into a second clock square wave signal, where the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal, and both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage.

[0048] Referring to Figure 2 , Figure 2 is the waveform conversion schematic diagram of the first clock square wave signal and the triangular wave signal provided by the embodiment of the present application. As shown by Figure 2 , the first clock square wave signal is the GDL signal (gate driving signal) output by the gate driving circuit. The first conversion circuit 100 is used to convert the first clock square wave signal into a triangular wave signal. Among them, the moment corresponding to the falling edge of the first clock square wave signal corresponds to the moment corresponding to the peak of the triangular wave, and the moment corresponding to the rising edge of the first clock square wave signal corresponds to the moment corresponding to the valley of the triangular wave.

[0049] In an embodiment of the present application, the first conversion circuit 100 can adopt an integration circuit, such as an inverting integration circuit, an RC integration circuit, etc. That is, the integration circuit can convert the first clock square wave signal into a triangular wave signal.

[0050] Referring to Figure 3 , Figure 3 is the waveform schematic diagram of the triangular wave signal and the second clock square wave signal provided by the embodiment of the present application.Figure 3 As shown, the second conversion circuit 200 can convert the triangular wave signal converted by the first conversion circuit 100 into a second clock square wave signal. Among them, the moment corresponding to the rising voltage threshold (V 上升 ) in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold (V 下降 ) in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. And both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) are positively correlated with the turn-on voltage (VGH). That is, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) change with the change of the turn-on voltage (VGH), and when the turn-on voltage (VGH) increases, both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) will increase accordingly. When the turn-on voltage (VGH) decreases, both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) will decrease accordingly.

[0051] In the embodiments of the present application, by connecting the turn-on voltage (VGH) to the second conversion circuit 200, it can be ensured that in the designed linkage circuit, by adjusting the turn-on voltage (VGH), the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal can be adjusted accordingly. And because the moment corresponding to the rising voltage threshold (V 上升 ) in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold (V 下降 ) in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal, that is, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal determine the clock signal duty cycle (CLK Duty) of the second clock square wave signal. Therefore, after correspondingly adjusting the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal, the clock signal duty cycle (CLK Duty) of the second clock square wave signal will also change accordingly. That is, after adjusting the turn-on voltage (VGH), the clock signal duty cycle (CLK Duty) will also change accordingly. The linkage between the turn-on voltage (VGH) and the clock signal duty cycle (CLK Duty) can be realized, and it is not necessary to separately adjust the two, which can improve the adjustment efficiency and thus improve the improvement efficiency.

[0052] Specifically, increasing the turn-on voltage (VGH) can correspondingly increase the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal, thereby correspondingly reducing the clock signal duty cycle (CLK Duty) of the second clock square wave signal. That is, increasing the turn-on voltage (VGH) can correspondingly reduce the clock signal duty cycle (CLK Duty). Reducing the turn-on voltage (VGH) can correspondingly reduce the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal, thereby correspondingly increasing the clock signal duty cycle (CLK Duty) of the second clock square wave signal. That is, reducing the turn-on voltage (VGH) can correspondingly increase the clock signal duty cycle (CLK Duty).

[0053] Referring to Figure 4 , Figure 4 is the circuit diagram of the linkage circuit provided by the embodiment of the present application. As shown in Figure 4 , the first conversion circuit 100 includes an operational amplifier and an RC circuit. The RC circuit includes a first resistor R1 and a first capacitor C1. Among them: the first end of the first resistor R1 is used to connect to the first clock square wave signal output by the gate driving circuit, the second end of the first resistor R1 is connected to the negative input terminal of the operational amplifier, the second end of the first resistor R1 is also connected to the first end of the first capacitor C1, the second end of the first capacitor C1 is connected to the output terminal of the operational amplifier, the positive input terminal of the operational amplifier is grounded, and the output terminal of the operational amplifier is connected to the first end of the second conversion circuit 200.

[0054] The second conversion circuit 200 includes a first triode Q1, a second triode Q2, a first MOS transistor M1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. Among them: the base of the first triode Q1 is connected to the second end of the first conversion circuit 100, the collector of the first triode Q1 is connected to the first end of the second resistor R2, the second end of the second resistor R2 is used to connect to the turn-on voltage (VGH), the second end of the second resistor R2 is also connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected to the voltage output terminal Vout, the second end of the fifth resistor R5 is also connected to the collector of the second triode Q2, the emitter of the second triode Q2 is connected to the emitter of the first triode Q1 and then together connected to the first end of the fourth resistor R4, the second end of the fourth resistor R4 is grounded, the first end of the third resistor R3 is connected between the collector of the first triode Q1 and the first end of the second resistor R2, the second end of the third resistor R3 is connected to the drain of the first MOS transistor M1, the gate of the first MOS transistor M1 is connected between the second end of the second resistor R2 and the first end of the fifth resistor R5, and the source of the first MOS transistor M1 is connected to the second end of the fourth resistor R4 and then grounded.

[0055] In the embodiment of the present application, in the initial state, the positive input terminal of the operational amplifier is grounded and there is no output. At this time, the potential at point C is ground (i.e., 0). When the voltage of the first clock square wave signal is positive, current flows through the first resistor R1. Due to the characteristic that the positive input terminal is grounded, the current cannot flow in. Therefore, the current charges the first capacitor C1, and the potential at point C will gradually rise.

[0056] When the voltage of the first clock square wave signal is negative, the current will reverse, and the charge stored in the first capacitor C1 will be gradually released, and the potential at point C will gradually decrease. And the rate of rise and fall of the potential at point C is determined by the delay generated by RC (resistance-capacitance). Finally, after passing through the first conversion circuit 100 shown in Figure 4 , the first clock square wave signal can be converted into Figure 2 the triangular wave waveform shown. That is, the waveform of C is like Figure 2 the triangular wave waveform shown.

[0057] The triangular wave signal corresponding to the potential at point C is used as the input of the second conversion circuit 200, and the second conversion circuit 200 is used to convert the triangular wave signal into a second clock square wave signal. Specifically, under the initial conditions, the input of the second conversion circuit 200 is 0, that is, the base voltage of the first triode Q1 (i.e., the voltage at point C) is 0. At this time, since U be <V th1 , the first triode Q1 is cut off. Since the turn-on voltage (VGH) is divided by the second resistor R2 and the third resistor R3, the voltage at point A will be relatively large. At this time, the second triode Q2 will conduct, and the voltage output terminal Vout outputs a low level. At this time, the voltage at point E is: V E =V A -V th2 . As the voltage at point C gradually increases, when it rises higher than the voltage at point E by V th1 , that is, when V C ≥V E +V th1 , the first triode Q1 will conduct. At this time, it will cause the voltage at point A to gradually decrease (equivalent to adding an extra branch to divide the voltage), so that the second triode Q2 will be cut off. At this time, the output of the voltage output terminal Vout will gradually rise, and the potential at point E will also gradually decrease. That is to say, when the voltage at point C gradually increases and rises higher than the voltage at point E by V th1 , that is, when V C ≥V E +V th1 =V A -V th2 +V th1 , that is, when V C ≥V A -V th2 +V th1When the first triode Q1 conducts and the second triode Q2 cuts off, the output of the voltage output terminal Vout will slowly rise. At the moment when the first triode Q1 conducts, the second resistor R2, the third resistor R3, and the first MOS transistor M1 are in series, and the voltage at point A can be calculated as: Thus, the forward conduction voltage at point C can be obtained as: where M1 is the resistance value of the first MOS transistor M1, V th1 is the threshold voltage of the first triode Q1, and V th2 is the threshold voltage of the second triode Q2.

[0058] When the potential at point C gradually decreases and drops below the voltage at point E by V th1 , that is, when V C ≤V E +V th1 , the first triode Q1 cuts off. At this time, the voltage at point A is relatively large, and the second triode Q2 will conduct. At this time, V A -V E ≥V th2 , and the output of the voltage output terminal Vout will slowly drop. That is to say, when the voltage at point C gradually decreases and drops below the voltage at point E by V th1 , that is, when V C ≤V E +V th1 =V A -V th2 +V th1 , that is, when V C ≤V A -V th2 +V th1 , the first triode Q1 cuts off, the second triode Q2 conducts, and the output of the voltage output terminal Vout will slowly drop. At the moment when the second triode Q2 conducts, the voltage at point A can be calculated through the circuit connection relationship as: Thus, the reverse conduction voltage at point C can be obtained as: where M1 is the resistance value of the first MOS transistor M1, V th1 is the threshold voltage of the first triode Q1, and V th2 is the threshold voltage of the second triode Q2.

[0059] As described above, when the voltage at point C gradually rises from 0 to the forward conduction voltage V C+ of point C, the output of the voltage output terminal Vout remains at a low level continuously. When the voltage at point C continues to rise and exceeds the forward conduction voltage V C+ of point C, the output of the voltage output terminal Vout begins to become a high level. When the voltage at point C rises to the highest point and gradually drops to less than the reverse conduction voltage V C-During this period, the voltage output terminal Vout outputs a continuously high level. When the voltage at point C continues to drop to the lowest point and gradually rises to the forward conduction voltage V of point C C+ During this period, the voltage output terminal Vout outputs a continuously low level. That is, the forward conduction voltage V of point C C+ is the rising voltage threshold in the triangular wave signal (V 上升 ), and the negative conduction voltage V of point C C- is the falling voltage threshold in the triangular wave signal (V 下降 ). During the rising voltage threshold (V 上升 ) to the falling voltage threshold (V 下降 ), the corresponding voltage output terminal Vout outputs a high level. During the falling voltage threshold (V 下降 ) to the rising voltage threshold (V 上升 ), the corresponding voltage output terminal Vout outputs a low level. Finally, the triangular wave signal corresponding to the potential of point C passes through Figure 4 the second conversion circuit 200 shown and can be converted into Figure 3 the second clock signal waveform shown.

[0060] In the embodiments of the present application, referring to Figure 3 , the moment corresponding to the rising voltage threshold (V 上升 ) in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold (V 下降 ) in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. That is, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal determine the clock signal duty cycle (CLK Duty) of the second clock square wave signal. And according to the formula , it can be known that the rising voltage threshold (V 上升 ) in the triangular wave signal is proportional to the turn-on voltage (VGH). According to the formula , it can be known that the falling voltage threshold (V 下降 ) in the triangular wave signal is proportional to the turn-on voltage (VGH). Therefore, in the embodiments of the present application, if the turn-on voltage (VGH) is increased, both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) will increase, and then the clock signal duty cycle (CLK Duty) of the second clock square wave signal will decrease. If the turn-on voltage (VGH) is decreased, both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) will decrease, and then the clock signal duty cycle (CLK Duty) of the second clock square wave signal will increase.

[0061] Referring toFigure 5 , Figure 5 is another structural block diagram of the linkage circuit provided by the embodiments of the present application. As shown by Figure 5 , the linkage circuit includes a first conversion circuit 100 and a second conversion circuit 200; the first end of the first conversion circuit 100 is used to access a first clock square wave signal output by a gate driving circuit, the second end of the first conversion circuit 100 is connected to the first end of the second conversion circuit 200, the second end of the second conversion circuit 200 is used to access a turn-on voltage (VGH) for turning on a thin film transistor, and the third end of the second conversion circuit 200 is used as a voltage output terminal (Vout) and is connected to a corresponding scan line. The linkage circuit further includes an inverter 300, the first end of the inverter 300 is connected to the third end of the second conversion circuit 200, and the second end of the inverter 300 is connected to the voltage output terminal Vout. Among them, the inverter 300 is used to perform an inverting process on an input signal (i.e., the second clock square wave signal) to convert the second clock square wave signal into a third clock square wave signal.

[0062] Referring to Figure 6 , Figure 6 is a waveform conversion schematic diagram of the second clock square wave signal and the third clock square wave signal provided by the embodiments of the present application. As shown by Figure 6 , in the embodiments of the present application, the inverter 300 can perform a 180-degree phase inversion process on the second clock square wave signal, so that the duty cycle (CLK Duty) of the obtained third clock square wave signal is positively correlated with the turn-on voltage (VGH). That is, when the turn-on voltage (VGH) is increased, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) can be correspondingly increased, so that the duty cycle (CLK Duty) of the third clock square wave signal is correspondingly increased. When the turn-on voltage (VGH) is decreased, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) can be correspondingly decreased, so that the duty cycle (CLK Duty) of the third clock square wave signal is correspondingly decreased.

[0063] In the embodiments of the present application, since the duty cycle (CLK Duty) of the second clock square wave signal is negatively correlated with the turn-on voltage (VGH), that is, when it is necessary to increase the turn-on voltage (VGH) but decrease the duty cycle (CLK Duty), or when it is necessary to decrease the turn-on voltage (VGH) but increase the duty cycle (CLK Duty), the linkage circuit shown by Figure 1 can be used to implement. And since the duty cycle (CLK Duty) of the third clock square wave signal is positively correlated with the turn-on voltage (VGH), that is, when it is necessary to increase the turn-on voltage (VGH) and the duty cycle (CLK Duty) simultaneously, or when it is necessary to decrease the turn-on voltage (VGH) and the duty cycle (CLK Duty) simultaneously, the linkage circuit shown byFigure 5 It is implemented by the linkage circuit shown below.

[0064] Continue to refer to Figure 5 , the linkage circuit further includes a control switch 400, the control switch 400 is connected to the inverter 300, and the control switch 400 is used to control the operation of the inverter 300.

[0065] In the embodiment of the present application, by controlling the switch of the control switch 400, it is possible to control the input of the second clock square wave signal or the third clock square wave signal to the corresponding scan line. Specifically, when it is necessary to increase the turn-on voltage (VGH) and the duty cycle (CLKDuty) simultaneously, or when it is necessary to decrease the turn-on voltage (VGH) and the duty cycle (CLK Duty) simultaneously, the control switch can be controlled to conduct, so that the inverter 300 operates to convert the second clock square wave signal into a third clock square wave signal and input the third clock square wave signal to the corresponding scan line. At this time, by increasing the turn-on voltage (VGH), the duty cycle (CLK Duty) of the third clock square wave signal can be increased accordingly; by decreasing the turn-on voltage (VGH), the duty cycle (CLK Duty) of the third clock square wave signal can be decreased accordingly. When it is necessary to increase the turn-on voltage (VGH) but decrease the duty cycle (CLK Duty), or when it is necessary to decrease the turn-on voltage (VGH) but increase the duty cycle (CLK Duty), the control switch can be controlled to disconnect, so that the inverter 300 does not operate and the second clock square wave signal is input to the corresponding scan line. At this time, by increasing the turn-on voltage (VGH), the duty cycle (CLK Duty) of the second clock square wave signal can be decreased accordingly; by decreasing the turn-on voltage (VGH), the duty cycle (CLK Duty) of the second clock square wave signal can be increased accordingly.

[0066] Refer to Figure 7 , Figure 7 is a flowchart of the method for adjusting the duty cycle of the clock signal provided by the embodiment of the present application, including but not limited to steps S710 to S730.

[0067] Step S710, convert the first clock square wave signal output by the gate driving circuit into a triangular wave signal, and the triangular wave signal includes a rising voltage threshold and a falling voltage threshold.

[0068] In the embodiment of the present application, first convert the first clock square wave signal output by the gate driving circuit into a triangular wave signal, where the triangular wave signal includes a rising voltage threshold and a falling voltage threshold, and the moment corresponding to the falling edge of the first clock square wave signal corresponds to the moment corresponding to the peak of the triangular wave, and the moment corresponding to the falling edge of the first clock square wave signal corresponds to the moment corresponding to the peak of the triangular wave, and the moment corresponding to the rising edge of the first clock square wave signal corresponds to the moment corresponding to the trough of the triangular wave.

[0069] In the embodiment of the present application, the first clock square wave signal output by the gate driving circuit can be first converted into a triangular wave signal through a conversion circuit, and the moment corresponding to the falling edge of the first clock square wave signal corresponds to the moment corresponding to the peak of the triangular wave. The moment corresponding to the falling edge of the first clock square wave signal corresponds to the moment corresponding to the peak of the triangular wave, and the moment corresponding to the rising edge of the first clock square wave signal corresponds to the moment corresponding to the trough of the triangular wave.

[0070] In the embodiment of the present application, the conversion circuit can be the first conversion circuit 100 proposed in any embodiment of the present application. For example, the conversion circuit can be an integration circuit. It should be noted that in the embodiment of the present application, the first clock square wave signal output by the gate driving circuit can also be converted into a triangular wave signal by other circuits such as an integration operation circuit, and the present application does not limit this conversion form.

[0071] Step S720: Convert the triangular wave signal into a second clock square wave signal, where the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. Both the rising voltage threshold and the falling voltage threshold are positively correlated with the turn-on voltage of the thin film transistor.

[0072] In the embodiment of the present application, after converting the first clock square wave signal output by the gate driving circuit into a triangular wave signal, the triangular wave signal is further converted into a second clock square wave signal through a conversion circuit. Among them, the moment corresponding to the rising voltage threshold (V 上升 ) in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, and the moment corresponding to the falling voltage threshold (V 下降 ) in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal. That is, during the conversion process, the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal determine the clock signal duty cycle (CLK Duty) of the second clock square wave signal. And the turn-on voltage (VGH) of the turn-on thin film transistor is designed in the conversion circuit to determine the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal. Specifically, it is designed that both the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) are positively correlated with the turn-on voltage (VGH). Therefore, by adjusting the turn-on voltage (VGH), the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降), so that the clock signal duty ratio (CLK Duty) of the second clock square wave signal can be further adjusted accordingly.

[0073] In the embodiments of the present application, the conversion circuit may be the second conversion circuit 200 proposed in any embodiment of the present application. It should be noted that in the embodiments of the present application, the triangular wave signal may also be converted into the second clock square wave signal through other circuit forms, and the embodiments of the present application do not limit this conversion form.

[0074] Step S730: Adjust the turn-on voltage or turn-off voltage to correspondingly adjust the rising voltage threshold and falling voltage threshold in the triangular wave signal, so that the duty ratio (CLK Duty) of the second clock square wave signal is correspondingly adjusted.

[0075] In the embodiments of the present application, since in the conversion design process, it is designed that the falling voltage threshold (V 上升 ) and the rising voltage threshold (V 下降 ) in the triangular wave signal are determined by the turn-on voltage (VGH) of the thin-film transistor, and the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal are used to determine the clock signal duty ratio (CLK Duty) of the second clock square wave signal. Therefore, by adjusting the turn-on voltage (VGH), the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal can be correspondingly adjusted, so that the duty ratio (CLK Duty) of the second clock square wave signal is correspondingly adjusted.

[0076] Refer to Figure 8 , Figure 8 is a step flow chart for adjusting the turn-on voltage to correspondingly adjust the rising voltage threshold and falling voltage threshold in the triangular wave signal, so that the duty ratio of the second clock square wave signal is correspondingly adjusted provided by the embodiments of the present application, including but not limited to steps S810 to S820.

[0077] Step S810: Increase the turn-on voltage to correspondingly increase the rising voltage threshold and falling voltage threshold in the triangular wave signal, so that the duty ratio of the second clock square wave signal is correspondingly reduced;

[0078] Step S820: Alternatively, decrease the turn-on voltage to correspondingly decrease the rising voltage threshold and falling voltage threshold in the triangular wave signal, so that the duty ratio of the second clock square wave signal is correspondingly increased.

[0079] In the embodiments of the present application, since the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降) is positively correlated with the turn-on voltage (VGH) of the thin-film transistor. Thus, by adjusting the turn-on voltage (VGH), the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal can be correspondingly adjusted, so that the duty cycle of the second clock square wave signal is correspondingly adjusted. Specifically, increasing the turn-on voltage (VGH) can correspondingly increase the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal, making the duty cycle of the second clock square wave signal decrease correspondingly. Decreasing the turn-on voltage (VGH) can correspondingly decrease the rising voltage threshold (V 上升 ) and the falling voltage threshold (V 下降 ) in the triangular wave signal, making the duty cycle of the second clock square wave signal increase correspondingly.

[0080] In an embodiment of the present application, after converting the triangular wave signal into the second clock square wave signal, the second clock square wave signal can also be subjected to a 180-degree phase inversion process to obtain a third clock square wave signal, and the duty cycle of the third clock square wave signal is negatively correlated with the turn-on voltage.

[0081] In the embodiment of the present application, the second clock square wave signal can be first converted into a third clock square wave signal through a conversion circuit, and the phase of the third clock square wave signal is 180 degrees different from the phase of the second clock square wave signal.

[0082] In the embodiment of the present application, the conversion circuit can be the inverter 300 proposed in any embodiment of the present application. It should be noted that in the embodiment of the present application, the second clock square wave signal can also be converted into a third clock square wave signal through other circuit methods, and the present application embodiment does not limit this conversion form.

[0083] Referring to Figure 9 , the embodiment of the present application provides a display panel, including: a gate driving circuit 20 and the linkage circuit 10 provided in any embodiment of the present application, wherein the gate driving circuit 20 is used to output a first clock square wave signal. The linkage circuit 10 is connected to the output end of the gate driving circuit 20 and is used to first convert the first clock square wave signal into a triangular wave signal through a first conversion circuit 100, and then convert the triangular wave signal into a second clock square wave signal through a second conversion circuit 200. Among them, since the linkage circuit can realize the linkage between the VGH voltage and the CLK Duty, the display panel can correspondingly adjust the CLK Duty by adjusting the VGH voltage, which can realize the automated operation of the production line and improve the improvement efficiency.

[0084] The embodiments described in the embodiments of the present application are to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation to the technical solutions provided by the embodiments of the present application. Those skilled in the art will know that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.

[0085] Those skilled in the art can understand that the technical solutions shown in the figures do not constitute a limitation to the embodiments of the present application, and may include more or fewer steps than those shown, or combine certain steps, or different steps.

[0086] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0087] Those of ordinary skill in the art can understand that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, and their appropriate combinations.

[0088] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0089] It should be understood that in this application, "at least one (item)" means one or more, and "a plurality" means two or more. "And / or" is used to describe the association relationship of associated objects and indicates that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist at the same time. Among them, A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single items (items) or plural items (items). For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0090] In several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the above-mentioned division of units is only a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of devices or units can be in electrical, mechanical or other forms.

[0091] The units described above as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place, or they can be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0092] In addition, in each embodiment of this application, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0093] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes: various media that can store programs, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks, or optical discs.

[0094] The preferred embodiments of the embodiments of this application have been described above with reference to the accompanying drawings, which does not limit the scope of the rights of the embodiments of this application. Any modifications, equivalent replacements, and improvements made by those skilled in the art without departing from the scope and essence of the embodiments of this application shall be within the scope of the rights of the embodiments of this application.

Claims

1. A linkage circuit, characterized in that: It includes a first conversion circuit and a second conversion circuit; the first end of the first conversion circuit is used to access the first clock square wave signal output by the gate driving circuit, the second end of the first conversion circuit is connected to the first end of the second conversion circuit, the second end of the second conversion circuit is used to access the turn-on voltage of the thin film transistor, and the third end of the second conversion circuit is connected to the corresponding scan line as a voltage output end; The first conversion circuit is used to convert the first clock square wave signal into a triangle wave signal; The second conversion circuit is used to convert the triangular wave signal into a second clock square wave signal, wherein the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal, and the rising voltage threshold and the falling voltage threshold are both positively correlated with the start voltage; The second conversion circuit includes a first triode, a second triode, a first MOS tube, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The base of the first transistor is connected to the second end of the first conversion circuit, the collector of the first transistor is connected to the first end of the second resistor, the second end of the second resistor is used to access the start-up voltage, the second end of the second resistor is also connected to the first end of the fifth resistor, the second end of the fifth resistor is connected to the voltage output end, the second end of the fifth resistor is also connected to the collector of the second transistor, the emitter of the second transistor is connected to the emitter of the first transistor and then connected to the first end of the fourth resistor, the second end of the fourth resistor is grounded, the first end of the third resistor is connected between the collector of the first transistor and the first end of the second resistor, the second end of the third resistor is connected to the drain of the first MOS tube, the gate of the first MOS tube is connected between the second end of the second resistor and the first end of the fifth resistor, and the source of the first MOS tube is connected to the second end of the fourth resistor and then grounded.

2. The linkage circuit according to claim 1, characterized in that: The first conversion circuit includes an integration circuit.

3. The linkage circuit according to claim 1 or 2, characterized in that: The first conversion circuit includes an operational amplifier and an RC circuit; the RC circuit includes a first resistor and a first capacitor; The first end of the first resistor is used to access the first clock square wave signal output by the gate drive circuit, the second end of the first resistor is connected to the negative input terminal of the operational amplifier, the second end of the first resistor is also connected to the first end of the first capacitor, the second end of the first capacitor is connected to the output terminal of the operational amplifier, the positive input terminal of the operational amplifier is grounded, and the output terminal of the operational amplifier is connected to the first end of the second conversion circuit.

4. The linkage circuit according to claim 1, characterized in that: The linkage circuit further includes an inverter, a first end of the inverter is connected to the third end of the second conversion circuit, and a second end of the inverter is connected to the voltage output end; The inverter is used to perform inversion processing on the input signal to convert the second clock square wave signal into a third clock square wave signal.

5. The linkage circuit according to claim 4, characterized in that: The linkage circuit further includes a control switch, which is connected to the inverter and is used to control the operation of the inverter.

6. A method for adjusting the duty cycle of a clock signal, characterized in that: The method is performed by the linkage circuit according to any one of claims 1 to 5, and comprises: Converting a first clock square wave signal output by the gate driving circuit into a triangular wave signal, wherein the triangular wave signal includes a rising voltage threshold and a falling voltage threshold; Converting the triangular wave signal into a second clock square wave signal, wherein the moment corresponding to the rising voltage threshold in the triangular wave signal corresponds to the moment corresponding to the rising edge of the second clock square wave signal, the moment corresponding to the falling voltage threshold in the triangular wave signal corresponds to the moment corresponding to the falling edge of the second clock square wave signal, and the rising voltage threshold and the falling voltage threshold are both positively correlated with the turn-on voltage of the thin film transistor; The start-up voltage is adjusted to correspondingly adjust the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so that the duty cycle of the second clock square wave signal is adjusted accordingly.

7. The method according to claim 6, characterized in that The step of adjusting the start-up voltage to correspondingly adjust the rising voltage threshold and the falling voltage threshold in the triangular wave signal so that the duty cycle of the second clock square wave signal is adjusted accordingly includes: Increasing the start-up voltage to correspondingly increase the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so that the duty cycle of the second clock square wave signal is correspondingly reduced; Alternatively, the start-up voltage is reduced to correspondingly reduce the rising voltage threshold and the falling voltage threshold in the triangular wave signal, so that the duty cycle of the second clock square wave signal is correspondingly increased.

8. The method according to claim 6, characterized in that After converting the triangular wave signal into a second clock square wave signal, the method further includes: The second clock square wave signal is subjected to 180-degree phase inversion processing to obtain a third clock square wave signal, and the duty cycle of the third clock square wave signal is positively correlated with the start-up voltage.

9. A display panel, characterized in that: include: Gate drive circuit; The linkage circuit according to any one of claims 1 to 5, wherein the linkage circuit is connected to the output end of the gate drive circuit.

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