A multi-port DC / AC parallel system and its zero-sequence circulating current suppression method

Abstract

The present invention relates to a multi-port DC / AC parallel system and a zero-sequence circulating current suppression method thereof. The system includes at least two dual-DC-port asymmetric three-level grid-connected inverters that share high and low voltage DC busbars. The method includes: sampling the three-phase output current of any inverter to obtain zero-sequence circulating current, and sampling the DC voltage on the DC side of the parallel system to form an asymmetric carrier; generating a zero-sequence voltage component; obtaining a reference sinusoidal modulation wave, multiplying the DC side power control parameter by the zero-sequence component and injecting it into the reference sinusoidal wave to obtain an initial modulation wave; adding the zero-sequence voltage component to the initial modulation wave of each inverter respectively to obtain an improved modulation wave, combining the asymmetric carrier and the improved modulation wave to generate a drive signal of the inverter to achieve circulating current suppression. Compared with the prior art, the present invention can effectively reduce the circulating current between the dual-DC-port parallel inverters, balance stress, improve efficiency, and enhance the stability of the system.

Description

Technical Field

[0001] The present invention relates to the intersection of power electronics technology and power systems, and in particular to a multi-port DC / AC parallel system and a zero-sequence circulating current suppression method thereof. Background Art

[0002] As energy crisis and environmental problems intensify, the role of renewable energy in modern power grids continues to become more prominent. As one of the options for clean renewable energy, solar photovoltaic power generation is affected by natural conditions and faces intermittent and volatile problems. In order to solve these problems, photovoltaic energy storage integrated system is regarded as an effective solution to smooth photovoltaic power fluctuations.

[0003] With the trend of high integration and high efficiency, the single-stage multi-port inverter structure has attracted much attention. This structure can simultaneously connect the photovoltaic, battery and AC side through a single-stage converter, avoiding the low efficiency problem of the traditional multi-stage converter system, and becoming an ideal choice for high-efficiency inverter (DC / AC) power conversion.

[0004] The dual DC port three-phase three-level grid-connected system uses an asymmetric three-level inverter as the basic module. The asymmetric three-level inverter has the advantages of small harmonics, low switch stress, and integrated access to photovoltaic and energy storage. However, as the system capacity increases, a single inverter can no longer meet actual needs, and multiple inverters are often required to be connected in parallel to achieve the expansion goal.

[0005] However, due to the differences in circuit parameters and given reference quantities of multiple inverters, zero-sequence circulating current will be generated in the multi-port inverter parallel system, which may cause problems such as uneven system stress, increased losses, and reduced efficiency. Therefore, it is of great significance to conduct in-depth research on the suppression method of zero-sequence circulating current in the dual DC port three-phase three-level grid-connected system. Summary of the invention

[0006] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and to provide a zero-sequence circulating current suppression method and a parallel system for a multi-port DC / AC parallel system. The zero-sequence circulating current is suppressed by a zero-sequence voltage component injection method, and the method has the advantages of small zero-sequence circulating current and simple implementation.

[0007] The purpose of the present invention can be achieved by the following technical solutions:

[0008] A method for suppressing zero-sequence circulating current in a multi-port DC / AC parallel system, the method being applied to a parallel system including at least two dual-DC-port asymmetric three-level grid-connected inverters sharing a high- and low-voltage DC bus, comprising the following steps:

[0009] Sampling the three-phase output current of any of the inverters to obtain a zero-sequence circulating current, and sampling the DC voltage on the DC side of the parallel system to form an asymmetric carrier;

[0010] The zero-sequence circulating current is passed through a PI regulator to generate a zero-sequence voltage component;

[0011] The reference sinusoidal modulation wave is obtained by double closed-loop control of the AC side voltage and current, and the DC side power control parameter K is multiplied by the zero-sequence voltage component and injected into the reference sinusoidal wave to obtain the initial modulation wave;

[0012] The zero-sequence voltage component is added to the initial modulation wave of each inverter to obtain an improved modulation wave, and the asymmetric carrier and the improved modulation wave are combined to generate a drive signal for the inverter to achieve circulating current suppression.

[0013] Further, the forming of an asymmetric carrier specifically includes:

[0014] Sampling the battery voltage U on the DC side of the parallel system L and photovoltaic voltage U H , calculate and obtain the dividing line α of the asymmetric upper and lower carriers to form the asymmetric carrier.

[0015] Furthermore, the generating of the zero-sequence voltage component by the zero-sequence circulating current through the PI regulator specifically includes:

[0016] The zero-sequence circulating current and the zero-sequence circulating current target given value are subtracted to obtain an error current that tracks the zero-sequence circulating current. The error current is fed back to the PI regulator to obtain a zero-sequence voltage component.

[0017] Furthermore, MPPT control is adopted on the DC side to make the photovoltaic work at the maximum power point, and the DC side power control parameter K is determined.

[0018] Furthermore, the DC side power control parameter K is in the range of [-1, 1].

[0019] Furthermore, when the zero-sequence voltage component is injected into the initial modulation wave, if a negative zero-sequence component is injected, the maximum zero-sequence component that can be injected is -1-M min ; If the positive zero sequence component is injected, the maximum zero sequence component that can be injected is -1+M max , where M min =min(M A , M B , M C ), M max =max(M A , M B , M C ), M A 、M B 、M C They are three-phase modulation waves A, B, and C respectively.

[0020] Furthermore, the asymmetric carrier and the improved modulation wave are combined to generate the driving signal using a CBPWM modulation algorithm.

[0021] The present invention also provides a computer-readable storage medium, comprising one or more programs for execution by one or more processors of an electronic device, wherein the one or more programs include instructions for executing the zero-sequence circulating current suppression method as described above.

[0022] The present invention also provides a controller, comprising:

[0023] At least one processor and a memory communicatively connected to the at least one processor, the memory storing instructions executable by the at least one processor, the instructions being executed by the at least one processor so that the at least one processor can execute the zero-sequence circulating current suppression method as described above.

[0024] The present invention also provides a multi-port DC / AC parallel system, comprising at least two parallel dual DC port asymmetric three-level grid-connected inverters, and the controller as described above, wherein each of the inverters shares a high and low voltage DC bus.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. The present invention constructs a parallel connection system including multiple dual DC port grid-connected inverters that share high and low voltage DC busbars, which can simultaneously access photovoltaic and energy storage, and can effectively expand capacity, improve efficiency and reduce costs.

[0027] 2. The present invention obtains an asymmetric carrier and a zero-sequence voltage component, generates an improved modulation wave based on the zero-sequence voltage component, and combines the asymmetric carrier and the improved modulation wave to generate a drive signal for the inverter to achieve circulating current suppression. It can effectively reduce the circulating current between parallel inverters, reduce the harmonics of the inverter output current, balance the stress, improve the efficiency, and enhance the stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a topological structure diagram of a dual DC port three-level grid-connected inverter parallel system;

[0029] Figure 2 It is the control block diagram of the circulating current suppression strategy based on zero-sequence voltage injection for the parallel system;

[0030] Figure 3 Schematic diagram for asymmetric carrier formation;

[0031] Figure 4 Schematic diagram for injecting zero-sequence voltage component into a single inverter;

[0032] Figure 5These are the experimental results when the dual DC ports are asymmetric and the inductances are unequal, where (5a) is the experimental waveform without zero-sequence circulating current control, and (5b) is the experimental waveform with zero-sequence circulating current control;

[0033] Figure 6 These are the experimental results when the dual DC ports are asymmetric and the given currents are not equal, where (6a) is the experimental waveform without zero-sequence circulating current control, and (6b) is the experimental waveform with zero-sequence circulating current control;

[0034] Figure 1 middle:

[0035] H, N, and L are the DC busbars of the parallel system, H is the photovoltaic voltage busbar, N is the negative busbar of the power supply, and L is the battery voltage busbar; A, B, and C are the three-phase grid connection points of the parallel system; G is the neutral point of the grid; the filter uses a single inductor for filtering, and the filter inductor is L 1 , L 2 , R 1 , R 2 is the corresponding equivalent impedance; e a 、e b 、e c is the three-phase voltage; i La1 、i Lb1 、i Lc1 and i La2 、i Lb2 、i Lc2 is the output current of three-level inverters 1 and 2; U GN It is the voltage between point G of the power grid and point N, the negative electrode of the power supply. DETAILED DESCRIPTION

[0036] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0037] It is worth noting that, although the embodiment is described in detail herein, what is described only represents a specific implementation form of the present invention. In fact, the present invention covers a variety of possible embodiments, which may have various variations and optimization schemes. Based on the technical principles and methods disclosed herein, technical experts in this field can derive other various implementation schemes without involving creative changes, and these schemes should be regarded as within the scope of protection of the present invention.

[0038] For the convenience of description, the relevant professional terms appearing in the specific implementation methods are first explained:

[0039] PI (Proportion Integration): proportional integral;

[0040] CBPWM (Carrier-Based Pulse Width Modulation): carrier pulse width modulation.

[0041] The present embodiment provides a method for suppressing zero-sequence circulating current in a multi-port DC / AC parallel system. The method is applied to an innovatively constructed parallel system of at least two dual-DC-port asymmetric three-level grid-connected inverters that share a high- and low-voltage DC bus, and includes the following steps: sampling the three-phase output current of any of the inverters to obtain zero-sequence circulating current, and sampling the DC voltage on the DC side of the parallel system to form an asymmetric carrier to adapt to changes in port voltage; generating a zero-sequence voltage component based on the zero-sequence circulating current; obtaining a reference sinusoidal modulation wave, multiplying the DC side power control parameter K by the zero-sequence voltage component and injecting it into the reference sinusoidal wave to obtain an initial modulation wave; adding the zero-sequence voltage component to the initial modulation wave of each inverter to obtain an improved modulation wave, combining the asymmetric carrier and the improved modulation wave to generate a drive signal for the inverter to achieve circulation suppression. The above method suppresses zero-sequence circulating current by injecting a zero-sequence voltage component, which can effectively reduce the circulating current between parallel inverters.

[0042] like Figure 1 As shown, the parallel system constructed in this embodiment includes two parallel-arranged dual-DC-port asymmetric three-level grid-connected inverters 1 and 2 that share high and low voltage DC busbars. Both inverters are dual-port structures, the upper port is connected to the photovoltaic, the middle port is connected to the battery, and the lower port N is the negative power busbar, so that the inverter can output an asymmetric three-level voltage. Each dual-port asymmetric three-level inverter includes a parallel three-phase bridge arm, a common photovoltaic DC voltage source is connected to the input end H, and a common battery DC voltage source is connected to the input end L; each IGBT tube is driven by the PWM signal output by the controller, and the AC side is connected to the grid after inductor filtering and equivalent impedance R.

[0043] like Figure 2 As shown in the figure, when two parallel inverters are connected to the grid and started, the three-phase output current of the first inverter is sampled to obtain i La 、i Lb 、i Lc , the three-phase currents are added to obtain the zero-sequence circulating current i Z At the same time, U L , U H , and obtain the upper and lower dividing lines α of the asymmetric carrier; the zero-sequence circulating current i Z The tracking zero-sequence circulating current i is obtained by subtracting the target given value 0 of the zero-sequence circulating current Z The error current is fed back to the PI regulator to obtain the zero-sequence voltage component U Z; The reference sinusoidal modulation wave is obtained by double closed-loop control of the AC side voltage and current, and the DC side power control parameter K is multiplied by the zero-sequence voltage component and injected into the reference sinusoidal wave to obtain the initial modulation wave; the zero-sequence voltage component U Z The modulation waves input into the first and second inverters are respectively combined with the modulation signals v of the original two inverters. X1 、v X2 The improved modulation wave is added and passed through the CBPWM modulation algorithm module to achieve circulating current suppression.

[0044] Specifically, MPPT control is adopted on the DC side to make the photovoltaic work at the maximum power point, and the DC side power control parameter K is determined. The coefficient K is defined as a control parameter output by the DC side power control part in the range of [-1, 1].

[0045] like Figure 3 The figure shows the principle diagram of asymmetric carrier formation. The DC side voltage U is obtained by sampling. L , U H After that, the dividing line α of the asymmetric upper and lower carriers is calculated, and the modulation wave and the asymmetric carrier can generate the control signal of the inverter IGBT in the case of asymmetric dual DC ports. In this embodiment, the asymmetric carrier is specifically an asymmetric triangular carrier.

[0046] like Figure 4 The figure shows the principle diagram of zero-sequence voltage component injection for a single inverter. When a negative zero-sequence component is injected into the initial three-phase modulation wave, the maximum zero-sequence component that can be injected is (-1-M min ); Similarly, when positive and zero sequence components are to be injected, the maximum zero sequence component that can be injected is (-1+M max ). Where: M min =min(M A , M B , M C ), M max =max(M A , M B , M C ), M A 、M B 、M C They are three-phase modulation waves A, B, and C respectively.

[0047] In order to verify the effectiveness of the control method described in the present invention, a specific example will be given. The dual-port asymmetric three-level photovoltaic grid-connected parallel system consists of two dual-port inverters with integrated photovoltaic storage. Its main parameters are: grid-side filter inductance L = 3mH, equivalent inductance impedance R = 0.001Ω, switching frequency f = 10kHz, grid line voltage effective value is 95.15V, DC side photovoltaic voltage V H =200V.

[0048] Figure 5 The figure shows the output current and circulating current waveform of phase A of two inverters when the dual DC ports are asymmetric and the inductance is not equal. L =90V, when the dual DC ports are asymmetrical, the given currents of the two inverters are equal I 1_ref =I 2_ref =10A, inductance is not equal, L 1 =3mH, L 2 =2mH. Figure 5 (5a) and (5b) are the current waveforms without zero-sequence circulating current control and with zero-sequence circulating current control, respectively. It can be seen that after adopting the circulating current suppression method proposed in the present invention, the zero-sequence circulating current is controlled within 0.2A.

[0049] Figure 6 The figure shows the output current and circulating current waveform of phase A of two inverters when the dual DC ports are asymmetric and the given currents are not equal. L =90V, dual DC ports are asymmetrical, inductance is equal, L 1 =L 2 =3mH, given current is not equal, I 1_ref =14A, I 2_ref =10A. Figure 6 From the comparison between (6a) and (6b), it can be seen that after the zero-sequence circulating current is controlled, the zero-sequence circulating current is suppressed from about 20A to within 0.1A.

[0050] In this embodiment, the method described in the present invention achieves the suppression of zero-sequence circulating current, thereby verifying the effectiveness of the circulating current suppression strategy of the present invention.

[0051] In another embodiment, a controller is provided, comprising: at least one processor and a memory communicatively connected to the at least one processor, the memory storing instructions executable by the at least one processor, the instructions being executed by the at least one processor so that the at least one processor can execute the zero-sequence circulating current suppression method as described above.

[0052] In another embodiment, a multi-port DC / AC parallel system is provided, comprising at least two parallel dual DC port asymmetric three-level grid-connected inverters, and a controller as described above, wherein each of the inverters shares a high-voltage and a low-voltage DC bus, wherein the high-voltage DC bus can be connected to photovoltaics, and the low-voltage DC bus can be connected to energy storage batteries, thereby effectively expanding capacity, improving efficiency, and reducing costs, and at the same time effectively reducing the circulating current between the parallel inverters through a controller with a zero-sequence circulating current suppression strategy.

[0053] The preferred specific embodiments of the present invention are described in detail above. It should be understood that a person skilled in the art can make many modifications and changes based on the concept of the present invention without creative work. Therefore, any technical solution that can be obtained by a person skilled in the art through logical analysis, reasoning or limited experiments based on the concept of the present invention on the basis of the prior art should be within the scope of protection determined by the claims.

[0054] The above description is based on the flowchart and / or block diagram of the method, device (system) and computer program product of the embodiment. It should be emphasized that the computer program instructions can be designed to implement each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram. These computer program instructions can be run on a general-purpose computer, a special-purpose computer, an embedded processor or a processor of other programmable data processing devices to generate a machine that implements the functions of one or more processes and / or boxes specified in the flowchart and / or block diagram by executing the instructions of the processor of the computer or other programmable data processing device.

[0055] In addition, these computer program instructions can also be stored in a computer readable memory, so that when these instructions are executed on a computer or other programmable data processing device, these devices can be directed to work in a specific manner. In this way, the instructions stored in the memory generate a manufactured product containing instruction means, which implements the functions of one or more processes and / or blocks specified in the flowchart and / or block diagram.

[0056] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operating steps are performed on these devices to generate a computer-implemented process. In this way, the instructions executed on the computer or other programmable device can provide steps to implement the functions of one or more processes and / or blocks specified in the flowchart and / or block diagram.

[0057] In this document, terms such as "include", "comprises", etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily indicate any actual relationship or order between these entities or operations. In addition, the use of the terms "include", "comprises", or their variations is intended to cover non-exclusive inclusion, that is, not only the listed elements, but also other elements that are not explicitly listed, or elements that are inherent to the process, method, article, or device. In the absence of other qualifications, the use of the phrase "comprises a..." to qualify an element does not exclude the possibility that there are other identical elements in the process, method, article, or device that includes the element.

Claims

1. A method for suppressing zero-sequence circulating current in a multi-port DC / AC parallel system, characterized in that: The method is applied to a parallel system including at least two dual-DC-port asymmetric three-level grid-connected inverters that share a high- and low-voltage DC bus, and comprises the following steps: Sampling the three-phase output current of any of the inverters to obtain a zero-sequence circulating current, and sampling the DC voltage on the DC side of the parallel system to form an asymmetric carrier; The zero-sequence circulating current is passed through a PI regulator to generate a zero-sequence voltage component; The reference sinusoidal modulation wave is obtained by double closed-loop control of the AC side voltage and current, and the DC side power control parameter K Multiplying the zero-sequence voltage component and injecting it into the reference sine wave to obtain an initial modulation wave; The zero-sequence voltage component is added to the initial modulation wave of each inverter to obtain an improved modulation wave, and the asymmetric carrier and the improved modulation wave are combined to generate a drive signal for the inverter to achieve circulating current suppression; The forming of an asymmetric carrier specifically includes: Sampling the battery voltage on the DC side of the parallel system U L and photovoltaic voltage U H , calculate the boundary line of asymmetric upper and lower carriers a , forming the asymmetric carrier; The generating of the zero-sequence voltage component by the zero-sequence circulating current through the PI regulator specifically includes: The zero-sequence circulating current and the zero-sequence circulating current target given value are subtracted to obtain an error current that tracks the zero-sequence circulating current. The error current is fed back to the PI regulator to obtain a zero-sequence voltage component.

2. The method for suppressing zero-sequence circulating current of a multi-port DC / AC parallel system according to claim 1, characterized in that: MPPT control is used on the DC side to make the photovoltaic work at the maximum power point, and the DC side power control parameters are determined. K .

3. The method for suppressing zero-sequence circulating current of a multi-port DC / AC parallel system according to claim 1 or 2, characterized in that: The DC side power control parameter K The range is [-1,1].

4. The method for suppressing zero-sequence circulating current of a multi-port DC / AC parallel system according to claim 1, characterized in that: When the zero-sequence voltage component is injected into the initial modulation wave, if a negative zero-sequence component is injected, the maximum zero-sequence component that can be injected is -1- M min ; If a positive zero sequence component is injected, the maximum zero sequence component that can be injected is -1+ M max ,in M min =min( M A , M B , M C ), M max =max( M A , M B , M C ), M A , M B , M C They are three-phase modulation waves A, B, and C respectively.

5. The method for suppressing zero-sequence circulating current of a multi-port DC / AC parallel system according to claim 1, characterized in that: The asymmetric carrier wave and the improved modulation wave are combined and a CBPWM modulation algorithm is adopted to generate the driving signal.

6. A computer-readable storage medium, characterized in that: It comprises one or more programs for execution by one or more processors of an electronic device, wherein the one or more programs comprise instructions for executing the zero-sequence circulating current suppression method as claimed in any one of claims 1 to 5.

7. A controller, characterized in that: include: At least one processor and a memory communicatively connected to the at least one processor, the memory storing instructions executable by the at least one processor, the instructions being executed by the at least one processor so that the at least one processor can execute the zero-sequence circulating current suppression method as described in any one of claims 1-5.

8. A multi-port DC / AC parallel system, characterized in that: The invention comprises at least two parallel dual DC port asymmetric three-level grid-connected inverters and a controller as claimed in claim 7, wherein each of the inverters shares a high-voltage and low-voltage DC bus.

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