Power semiconductor characteristic test circuit, method, system, device and storage medium
By designing a power semiconductor characteristic test loop, decoupling control of the withstand voltage before opening and the anode current rise rate after opening is achieved, solving the problem that these physical quantities cannot be controlled separately in the prior art, and providing a basis for studying the transient process of device activation.
Patent Information
- Application Number
- CN202411059810.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-05
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2044-08-05
AI Technical Summary
The prior art is difficult to control the voltage U withstand before opening of the power semiconductor device and the anode current rise rate di/dt after opening, resulting in the inability to independently study its impact on the on-opening transient process.
A power semiconductor characteristic test loop is designed, including a current test part and a voltage test part. By controlling the on-off of the switch T, capacitor C1, inductor L, capacitor C2 and resistor R3, the decoupling control of the withstand voltage before opening and the anode current change rate after opening of the device to be tested is realized.
The decoupling control of the withstand voltage before the device is turned on and the anode current rise rate after the device is turned on, providing a basis for studying the transient process and parameter influence rules of power semiconductor devices, making the opening and passing process of analog and reproduction devices simpler and more convenient under different working conditions.
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Figure CN118584284B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to the technical field of power semiconductors, and particularly to a turn-on characteristic test circuit, method, system, device, and storage medium for a power semiconductor device. Background Art
[0002] During the production and use of power semiconductor devices such as thyristors, GTOs, IGBTs, and IGCTs, it is necessary to test the turn-on characteristics of the power semiconductor devices. Currently, an LC discharge circuit (as shown in Figure 1 ) is generally used to oscillate for turn-on characteristic testing, and parameters such as the on-state voltage drop are obtained simultaneously. Therefore, it is named after the on-state voltage drop test circuit, etc. During the test, the capacitor C is pre-charged first, and then the device under test is turned on through a control signal. The voltage and current waveforms during its turn-on transient process are monitored, and the on-state voltage drop at different current values is read. The relationship between the voltage U that the power semiconductor device withstands before turn-on and the anode current rise rate di / dt within a short time after the device is turned on is di / dt = U / L.
[0003] For power semiconductor devices, the external circuit physical quantities that affect their turn-on characteristics include the voltage U that the device withstands before turn-on and the anode current rise rate di / dt after turn-on. In existing various test circuits, these two physical quantities are strongly coupled and cannot be controlled separately, that is, they cannot be used to separately study the influence of different withstand voltages U before turn-on and different anode current rise rates di / dt after turn-on of the power semiconductor device on the device turn-on transient process. Summary of the Invention
[0004] Embodiments of the present disclosure provide a power semiconductor characteristic test circuit and method to solve or alleviate one or more of the above technical problems in the prior art.
[0005] According to one aspect of the present disclosure, there is provided a power semiconductor characteristic test circuit, including:
[0006] a current test part, a voltage test part, and a device under test;
[0007] The current test part and the voltage test part are respectively connected to both ends of the device under test;
[0008] The current test part includes a capacitor C1, an inductor L, and a switch T;
[0009] The voltage test part includes a capacitor C2 and a resistor R3.
[0010] In a possible implementation, the first end of the switch T is connected to the first end of the device under test, the second end of the switch T is connected to the first end of the inductor L, the second end of the inductor L is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is connected to the second end of the device under test;
[0011] The current test section further includes a pre-charge circuit and a discharge circuit for the capacitor C1;
[0012] The pre-charge circuit and the discharge circuit for the capacitor C1 are respectively connected to both ends of the capacitor C1.
[0013] In a possible implementation, the pre-charge circuit for the capacitor C1 includes a working power supply V1 and a switch S1 connected in series;
[0014] The discharge circuit for the capacitor C1 includes a resistor R1 and a switch S2 connected in series.
[0015] In a possible implementation, the switch T has a bi-directional blocking voltage capability to isolate the voltages of the current test section and the voltage test section, so that the voltage across the two ends of the device under test before turning on is the voltage provided by the voltage test section.
[0016] In a possible implementation, the first end of the resistor R3 is connected to the first end of the device under test, the second end of the resistor R3 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the device under test;
[0017] The voltage test section further includes a pre-charge circuit and a discharge circuit for the capacitor C2;
[0018] The pre-charge circuit and the discharge circuit for the capacitor C2 are respectively connected to both ends of the capacitor C2.
[0019] In a possible implementation, the pre-charge circuit for the capacitor C2 includes a working power supply V2 and a switch S3 connected in series;
[0020] The discharge circuit for the capacitor C2 includes a resistor R2 and a switch S4 connected in series.
[0021] According to one aspect of the present disclosure, there is provided a method for testing the characteristics of a power semiconductor, based on the power semiconductor characteristic test circuit of any one of the above, including:
[0022] Setting the electrical parameters of the current test section and the voltage test section;
[0023] Controlling the on / off of the current test section and the voltage test section, and based on the electrical parameters of the current test section and the voltage test section, realizing the decoupled control of the withstand voltage before the device under test is turned on and the rate of change of the anode current after turning on.
[0024] In a possible implementation, controlling the on / off states of the current test section and the voltage test section to achieve decoupled control of the withstand voltage before the device under test is turned on and the rate of change of the anode current after it is turned on includes:
[0025] Disconnect the discharge circuits of capacitor C1 in the current test section and capacitor C2 in the voltage test section;
[0026] Close the pre-charge circuits of capacitor C1 in the current test section and capacitor C2 in the voltage test section, and charge capacitor C1 through the pre-charge circuit of capacitor C1 and charge capacitor C2 through the pre-charge circuit of capacitor C2;
[0027] After the charging is completed, turn off the pre-charge circuits of capacitor C1 and capacitor C2. At this time, the withstand voltage of the device under test is the voltage of capacitor C2 in the voltage test section;
[0028] Trigger the switch T of the device under test and the current test section to turn on. Capacitor C1 and inductor L in the current test section oscillate to generate a first current, and capacitor C2 in the voltage test section discharges through the device under test and resistor R3 to generate a second current. Control the second current to be less than the first current. At this time, the anode parameters of the device under test are calculated based on the electrical parameters of the current test section.
[0029] In a possible implementation, after triggering the switch T of the device under test and the current test section to turn on, and capacitor C1 and inductor L in the current test section oscillate to generate a first current, and capacitor C2 in the voltage test section discharges through the device under test and resistor R3 to generate a second current, it includes:
[0030] When the current of capacitor C1 and inductor L in the current test section oscillates to decay to a set value, control the discharge circuits of capacitor C1 and capacitor C2 to close, and discharge the energies of capacitor C1 and capacitor C2 respectively.
[0031] In a possible implementation, setting the electrical parameters of the current test section and the voltage test section includes:
[0032] Set the time constant τ of the discharge loop composed of resistor R3, capacitor C2, and the device under test to be greater than the duration of the turn-on transient process of the device under test;
[0033] Determine the resistance value of resistor R3 according to the constraint conditions for the value selection of resistor R3; the constraint conditions include: the discharge current of capacitor C2 in the voltage test section is less than the discharge current of capacitor C1 in the current test section, and the resistance value of resistor R3 is less than the off-state resistance value of the device under test.
[0034] According to one aspect of the present disclosure, there is provided a power semiconductor characteristic test system, including:
[0035] a current test part, a voltage test part, and a device under test, wherein the current test part and the voltage test part are respectively connected to two ends of the device under test;
[0036] a setting unit for setting electrical parameters of the current test part and the voltage test part;
[0037] a control unit for controlling the on / off of the current test part and the voltage test part, and realizing decoupled control of the withstand voltage before device turn-on and the anode current change rate after turn-on based on the electrical parameters of the current test part and the voltage test part.
[0038] According to one aspect of the present disclosure, there is provided a power semiconductor characteristic test device, including:
[0039] a processor and a memory;
[0040] the memory is used for storing a computer program, and the processor calls the computer program stored in the memory to execute the power semiconductor characteristic test method described in any one of the above.
[0041] According to one aspect of the present disclosure, there is provided a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the processor can execute the power semiconductor characteristic test method described in any one of the above.
[0042] The exemplary embodiments of the present disclosure have the following beneficial effects: In the device turn-on characteristic test of the exemplary embodiments of the present disclosure, decoupled control of the withstand voltage before device turn-on and the anode current rise rate after turn-on is realized, providing a basis for studying the turn-on transient process of power semiconductor devices and the influence law of their parameters, and making it simpler and more convenient to simulate and reproduce the turn-on process of devices under different actual application conditions.
[0043] Details of one or more embodiments of the present application are set forth in the following drawings and description. Other features and advantages of the present application will become apparent from the drawings of the specification. It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] The drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0045] Figure 1 is an LC discharge circuit for turn-on testing in the prior art;
[0046] Figure 2 is a schematic diagram of a power semiconductor characteristic test circuit according to this exemplary embodiment;
[0047] Figure 3 is a schematic diagram of a power semiconductor characteristic test circuit under the large di / dt condition according to this exemplary embodiment;
[0048] Figure 4 is a flowchart of a method for testing power semiconductor characteristics according to this exemplary embodiment;
[0049] Figure 5 is a block diagram of a power semiconductor characteristic test system according to this exemplary embodiment;
[0050] Figure 6 is a schematic structural diagram of a power semiconductor characteristic test device according to this exemplary embodiment. Detailed implementation manners
[0051] Now, example embodiments will be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of the embodiments of the present disclosure. However, those skilled in the art will realize that one or more of the specific details may be omitted in practicing the technical solutions of the present disclosure, or other methods, components, devices, steps, etc. may be adopted. In other cases, well-known technical solutions are not shown or described in detail to avoid obscuring the various aspects of the present disclosure.
[0052] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or in one or more hardware units or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.
[0053] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all steps. For example, some steps can be further decomposed, while some steps can be combined or partially combined. Therefore, the actual execution order may change according to the actual situation.
[0054] The terms "first", "second", etc. in the description, claims and above-mentioned accompanying drawings of this application are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that such used data can be interchanged under appropriate circumstances so that the embodiments of the present application described herein can be implemented in an order different from those illustrated or described herein.
[0055] In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or sub-modules does not necessarily limit to those steps or sub-modules clearly listed, but may include other steps or sub-modules not clearly listed or inherent to these processes, methods, products or devices.
[0056] Figure 2 is a schematic diagram of a power semiconductor characteristic test circuit of this exemplary embodiment, as Figure 2 shown, the exemplary embodiment of the present disclosure provides a power semiconductor characteristic test circuit, including: a current test part ( Figure 2 the current source part in Figure 2 ), a voltage test part (
[0057] the voltage source part in
[0058] Figure 2 ), and a device under test; the current test part and the voltage test part are respectively connected to both ends of the device under test; the current test part includes a capacitor C1, an inductor L, a switch T, and a pre-charge circuit and a discharge circuit of the capacitor C1; wherein, the capacitor C1, the pre-charge circuit of the capacitor C1, and the discharge circuit of the capacitor C1 are connected in parallel; the first end of the switch T is connected to the first end of the device under test, the second end of the switch T is connected to the first end of the inductor L, the second end of the inductor L is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is connected to the second end of the device under test; the pre-charge circuit and the discharge circuit of the capacitor C1 are respectively connected to both ends of the capacitor C1.
[0057] The purpose of this embodiment is to provide a power semiconductor device turn-on test circuit for decoupling control of the withstand voltage U before device turn-on and the anode current rise rate di / dt after turn-on, so as to study the turn-on transient process of the device under different conditions. This test circuit can achieve decoupling control of the voltage withstand before the device under test is triggered to turn on and the anode current rise rate after turn-on.
[0058] Specifically, the pre-charging circuit of the capacitor C1 includes a working power supply V1 (voltage source V1) and a switch S1 connected in series; the discharging circuit of the capacitor C1 includes a resistor R1 and a switch S2 connected in series.
[0059] Specifically, the switch T has the ability of bidirectional voltage blocking, and is used to isolate the voltages of the current test part and the voltage test part, so that the voltage across the two ends before the device under test is turned on is the voltage provided by the voltage test part. It should be noted that the switch T in this embodiment is a power electronic switch. Exemplarily, the switch T includes a thyristor and an IGBT series diode.
[0060] Specifically, the voltage test part includes a capacitor C2, a resistor R3, and the pre-charging circuit and discharging circuit of the capacitor C2; among them, the capacitor C2, the pre-charging circuit of the capacitor C2, and the discharging circuit of the capacitor C2 are connected in parallel; the first end of the resistor R3 is connected to the first end of the device under test, the second end of the resistor R3 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the device under test; the pre-charging circuit and discharging circuit of the capacitor C2 are respectively connected to both ends of the capacitor C2.
[0061] Specifically, the pre-charging circuit of the capacitor C2 includes a working power supply V2 (voltage source V2) and a switch S3 connected in series; the discharging circuit of the capacitor C2 includes a resistor R2 and a switch S4 connected in series.
[0062] The topology of the turn-on test loop of the power semiconductor device proposed in this embodiment is as Figure 2 shown, and includes a current test part, a voltage test part, and a device under test. The main circuit of the current test part consists of a capacitor C1, an inductor L, and a switch T, and the main circuit of the voltage test part consists of a capacitor C2 and a resistor R3. The working power supply V1 and the switch S1, the working power supply V2 and the switch S3 respectively constitute the pre-charging circuits of the capacitors C1 and C2, and the resistor R1 and the switch S2, the resistor R2 and the switch S4 respectively constitute the discharging circuits of the capacitors C1 and C2.
[0063] The main function of the current test part is to provide a conduction current for the device under test, and the anode current rise rate after the device under test is turned on is mainly determined by the current test part; the main function of the voltage test part is to control the voltage value that the device under test withstands before being turned on. Therefore, the resistance value of the resistor R3 is designed to be large, so that the current through which the capacitor C2 discharges through the device under test and the resistor R3 is much smaller than the current provided by the current test part. The switch T is selected to have the ability of bidirectional voltage blocking, such as a thyristor, or an IGBT series diode, etc., to isolate the voltages of the current test part and the voltage test part, so that the voltage across the two ends before the device under test is turned on is the voltage provided by the working power supply. The switches S1~S4 adopt common mechanical switches.
[0064] Figure 4is a flowchart of a method for testing the characteristics of a power semiconductor according to an exemplary embodiment. As shown in Figure 4 shown, an exemplary embodiment of the present disclosure provides a method for testing the characteristics of a power semiconductor. Based on the above power semiconductor characteristic test circuit, the method includes the following steps:
[0065] S1 Set the electrical parameters of the current test part and the voltage test part;
[0066] S2 Control the on / off of the current test part and the voltage test part. Based on the electrical parameters of the current test part and the voltage test part, decoupled control of the withstand voltage before the device under test is turned on and the rate of change of the anode current after it is turned on is achieved.
[0067] The purpose of this embodiment is to provide a method for testing the turn-on of a power semiconductor device with decoupled control of the withstand voltage U before the device is turned on and the rate of rise of the anode current di / dt after it is turned on, so as to study the turn-on transient process of the device under different conditions.
[0068] Specifically, controlling the on / off of the current test part and the voltage test part to achieve decoupled control of the withstand voltage before the device under test is turned on and the rate of change of the anode current after it is turned on includes:
[0069] Disconnect the discharge circuit of the capacitor C1 in the current test part and the discharge circuit of the capacitor C2 in the voltage test part;
[0070] Close the pre-charge circuit of the capacitor C1 in the current test part and the pre-charge circuit of the capacitor C2 in the voltage test part. Charge the capacitor C1 through the pre-charge circuit of the capacitor C1 and charge the capacitor C2 through the pre-charge circuit of the capacitor C2;
[0071] After the charging is completed, turn off the pre-charge circuit of the capacitor C1 and the pre-charge circuit of the capacitor C2. At this time, the withstand voltage of the device under test is the voltage of the capacitor C2 in the voltage test part;
[0072] Trigger the switch T of the device under test and the current test part to turn on. The capacitor C1 and the inductor L in the current test part oscillate to generate a first current, and the capacitor C2 in the voltage test part discharges through the device under test and the resistor R3 to generate a second current. Control the second current to be less than the first current. At this time, the anode parameters of the device under test are calculated according to the electrical parameters of the current test part. Exemplarily, the anode parameters of the device under test include the rate of change of the anode current and the peak value of the anode current.
[0073] Specifically, after triggering the switch T of the device under test and the current test part to turn on, and the capacitor C1 and the inductor L in the current test part oscillate to generate a first current, and the capacitor C2 in the voltage test part discharges through the device under test and the resistor R3 to generate a second current, it includes:
[0074] When the capacitor C1 and the inductor L in the current test part oscillate until the current decays to a set value, control the discharge circuits of the capacitor C1 and the capacitor C2 to close, and discharge the energies of the capacitor C1 and the capacitor C2 respectively.
[0075] In this embodiment, the method steps for testing the turn-on characteristics of the device are as follows: First, disconnect the switches S2 and S4, and close the switches S1 and S3 to pre-charge the capacitors C1 and C2. After the charging is completed, disconnect the switches S1 and S3. At this time, the voltage tolerated by the device under test is the voltage of the capacitor C2. Trigger the switch T and the device under test to turn on. The capacitor and inductor in the current test part loop oscillate to generate a large current. The capacitor C2 discharges through the device under test and the resistor R3 to generate a negligible small current. The anode current rise rate, anode current peak value, etc. of the device under test are determined by the parameters of the current test part. When the LC circuit in the current test part oscillates for half a cycle, the main circuit current decays to nearly 0, and control the switches S2 and S4 to close to discharge the energy on the capacitor.
[0076] It should be noted that before the device under test is turned on, the voltage tolerated by the device is the pre-charging voltage V2 of the capacitor C2; within a short time after the device under test is turned on, the anode current rise rate di / dt can be approximately obtained by V1 / L. Therefore, this loop realizes the decoupled control effect of the tolerated voltage U before the device is turned on and the anode current rise rate di / dt after the device is turned on.
[0077] Specifically, setting the electrical parameters of the current test part and the voltage test part includes:
[0078] Set the time constant τ of the discharge loop composed of the resistor R3, the capacitor C2, and the device under test to be greater than the duration of the turn-on transient process of the device under test;
[0079] Determine the resistance value of the resistor R3 according to the constraint conditions for the value selection of the resistor R3; the constraint conditions include: the discharge current of the capacitor C2 in the voltage test part is less than the discharge current of the capacitor C1 in the current test part, and the resistance value of the resistor R3 is less than the off-state resistance value of the device under test.
[0080] In this embodiment, to improve the measurement accuracy of physical quantities such as voltage and current during the device turn-on transient process, it is necessary to reasonably select the parameters of the circuit components. The duration of the device turn-on transient process is in the microsecond level. Therefore, within this time range, the voltage provided by the working power supply should not change significantly, and the time constant τ (τ = R3C2) of the corresponding RC discharge circuit should be much larger than the duration of the turn-on transient process, typically taken as the second level. In addition, the current passing through the device after turn-on is the superposition of the current test part and the voltage test part. Generally speaking, the current provided by the current test part is in the kiloampere level, and the current provided by the voltage test part needs to be controlled within the ampere level or less. Therefore, the resistance value of resistor R3 cannot be too small, but should be much smaller than the off-state resistance value of the device under test to ensure that the voltage of the device under test is approximately equal to the voltage on capacitor C2.
[0081] If the required anode current rise rate to be measured is very large, for example, it needs to reach the level of kA / μs, the inductor L can be short-circuited, and the capacitor C1 and the stray inductance in the circuit (i.e., the equivalent inductance L σ ) oscillate to generate an anode current with a very large rise rate (di / dt). The circuit at this time is as Figure 3 shown, and the inductor L σ is the equivalent stray inductance, and no actual inductor is connected in series in the circuit. The range of the equivalent inductance L σ is 0.1 μH to 10 μH, and a typical embodiment is 1 to 3 μH.
[0082] The value of resistor R3 should make the discharge current of capacitor C2 in the working power supply circuit much smaller than the discharge current of capacitor C1 in the current source circuit. At the same time, the resistance value of resistor R3 should be much smaller than the off-state resistance value of the device under test. The value range is 10 Ω to 1 MΩ, and a typical embodiment is 1 kΩ to 10 kΩ; the capacitance value of capacitor C1 ranges from 10 μF to 50 mF, and a typical embodiment is 500 μF to 10 mF; the capacitance value of capacitor C2 is 1 μF to 10 mF, and a typical embodiment is 20 μF to 1 mF; the resistance values of discharge resistors R1 and R2 are 1 Ω to 10 kΩ, and a typical embodiment is 50 Ω to 500 Ω; the value of inductor L is 20 μH to 1 mH, and a typical embodiment is 50 μH to 300 μH; the switch T needs to have the characteristic of controllable turn-on and needs to meet the withstand voltage and current-carrying requirements. A typical embodiment is a large current-carrying device with bidirectional blocking ability such as a thyristor; the switches S1 and S2 can be selected as mechanical switches or power electronic switches.
[0083] Figure 5 is a block diagram of a power semiconductor characteristic test system according to an exemplary embodiment of the present invention. As Figure 5 shown, an exemplary embodiment of the present disclosure provides a power semiconductor characteristic test system, including:
[0084] A current test section, a voltage test section, and a device under test, wherein the current test section and the voltage test section are respectively connected to two ends of the device under test;
[0085] A setting unit for setting the electrical parameters of the current test section and the voltage test section;
[0086] A control unit for controlling the on / off of the current test section and the voltage test section, and realizing the decoupled control of the withstand voltage before the device under test is turned on and the anode current change rate after it is turned on based on the electrical parameters of the current test section and the voltage test section.
[0087] Figure 6 It is a schematic structural diagram of a power semiconductor characteristic test device according to this exemplary embodiment. As Figure 6 shown, corresponding to the power semiconductor characteristic test method provided above, the present disclosure also provides a power semiconductor characteristic test device. Since the embodiments of this device are similar to the method embodiments above, the description is relatively simple. For related parts, please refer to the description in the method embodiment part above. The device described below is only illustrative. The device may include: a processor 1, a memory 2, a communication bus (i.e., the above-mentioned device bus), and a search engine. Among them, the processor 1 and the memory 2 complete mutual communication through the communication bus and communicate with the outside through a communication interface. The processor 1 can call the logical instructions in the memory 2 to execute the power semiconductor characteristic test method.
[0088] In addition, when the logical instructions in the above-mentioned memory 2 are implemented in the form of a software functional unit and sold or used as an independent product, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present disclosure, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods in the various embodiments of the present disclosure. The aforementioned storage medium includes: storage chips, USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical disks, etc., which can store program codes.
[0089] On the other hand, the embodiments of the present disclosure also provide a processor-readable storage medium, on which a computer program 3 is stored. When the computer program 3 is executed by the processor 1, it is used to execute the power semiconductor characteristic test methods provided in the above-mentioned various embodiments.
[0090] A processor-readable storage medium can be any available medium or data storage device accessible to Processor 1, including but not limited to magnetic memories (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc.), optical memories (such as CDs, DVDs, BDs, HVDs, etc.), and semiconductor memories (such as ROMs, EPROMs, EEPROMs, non-volatile memories (NAND FLASH), solid-state drives (SSD)), etc.
[0091] The above are only the preferred embodiments of the present disclosure, and the protection scope of the present disclosure is not limited to the above embodiments. All technical solutions falling within the idea of the present disclosure belong to the protection scope of the present disclosure. It should be noted that for those of ordinary skill in the art, several improvements and refinements made without departing from the principle of the present disclosure should be regarded as within the protection scope of the present disclosure.
Claims
1. A power semiconductor characteristic test circuit, characterized in that: include: Current test part, voltage test part and device under test; The current testing part and the voltage testing part are respectively connected to two ends of the device to be tested; The current testing part includes a capacitor C1, an inductor L and a switch T; The voltage testing part includes a capacitor C2 and a resistor R3; The current testing part also includes a pre-charging circuit and a discharging circuit of the capacitor C1; The pre-charging circuit and the discharging circuit of the capacitor C1 are respectively connected to the two ends of the capacitor C1; The voltage testing part also includes a pre-charging circuit and a discharging circuit of the capacitor C2; The pre-charging circuit and the discharging circuit of the capacitor C2 are respectively connected to the two ends of the capacitor C2; The switch T has a bidirectional blocking voltage capability, and is used to isolate the voltage of the current test part and the voltage of the voltage test part, so that the voltage across the two ends of the device under test before it is turned on is the voltage provided by the voltage test part. After the device under test is turned on, the current test part provides the device under test with an on-state current, thereby realizing decoupling control of the withstand voltage before the device under test is turned on and the anode current rise rate after it is turned on; The pre-charging circuit of the capacitor C1 includes a working power supply V1 and a switch S1 connected in series; The discharge circuit of the capacitor C1 includes a resistor R1 and a switch S2 connected in series; The pre-charging circuit of the capacitor C2 includes a working power supply V2 and a switch S3 connected in series; The discharge circuit of the capacitor C2 includes a resistor R2 and a switch S4 connected in series; The first end of the switch T is connected to the first end of the device under test, the second end of the switch T is connected to the first end of the inductor L, the second end of the inductor L is connected to the first end of the capacitor C1, and the second end of the capacitor C1 is connected to the second end of the device under test; The capacitor C1, the inductor L, the switch T, the working power supply V1, the switch S1, the resistor R1 and the switch S2 constitute a current source part; the capacitor C2, the resistor R3, the working power supply V2, the switch S3, the resistor R2 and the switch S4 constitute a voltage source part; The resistance value of the resistor R3 is much smaller than the off-state resistance value of the device under test; after the device under test is turned on, the current discharged by the capacitor C2 through the device under test and the resistor R3 is much smaller than the current provided by the current test part.
2. The power semiconductor characteristic test circuit according to claim 1, characterized in that: The first end of the resistor R3 is connected to the first end of the device under test, the second end of the resistor R3 is connected to the first end of the capacitor C2, and the second end of the capacitor C2 is connected to the second end of the device under test.
3. A power semiconductor characteristic testing method, characterized in that: The power semiconductor characteristic test circuit according to claim 1 or 2 comprises: Setting electrical parameters of the current test part and the voltage test part; The on and off of the current test part and the voltage test part are controlled, and based on the electrical parameters of the current test part and the voltage test part, decoupling control of the withstand voltage of the device under test before turning on and the anode current change rate after turning on is achieved.
4. The power semiconductor characteristic testing method according to claim 3, characterized in that: Controlling the on and off of the current test part and the voltage test part to achieve decoupling control of the withstand voltage of the device under test before turning on and the anode current change rate after turning on includes: Disconnecting the discharge circuit of the capacitor C1 of the current testing part and the discharge circuit of the capacitor C2 of the voltage testing part; Close the pre-charging circuit of the capacitor C1 of the current testing part and the pre-charging circuit of the capacitor C2 of the voltage testing part, charge the capacitor C1 through the pre-charging circuit of the capacitor C1, and charge the capacitor C2 through the pre-charging circuit of the capacitor C2; After charging is completed, the pre-charging circuit of the capacitor C1 and the pre-charging circuit of the capacitor C2 are turned off. At this time, the withstand voltage of the device under test is the voltage of the voltage test part capacitor C2; The switch T between the device under test and the current test part is triggered to open, the capacitor C1 and the inductor L of the current test part oscillate to generate a first current, and the capacitor C2 of the voltage test part discharges through the device under test and the resistor R3 to generate a second current, and the second current is controlled to be smaller than the first current. At this time, the anode parameters of the device under test are calculated based on the electrical parameters of the current test part.
5. The power semiconductor characteristic testing method according to claim 4, characterized in that: After triggering and opening the switch T of the device under test and the current test part, the capacitor C1 and the inductor L of the current test part oscillate to generate a first current, and the capacitor C2 of the voltage test part discharges through the device under test and the resistor R3 to generate a second current, the following steps are included: When the capacitor C1 and the inductor L of the current test part oscillate until the current decays to a set value, the discharge circuit of the capacitor C1 and the discharge circuit of the capacitor C2 are controlled to be closed to discharge the energy of the capacitor C1 and the capacitor C2 respectively.
6. The power semiconductor characteristic testing method according to claim 3, characterized in that: Setting electrical parameters of the current test part and the voltage test part includes: The time constant τ of the discharge circuit composed of the resistor R3, the capacitor C2 and the device under test is set to be greater than the duration of the transient process of turning on the device under test; The resistance value of resistor R3 is determined according to the constraint conditions of resistor R3 selection; the constraint conditions include: the discharge current of the voltage test part capacitor C2 is less than the discharge current of the current test part capacitor C1, and the resistance value of resistor R3 is less than the off-state resistance value of the device under test.
7. A power semiconductor characteristic test system, comprising the power semiconductor characteristic test circuit according to claim 1 or 2, characterized in that: include: A setting unit, used for setting electrical parameters of a current test part and a voltage test part; The control unit is used to control the on and off of the current test part and the voltage test part, and based on the electrical parameters of the current test part and the voltage test part, realize the decoupling control of the withstand voltage before the device under test is turned on and the anode current change rate after the device under test is turned on.
8. A power semiconductor characteristic testing device, characterized in that: include: Processor and memory; The memory is used to store a computer program, and the processor calls the computer program stored in the memory to execute the power semiconductor characteristic testing method described in any one of claims 3-6.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor is enabled to execute the power semiconductor characteristic testing method according to any one of claims 3 to 6.
Citation Information
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