476 results about "Semiconductor properties" patented technology

The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2. The present invention ferroelectric transistor can be a metal-ferroelectric-semiconductive metal oxide FET having a gate stack of a top metal electrode disposed on a ferroelectric layer disposed on a semiconductive metal oxide channel on a substrate. Using additional layer of bottom electrode and gate dielectric, the present invention ferroelectric transistor can also be a metal-ferroelectric-metal (optional)-gate dielectric (optional)-semiconductive metal oxide FET.

The present invention generally relates to an apparatus and method of carbon nanotube (CNT) gate field effect transistor (FET), which is used to replace the current metal gate of transistor for decreasing the gate width greatly. The carbon nanotube has its own intrinsic characters of metal and semiconductor, so it can be the channel, connector or next-level gate of transistor. Furthermore, the transistor has the structure of exchangeable source and drain, and can be defined the specificity by outside wiring.

A transistor of nanometer size is provided, which is capable of high-speed operation and operates at room temperatures by using carbon nanotubes for semiconductor devices. The transistor uses a carbon nanotube ring having semiconductor characteristics as a semiconductor material, or a carbon nanotube ring having conductivity or semiconductor characteristics as an electrode material.

An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

Disclosed herein is a composite-structured organic semiconductor polymer for an organic thin film transistor which contains quinoxaline rings in the backbone of the polymer. According to the organic semiconductor polymer, since quinoxaline rings having n-type semiconductor characteristics, such as high electron affinity, are incorporated into a polythiophene having p-type semiconductor characteristics, the organic semiconductor polymer simultaneously exhibits both p-type and n-type semiconductor characteristics. In addition, the polythienylquinoxaline derivative exhibits high solubility in organic solvents, co-planarity and stability in air. Furthermore, when the polythienylquinoxaline derivative is used as an active layer of an organic thin film transistor, the organic thin film transistor exhibits a high charge carrier mobility and a low off-state leakage current.