A time synchronization method and apparatus based on combined bit synchronization and frame synchronization

Abstract

This invention relates to the field of wireless communication technology, specifically to a time synchronization method and apparatus based on joint bit synchronization and frame synchronization. The method utilizes a frame synchronization algorithm based on differential correlation peak detection technology to detect the position of the correlation peak in the frame header. The integral information near the correlation peak is directly fed into the bit synchronization stage to calculate the interpolation coefficients after bit synchronization. This allows for joint synchronization of frame synchronization and bit synchronization, significantly reducing the computational complexity of time-domain synchronization at the receiving end.

Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a time synchronization method and device based on combined synchronization of bit synchronization and frame synchronization. Background Art

[0002] In modern wireless communication receivers, the receiving end needs to perform time domain synchronization on the received signal after matching filtering. Time domain synchronization generally includes frame synchronization and bit synchronization (also known as symbol synchronization). The purpose of frame synchronization is to capture the data frame header, and the purpose of bit synchronization is to obtain the best sampling point information of the signal.

[0003] In the existing time synchronization scheme, the receiving end processes the bit synchronization and frame synchronization separately, and the algorithm process is complicated and time-consuming. Summary of the invention

[0004] Purpose of the invention: The present invention aims to overcome the technical problems of high complexity and long time consumption of time synchronization in the prior art, and proposes a time synchronization method and device based on joint synchronization of bit synchronization and frame synchronization.

[0005] Invention content: To achieve the above objectives, the present invention proposes the following technical solutions:

[0006] In a first aspect, a time synchronization method based on bit synchronization and frame synchronization is provided, which is applicable to a receiver, and the method includes:

[0007] The receiver receives a data frame, wherein a unique code is inserted into a header of the data frame;

[0008] Performing differential processing on the data frame and the unique code respectively to obtain a differential data frame and a differential unique code;

[0009] Performing a correlation operation on the differential data frame and the differential unique code to obtain correlation peak information;

[0010] Performing peak detection according to the correlation peak information, and determining the frame header position of the data frame based on the position of the detected correlation peak;

[0011] Sampling the correlation peak, selecting a peak point and adjacent points of the peak point as sampling points, and determining an interpolation decimal based on information values ​​of the sampling points;

[0012] Determine an interpolation coefficient according to the interpolation decimal, and determine optimal sampling point information according to the interpolation coefficient and the information value of the sampling point;

[0013] Time synchronization is performed based on the optimal sampling point information and the frame header position of the data frame.

[0014] As an optional implementation manner of the method of the first aspect, performing a correlation operation on the differential data frame and the differential unique code to obtain correlation peak information specifically includes:

[0015] Sampling the differential data frame to obtain a differential data frame sampling sequence having a length equal to that of the unique code;

[0016] The differential data frame sampling sequence and the differential unique code are correlated, and the correlated value is:

[0017]

[0018] Wherein, U represents the length of the unique code, u(j) represents the differential unique code, y(j) represents the differential data frame sampling sequence, and x(j) represents the correlated value;

[0019] The correlation peak information xgf(j) is calculated according to x(j):

[0020]

[0021] As an optional implementation manner of the method according to the first aspect, performing peak detection according to the relevant peak information specifically includes:

[0022] Set the threshold of peak information;

[0023] Data whose information value is greater than the threshold value is extracted from the correlation peak information as the correlation peak value.

[0024] As an optional implementation manner of the method of the first aspect, sampling the correlation peak, selecting a peak point and adjacent points of the peak point as sampling points, and determining an interpolation decimal based on information values ​​of the sampling points specifically includes:

[0025] Select the peak point and three adjacent points of the peak point as the sampling points;

[0026] Perform FFT operation on the information of the sampling points to obtain the interpolation decimal:

[0027]

[0028] Among them, ukt represents the interpolation decimal, t2 represents the information of the peak point, t1 represents the information of the sampling point before the peak point, t3 represents the information of the sampling point after the peak point, and t4 represents the information of the second sampling point after the peak point.

[0029] Specifically, the method further includes:

[0030] Perform multiple rounds of sampling on the correlation peak, and calculate the interpolation decimal for the sampling result of each sampling;

[0031] Smoothing the interpolation decimals corresponding to the multiple rounds of sampling results:

[0032] uk=uk-(ukt-uk) / 16

[0033] Among them, uk represents the interpolation decimal after smoothing, and the initial value of uk is the ukt value calculated for the first time.

[0034] Furthermore, the method further comprises:

[0035] Compensate for the interpolated decimals after the smoothing process:

[0036] uk * =uk,pos * =pos(-UD≤uk≤UD)

[0037] uk * =uk-1,pos * =pos+1(uk>UD)

[0038] uk * =uk+1,pos * =pos-1(uk<-UD)

[0039] Among them, UD represents the threshold of peak information set when performing peak detection, uk * Indicates the interpolation decimal after compensation, pos * It represents the position of the sampling point after compensation, that is, the position of t1, t2, t3, and t4. Pos+1 means that t1, t2, t3, and t4 are advanced by one sampling point as a whole. Pos-1 means that t1, t2, t3, and t4 are delayed by one sampling point as a whole.

[0040] Further, determining an interpolation coefficient according to the interpolation decimal, and determining optimal sampling point information according to the interpolation coefficient and the information value of the sampling point, specifically includes:

[0041]

[0042] Among them, C -1 , C0, C1, C2 represent the interpolation coefficients;

[0043] Calculating the optimal sampling point information includes:

[0044] t o =C -1 *t1+C0*t2+C1*t3+C2*t4

[0045] Among them, t o Indicates the optimal sampling point information.

[0046] As an optional implementation manner of the method described in the first aspect, the data frame includes the unique code with a length of U and a plurality of data blocks; the data block includes a data segment with a length of D and a pilot segment with a length of P.

[0047] In a second aspect, a time synchronization device based on bit synchronization and frame synchronization is provided, which is used to implement the above-mentioned time synchronization method based on bit synchronization and frame synchronization. The device includes:

[0048] A frame synchronization module, configured to perform differential processing on a received data frame and a unique code at a header of the data frame to obtain a differential data frame and a differential unique code; perform correlation operations on the differential data frame and the differential unique code to obtain correlation peak information; perform peak detection according to the correlation peak information, and determine a frame header position of the data frame based on a position of the detected correlation peak;

[0049] A bit synchronization module is used to sample the correlation peak, select a peak point and adjacent points of the peak point as sampling points, determine an interpolation decimal based on the information value of the sampling point; determine an interpolation coefficient according to the interpolation decimal, and determine the best sampling point information according to the interpolation coefficient and the information value of the sampling point;

[0050] A time synchronization module is used to perform time synchronization based on the optimal sampling point information and the frame header position of the data frame.

[0051] According to a third aspect, a receiver is provided, comprising a time synchronization device based on the joint synchronization of bit synchronization and frame synchronization, wherein the device is used to implement the above-mentioned time synchronization method based on the joint synchronization of bit synchronization and frame synchronization.

[0052] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0053] The present invention utilizes a frame synchronization algorithm based on differential correlation peak detection technology to detect the position of the frame header correlation peak, and directly sends the integral information near the correlation peak to the bit synchronization link to calculate the interpolation coefficient after bit synchronization, thereby jointly synchronizing the frame synchronization and the bit synchronization, greatly reducing the computational complexity of the receiving end during time domain synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0055] Figure 1 It is a flowchart of a time synchronization method based on combined bit synchronization and frame synchronization involved in an embodiment of this specification.

[0056] Figure 2 It is a schematic diagram of the structure of the data frame involved in the embodiments of this specification.

[0057] Figure 3 It is a structural diagram of a time synchronization device based on combined bit synchronization and frame synchronization involved in an embodiment of this specification.

[0058] Figure 4 It is a flowchart of a time synchronization method based on bit synchronization and frame synchronization combined synchronization implemented by FPGA involved in the embodiments of this specification. DETAILED DESCRIPTION

[0059] First of all, it should be noted that the terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "the" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates otherwise.

[0060] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Therefore, it should be recognized by those skilled in the art that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0061] It should be noted that: in other embodiments, the steps of the corresponding method are not necessarily performed in the order shown and described in this specification. In some other embodiments, the steps included in the method may be more or less than those described in this specification. In addition, a single step described in this specification may be decomposed into multiple steps for description in other embodiments; and multiple steps described in this specification may be combined into a single step for description in other embodiments.

[0062] This specification aims to propose a solution to the problem that the existing satellite equipment status monitoring system lacks intuitiveness and user-friendliness. Specifically, one or more embodiments of this specification propose a satellite equipment status monitoring method and device, which parses and transforms the complex information of each communication satellite equipment through an efficient data processing algorithm, so as to present more intuitive and easier to understand status data on the interface.

[0063] The satellite equipment status monitoring method and apparatus described in one or more embodiments of this specification will be further described in detail below in conjunction with the accompanying drawings and specific embodiments of the specification, but this detailed description does not constitute a limitation on the embodiments of this specification.

[0064] Please refer to Figure 1 , Figure 1 A schematic flow chart of a time synchronization method based on bit synchronization and frame synchronization is provided. The method comprises steps S100 to S112:

[0065] S100: The receiver receives a data frame.

[0066] A unique code is inserted into the header of the above data frame, and the unique code is used to locate the frame header during the frame synchronization process.

[0067] In some implementations, the above data frame may be implemented as follows: Figure 2 The structure shown. This data frame structure is similar to the frame structure in the DVB-S2 protocol. A unique code pseudo-random sequence with a length of U is inserted into the frame header for time synchronization. The length of the unique code can be designed to be 32, 64, 128, etc. according to actual conditions. For example, a unique code pseudo-random sequence with a length of U of 64 can be selected, and BPSK modulation is used. The subsequent frame structure is designed with a multi-segment data + pilot structure. The data segment length is D symbols per segment, and QPSK modulation is used. The pilot segment length is P symbols per segment. The data content of the pilot segment is BPSK modulation, which is used for carrier synchronization.

[0068] S102: Perform differential processing on the data frame and the unique code respectively to obtain a differential data frame and a differential unique code.

[0069] In this embodiment, a differential correlation detection method is used to realize frame synchronization. The specific process of step S102 is described below by taking an ADC sampling rate of 4 times the symbol rate as an example.

[0070] Assume that the data after matched filtering at the receiving end is r. First, perform a differential operation on r to eliminate the interference of frequency deviation on frame synchronization. The obtained differential data frame is expressed as:

[0071] y(i)=r(i)×r(i+4)*

[0072] Assume that the unique code data of the frame header is u0, and perform the differential operation on u0 to obtain the differential unique code, which is expressed as:

[0073] u(i)=u0(i)×u0(i+4) * .

[0074] S104: performing correlation operation on the differential data frame and the differential unique code to obtain correlation peak information.

[0075] Since the ADC sampling rate used in step S102 is 4 times the symbol rate, that is, each symbol samples four points, the receiving end needs to take data at intervals of four points each time when performing correlation processing, and each group of data with a length of unique code length U is taken out for correlation operation. Specifically, assuming that the value after correlation is x(j), the expression of the correlation operation is:

[0076]

[0077] Finally, take the modulus value of the complex number x(j) to obtain the relevant peak information:

[0078]

[0079] S106: Perform peak detection according to the correlation peak information, and determine the frame header position of the data frame based on the position of the detected correlation peak.

[0080] The above-mentioned correlation peak position is the position of the unique code in the data frame header. The correlation peak position can be detected by setting a threshold of the peak information. Specifically, data with an information value greater than the threshold is extracted from the correlation peak information as the correlation peak. The above-mentioned threshold can be adaptively set according to demand, and this embodiment does not limit this. For example, the threshold can be set to 0.75U, that is, when the data is greater than 0.75U, it is considered to be a correlation peak.

[0081] S108: Sampling the correlation peak, selecting the peak point and the points adjacent to the peak point as sampling points, and determining the interpolation decimal based on the information values ​​of the sampling points.

[0082] In the bit synchronization process of this embodiment, the OM algorithm is used to obtain the best sampling point information. In this step, the information value near the correlation peak is directly used for calculation, that is, the peak point and the adjacent points of the peak point are selected as sampling points to calculate the interpolation decimal.

[0083] In some implementations, the peak point and the information values ​​of the adjacent points before and after the peak point can be selected for 4-point FFT operation, where the peak point information is used as the second point information among the 4 sampling points. Based on this, the calculation process of the interpolation decimal is:

[0084]

[0085] Among them, ukt represents the interpolation decimal, t2 represents the information of the peak point, t1 represents the information of the sampling point before the peak point, t3 represents the information of the sampling point after the peak point, and t4 represents the information of the second sampling point after the peak point.

[0086] Since the FFT operation only uses 4-point FFT, the ukt value calculated each time will have a large error. Therefore, an IIR filter can be used to smooth the ukt values ​​calculated multiple times, and the processed data is recorded as uk.

[0087] uk=uk-(ukt-uk) / 16.

[0088] The initial value of uk is the value of ukt calculated for the first time.

[0089] In addition, when the receiver is actually working, due to the different noise levels, the size of the correlation peak value will vary, so the obtained ukt value may differ from the peak maximum point by one sampling point. Therefore, it is necessary to make corresponding adjustments based on the obtained uk value so that the sampled data sequence is advanced or delayed by one sampling point for compensation. For example, if the correlation peak is taken as the maximum point value, the uk value range should be -0.5 to 0.5. After comprehensively considering the calculation error and compensation effect, when the uk value is greater than 0.75 or the uk value is less than -0.75, the uk value and data position pos are adjusted as follows:

[0090] uk * =uk,pos * =pos(-0.75≤uk≤0.75)

[0091] uk * =uk-1,pos * =pos+1(uk>0.75)

[0092] uk * =uk+1,pos * =pos-1(uk<-0.75)

[0093] Among them, pos refers to the sampling position of t1, t2, t3, and t4, pos+1 refers to advancing t1, t2, t3, and t4 by one sampling point, and pos-1 refers to delaying t1, t2, t3, and t4 by one sampling point. * Indicates the interpolation decimal after compensation, pos * Indicates the position of the sampling point after compensation.

[0094] S110: Determine an interpolation coefficient according to the interpolation decimal, and determine the best sampling point information according to the interpolation coefficient and the information value of the sampling point.

[0095] In some implementations, a cubic interpolator based on a Farrow structure may be used to perform interpolation operations on the above-mentioned sampled data, and the calculation formula of the interpolation coefficient is as follows:

[0096]

[0097] Among them, C -1 , C0, C1, C2 represent the interpolation coefficients.

[0098] Finally, according to the interpolation coefficient, the four sampling points corresponding to each symbol are multiplied and summed to perform bit synchronization compensation to obtain the final optimal sampling point t o information.

[0099] t o =C -1 *t1+C0*t2+C1*t3+C2*t4

[0100] S112: Perform time synchronization based on the optimal sampling point information and the frame header position of the data frame.

[0101] After determining the optimal sampling point information and the frame header position of the data frame, time synchronization can be achieved through subsequent processing, such as frequency offset correction and phase offset correction.

[0102] Please refer to Figure 4 The above time synchronization method based on the joint synchronization of bit synchronization and frame synchronization can be implemented by FPGA. Figure 4 The flowchart of the time synchronization method based on bit synchronization and frame synchronization combined synchronization implemented by FPGA is shown. The flowchart specifically includes:

[0103] Step 1: After receiving the matched filter data, cache the data into a two-dimensional array register. The register depth is the total number of clock cycles spent on the time synchronization operation.

[0104] Step 2: Perform differential operation on the input data and the data delayed by 4 clk, multiply them, and then add and subtract them to obtain the differential output result.

[0105] Step 3: Divide the imaginary part and the real part of the complex result after differentiation, and use a binary divider to perform the corresponding operation.

[0106] Step 4: Use the result of the divider to query the actan table and get the corresponding actan value. The actan table is stored in the ROM in the form of a coe file, with a total of 4096 sampling points and the amplitude is quantized using 9 bits.

[0107] Step 5: Perform peak capture on the output result. If the data is greater than 0.75 times the unique code length, it is considered that the frame header data is captured.

[0108] Step 6: Take the 4 points near the captured peak data and use the peak data as the second point data.

[0109] Step 7: Process the four-point values, use the t3-t1 value as the imaginary part and the t4-t2 value as the real part, repeat steps 3 and 4, input the divider, query the actan table, and find the single decimal interpolation result ukt.

[0110] Step 8: Use the IIR filter to average the ukt value to obtain the uk value, determine the size of the uk value, and delay and advance the corresponding sampling point.

[0111] Step 9: Use the uk value to calculate the four interpolation coefficients C-1-C2.

[0112] Step 10: Use the interpolation coefficient and the delayed data to perform corresponding multiplication and sum to complete the interpolation compensation operation.

[0113] Corresponding to the above-mentioned time synchronization method based on bit synchronization and frame synchronization, this embodiment also provides a time synchronization device based on bit synchronization and frame synchronization. Figure 3 , Figure 3 The schematic diagram of the structure of a time synchronization device based on bit synchronization and frame synchronization is shown schematically. The device can be deployed at the receiver end, and mainly includes a frame synchronization module and a bit synchronization module.

[0114] Frame synchronization module, used to perform operations:

[0115] Perform differential processing on the received data frame and the unique code at the head of the data frame to obtain a differential data frame and a differential unique code;

[0116] Performing correlation operation on the differential data frame and the differential unique code to obtain correlation peak information;

[0117] Peak detection is performed according to the correlation peak information, and the frame header position of the data frame is determined based on the position of the detected correlation peak.

[0118] The bit synchronization module is used to perform the following operations:

[0119] Sampling the correlation peak, selecting the peak point and the points adjacent to the peak point as sampling points, and determining the interpolation decimal based on the information value of the sampling points;

[0120] The interpolation coefficient is determined according to the interpolation decimal, and the optimal sampling point information is determined according to the interpolation coefficient and the information value of the sampling point.

[0121] This embodiment also provides a receiver, which is equipped with the above-mentioned time synchronization device based on the joint synchronization of bit synchronization and frame synchronization. The receiver can implement the above-mentioned time synchronization method based on the joint synchronization of bit synchronization and frame synchronization through the device.

[0122] It is to be understood that the structure illustrated in the embodiments of this specification does not constitute a specific limitation on the system of the embodiments of this specification. In other embodiments of the specification, the above system may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0123] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0124] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0125] It should be noted that the above examples are only specific embodiments of the present invention, and the present invention is obviously not limited to the above examples, and there are many similar variations. All variations directly derived or associated from the contents disclosed by the technicians in this field should fall within the protection scope of the present invention.

Claims

1. A time synchronization method based on bit synchronization and frame synchronization combined synchronization, suitable for a receiver, characterized in that: include: The receiver receives a data frame, wherein a unique code is inserted into a header of the data frame; Performing differential processing on the data frame and the unique code respectively to obtain a differential data frame and a differential unique code; Performing a correlation operation on the differential data frame and the differential unique code to obtain correlation peak information; Performing peak detection according to the correlation peak information, and determining the frame header position of the data frame based on the position of the detected correlation peak; Perform multiple rounds of sampling on the correlation peak, and for each sampling result, select a peak point and three adjacent points of the peak point as sampling points; Perform FFT operation on the information of the sampling points to obtain the interpolation decimal: Wherein, ukt represents the interpolation decimal, t2 represents the information of the peak point, t1 represents the information of the sampling point before the peak point, t3 represents the information of the sampling point after the peak point, and t4 represents the information of the second sampling point after the peak point; The interpolation decimals corresponding to the multiple rounds of sampling results are smoothed: uk=uk-(ukt-uk) / 16 Among them, uk represents the interpolation decimal after smoothing; Compensate for the interpolated decimals after the smoothing process: uk * =uk,pos * =pos(-UD≤uk≤UD) uk * =uk-1,pos * =pos+1(uk>UD) uk * =uk+1,pos * =pos-1(uk<-UD) Among them, UD represents the threshold of peak information set when performing peak detection, uk * Indicates the interpolation decimal after compensation, pos * represents the position of the sampling point after compensation, pos represents the position of the sampling point before compensation, pos+1 means advancing the sampling point as a whole by one sampling point position, and pos-1 means delaying the sampling point as a whole by one sampling point position; Determine the interpolation coefficient according to the interpolation decimal: Among them, C -1 , C0, C1, C2 represent the interpolation coefficients; According to the interpolation coefficient and the information value of the sampling point, the optimal sampling point information is determined: t o =C -1 *t1+C0*t2+C1*t3+C2*t4 Among them, t o Indicates the optimal sampling point information; Time synchronization is performed based on the optimal sampling point information and the frame header position of the data frame.

2. The method according to claim 1, characterized in that The differential data frame and the differential unique code are subjected to correlation operation to obtain correlation peak information, specifically including: Sampling the differential data frame to obtain a differential data frame sampling sequence having a length equal to that of the unique code; The differential data frame sampling sequence and the differential unique code are correlated, and the correlated value is: Wherein, U represents the length of the unique code, u(j) represents the differential unique code, y(j) represents the differential data frame sampling sequence, x(j) represents the correlated value, and j represents the sampling point; The correlation peak information xgf(j) is calculated according to x(j):

3. The method according to claim 1, characterized in that Performing peak detection according to the relevant peak information specifically includes: Set the threshold of peak information; Data whose information value is greater than the threshold value is extracted from the correlation peak information as the correlation peak value.

4. The method according to claim 1, characterized in that The data frame includes the unique code with a length of U and a number of data blocks; the data block includes a data segment with a length of D and a pilot segment with a length of P.

5. A time synchronization device based on bit synchronization and frame synchronization combined synchronization, used to implement the method according to any one of claims 1 to 4, characterized in that: include: A frame synchronization module, used for performing differential processing on the received data frame and the unique code at the head of the data frame to obtain a differential data frame and a differential unique code; Performing a correlation operation on the differential data frame and the differential unique code to obtain correlation peak information; performing peak detection according to the correlation peak information, and determining the frame header position of the data frame based on the position of the detected correlation peak; A bit synchronization module is used to sample the correlation peak, select a peak point and adjacent points of the peak point as sampling points, determine an interpolation decimal based on the information value of the sampling point; determine an interpolation coefficient according to the interpolation decimal, and determine the best sampling point information according to the interpolation coefficient and the information value of the sampling point; The time synchronization device performs time synchronization based on the optimal sampling point information and the frame header position of the data frame.

6. A receiver, characterized in that: The receiver comprises a time synchronization device based on a joint synchronization of bit synchronization and frame synchronization, and the device is used to implement the method according to any one of claims 1 to 4.

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