An API calling method and device

Abstract

An API call method and apparatus. In the present application, the method is applied to a heterogeneous system, which may include multiple processing engines, and the multiple processing engines include a first processing engine and a second processing engine. The method may be executed by a CPU in the heterogeneous system, and the CPU may be one of the first processing engine and the second processing engine, or a processing engine in the heterogeneous system other than the first processing engine and the second processing engine. The CPU determines a target API to be called; then, based on API call information, a first processing engine is selected to call the target API, and the API call information is used to indicate the efficiency of the first processing engine and the second processing engine in calling the target API respectively. The CPU in the heterogeneous system can select a suitable processing engine to call the target API according to the efficiency of different processing engines in calling the target API, so as to achieve efficient call of the API.

Description

[0001] This application is a divisional application. The application number of the original application is 202010656379.7, and the filing date of the original application is July 9, 2020. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technologies, and in particular, to an API call method and apparatus. Background Art

[0003] With the in-depth popularization of computers and intelligent devices in different application fields, in order to meet the data processing requirements in different fields, in addition to the central processing unit (CPU), many different processing engines have emerged, such as the graphics processing unit (GPU), image processor (IP), digital signal processor (DSP), neural network processing unit (NPU), field programmable gate array (FPGA), etc. For different data processing scenarios, different types of processing engines will have better data processing capabilities in corresponding scenarios.

[0004] To improve the overall data processing capability of a computing system, in addition to the central processing unit (CPU), the computing system may also include processing engines such as GPU, IP, DSP, and NPU. Such a computing system with two or more types of processors may also be referred to as a heterogeneous system.

[0005] In such a heterogeneous system, the CPU can act as a scheduler, interact with other processing engines for data, and assist other processing engines in data processing.

[0006] Currently, since the types of program instructions used by different processing engines in a heterogeneous system are different, the compiler needs to pre-send the program instructions required to be executed by each processing engine (including the CPU), such as application programming interface (API) functions, etc., to the CPU. Then, the CPU sends the program instructions required to be executed by other processing engines to the corresponding processing engines.

[0007] Before sending these program instructions to the CPU, during the development of the program instructions, it is necessary to pre-configure which program instructions will be executed by which processing engine.

[0008] This way of configuring the processing engine for executing program instructions depends on the developer and cannot guarantee whether the configured processing engine for executing program instructions is appropriate or can execute program instructions more efficiently than other processing engines. Summary of the Invention

[0009] This application provides an API call method and apparatus for determining a processing engine that can efficiently call an API.

[0010] In a first aspect, an embodiment of this application provides an application programming interface (API) call method. This method is applied to a heterogeneous system, which may include multiple processing engines. The multiple processing engines include a first processing engine and a second processing engine. This method can be executed by a CPU in the heterogeneous system. The CPU can be one of the first processing engine and the second processing engine, or a processing engine other than the first processing engine and the second processing engine in the heterogeneous system. The CPU first determines a target API to be called; then, based on API call information, it selects the first processing engine to call the target API, where the API call information is used to indicate the efficiency of the first processing engine and the second processing engine in calling the target API respectively. The target API can be a heterogeneous API or other types of APIs.

[0011] Through the above method, the CPU in the heterogeneous system can select a suitable processing engine to call the target API according to the efficiency of different processing engines in calling the target API, realizing the efficient call of the API.

[0012] In a possible implementation, when the CPU selects the first processing engine to call the target API based on the API call information, it can first determine the target parameter scale of the target API. For example, the CPU can first obtain the signature of the target API, and the signature of the target API is used to indicate the target parameter scale of the target API. Then, according to the API call information and the target parameter scale of the target API, it selects the first processing engine, where the API call information indicates the efficiency of the first processing engine and the second processing engine in calling the target API with candidate parameter scales, and the candidate parameter scales include the target parameter scale.

[0013] Through the above method, the CPU in the heterogeneous system can select a suitable processing engine to call the target API with the target parameter scale according to the efficiency of different processing engines in calling the target API with different candidate parameter scales.

[0014] In a possible implementation manner, the embodiments of the present application do not limit the way for the CPU to obtain the signature of the target API. For example, the CPU can first obtain the identifier of the target API; then, determine the signature of the target API from the pre-configured API signature set according to the identifier of the target API, where the target API signature includes the identifier of the target API.

[0015] Through the above method, the CPU can conveniently determine the signature of the target API through the pre-configured API signature set.

[0016] In a possible implementation manner, after the CPU selects the first processing engine to call the target API, it can obtain the program instructions required for the first processing engine to call the target API from the pre-configured API function library of the first processing engine. The API function library of the first processing engine includes the program instructions required for the first processing engine to call one or more APIs respectively, and one or more APIs include the target API; then, send the program instructions required for the first processing engine to call the target API to the first processing engine.

[0017] Through the above method, the pre-configured API function library of the first processing engine includes the program instructions required for the first processing engine to call one or more APIs respectively. The CPU can quickly obtain the program instructions required for the first processing engine to call the target API through the API function library of the first processing engine, which can improve the efficiency of the first processing engine calling the target API.

[0018] In a possible implementation manner, after the CPU selects the first processing engine to call the target API, it can also obtain the intermediate representation of the pre-stored target API; compile the intermediate representation of the target API into the program instructions required for the first processing engine to call the target API; then, send the program instructions required for the first processing engine to call the target API to the first processing engine.

[0019] Through the above method, the CPU can quickly compile and generate the program instructions required for the first processing engine to call the target API through the intermediate representation of the target API, improving the efficiency of the first processing engine calling the target API. In addition, this method can be applied to a variety of different heterogeneous systems, as long as these heterogeneous systems include a processing engine that can compile the intermediate representation of the target API, effectively expanding the application scope.

[0020] In a possible implementation manner, the API call information can also indicate the storage address of the intermediate representation of the target API. When the CPU obtains the intermediate representation of the pre-stored target API, it can determine the storage address of the intermediate representation of the target API from the API call information, and then obtain the intermediate representation of the target API according to the storage address of the intermediate representation of the target API.

[0021] Through the above method, the CPU can also conveniently obtain the intermediate representation of the target API through the API call information. Further, the time required to generate the program instructions for the first processing engine to call the target API can be shortened, and the efficiency of the first processing engine calling the target API can be improved.

[0022] In a possible implementation manner, the API call information is stored in the form of a table. The form of the table is more intuitive, which is convenient for the CPU to obtain relevant information from the API call information.

[0023] In a possible implementation manner, the API call information can also indicate the cache addresses of the program instructions required for the first processing engine and the second processing engine to call the target API respectively. After the CPU selects the first processing engine to call the target API, it can obtain the program instructions required for the first processing engine to call the target API according to the cache address of the program instructions required for the first processing engine to call the target API in the API call information; then, send the program instructions to the first processing engine.

[0024] Through the above method, the CPU can also conveniently obtain the cache address of the program instructions required for the first processing engine to call the target API through the API call information, and can obtain the program instructions required for the first processing engine to call the target API relatively quickly, so that the first processing engine can efficiently call the target API.

[0025] In a possible implementation manner, the cache address of the program instructions required for the first processing engine to call the target API includes the cache address of the program instructions required for the first processing engine to call the target API with the candidate parameter scale, and the candidate parameter scale includes the target parameter scale.

[0026] When the CPU obtains the program instructions required for the first processing engine to call the target API according to the cache address of the program instructions required for the first processing engine to call the target API in the API call information, it can obtain the cache address of the program instructions required for the first processing engine to call the target API with the target parameter scale from the API call information according to the target parameter scale of the target API, and then, obtain the program instructions required for the first processing engine to call the target API with the target reference scale according to the cache address of the program instructions required for the first processing engine to call the target API with the target parameter scale.

[0027] Through the above method, the API call information can indicate the cache addresses of the program instructions required for the first processing engine to call the target APIs with different candidate parameter scales respectively. It is convenient for the CPU to select the program instructions required for the first processing engine to call the target API with the target reference scale.

[0028] Second aspect, an API call device is further provided in an embodiment of the present application. The beneficial effects can be referred to the description of the first aspect and will not be elaborated here. This device has the functions to implement the behaviors in the method examples of the first aspect. The functions can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions. In a possible design, the structure of the device includes a determination unit and a selection unit. Optionally, it further includes an instruction determination unit and a sending unit. These units can execute the corresponding functions in the method examples of the first aspect. For specific details, refer to the detailed description in the method examples and will not be elaborated here.

[0029] Third aspect, a computing device is further provided in an embodiment of the present application. The beneficial effects can be referred to the description of the first aspect and will not be elaborated here. The structure of the computing device includes a processor and a memory. The processor is configured to support the device to execute the corresponding functions in the method of the first aspect. The memory is coupled to the processor and stores the necessary program instructions and data of the computing device. The structure of the computing device further includes a communication interface for communicating with other devices.

[0030] Fourth aspect, a computer-readable storage medium is further provided in the present application. Instructions are stored in the computer-readable storage medium. When it runs on a computer, it enables the computer to execute the method of the first aspect.

[0031] Fifth aspect, a computer program product containing instructions is further provided in the present application. When it runs on a computer, it enables the computer to execute the method of the first aspect.

[0032] Sixth aspect, a computer chip is further provided in the present application. The chip is connected to the memory. The chip is used to read and execute the software program stored in the memory and execute the method of the first aspect. Description of the Drawings

[0033] Figure 1A It is a schematic diagram of the architecture of a system provided by the present application;

[0034] Figure 1B It is a schematic diagram of the architecture of a system provided by the present application;

[0035] Figure 1C It is a schematic diagram of the architecture of a system provided by the present application;

[0036] Figure 1D It is a schematic diagram of the architecture of a system provided by the present application;

[0037] Figure 2 It is a schematic diagram of a heterogeneous API call method provided by the present application;

[0038] Figure 3A schematic structural diagram of a heterogeneous system provided by this application;

[0039] Figure 4 A schematic structural diagram of a heterogeneous system provided by this application;

[0040] Figure 5 A schematic structural diagram of a heterogeneous API call device provided by this application;

[0041] Figure 6 A schematic structural diagram of a device provided by this application. Detailed implementation manners

[0042] As Figure 1A shown, it is a schematic structural diagram of a system applicable to an embodiment of this application. The system includes a compiler 100 and a heterogeneous system 200. The heterogeneous system 200 includes multiple processing engines 210. In the embodiment of this application, the processing engine 210 is a unit capable of performing data processing operations. The embodiment of this application does not limit the specific type and form of the processing engine 210. Any unit capable of performing data processing operations can be used as the processing engine 210.

[0043] The multiple processing engines 210 may include at least one CPU, and the remaining processing engines 210 may be processing engines 210 of a type different from that of the CPU. For example, the remaining processing engines 210 may include some or all of the following:

[0044] CPU, GPU, IP, DSP, NPU, or FPGA.

[0045] One of the multiple processing engines 210 may serve as a scheduler for data interaction with the remaining processing engines 210 to assist the remaining processing engines 210 in data processing. In the embodiment of this application, taking the scheduler as the CPU as an example, for the convenience of description, in the embodiment of this application, the CPU serving as the scheduler is called the scheduling CPU, or the main CPU (host CPU).

[0046] The embodiment of this application does not limit the deployment manner of the heterogeneous system 200. For example, the heterogeneous system 200 may be deployed in a centralized manner on a computing node, or may be deployed in a distributed manner on multiple computing nodes.

[0047] The compiler 100 can compile a source program including heterogeneous APIs into program instructions that can run in a heterogeneous system 200 (such as a host CPU) or into an intermediate representation (IR) of the heterogeneous APIs. The compiler 100 can be independently deployed from the heterogeneous system 200 on different computing nodes, or can be co-deployed with the heterogeneous system 200 on the same computing node.

[0048] Specifically, after obtaining the prototype declaration files of one or more heterogeneous APIs, the compiler 100 can identify the prototype declaration files of the one or more heterogeneous APIs and edit the heterogeneous API header files, which include the signatures of each heterogeneous API. For ease of description, the set composed of the signatures of one or more heterogeneous APIs is called a heterogeneous API signature set.

[0049] The prototype declaration file of each heterogeneous API can indicate the parameter scale of the heterogeneous API, and the parameter scale can describe the scale of the parameters required for calling the heterogeneous API (such as the types and quantities of the parameters).

[0050] The prototype declaration file of each heterogeneous API can also indicate the relevant information of the heterogeneous API, such as some information other than the function body of the heterogeneous API, such as the number of parameters required for calling the heterogeneous API, the types of the parameters, and the parameter names.

[0051] It should be noted that in the embodiments of the present application, the size of the parameter does not refer to the numerical size of the parameter, but refers to the number of bytes occupied by the parameter in memory or in the processing engine 210.

[0052] The embodiments of the present application do not limit the manner in which the prototype declaration file of the heterogeneous API indicates the parameter scale of the heterogeneous API. For example, identifiers corresponding to different parameter scales can be preset, and different identifiers indicate different parameter scales of the heterogeneous API. For example, identifier A can correspond to 2 to 4 parameters with a parameter size of 2 to 4 bits, and identifier B can correspond to 5 to 7 parameters with a parameter size of 5 to 10 bits. The compiler 100 determines the parameter scale of the heterogeneous API by identifying the identifier corresponding to the parameter scale in the prototype declaration file of the heterogeneous API.

[0053] For another example, an expression for calculating the parameter scale can be predefined, and the parameter information required for calling the heterogeneous API needs to be brought into the expression to obtain the expression of the parameter scale of the heterogeneous API. The compiler 100 determines the parameter scale of the heterogeneous API by identifying the expression of the parameter scale in the prototype declaration file of the heterogeneous API.

[0054] Illustratively, the following statement can be added to the prototype declaration file of the heterogeneous API:

[0055] #pragma HAPI_PARA_SIZE(hapi_para_size_expr)

[0056] The #pragma HAPI_PARA_SIZE is used to represent the parameter scale of the heterogeneous API declared here, and hapi_para_size_expr is an expression of the parameter scale.

[0057] For example, the expression of the parameter scale can be max(max(A.Size(), B.Size()), C.Size())), where max(max(A.Size(), B.Size()), C.Size()) means to take the maximum value of Size among the three parameters A, B, and C as the parameter scale.

[0058] The embodiments of the present application do not limit the specific content of the expression of the parameter scale. Generally, the operands appearing in the expression can be positive integer constants, positive integer parameters in the corresponding heterogeneous API prototype declaration file, positive integer member variables of the parameters, or member functions with a positive integer return value.

[0059] The compiler 100 can generate the signature of the heterogeneous API. In the embodiments of the present application, the signature of the heterogeneous API includes the identifier of the heterogeneous API (used to uniquely identify the heterogeneous API), and can also include the relevant content of the prototype declaration of the heterogeneous API, such as the number of parameters required to call the heterogeneous API, the type of each parameter, and the size of the parameter, the type of the return value of the heterogeneous API (i.e., the result value generated after calling the heterogeneous API), and the number of bytes occupied by the return value of the heterogeneous API in the host CPU. The signature of the heterogeneous API can also indicate the parameter scale of the heterogeneous API.

[0060] The indication method of the parameter scale of the heterogeneous API in the signature of the heterogeneous API is similar to the method of indicating the parameter scale of the heterogeneous API in the prototype declaration file of the heterogeneous API. For specific details, please refer to the foregoing content and will not be elaborated here. In the signature of the heterogeneous API, the parameter scale of the heterogeneous API can be indicated in the same way as in the prototype declaration file of the heterogeneous API, or in a different way. The embodiments of the present application do not limit this.

[0061] The heterogeneous API signature set can be pre-deployed in the heterogeneous system 200, such as pre-loaded in the host CPU. In addition to the heterogeneous API signature set, in the embodiments of the present application, the heterogeneous API function libraries of each processing engine 210 in the heterogeneous system 200 can also be pre-deployed in the heterogeneous system 200, such as pre-loaded in the host CPU.

[0062] The heterogeneous API library of any processing engine 210 includes the program instructions required for the processing engine 210 to call the heterogeneous API. The types of program instructions used by different processing engines 210 may be different. The program instructions in the heterogeneous API library of any processing engine 210 are to convert the source program including the heterogeneous API into program instructions that can be directly called by the processing engine 210. The heterogeneous API libraries of different types of processing engines 210 may be different.

[0063] Among them, the source program including the heterogeneous API is the original code of the heterogeneous API, which is the most original program instructions when writing the heterogeneous API and usually cannot be directly called by the processor engine.

[0064] If the heterogeneous API libraries of each processing engine 210 are not pre-deployed in the heterogeneous system 200, the heterogeneous system 200 can have a dynamic compilation function. For example, the host CPU has a dynamic compilation function. The host CPU can compile the intermediate representation of one or more heterogeneous APIs obtained from the compiler 100 into program instructions required for different processing engines 210 to call the heterogeneous API.

[0065] Among them, the intermediate representation of the heterogeneous API is the program instructions compiled by the compiler 100 based on the heterogeneous API source program and can be recognized by different heterogeneous systems 200 (such as the host CPU in the heterogeneous system 200).

[0066] In the embodiments of the present application, the code generated by the compiler 100 triggers the host CPU in the heterogeneous system 200 to call the heterogeneous API. For example, the statement calling the heterogeneous API in the code generated by the compiler 100 is changed to call the host CPU, and the host CPU calls the heterogeneous API to determine the processing engine that executes the API in the heterogeneous system. This heterogeneous API can be called the target heterogeneous API.

[0067] After determining that it is necessary to call the target heterogeneous API, the host CPU in the heterogeneous system 200 can select the processing engine 210 corresponding to the target heterogeneous API (this processing engine 210 can also be called the target processing engine) from multiple processing engines 210 in the heterogeneous system 200 to call the target heterogeneous API.

[0068] In the embodiments of the present application, the host CPU in the heterogeneous system 200 can independently determine the target processing engine for calling the target heterogeneous API without human participation, which can improve the efficiency of heterogeneous API calls in the heterogeneous system 200.

[0069] The following lists two possible deployment methods of the system in actual scenarios.

[0070] Such as Figure 1BAs shown in the figure, it is a schematic structural diagram of another system applicable to the embodiments of the present application. In this system, the compiler 100 can run on a development machine and on a computing node where the heterogeneous system 200 is deployed. The heterogeneous system 200 includes multiple processing engines 210, such as a CPU, a GPU, a DSP, etc. Among them, the CPU is the host CPU.

[0071] The compiler 100 can compile a source program including heterogeneous APIs to generate program instructions that can run on the host CPU, which is denoted as "application executable code" here. The application executable code is deployed in the heterogeneous system 200. The host CPU in the heterogeneous system can determine the processing engine (i.e., the target processing engine) that calls the heterogeneous API according to the application executable code.

[0072] It should be noted that the host CPU may include a module for determining the operation of the target processing engine that calls the heterogeneous API. For example, this module can be a heterogeneous runtime (HRT). The heterogeneous runtime can be a module in the host CPU responsible for executing heterogeneous programs (heterogeneous programs are programs executed by one or more of the multiple processing engines in the heterogeneous system, such as heterogeneous APIs), and implementing heterogeneous program scheduling (such as determining the processing engine that executes the heterogeneous program, sending the heterogeneous program to the corresponding processing engine to trigger the execution of the heterogeneous program, etc.). The name of this module is not limited here, and "heterogeneous runtime" is only an example.

[0073] As Figure 1C As shown in the figure, it is a schematic structural diagram of another system applicable to the embodiments of the present application. In this system, the compiler 100 can run on a development machine and on a computing node where the heterogeneous system 200 is deployed. The heterogeneous system 200 includes multiple processing engines 210, such as a CPU, a GPU, a DSP, etc. Among them, the CPU is the host CPU.

[0074] The compiler 100 can compile a source program including heterogeneous APIs to generate an intermediate representation of the heterogeneous API, and deploy (or store) the intermediate representation of the heterogeneous API in the heterogeneous system 200 (such as the host CPU). When the host CPU in the heterogeneous system 200 determines that it is necessary to call the heterogeneous API, it can first determine the processing engine (i.e., the target processing engine) that calls the heterogeneous API, and then compile the intermediate representation of the heterogeneous API into program instructions required for the target processing engine to call the heterogeneous API.

[0075] Differentiating from the function of the host CPU in the system as Figure 1B shown, in the system as Figure 1CIn the system shown, the host CPU (or the heterogeneous runtime in the host CPU) can not only execute heterogeneous programs and implement heterogeneous program scheduling, but also has a dynamic compilation function, which can compile the intermediate representation of a heterogeneous API into the program instructions required for different processing engines to call the heterogeneous API in real time.

[0076] As Figure 1D shown, it is a schematic structural diagram of another system applicable to the embodiments of the present application. The system includes a compiler 100 and a heterogeneous cluster 20. The heterogeneous cluster 20 includes multiple heterogeneous systems 200. The specific structure of the heterogeneous system 200 can refer to the structure of the heterogeneous system 200 shown in FIG. 1, which will not be elaborated here.

[0077] One of the heterogeneous systems 200 in the heterogeneous cluster 20 or the processing engine 210 in one of the heterogeneous systems 200 can be used as a scheduler to interact with the processing engines 210 in the remaining heterogeneous systems 200 (and the remaining processing engines 210 in the heterogeneous systems 200 where they are located) and assist the processing engines 210 in the remaining heterogeneous systems 200 (and the remaining processing engines 210 in the heterogeneous systems 200 where they are located) in data processing.

[0078] The functions of the compiler 100 can be referred to the foregoing content, which will not be elaborated here. The operations performed by the heterogeneous system 200 or the processing engine 210 in the heterogeneous system 200 as the scheduler can be referred to the operations performed by the host CPU as Figure 1B shown. Specifically, it can be referred to the foregoing content, which will not be elaborated here.

[0079] Next, taking the system as Figures 1A - 1C shown as an example, in combination with Figure 2 the heterogeneous API call method provided by the embodiments of the present application will be described. When the processing engine 210 acting as the scheduler in the heterogeneous system 200 is another processing engine 210, the method of the embodiments of the present application is also applicable, except that the execution subject is different. The method includes:

[0080] Step 201: The host CPU determines the target heterogeneous API to be called.

[0081] In the embodiments of the present application, there is no limitation on the manner in which the host CPU determines the target heterogeneous API to be called. For example, the compiler 100 can transfer the call right of the target heterogeneous API to the host CPU. Specifically, the compiler 100 can change the call statement of the target heterogeneous API and change the caller of the target heterogeneous API to the host CPU (the call statement can be invokeHRT(…)). The compiler 100 can change the caller of the target heterogeneous API to a module in the host CPU. For example, the module can be a heterogeneous runtime or other modules.

[0082] Optionally, the host CPU can also determine the information of the target heterogeneous API, and the information of the target heterogeneous API can be notified to the host CPU by the compiler 100. The information of the target heterogeneous API can include the identifier of the target heterogeneous API, and can also include the cache address of the parameters required to call the target heterogeneous API and the storage address of the return value of the heterogeneous API.

[0083] Among them, the cache address of the parameters required to call the target heterogeneous API can be used to point to the buffer pointer representing the parameters required to call the target heterogeneous API. If the heterogeneous API has no return value, the storage address of the return value of the heterogeneous API can be represented by a null address.

[0084] Step 202: The host CPU selects a target processing engine from multiple processing engines 210 based on the heterogeneous API call information to call the target heterogeneous API.

[0085] The heterogeneous API call information can indicate the efficiency of each of the multiple processing engines 210 in the heterogeneous system to call the target heterogeneous API, and there are multiple ways to characterize the efficiency of calling the target heterogeneous API.

[0086] For example, the heterogeneous API call information can characterize the efficiency of the processing engine 210 for the target heterogeneous API through the call time (this time can be a relative time or an absolute time).

[0087] For another example, the heterogeneous API call information can also characterize the efficiency of the processing engine 210 for the target heterogeneous API through the serial numbers of the multiple processing engines 210. The serial numbers of the processing engines 210 can be determined according to the time when the multiple processing engines 210 call the target heterogeneous API, or can be determined according to the preset call order of the multiple processing engines 210, or can be determined according to the performance of the multiple processing engines 210. The setting method of the serial numbers of the processing engines 210 is not limited here.

[0088] For another example, the heterogeneous API call information can also characterize the efficiency of the processing engine 210 for the target heterogeneous API through the call speed.

[0089] Any way that can characterize the efficiency of each of the multiple processing engines 210 to call the target heterogeneous API is applicable to the embodiments of the present application, and the present application does not limit the way to characterize the efficiency of the processing engine to call the target heterogeneous API.

[0090] It should be noted that, in the embodiments of the present application, the heterogeneous API call information can indicate the efficiency of all the processing engines 210 in the heterogeneous system in calling the target heterogeneous API as an example for illustration. In some application scenarios, the heterogeneous API call information can also only indicate the efficiency of some of the multiple processing engines 210 in the heterogeneous system in calling the target heterogeneous API.

[0091] In the embodiments of the present application, the heterogeneous API call information is used to characterize the efficiency of the processing engine 210 in calling the target heterogeneous API by the call time as an example for illustration. Other ways of characterizing efficiency can refer to this way. The difference is that, in the embodiments of the present application, the time value is used in the heterogeneous API call information to characterize the efficiency of the processing engine 210 in calling the target heterogeneous API, and when other ways of characterizing efficiency are adopted, the time value can be replaced by other parameters for characterizing efficiency.

[0092] The heterogeneous API call information includes the time required for each of the multiple processing engines 210 to call one or more heterogeneous APIs respectively. The time required for the processing engine 210 to call a heterogeneous API can also be understood as the time for the processing engine 210 to execute the heterogeneous API. The one or more heterogeneous APIs include the target heterogeneous API.

[0093] The host CPU can, based on the heterogeneous API call information, select, from the multiple processing engines 210, the processing engine 210 that requires the shortest time to call the target heterogeneous API and is currently available as the target processing engine. The host CPU can also, based on the heterogeneous API call information, determine, from the multiple processing engines 210, one or more processing engines 210 that require less time to call the target heterogeneous API than the time threshold and are currently available, and determine the target processing engine from the one or more processing engines 210. The currently available processing engine 210 refers to the processing engine 210 that is currently in an idle state and can execute the target heterogeneous API.

[0094] The heterogeneous API call information can be pre-configured in the heterogeneous system 200. The time required for each processing engine 210 included in the heterogeneous API call information to call one or more heterogeneous APIs can be determined according to empirical values or can be determined by means such as test statistics. In the embodiments of the present application, the specific information included in the heterogeneous API call information is not limited, and any information that can indicate the time required for each of the multiple processing engines 210 to call one or more heterogeneous APIs can be used as the heterogeneous API call information.

[0095] Since the specific information included in the heterogeneous API call information is different, the way for the host CPU to select the target processing engine is different. The following are several ways listed:

[0096] (1). The heterogeneous API call information includes the identifier of the heterogeneous API and the time required for each processing engine 210 in the multiple processing engines 210 to call one or more heterogeneous APIs respectively.

[0097] The information included in the heterogeneous API call information can be seen in Table 1:

[0098] Table 1

[0099]

[0100] It can be seen from Table 1 that the heterogeneous API call information includes the time required for each processing engine 210 to call M heterogeneous APIs respectively. Taking processing engine 1 as an example, the heterogeneous API call information includes the time required for processing engine 1 to call M heterogeneous APIs respectively. The required times are T11, T12,..., T1M respectively.

[0101] Different types of heterogeneous APIs may require different times for the processing engine 210 to call. For example, for a heterogeneous API used to implement convolution operations, the GPU takes a shorter time to call this heterogeneous API, while the CPU takes a longer time. For a heterogeneous API used to implement logical operations, the GPU takes a longer time to call this heterogeneous API, while the CPU takes a shorter time.

[0102] It can be seen from Table 1 that the heterogeneous API call information can also include the parameter scale of each heterogeneous API. In this way, the parameter scale of each heterogeneous API can only be for reference and not used as the basis for selecting the target processing engine. For example, the parameter scales of each heterogeneous API in Table 1 can be set to the same value, that is, the time difference for the processing engine 210 to call the same heterogeneous API under different parameter scales is not considered.

[0103] Based on the heterogeneous API call information as shown in Table 1, the host CPU can determine the corresponding time information of the target heterogeneous API in the heterogeneous API call information according to the identifier of the target heterogeneous API. For example, it can locate the row in Table 1 where the identifier of the target heterogeneous API is located.

[0104] After determining the time information corresponding to the target heterogeneous API in the heterogeneous API call information, the host CPU selects a target processing engine according to the time information. For example, the processing engine 210 with the shortest time required to call the target heterogeneous API can be selected as the target processing engine. For example, if the target heterogeneous API is used to implement convolution operations, the host CPU can select the GPU with a shorter time required to call the target heterogeneous API as the target processing engine. If the target heterogeneous API is used to implement logical operations, the host CPU can select the CPU with a shorter time required to call the target heterogeneous API as the target processing engine.

[0105] The host CPU can also select the target processing engine based on the time information according to other selection strategies (such as the load balancing strategy, which ensures that the number or time of heterogeneous API call operations executed by each processing engine 210 is the same).

[0106] (2) The heterogeneous API call information includes the identifier of the heterogeneous API and the time required for each of the multiple processing engines 210 to call one or more heterogeneous APIs. The time required for each processing engine 210 to call any heterogeneous API includes the time required for each processing engine 210 to call the heterogeneous API with one or more parameter scales (which can also be understood as candidate parameter scales). The parameter scale can also be understood as a candidate parameter scale. The number of parameter scales is not limited here and can be one or more. The parameter scale includes the target parameter scale of the target heterogeneous API.

[0107] For the information included in the heterogeneous API call information, please refer to Table 2:

[0108] Table 2

[0109]

[0110] As can be seen from Table 2, the heterogeneous API call information includes the time required for each processing engine 210 to call M heterogeneous APIs. Taking processing engine 1 as an example, the heterogeneous API call information includes the time required for processing engine 1 to call M heterogeneous APIs. The time required for processing engine 1 to call any heterogeneous API includes the time required to call the heterogeneous API with one or more parameter scales. The required times are T111, T122,..., T1M respectively. S 。

[0111] As can be seen from Table 2, one or more parameter scales of each heterogeneous API are marked in the heterogeneous API call information. In this way, the parameter scale of each heterogeneous API can be used as the basis for selecting the target processing engine. The time shown in Table 2 is determined by combining the time differences of the processing engine 210 calling the same heterogeneous API under different parameter scales.

[0112] In Table 2, the parameter scale corresponding to a heterogeneous API can be all possible values or some possible values of the parameter scale of the heterogeneous API when actually calling the heterogeneous API. For example, there may be S values for the parameter scale corresponding to the heterogeneous API in Table 2. The time when the processing engine 2101 calls the heterogeneous API is marked for each value in Table 2. Table 2 takes the number of all possible values of the parameter scale of each heterogeneous API as S as an example. In fact, the number of possible values of the parameter scale of each heterogeneous API can also be different.

[0113] Based on the heterogeneous API call information shown in Table 2, the host CPU can obtain the signature of the target heterogeneous API according to the identifier of the target heterogeneous API, and determine the target parameter scale of the target heterogeneous API from the signature of the target heterogeneous API. According to the identifier and the target parameter scale of the target heterogeneous API, determine the corresponding time information of the target heterogeneous API in the heterogeneous API call information, such as the row in Table 2 where the identifier and the target parameter scale of the target heterogeneous API are located can be located. After the host CPU determines the corresponding time information of the target heterogeneous API in the heterogeneous API call information, the method of selecting the target processing engine according to this time information can refer to the relevant description in method (1) and will not be elaborated here.

[0114] Among them, when the host CPU obtains the signature of the target heterogeneous API, it can determine the signature of the target heterogeneous API from the pre-configured heterogeneous API signature set according to the identifier of the target heterogeneous API.

[0115] In Table 2, the parameter scale corresponding to a heterogeneous API can also be classifying all possible values of the parameter scale when actually calling the heterogeneous API into S categories, and each category corresponds to a value range of the parameter scale. For example, the possible values of the parameter scale corresponding to the heterogeneous API in Table 2 may be divided into S categories. The time when the processing engine 2101 calls the heterogeneous API is marked for each value range of the parameter scale in Table 2. Table 2 takes the number of all possible values of the parameter scale of each heterogeneous API as S as an example. In fact, the possible values of the parameter scale of each heterogeneous API can be divided into different numbers of categories according to the specific scenario.

[0116] Based on the heterogeneous API call information shown in Table 2, the host CPU can obtain the signature of the target heterogeneous API according to the identifier of the target heterogeneous API, and determine the target parameter scale of the target heterogeneous API from the signature of the target heterogeneous API. According to the identifier of the target heterogeneous API and the target parameter scale, determine the corresponding time information of the target heterogeneous API in the heterogeneous API call information, such as the row where the class to which the identifier and target parameter scale of the target heterogeneous API in Table 2 belong can be located. After the host CPU determines the corresponding time information of the target heterogeneous API in the heterogeneous API call information, the method of selecting the target processing engine according to this time information can refer to the relevant description in method (1), which will not be elaborated here.

[0117] Among them, the method for the host CPU to obtain the signature of the target heterogeneous API can refer to the foregoing description and will not be elaborated here.

[0118] (3). The heterogeneous API call information includes the time required for each processing engine 210 in multiple processing engines 210 to call the heterogeneous API, and the time required for each processing engine 210 to call the heterogeneous API is a time value.

[0119] The information included in the heterogeneous API call information can be seen in Table 3:

[0120] Table 3

[0121]

[0122] It can be seen from Table 3 that the heterogeneous API call information includes the time required for each processing engine 210 to call the heterogeneous API respectively. Taking processing engine 1 as an example, the time required for processing engine 1 to call any heterogeneous API is T1. T1 can be an average value or an empirical value.

[0123] It can be seen from Table 3 that the heterogeneous API call information may not include the parameter scale of each heterogeneous API and the identifier of the heterogeneous API. In this case, the parameter scale and identifier of each heterogeneous API are not used as the basis for selecting the target processing engine. That is to say, the times shown in Table 3 do not consider the time differences in the processing engine 210 calling the heterogeneous API under different heterogeneous APIs and different parameter scales.

[0124] Based on the heterogeneous API call information shown in Table 3, the host CPU can select the processing engine 210 with the shortest time required to call the heterogeneous API as the target processing engine based on the heterogeneous API call information. The host CPU can also select the target processing engine based on other selection strategies and heterogeneous API call information (such as a load balancing strategy, which is to ensure that the number of times or the time of the heterogeneous API call operations executed by each processing engine 210 is the same).

[0125] It should be noted that the time required for each processing engine 210 included in the heterogeneous API call information to call one or more heterogeneous APIs can be absolute time or relative time. For example, based on the absolute time required for a certain processing engine 210 to call a heterogeneous API, the relative time required for other processing engines 210 to call one or more heterogeneous APIs is determined. The time required for each processing engine 210 to call one or more heterogeneous APIs is essentially used to characterize the efficiency of this processing engine 210 in calling heterogeneous APIs. Any time value that can characterize the efficiency of this processing engine 210 in calling heterogeneous APIs can be used as the time required for the processing engine 210 to call heterogeneous APIs, and then the heterogeneous API call information is constructed.

[0126] After the host CPU selects the target processing engine, it can execute step 203.

[0127] Optionally, after the host CPU selects the target processing engine, it can mark the status of the target processing engine as unavailable to avoid subsequently selecting the target processing engine to call other heterogeneous APIs. Until the target processing engine finishes calling the target heterogeneous API, the host CPU marks the status of the target processing engine as available.

[0128] Step 203: The host CPU triggers the target processing engine to call the target heterogeneous API.

[0129] When the host CPU executes step 203, it can execute the processing operations required for the target processing engine to call the target heterogeneous API. The host CPU can send the program instructions required for the target processing engine to call the target heterogeneous API to the target processing engine. It can also notify the target processing engine of the cache address of the parameters required to call the heterogeneous API and the storage address of the return value of this heterogeneous API, so that the target processing engine can obtain the parameters required to call the heterogeneous API from the cache address and store the return value of this target heterogeneous API in the corresponding storage address.

[0130] Before the host CPU can send the program instructions required for the target processing engine to call the target heterogeneous API to the target processing engine, the host CPU needs to first determine the program instructions required for the target processing engine to call the target heterogeneous API. Embodiments of the present application provide two ways to determine the program instructions required for the target processing engine to call the target heterogeneous API:

[0131] Method 1: In the heterogeneous system 200, the heterogeneous API function libraries of each processing engine 210 are pre-configured.

[0132] As Figure 3 shown, in the heterogeneous system 200, a signature set of the heterogeneous API and the heterogeneous API function libraries of each processing engine 210 are pre-configured.

[0133] The host CPU can select the program instructions required for the target processing engine to call the target heterogeneous API from the heterogeneous API function library of the target processing engine.

[0134] The heterogeneous API function library of the processing engine 210 includes the identifier of the heterogeneous API and the program instructions required for the processing engine 210 to call the target heterogeneous API. The host CPU selects the program instructions required for the target processing engine to call the target heterogeneous API from the heterogeneous API function library of the target processing engine according to the identifier of the target heterogeneous API.

[0135] Method 2: In the heterogeneous system 200, the heterogeneous API function libraries of each processing engine 210 are not configured, and the host CPU pre-stores the intermediate representation of the target heterogeneous API.

[0136] As Figure 4 shown, the compiler 100 can pre-compile the source program including the target heterogeneous API to generate the intermediate representation of the target heterogeneous API. The host CPU in the heterogeneous system 200 can pre-store the intermediate representation of the target heterogeneous API. Embodiments of the present application do not limit the way in which the host CPU in the heterogeneous system 200 can pre-configure the intermediate representation of the target heterogeneous API. For example, the host CPU in the heterogeneous system 200 pre-stores the intermediate representations of one or more heterogeneous APIs, where the intermediate representations of the one or more heterogeneous APIs include the intermediate representation of the target heterogeneous API. Another example is that the host CPU in the heterogeneous system 200 configures the intermediate representations of one or more heterogeneous APIs under the trigger of the user, where the intermediate representations of the one or more heterogeneous APIs include the intermediate representation of the target heterogeneous API.

[0137] When the host CPU determines that the target heterogeneous API needs to be called, it can compile the intermediate representation of the target heterogeneous API into program instructions required for the target processing engine to call the target heterogeneous API, and send them to the target processing engine.

[0138] In this method, the host CPU (which can also be understood as the heterogeneous runtime) has the function of dynamic compilation. In the embodiments of the present application, the heterogeneous API call information may also indicate the storage address of the intermediate representation of the target heterogeneous API. Taking the first representation method of the heterogeneous API call information in the foregoing description as an example.

[0139] Referring to Table 4, the heterogeneous API call information also includes the storage addresses of the intermediate representations of one or more heterogeneous APIs.

[0140] Table 4

[0141]

[0142]

[0143] As can be seen from Table 4, the heterogeneous API call information includes the time required for each processing engine 210 to call M heterogeneous APIs respectively, and the storage addresses of the intermediate representations of the M heterogeneous APIs. The storage addresses of the intermediate representations of the M heterogeneous APIs are Storage Address 1, Storage Address 2,..., Storage Address M respectively.

[0144] After the host CPU determines the target processing engine that needs to call the target heterogeneous API, it can obtain the storage address of the intermediate representation of the target heterogeneous API from the heterogeneous API call information. After that, it can obtain the intermediate representation of the target heterogeneous API according to the storage address of the intermediate representation of the target heterogeneous API.

[0145] It should be noted that the method of indicating the storage address of the intermediate representation of the heterogeneous API in the above heterogeneous API call information is only an example, and the embodiments of the present application do not limit the method of indicating the storage address of the intermediate representation of the heterogeneous API in the heterogeneous API call information.

[0146] Generally, for the same heterogeneous API, the program instructions for the same processing engine to call the heterogeneous API with different parameter scales may also be different. This is because when the host CPU compiles the intermediate representation of the heterogeneous API, it will make adjustments according to the parameter scale, and perform different memory layouts and loop optimizations on the program instructions, resulting in differences in the program instructions for the same processing engine to call the heterogeneous API with different parameter scales.

[0147] In the embodiment of the present application, after the host CPU compiles the intermediate representation of the target heterogeneous API into the program instructions required for the target processing engine to call the target heterogeneous API, the host CPU can also cache the program instructions required for the target processing engine to call the target heterogeneous API. So that when the host CPU determines again that the target processing engine needs to call the target heterogeneous API, the host CPU can directly obtain the cached program instructions required for the target processing engine to call the target heterogeneous API.

[0148] The host CPU can store the program instructions generated by compilation for a processing engine to call the heterogeneous API each time the intermediate representation of the heterogeneous API is compiled into the program instructions required for a processing engine to call the heterogeneous API. Optionally, when the host CPU stores the program instructions generated by compilation for a processing engine to call the heterogeneous API, it can also identify the identifier of the heterogeneous API and the parameter scale.

[0149] Optionally, the host CPU can store the program instructions required for different processing engines 210 to call the heterogeneous API that have been compiled and generated into the heterogeneous API call information. That is, the heterogeneous API call information can indicate the cache addresses of the program instructions required for multiple processing engines to call the heterogeneous API, and the heterogeneous API includes the target heterogeneous API. For different parameter scales, the cache address of the program instructions required for each processing engine to call the heterogeneous API includes the cache addresses of the program instructions required for the processing engine to call the heterogeneous API with different parameter scales.

[0150] Taking the second representation method of the heterogeneous API call information in the foregoing description as an example, referring to Table 5, the heterogeneous API call information also includes the cache addresses of the program instructions required for multiple processing engines to call the heterogeneous API.

[0151] Table 5

[0152]

[0153]

[0154] As can be seen from Table 5, the heterogeneous API call information includes the time required for each processing engine 210 to call M heterogeneous APIs respectively and the cache addresses of the program instructions required for multiple processing engines to call M heterogeneous APIs. Taking processing engine 1 as an example, the heterogeneous API call information includes the time required for processing engine 1 to call M heterogeneous APIs respectively and the cache addresses of the program instructions required for the processing engine to call M heterogeneous APIs. The time required for processing engine 1 to call any heterogeneous API includes the time required to call the heterogeneous API with different parameter scales. The required times are T111, T122,..., T1M respectively. S。The cache addresses of the program instructions required for the processing engine 1 to call a heterogeneous API include the cache addresses of the program instructions required for the processing engine 1 to call this heterogeneous API with different parameter scales. The cache addresses are respectively cache address 11, cache address 12,..., cache address 13.

[0155] In the above description, the cache addresses of the program instructions required for each processing engine to call each heterogeneous API are included in the heterogeneous API call information as an example for illustration. In actual applications, the heterogeneous API call information may also only include the cache addresses of the program instructions required for some processing engines to call one or more heterogeneous APIs, that is, the heterogeneous API call information may only include the cache addresses of the program instructions required for some processing engines to call multiple heterogeneous APIs, or may include the cache addresses of the program instructions required for some processing engines to call some heterogeneous APIs. In addition, the information in the heterogeneous API call information (such as the time required for each processing engine 210 to call different heterogeneous APIs, the cache addresses of the program instructions required for each processing engine 210 to call different heterogeneous APIs, etc.) can be updated in real time.

[0156] When the heterogeneous API call information includes the cache addresses of the program instructions required for each processing engine to call multiple heterogeneous APIs, after the host CPU determines the target processing engine that needs to call the target heterogeneous API, it determines whether there is a cache address of the program instructions required for the target processing engine to call the target heterogeneous API in the heterogeneous API call information, that is, determines whether there is a cache address of the program instructions required for the target processing engine to call the target heterogeneous API with the target parameter scale. If it exists, the program instructions required for the target processing engine to call the target heterogeneous API with the target parameter scale are obtained according to this cache address. If it does not exist, the intermediate representation of the target heterogeneous API is compiled into the program instructions required for the target processing engine to call the target heterogeneous API, and the program instructions required for the target processing engine to call the target heterogeneous API can also be cached, and the cache address of the program instructions required for the target processing engine to call the target heterogeneous API is stored in the heterogeneous API call information.

[0157] Based on the same inventive concept as the method embodiment, the embodiment of the present application also provides an API call device for executing the method executed by the host CPU in the above method embodiment. The related features can be seen in the above method embodiment and will not be elaborated here. For example Figure 5 As shown, the heterogeneous API call device 500 includes a determination unit 501, a selection unit 502. Optionally, it may further include an instruction determination unit 503 and a sending unit 504;

[0158] The determination unit 501 is used to determine the target API to be called.

[0159] A selection unit 502, configured to select a first processing engine for invoking a target API based on API call information, where the API call information is used to indicate the efficiencies of the first processing engine and the second processing engine in invoking the target heterogeneous API respectively.

[0160] The above API call apparatus 500 can be used to execute Figure 2 the method executed by the host CPU shown in the figure. Among them, the determination unit 501 can execute step 201 in the embodiment shown in Figure 2 the figure; the selection unit 502 can execute step 202 in the embodiment shown in Figure 2 the figure; the instruction determination unit 503 can execute the method of determining the program instructions required for the target processing engine to invoke the target heterogeneous API in step 203 in the embodiment shown in Figure 2 the figure, and the sending unit 504 can execute the method of sending the program instructions required for the target processing engine to invoke the target heterogeneous API to the target processing engine in step 203 in the embodiment shown in Figure 2 the figure.

[0161] It should be noted that the division of units in the embodiments of the present application is illustrative, only a logical function division, and there may be other division methods in actual implementation. Each functional unit in the embodiments of the present application can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated units can be implemented in the form of hardware or in the form of software functional units.

[0162] If the above integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0163] In a simple embodiment, those skilled in the art can think that the API call apparatus 500 in the above embodiments can all adopt Figure 6 the form shown in the figure.

[0164] As Figure 6 shown, the computing device 600 includes at least one processor 610 and a memory 620. Optionally, a communication interface 630 may also be included.

[0165] The memory 620 may be a volatile memory, such as a random access memory; the memory may also be a non-volatile memory, such as a read-only memory, a flash memory, a hard disk drive (HDD) or a solid-state drive (SSD), or the memory 620 is any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 620 may be a combination of the above memories.

[0166] In the embodiments of the present application, the specific connection medium between the above-mentioned processor 610 and the memory 620 is not limited. The processor 610 may be a processing engine in the heterogeneous system 200, such as a CPU.

[0167] In the computing device as Figure 6 shown, a communication interface 630 is further included. When the processor 610 communicates with other devices, such as a compiler 100 or other processing engines 210, data transmission may be performed through the communication interface 630.

[0168] When the API call device 500 adopts the Figure 6 form shown, Figure 6 the processor 610 in it may call the computer-executable instructions stored in the memory 620, so that the device 600 can execute the methods executed by the host CPU in any of the above method embodiments; for example, the device 600 can execute Figure 2 the methods executed by the host CPU in steps 201-203 in the method embodiment shown.

[0169] Specifically, Figure 5 the functions / implementation processes of the determination unit 501, the selection unit 502, the instruction determination unit 503, and the sending unit 504 in it can all be implemented by Figure 6 the processor 610 in it calling the computer-executable instructions stored in the memory 620. Or, Figure 5 the functions / implementation processes of the determination unit 501, the selection unit 502, and the instruction determination unit 503 in it can be implemented by Figure 6 the processor 610 in it calling the computer-executable instructions stored in the memory 620, Figure 6 the function / implementation process of the sending unit 504 in it can be implemented by Figure 6 the communication interface 630 in it.

[0170] When the API calling device 500 adopts Figure 6 the form shown, Figure 6 the processor 610 in Figure 2 can execute the method executed by the host CPU in any of the above method embodiments by calling the computer-executable instructions stored in the memory 620; for example, the computing device 600 can execute

[0171] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code.

[0172] The present application is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram can be realized by computer program instructions, and the combination of the flows and / or blocks in the flowchart and / or block diagram can also be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for realizing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0173] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device realizes the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0174] These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for realizing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram.

[0175] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present application without departing from the scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these modifications and variations.

Claims

1. A heterogeneous application programming interface (API) call method, characterized in that The method is applied to a heterogeneous system, which includes a first processing engine and a second processing engine. The method includes: Based on API call information, select the first processing engine to call a target API, where the API call information indicates the efficiency of the first processing engine and the second processing engine in calling the target API with candidate parameter scales, and the candidate parameter scales include a target parameter scale; Trigger the first processing engine to call the target API with the target parameter scale.

2. The method according to claim 1, wherein The method further includes: Obtain the signature of the target API, and the signature of the target API is used to indicate the target parameter scale of the target API.

3. The method according to claim 2, characterized in that The obtaining the signature of the target API includes: Determine the identifier of the target API; Determine the signature of the target API from a pre-configured API signature set according to the identifier of the target API.

4. The method according to any one of claims 1-3, characterized in that, The method further includes: Obtain the program instructions required for the first processing engine to call the target API from a pre-configured API function library of the first processing engine. The API function library of the first processing engine includes the program instructions required for the first processing engine to call one or more APIs, and the one or more APIs include the target API; Send the program instructions required for the first processing engine to call the target API to the first processing engine.

5. The method according to any one of claims 1 to 3, characterized in that The method further includes: Obtain the intermediate representation of the target API stored in advance; Compile the intermediate representation of the target API into the program instructions required for the first processing engine to call the target API; Send the program instructions required for the first processing engine to call the target API to the first processing engine.

6. The method according to claim 5, characterized in that, The API call information is also used to indicate the storage address of the intermediate representation of the target API. The obtaining the intermediate representation of the target API stored in advance includes: Obtain the intermediate representation of the target API according to the storage address of the intermediate representation of the target API.

7. The method according to any one of claims 1 to 3, characterized in that The API call information is stored in the form of a table.

8. The method according to any one of claims 1 to 3, characterized in that, The API call information is also used to indicate the cache addresses of the program instructions required for the first processing engine and the second processing engine to call the target API respectively. The method further includes: Obtain the program instructions required for the first processing engine to call the target API according to the cache address of the program instructions required for the first processing engine to call the target API in the API call information; Send the program instructions to the first processing engine.

9. The method according to claim 8, wherein The obtaining the program instructions required for the first processing engine to call the target API according to the cache address of the program instructions required for the first processing engine to call the target API in the API call information includes: Obtain the program instructions required for the first processing engine to call the target API with the target parameter scale according to the cache address of the program instructions required for the first processing engine to call the target API and the target parameter scale of the target API.

10. An API call device, characterized in that, The device is used to select a processing engine for invoking a target API from a heterogeneous system, where the heterogeneous system includes a first processing engine and a second processing engine. The device includes: A selection unit, configured to select the first processing engine to invoke the target API based on API call information, where the API call information indicates the efficiency of the first processing engine and the second processing engine in invoking the target API with candidate parameter scales, and the candidate parameter scales include a target parameter scale, triggering the first processing engine to invoke the target API with the target parameter scale.

11. The device according to claim 10, wherein The selection unit is further configured to: Obtain the signature of the target API, where the signature of the target API is used to indicate the target parameter scale of the target API.

12. The device according to claim 11, wherein When obtaining the signature of the target API, the selection unit is specifically configured to: Determine the identifier of the target API; Determine the signature of the target API from a pre-configured API signature set according to the identifier of the target API, where the target API signature includes the identifier of the target API.

13. The device according to any one of claims 10 to 12, characterized in that The device further includes an instruction determination unit and a sending unit: The instruction determination unit is configured to obtain the program instructions required for the first processing engine to invoke the target API from a pre-configured API function library of the first processing engine. The API function library of the first processing engine includes the program instructions required for the first processing engine to invoke an API, and the API includes the target API; The sending unit is configured to send the program instructions required for the first processing engine to invoke the target API to the first processing engine.

14. The device according to any one of claims 10 to 12, characterized in that, The device further includes an instruction determination unit and a sending unit: The instruction determination unit is configured to obtain the intermediate representation of the target API stored in advance; and compile the intermediate representation of the target API into the program instructions required for the first processing engine to invoke the target API; The sending unit is configured to send the program instructions required for the first processing engine to invoke the target API to the first processing engine.

15. The device according to claim 14, characterized in that, The API call information is further used to indicate the storage address of the intermediate representation of the target API. When obtaining the intermediate representation of the target API stored in advance, the instruction determination unit is specifically configured to: Obtain the intermediate representation of the target API according to the storage address of the intermediate representation of the target API.

16. The device according to any one of claims 10 to 12, characterized in that The API call information is stored in the form of a table.

17. The device according to any one of claims 10 to 12, characterized in that The API call information indicates the cache addresses of the program instructions required for the first processing engine and the second processing engine to respectively invoke the target API. The device further includes an instruction determination unit and a sending unit: The instruction determination unit is configured to obtain the program instructions required for the first processing engine to invoke the target API according to the cache address of the program instructions required for the first processing engine to invoke the target API in the API call information; The sending unit is configured to send the program instructions required for the first processing engine to invoke the target API to the first processing engine.

18. The device according to claim 17, characterized in that, The instruction determination unit is specifically configured to: Obtain the program instructions required for the first processing engine to call the target API with the target parameter scale according to the cache address of the program instructions required for the first processing engine to call the target API and the target parameter scale of the target API.

19. A computing device, characterized in that, The computing device includes a memory and a processor. The memory is used to store computer instructions. The processor calls the computer instructions stored in the memory to execute the method according to any one of claims 1 to 9 above.

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