A multifunctional server based on task adaptive matching and its application method

Abstract

The present invention provides a multifunctional server based on task adaptive matching and its application method, which distributes and executes the task package issued by the upper computer through the chassis management unit, activates the master server unit / slave server unit of the corresponding task attribute according to the task attribute of the application task, and executes the assigned application task. Therefore, it is possible to process high-capacity, multi-task task packages, distribute each task to the corresponding master / slave CPU for execution, reduce the single computing pressure of the traditional CPU, share the pressure, improve the server's processing performance for tasks, and improve the computing speed. The high-speed processing unit provides graphics / big data computing services for each CPU, reduces the big data and AI computing pressure on each CPU, transfers the intelligent computing of graphics / big data to the high-speed processing unit, further optimizes and expands the processing efficiency and performance of the server CPU, meets the growing business needs, and provides users with a better user experience.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a multifunctional server based on task adaptive matching and an application method and electronic equipment thereof. Background Art

[0002] As attached Figure 1 As shown in the figure, traditional servers are generally composed of the following facilities: processor (CPU), memory, storage devices (such as hard disk, SSD, etc.), motherboard, power supply unit (PSU), network interface card (NIC) and possible other expansion cards (such as graphics card, RAID card, etc.). The processor is the core of the server and is responsible for executing program instructions; the memory is used to temporarily store data and programs processed by the CPU; the storage device is used to store data for a long time; the motherboard serves as a bridge connecting various components; the power supply unit provides power to the entire system; the network interface card is responsible for connecting the server to the network; and other expansion cards are configured according to the specific needs of the server. These hardware components work together to form the overall performance of the server.

[0003] Although traditional servers can undertake certain data processing, image processing and other tasks, in the face of the modern society with big data and multi-source information development, the processing performance of traditional servers can no longer meet the needs of the times. When processing multi-image processing tasks, traditional servers face many technical defects, which are mainly reflected in performance bottlenecks, efficiency issues, insufficient scalability and negative impact on user experience. They are mainly reflected in the following aspects:

[0004] First, when traditional servers process a large number of images, the image files are usually large in size, which leads to performance degradation during transmission and storage. As the number of images increases, the server load increases sharply, which may cause response delays, slow processing speeds, and other problems, thus affecting the stability and availability of the entire system.

[0005] Secondly, traditional servers often lack efficient algorithms and optimized technologies when processing multiple application tasks (especially image / vision / convolutional neural data, etc.), resulting in low processing efficiency. For example, in common tasks such as image compression, format conversion, and cropping, traditional servers may not be able to complete them quickly, thereby increasing user waiting time and reducing user experience. Especially when facing deep neural network processing and visual image / video processing, traditional server CPUs (single or dual) need to bear more computing pressure, and may even be unable to compute these deep neural network processing and visual image / video processing tasks.

[0006] In addition, the scalability of traditional servers is relatively poor. When faced with the growing demand for image processing, traditional servers are often difficult to cope with through simple hardware upgrades. This may cause the system to be unable to meet new business needs and even face the risk of collapse.

[0007] Finally, traditional servers may also have a negative impact on user experience when handling multiple image processing tasks. For example, during the web page loading process, if the image processing speed is too slow, it may cause the page loading time to be extended, and users need to wait longer to see the complete page content. This not only reduces the user experience, but may also affect user satisfaction and loyalty.

[0008] Therefore, traditional servers have many technical defects when handling multi-image processing tasks, and the server's processing performance solutions need to be further optimized and expanded to improve the server's computing efficiency and performance for deep neural network processing, visual image / video and other processing tasks, meet the growing business needs, and provide users with a better user experience. Summary of the invention

[0009] In order to solve the technical problems existing in the prior art, the present invention provides the following technical solutions:

[0010] On the one hand, a multifunctional server based on task adaptive matching is provided, wherein the multifunctional server is a server cluster controlled by a host computer, and the server cluster includes: a chassis management unit, a master server unit, a plurality of slave server units, a high-speed processing unit and a switching network unit, wherein:

[0011] The chassis management unit is used to receive the task package sent by the host computer, parse and determine whether the task package is a task chart:

[0012] If it is a task chart, the task chart is identified based on a deep learning algorithm to obtain each application task in the task chart; and the master server unit / slave server unit corresponding to the task attribute is activated to execute the assigned application task;

[0013] The main server unit is used to respond to and execute the first application task assigned by the chassis management unit;

[0014] The slave server unit is used to respond to and execute the second application task assigned by the chassis management unit;

[0015] The high-speed processing unit is used to provide graph / big data computing services for the chassis management unit, the master server unit or the slave server unit;

[0016] The switching network unit is used to provide data exchange services between the chassis management unit and the high-speed processing unit, between the main server unit and the high-speed processing unit, or between the slave server unit and the high-speed processing unit;

[0017] The master server unit and the slave server unit are respectively connected to the chassis management unit for communication;

[0018] The chassis management unit, the main server unit and the slave server unit are respectively connected to the high-speed processing unit through the switching network unit.

[0019] As a preferred embodiment of the present invention, preferably, the high-speed processing unit comprises:

[0020] NPU, used to provide deep learning algorithm computing services;

[0021] GPU, used to provide graphics AI computing services;

[0022] FPGA is used to provide image big data computing services.

[0023] As a preferred implementation scheme of the present invention, preferably, the chassis management unit is further used to: if it is determined that the task package is not a task chart, directly send the task package to the main server unit;

[0024] The main server unit is further used for:

[0025] Parse the task packet to obtain a task pool consisting of several task data packets, and determine whether there is a parent node task in the task pool:

[0026] If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes;

[0027] If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes.

[0028] As a preferred embodiment of the present invention, preferably, the chassis management unit, the master server unit or the slave server unit, if it is necessary to perform chart / big data calculation during task processing, is further used to:

[0029] Generate a corresponding computing request according to the computing requirements of the corresponding chart / big data, and send the computing request to the high-speed processing unit through the switching network unit;

[0030] The high-speed processing unit is further used to respond to the calculation request and feed back the corresponding calculation result, and send the calculation result to the chassis management unit, the main server unit or the slave server unit through the switching network unit.

[0031] As a preferred implementation of the present invention, preferably, when the chassis management unit determines that the task package is a task chart, it is further used to:

[0032] generating a task identification request including the task graph, and sending the task identification request to the high-speed processing unit through the switching network unit;

[0033] The high-speed processing unit is also used to: respond to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit.

[0034] As a preferred embodiment of the present invention, preferably, the method for generating the task identification AI model comprises:

[0035] Prepare several different task execution log big data;

[0036] Perform feature engineering on the task execution log big data, identify and extract the task attributes of each application task in the task execution log big data and the server identifier of the master server unit / slave server unit that executes the corresponding application task, and output the corresponding association relationship between the task attributes and the server identifier;

[0037] The association relationship between the task attribute and the server identifier is imported into a preset convolutional neural network model, and the convolutional neural network model is used to train and learn the relationship features of the association relationship between the task attribute and the server identifier to generate the task recognition AI model;

[0038] The task identification AI model is verified, and if the verification is successful, the task identification AI model is written into the NPU in the high-speed processing unit.

[0039] As a preferred embodiment of the present invention, preferably, the server cluster further includes:

[0040] A power supply unit, used for providing power;

[0041] A power adapter board, used to provide the required voltage for the chassis management unit;

[0042] The power supply unit is electrically connected to the chassis management unit through the power adapter board.

[0043] On the other hand, a method for applying a multifunctional server based on task adaptive matching is provided, the method comprising the following steps:

[0044] Task package sent by the host computer;

[0045] The chassis management unit receives the task package sent by the host computer, parses and determines whether the task package is a task chart:

[0046] If it is a task chart, a task identification request including the task chart is generated, and the task identification request is sent to the high-speed processing unit through the switching network unit; the high-speed processing unit responds to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit; the chassis management unit receives and obtains each application task in the task chart; and activates the master server unit / slave server unit corresponding to the task attribute to execute the assigned application task;

[0047] If it is not a task chart, the task package is directly sent to the main server unit; the main server unit parses the task package to obtain a task pool consisting of several task data packets, and determines whether there is a parent node task in the task pool:

[0048] If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes;

[0049] If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes.

[0050] On the other hand, an electronic device is provided, comprising: a processor; a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, any one of the methods of the multi-functional server based on task adaptive matching as described above is implemented.

[0051] On the other hand, a computer-readable storage medium is provided, wherein at least one instruction is stored in the storage medium, and the at least one instruction is loaded and executed by a processor to implement the method in the multi-functional server based on task adaptive matching as described above.

[0052] The beneficial effects brought about by the technical solution provided by the embodiment of the present invention include at least:

[0053] Based on the implementation of the present invention, the server application architecture of the server cluster proposed by the present invention can distribute and execute the task packages sent by the upper computer through the chassis management unit, can call the high-speed processing unit to perform intelligent chart recognition of the task chart, obtain the corresponding application task and activate the master server unit / slave server unit of the corresponding task attribute according to the task attribute of the application task, and execute the assigned application task. Therefore, it is possible to process high-capacity, multi-task task packages, distribute each task to the corresponding master CPU and slave CPU for execution, thereby reducing the single computing pressure of the traditional CPU, allowing the CPU to execute tasks according to the task attributes, share the execution pressure, improve the server's processing performance for tasks, and improve the computing speed.

[0054] The high-speed processing unit of the present invention can provide chart / big data computing services for the chassis management unit, the main server unit or the slave server unit, and provide data exchange services for the switching network unit. In the process of task processing, it can provide chart / big data intelligent computing services for the chassis management unit, the main server unit or the slave server unit, thereby reducing the big data and AI computing pressure on each CPU. Through a task-dispersed mode, the intelligent calculation of charts / big data is transferred to the high-speed processing unit, further optimizing and expanding the processing efficiency and performance of the server CPU, and improving the CPU processing efficiency through efficient algorithms and optimized technologies, meeting the growing business needs, and providing users with a better user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0056] Figure 1 This is a schematic diagram of the hardware composition of a traditional server;

[0057] Figure 2 It is a schematic diagram of a server architecture of a multifunctional server based on task adaptive matching provided by an embodiment of the present invention;

[0058] Figure 3 is a schematic diagram of task allocation by a chassis management unit provided by an embodiment of the present invention;

[0059] Figure 4 is a flow chart of requesting a high-speed processing unit to process a chart / big data provided by an embodiment of the present invention;

[0060] Figure 5is a schematic diagram of a server architecture of another server cluster provided by an embodiment of the present invention;

[0061] Figure 6 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0062] The technical solution of the present invention is described below in conjunction with the accompanying drawings.

[0063] In the embodiments of the present invention, words such as "exemplarily" and "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "example" is intended to present the concept in a specific way. In addition, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either of the two.

[0064] In the embodiments of the present invention, "image" and "picture" can sometimes be used interchangeably. It should be noted that when the difference between them is not emphasized, the meanings they intend to express are the same. "of", "corresponding, relevant" and "corresponding" can sometimes be used interchangeably. It should be noted that when the difference between them is not emphasized, the meanings they intend to express are the same.

[0065] In the embodiments of the present invention, sometimes a subscript such as W1 may be mistakenly written as a non-subscript such as W1. When the difference is not emphasized, the meanings to be expressed are consistent.

[0066] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments. Example 1

[0067] As attached Figure 1 The hardware composition of the traditional server shown in the figure is mainly composed of a CPU, a graphics card, etc. (similar to a main server unit of the present invention). The tasks issued by the host computer (software system) will be processed by a CPU (or a dual-core CPU on a system). If you encounter large protective gear calculations, chart recognition processing, AI operations, etc., you need to occupy most of the CPU threads, which greatly occupies the running memory, and other tasks cannot be carried out smoothly, thus causing jams.

[0068] Especially in the process of executing multi-task big data processing, image recognition, chart processing and other tasks, a large amount of operating resources are required. Therefore, the computing foundation of traditional CPUs cannot support complex and large big data applications.

[0069] An embodiment of the present invention provides a multifunctional server based on task adaptive matching. The method can be implemented by an electronic device, which can be a terminal or a server.

[0070] like Figure 2 A multifunctional server based on task adaptive matching is shown, the multifunctional server is a server cluster controlled by a host computer, the server cluster includes: a chassis management unit, a master server unit, a plurality of slave server units, a high-speed processing unit and a switching network unit, wherein:

[0071] The chassis management unit (with an independent computing CPU) is used to receive the task package sent by the host computer, parse and determine whether the task package is a task chart:

[0072] If it is a task chart, the task chart is identified based on a deep learning algorithm to obtain each application task in the task chart; and the master server unit / slave server unit corresponding to the task attribute is activated to execute the assigned application task;

[0073] The main server unit (having an independent computing CPU) is used to respond to and execute the first application task assigned by the chassis management unit;

[0074] The slave server unit (having an independent computing CPU) is used to respond to and execute the second application task assigned by the chassis management unit;

[0075] The high-speed processing unit (having an independent NPU, a professional graphics processing chip FPGA and a GPU for computing big data, AI processing, intelligent graphics processing, and deep learning algorithm calculation) is used to provide graphics / big data computing services for the chassis management unit, the main server unit or the slave server unit;

[0076] The switching network unit (mainly providing request and data routing communication between each CPU and the high-speed processing unit, using a high-speed PCIe network for data communication) is used to provide data exchange services between the chassis management unit and the high-speed processing unit, between the main server unit and the high-speed processing unit, or between the slave server unit and the high-speed processing unit;

[0077] The master server unit and the slave server unit are respectively connected to the chassis management unit for communication;

[0078] The chassis management unit, the main server unit and the slave server unit are respectively connected to the high-speed processing unit through the switching network unit.

[0079] The present invention provides a service architecture of a server cluster, which identifies tasks and distributes and executes tasks according to task attributes, so that different CPUs or NPUs can participate in executing corresponding task types, thereby avoiding tasks being concentrated on one CPU and occupying CPU running memory.

[0080] Combined with Figure 2 The server cluster architecture shown is shown. Each unit in the server cluster of the present invention can be integrated using a standard 4.5U rack-mounted server (specific racks and the deployment structure and quantity of each unit on the rack) (mainly from the CPU of the server unit, which is not limited in this embodiment), and at least 8 pluggable PC node chassis can be set with integrated power supply and management backplanes inside, which can provide 450WI peak power supply power (power supply unit, etc.) for each node.

[0081] Each PC node (each unit) supports hot-swap, is powered on and off independently, and works independently. The failure or plug-in maintenance of a single node will not affect the operation of other nodes.

[0082] The chassis management unit supports remote power on and off of nodes, provides a browser-based management console interface, and provides independent management network ports and serial ports. Each node is equipped with two pluggable 6038 high-power server fans and provides temperature control SmartFAN. function to fully ensure node heat dissipation. It also provides remote configuration of PC node motherboard BIOS function.

[0083] Specifically, the corresponding software program may be pre-installed in the corresponding CPU, and programming and configuration may be performed according to the application functions of each unit of the present invention, which is not limited here.

[0084] The chassis management unit, master server unit, and slave server unit all have a CPU for application management and data processing in their respective units. In addition to the CPU, they also have other hardware devices such as:

[0085] 24-pin motherboard power supply, 8-pin CPU power supply;

[0086] HDMI display interface, DP display interface;

[0087] SATA 6cbps interface;

[0088] PCle 4.0x4 M.2SSD slot, supports 2280 specification M.2 hard disk, supports SATA protocol M2 hard disk when this interface uses SAM protocol;

[0089] For hard disk, SA1 interface 1PC1e 3.0X4 M.2SSD slot, supports 2280 specification M.2 hard disk (on the back of PCB);

[0090] Memory slot, supports dual-channel memory, supports XMP technology, and a single memory stick supports a maximum capacity of 32GB;

[0091] PCle Express 5.0 x16 slot;

[0092] USB 3.2 Gen1 Type-A interface, USB3.2 Gen1 Type-C interface, USE* All rear USB interfaces can be set to power on when the computer is powered off in BIOS;

[0093] USB 3.2 Gen1 TypeA interface, USB3.2 Gen1 TypeC interface, USB* All front USB interfaces can be set to power on when the computer is powered off in BIOS;

[0094] 5V3-pin ARGB pin, supports iGame Center lighting control software;

[0095] 4-pin CPU fan pin (adjustable speed), 4-pin system fan pin (adjustable speed), 1*4-pin water pump;

[0096] Realtek 2.5G network card;

[0097] Six-channel sound card;

[0098] etc.

[0099] Specifically, it can be combined with the hardware system of existing high-performance servers.

[0100] When performing specific tasks, the functions of each unit of the present invention are as follows:

[0101] like Figure 3 As shown, the upper computer sends the task package that needs to be executed this time (it can be tasks of different applications or multiple application tasks of the same application, etc., which is determined by the administrator's application software).

[0102] The chassis management unit distributes and executes the task packages sent by the host computer, and can call the high-speed processing unit to perform intelligent chart recognition of the task chart, obtain the corresponding application task, and activate the master server unit / slave server unit of the corresponding task attribute according to the task attribute of the application task, and execute the assigned application task. Therefore, it can handle high-capacity, multi-task task packages, and distribute each task to the corresponding master CPU and slave CPU for execution, thereby reducing the single computing pressure of the traditional CPU, allowing the CPU to execute tasks according to the task attributes, share the execution pressure, improve the server's processing performance for tasks, and increase the computing speed.

[0103] The chassis management unit is the manager in the server architecture and needs to manage applications for other units. After the host computer issues the corresponding task, it issues it in the form of a task chart. The chassis management unit needs to perform chart recognition on the current task chart and use the corresponding image processing algorithm to perform image / chart recognition on each application task recorded in the task chart and extract the corresponding application task.

[0104] The chassis management unit needs to perform chart recognition based on the processing performance of the high-speed processing unit to identify the corresponding application tasks. After recognition, it matches the task attributes of each application task and the service functions of each server unit, and assigns each application task to the corresponding main server unit or slave server unit for task execution, so that the tasks are dispersed, and each main CPU or heavy CPU executes the task and feeds back the corresponding execution results (avoiding centralized execution on the CPU of the chassis management unit and occupying its memory), and then the chassis management unit collects the execution results of each server CPU and feeds them back to the host computer.

[0105] The scope or type of tasks that the master server unit and slave server unit are adapted to can be determined by the administrator. The master server unit can perform core tasks and the slave CPU can perform secondary tasks. For example, in an image data processing task of a convolutional neural network, the preprocessing part of the graphics can be performed by the slave server unit; the feature processing of the graphics, including intelligent recognition, can be performed by the master server unit. Therefore, a graph chart intelligent recognition task based on a convolutional neural network can be split into application tasks of multiple process nodes, and assigned to the slave server unit or the master server unit for execution according to the task attributes of different tasks, so as to disperse the execution pressure.

[0106] The acceptable task range or acceptable task type of a specific master server unit or slave server unit can be confirmed by an administrator and configured in the chassis management unit, and the chassis management unit intelligently distributes the identified application tasks.

[0107] The high-speed processing unit is mainly used to independently calculate big data, intelligent image recognition, AI computing and other tasks. Therefore, when the chassis management unit, the main server unit, or the slave server unit receives the corresponding big data or intelligent AI computing tasks, it can make a corresponding request to the high-speed processing unit, send this part of the task to the high-speed processing unit, and request the high-speed processing unit to process this part of the task data based on its high-performance processor.

[0108] The switching network unit is mainly a data routing unit, which adopts various high-speed PCIE network buses to realize the network data routing lines between the chassis management unit, the main server unit, the slave server unit and the high-speed processing unit, that is, it adopts the high-speed PCIE communication bus for high-speed data transmission.

[0109] The communication connection between each unit can be connected by the administrator according to the specific server configuration hardware.

[0110] Therefore, by adopting the above-mentioned server cluster architecture, the high-speed processing unit can provide chart / big data computing services for the chassis management unit, the main server unit or the slave server unit, and the switching network unit provides data exchange services. During the task processing, it can provide chart / big data intelligent computing services for the chassis management unit, the main server unit or the slave server unit, thereby reducing the big data and AI computing pressure on each CPU. Through the task dispersion mode, the intelligent calculation of charts / big data is transferred to the high-speed processing unit, further optimizing and expanding the processing efficiency and performance of the server CPU, and improving the CPU processing efficiency through efficient algorithms and optimized technologies, meeting the growing business needs, and providing users with a better user experience.

[0111] As a preferred embodiment of the present invention, preferably, the high-speed processing unit comprises:

[0112] NPU, used to provide deep learning algorithm computing services;

[0113] GPU, used to provide graphics AI computing services;

[0114] FPGA is used to provide image big data computing services.

[0115] NPU (Neural Processing Unit), GPU (Graphics Processing Unit) and FPGA (Field Programmable Gate Array) chips each play an important role in deep learning, graph recognition processing and AI computing. Their functions and specific roles are as follows:

[0116] 1. NPU chip

[0117] NPU is a processor designed specifically for accelerating neural network computing. It improves computing efficiency and performance by optimizing the hardware architecture to perform matrix and vector operations in deep learning algorithms.

[0118] Role in deep learning:

[0119] NPU plays the role of the core computing engine in deep learning. It can efficiently process the forward propagation and back propagation calculations in the neural network, accelerating the training and reasoning process of the model. The high parallelism and low power consumption of NPU give it a significant advantage in processing large-scale neural networks, which can greatly shorten the training time and reduce energy consumption.

[0120] Role in chart recognition processing:

[0121] In chart recognition processing, NPU can quickly process image data, extract key features and perform operations such as classification and recognition. Its efficient computing power enables NPU to perform well in applications such as image recognition, face recognition, and object detection, providing strong technical support for chart recognition processing.

[0122] Role in AI computing:

[0123] As an important hardware support for AI computing, NPU can accelerate the execution of various AI algorithms. Whether it is natural language processing, speech recognition or other complex AI tasks, NPU can provide strong support through its efficient computing power and promote the development and application of AI technology.

[0124] 2. GPU chips

[0125] GPU was originally designed to accelerate graphics rendering, but with the development of technology, its powerful parallel computing capabilities are gradually being applied to AI fields such as deep learning. GPU can process thousands of computing tasks at the same time and is suitable for large-scale data parallel computing.

[0126] Role in deep learning:

[0127] GPU plays a vital role in deep learning. It can accelerate the training and reasoning process of neural network models and shorten the computing time by processing large amounts of data in parallel. The high memory bandwidth and powerful computing power of GPU give it a significant advantage in processing matrix operations and convolution operations in deep learning.

[0128] Role in chart recognition processing:

[0129] GPUs can also play an important role in chart recognition processing. By processing pixels and feature points in image data in parallel, GPUs can quickly extract key information from images and perform recognition processing. This makes GPUs widely used in image recognition, video processing and other fields.

[0130] Role in AI computing:

[0131] As one of the important hardware platforms for AI computing, GPU can support the execution of various AI algorithms. Whether it is machine learning, deep learning or other types of AI tasks, GPU can provide strong support through its efficient computing power. In addition, GPU also has good compatibility and scalability, and can be seamlessly integrated with other hardware and software platforms.

[0132] 3. FPGA chip

[0133] FPGA is a programmable logic device that users can program to implement specific logic functions as needed. FPGA has the characteristics of high parallel processing capability, customizability and low power consumption.

[0134] Role in deep learning:

[0135] FPGA can optimize the computing process of neural network models through customized hardware architecture in deep learning. By precisely controlling the data flow and the use of computing resources, FPGA can accelerate the training and reasoning process of neural networks and reduce power consumption. In addition, FPGA also has good flexibility and scalability, which can adapt to deep learning tasks of different scales and complexities.

[0136] Role in chart recognition processing:

[0137] In chart recognition processing, FPGA can accelerate the processing of image data through customized image processing algorithms. By optimizing the transmission and storage methods of image data and the allocation strategy of computing resources, FPGA can improve the accuracy and efficiency of image recognition. This makes FPGA have broad application prospects in image recognition, video processing and other fields.

[0138] Role in AI computing:

[0139] As one of the important hardware platforms for AI computing, FPGA has the characteristics of high performance, customizability and low power consumption. It can optimize the execution process of AI algorithms and improve computing efficiency and performance through customized hardware architecture. In addition, FPGA also has good compatibility and scalability, and can be seamlessly integrated with other hardware and software platforms to build a complete AI system.

[0140] In summary, NPU, GPU and FPGA chips each have unique functions and roles in deep learning, graph recognition processing and AI computing. They use different hardware architectures and computing methods to achieve efficient support for AI algorithms, promoting the continuous development and application of AI technology.

[0141] The above are applications involving big data, graphics, AI computing and other tasks. If the chassis management unit receives processing of general data types, there is no need to request the high-speed processing unit to assist in processing the tasks.

[0142] As a preferred implementation scheme of the present invention, preferably, the chassis management unit is further used to: if it is determined that the task package is not a task chart, directly send the task package to the main server unit;

[0143] The main server unit is further used for:

[0144] Parse the task packet to obtain a task pool consisting of several task data packets, and determine whether there is a parent node task in the task pool:

[0145] If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes;

[0146] If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes.

[0147] The parent-child node tasks, or main tasks and slave tasks of this embodiment can be determined according to the task type in the task package. Generally, the parent node task or the main task needs to be executed by the main CPU (CPU of the main server unit), and the node task or the slave task is executed by the slave CPU.

[0148] Therefore, the chassis management unit can directly send such non-graphic / big data computing tasks to the master / slave server unit for execution.

[0149] For tasks with parent-child node relationships or master-slave relationships, the main CPU needs to allocate tasks again, manage and allocate tasks according to task attributes, and let different slave CPUs execute them, so as to achieve multi-level task allocation and avoid task concentration.

[0150] like Figure 4 As shown, as a preferred embodiment of the present invention, preferably, the chassis management unit, the master server unit or the slave server unit, in the process of task processing, if it is necessary to calculate charts / big data, is also used to:

[0151] Generate a corresponding computing request according to the computing requirements of the corresponding chart / big data, and send the computing request to the high-speed processing unit through the switching network unit;

[0152] The high-speed processing unit is further used to respond to the calculation request and feed back the corresponding calculation result, and send the calculation result to the chassis management unit, the main server unit or the slave server unit through the switching network unit.

[0153] For task processing of graphics / big data (and AI computing, such as image recognition processing of convolutional neural networks, etc.), a high-speed processing unit independent of the chassis management unit, the master server unit or the slave server unit can be requested to independently execute these tasks. These tasks can be sent to the high-speed processing unit to avoid consuming the running memory of each CPU, thereby improving the processing performance of its CPU.

[0154] The high-speed processing unit can call the NPU or GPU of the adapted task according to the task type and execute the calculation steps of the corresponding task.

[0155] The calculation requirements, conditions, parameters, formulas and other calculation parameters that need to be included in the request can be determined by the task itself or the administrator configuration information.

[0156] As a preferred implementation of the present invention, preferably, when the chassis management unit determines that the task package is a task chart, it is further used to:

[0157] generating a task identification request including the task graph, and sending the task identification request to the high-speed processing unit through the switching network unit;

[0158] The high-speed processing unit is also used to: respond to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit.

[0159] Here, when the chassis management unit is performing task identification, if it identifies a task graph (or tasks that require high-performance computing conditions such as big data computing and AI computing), it needs to request the high-speed processing unit to assist in executing the calculation. Please refer to the description of the high-speed processing unit above for details.

[0160] A task recognition AI model can be deployed on the high-speed processing unit to perform intelligent chart recognition, thereby using deep learning technology to identify the data of each application task recorded on the chart and output it to the chassis management unit.

[0161] Specifically, a task recognition AI model can be embedded in the NPU of the high-speed processing unit for intelligent chart recognition.

[0162] To deploy an AI model (task recognition AI model) in an NPU (neural network processing unit) chip, first, you need to ensure that the selected NPU chip is compatible with the AI ​​model to be deployed and has sufficient performance to support the operation of the model. Next, the model needs to be optimized and converted so that it can run efficiently on the NPU. This usually includes adjusting the model's architecture, parameters, and calculation methods to fully utilize the parallel processing capabilities and low power consumption characteristics of the NPU. After optimizing and converting the model, it needs to be compiled into a format that the NPU can recognize and deployed on the NPU chip. This process may require the use of specific compilation tools and libraries to ensure that the model can be correctly mapped to the hardware resources of the NPU. Once the model is deployed on the NPU, you can start running it and perform performance evaluation. This includes measuring key indicators such as the model's inference speed, accuracy, and power consumption to ensure that it can meet the needs of the application. Based on the results of the performance evaluation, the model may need to be further optimized and adjusted. This may include adjusting the parameters of the model, changing the way the input data is processed, or optimizing the operating environment of the NPU.

[0163] The task identification AI model is mainly used to identify the execution entity that is adapted to the task attributes of each application task in the diagram. That is, it is necessary to find the server identifier that matches the task attributes of the identified application task (the model pre-learns the association between the task attributes and the server identifier of the corresponding execution entity).

[0164] As a preferred embodiment of the present invention, preferably, the method for generating the task identification AI model comprises:

[0165] Prepare several different task execution log big data;

[0166] Perform feature engineering on the task execution log big data, identify and extract the task attributes of each application task in the task execution log big data and the server identifier of the master server unit / slave server unit that executes the corresponding application task, and output the corresponding association relationship between the task attributes and the server identifier;

[0167] The association relationship between the task attribute and the server identifier is imported into a preset convolutional neural network model, and the convolutional neural network model is used to train and learn the relationship features of the association relationship between the task attribute and the server identifier to generate the task recognition AI model;

[0168] The task identification AI model is verified, and if the verification is successful, the task identification AI model is written into the NPU in the high-speed processing unit.

[0169] The task execution log big data contains the execution process of different application tasks, including the execution subject of the application task (master server unit or slave server unit, or chassis management unit), execution time, results, objects, etc.

[0170] Therefore, deep learning models, such as convolutional neural network models, can be used to extract and learn the relationship features of the application logs of each application task in the task execution log big data, so as to train and generate a task recognition AI model.

[0171] For the verification, performance evaluation, and deployment of the task recognition AI model, you can combine the training, verification, evaluation, optimization, and deployment principles of the convolutional neural network model. You can refer to the following steps:

[0172] The training process of a Convolutional Neural Network (CNN) model is a complex and sophisticated iterative process that aims to optimize the performance of the model by adjusting the network parameters. The following is a detailed description of the training process:

[0173] Before training begins, you first need to prepare the training data set and divide it into a training set, a validation set, and a test set. The training set is used for the model learning process, the validation set is used to adjust the model's hyperparameters and check the model's performance during training, and the test set is used to ultimately evaluate the model's generalization ability.

[0174] Next, the convolutional neural network is initialized, including the convolution kernel weights and bias items of the convolution layer, as well as the weights and bias items of the fully connected layer. These parameters are usually initialized using a random number generator to ensure that the model has sufficient randomness before training.

[0175] The core of the training process is the alternation of forward propagation and back propagation. In the forward propagation stage, the input data passes through the convolution layer for feature extraction, the convolution kernel slides on the input data and calculates the convolution result, and then the nonlinear characteristics may be added through the activation function. Next, the pooling layer downsamples the feature map to reduce the size of the feature map and the amount of calculation. Finally, the fully connected layer converts the extracted features into the final output, such as the category probability of the classification task.

[0176] After the forward propagation is completed, the loss function value between the output and the true label is calculated to measure the accuracy of the model prediction results. Commonly used loss functions include mean square error (MSE) and cross entropy.

[0177] Entering the back-propagation phase, the gradient of each parameter is calculated according to the loss function value, that is, the partial derivative of the loss function with respect to each parameter. This is usually implemented by the chain rule, starting from the output layer and calculating the gradient of each neuron layer by layer.

[0178] After obtaining the gradient, the parameters in the convolutional neural network are updated using an optimization algorithm (such as stochastic gradient descent, Adam, etc.). The optimization algorithm adjusts the parameter values ​​based on the gradient and the learning rate to minimize the loss function. The learning rate is an important hyperparameter that determines the step size of the parameter update.

[0179] The entire training process is an iterative process, which requires repeating the four steps of forward propagation, loss calculation, backpropagation and parameter update until certain stopping conditions are met, such as reaching a preset number of iterations, the loss function value is lower than a certain threshold, or the performance on the validation set no longer improves.

[0180] During the training process, you also need to use the validation set regularly to evaluate the performance of the model and adjust the model's hyperparameters or structure based on the evaluation results. If you find that the performance of the model on the validation set begins to decline, overfitting may have occurred. At this time, you can take some regularization measures to prevent overfitting, such as adding a dropout layer, using L1 / L2 regularization, etc.

[0181] Finally, the performance of the convolutional neural network model after training can be evaluated using the test set. The test set should be completely independent of the training set and validation set to ensure the objectivity and accuracy of the evaluation results. The performance of the model is evaluated by calculating the accuracy, precision, recall and other indicators of the model on the test set, and the model is further adjusted and optimized based on the evaluation results.

[0182] like Figure 5 As shown, as a preferred embodiment of the present invention, preferably, the server cluster further includes:

[0183] A power supply unit, used for providing power;

[0184] A power adapter board, used to provide the required voltage for the chassis management unit;

[0185] The power supply unit is electrically connected to the chassis management unit through the power adapter board.

[0186] The power supply unit can use a lithium battery or be connected to a nearby power source, and perform voltage adaptation and conversion through a power adapter board to power the chassis management unit.

[0187] After the chassis management unit is powered on, it activates the corresponding master server unit or slave server unit according to the server to be executed, and then powers on, activates, and executes the task, thereby saving power consumption. Example 2

[0188] Based on the principle of embodiment 1, on the other hand, a method for applying a multifunctional server based on task adaptive matching is provided, the method comprising the following steps:

[0189] Task package sent by the host computer;

[0190] The chassis management unit receives the task package sent by the host computer, parses and determines whether the task package is a task chart:

[0191] If it is a task chart, a task identification request including the task chart is generated, and the task identification request is sent to the high-speed processing unit through the switching network unit; the high-speed processing unit responds to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit; the chassis management unit receives and obtains each application task in the task chart; and activates the master server unit / slave server unit corresponding to the task attribute to execute the assigned application task;

[0192] If it is not a task chart, the task package is directly sent to the main server unit; the main server unit parses the task package to obtain a task pool consisting of several task data packets, and determines whether there is a parent node task in the task pool:

[0193] If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes;

[0194] If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes.

[0195] Please understand and implement the above method in conjunction with the principle of Example 1, which will not be described in detail in this example. Example 3

[0196] Figure 6 4 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. The electronic device 410 may include a first processor 2001.

[0197] Optionally, the electronic device 410 may further include a memory 2002 and a transceiver 2003 .

[0198] The first processor 2001, the memory 2002 and the transceiver 2003 may be connected via a communication bus.

[0199] Combine the following Figure 6 The components of the electronic device 410 are described in detail:

[0200] The first processor 2001 is the control center of the electronic device 410, and may be a processor or a general term for multiple processing elements. For example, the first processor 2001 is one or more central processing units (CPUs), or may be application specific integrated circuits (ASICs), or may be one or more integrated circuits configured to implement the embodiments of the present invention, such as one or more microprocessors (digital signal processors, DSPs), or one or more field programmable gate arrays (field programmable gate arrays, FPGAs).

[0201] Optionally, the first processor 2001 can execute various functions of the electronic device 410 by running or executing a software program stored in the memory 2002 and calling data stored in the memory 2002 .

[0202] In a specific implementation, as an embodiment, the first processor 2001 may include one or more CPUs, such as Figure 6 CPU0 and CPU1 are shown in FIG.

[0203] In a specific implementation, as an embodiment, the electronic device 410 may also include multiple processors, such as Figure 6 The first processor 2001 and the second processor 2004 are shown in FIG. Each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0204] The memory 2002 is used to store the software program for executing the solution of the present invention, and is controlled to be executed by the first processor 2001. The specific implementation method can refer to the above method embodiment, which will not be repeated here.

[0205] Optionally, the memory 2002 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 2002 may be integrated with the first processor 2001, or may exist independently and access the first processor 2001 through the interface circuit ( Figure 6 (not shown) is coupled to the first processor 2001, which is not specifically limited in this embodiment of the present invention.

[0206] The transceiver 2003 is used to communicate with a network device or a terminal device.

[0207] Optionally, the transceiver 2003 may include a receiver and a transmitter ( Figure 6 The receiver is used to implement a receiving function, and the transmitter is used to implement a sending function.

[0208] Optionally, the transceiver 2003 may be integrated with the first processor 2001, or may exist independently and communicate with the first processor 2001 through the interface circuit ( Figure 6 (not shown) is coupled to the first processor 2001, which is not specifically limited in this embodiment of the present invention.

[0209] It should be noted that Figure 6 The structure of the electronic device 410 shown in the figure does not constitute a limitation on the router, and the actual knowledge structure recognition device may include more or fewer components than those shown in the figure, or combine certain components, or arrange the components differently.

[0210] In addition, the technical effects of the electronic device 410 can refer to the technical effects of the multi-functional server based on task adaptive matching described in the above method embodiment, which will not be repeated here.

[0211] It should be understood that the first processor 2001 in the embodiment of the present invention may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0212] It should also be understood that the memory in the embodiments of the present invention may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0213] The above embodiments can be implemented in whole or in part by software, hardware (such as circuits), firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a tape), an optical medium (for example, a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0214] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding.

[0215] In the present invention, "at least one" means one or more, and "plurality" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0216] It should be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0217] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0218] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described equipment, devices and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0219] In the several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0220] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0221] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0222] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program codes.

[0223] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A multifunctional server based on task adaptive matching, characterized in that: The multifunctional server is a server cluster controlled by a host computer, and the server cluster includes: a chassis management unit, a master server unit, a plurality of slave server units, a high-speed processing unit and a switching network unit, wherein: The chassis management unit is used to receive the task package sent by the host computer, parse and determine whether the task package is a task chart: If it is a task chart, the task chart is identified based on a deep learning algorithm to obtain each application task in the task chart; and the master server unit / slave server unit corresponding to the task attribute is activated to execute the assigned application task; The main server unit is used to respond to and execute the first application task assigned by the chassis management unit; The slave server unit is used to respond to and execute the second application task assigned by the chassis management unit; When the chassis management unit determines that the task package is a task chart, it is further used to: generating a task identification request including the task graph, and sending the task identification request to the high-speed processing unit through the switching network unit; The high-speed processing unit is further used to: respond to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit; The method for generating the task identification AI model includes: Prepare several different task execution log big data; Perform feature engineering on the task execution log big data, identify and extract the task attributes of each application task in the task execution log big data and the server identifier of the master server unit / slave server unit that executes the corresponding application task, and output the corresponding association relationship between the task attributes and the server identifier; The association relationship between the task attribute and the server identifier is imported into a preset convolutional neural network model, and the convolutional neural network model is used to train and learn the relationship features of the association relationship between the task attribute and the server identifier to generate the task recognition AI model; Verifying the task identification AI model, and if the verification is successful, writing the task identification AI model into the NPU in the high-speed processing unit; If it is determined that the task package is not a task chart, the task package is directly sent to the main server unit; The main server unit is further used for: Parse the task packet to obtain a task pool consisting of several task data packets, and determine whether there is a parent node task in the task pool: If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes; If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes; The high-speed processing unit is used to provide graph / big data computing services for the chassis management unit, the master server unit or the slave server unit; The switching network unit is used to provide data exchange services between the chassis management unit and the high-speed processing unit, between the main server unit and the high-speed processing unit, or between the slave server unit and the high-speed processing unit; The master server unit and the slave server unit are respectively connected to the chassis management unit for communication; The chassis management unit, the main server unit and the slave server unit are respectively connected to the high-speed processing unit through the switching network unit.

2. The multifunctional server based on task adaptive matching according to claim 1, characterized in that: The high-speed processing unit comprises: NPU, used to provide deep learning algorithm computing services; GPU, used to provide graphics AI computing services; FPGA is used to provide image big data computing services.

3. The multifunctional server based on task adaptive matching according to claim 1, characterized in that: The chassis management unit, the master server unit or the slave server unit, if it is necessary to perform chart / big data calculation during task processing, is further used to: Generate a corresponding computing request according to the computing requirements of the corresponding chart / big data, and send the computing request to the high-speed processing unit through the switching network unit; The high-speed processing unit is further used to respond to the calculation request and feed back the corresponding calculation result, and send the calculation result to the chassis management unit, the main server unit or the slave server unit through the switching network unit.

4. The multifunctional server based on task adaptive matching according to claim 1, characterized in that: The server cluster further includes: A power supply unit, used for providing power; A power adapter board, used to provide the required voltage for the chassis management unit; The power supply unit is electrically connected to the chassis management unit through the power adapter board.

5. An application method of a multifunctional server based on task adaptive matching according to any one of claims 1 to 4, characterized in that: The method comprises the following steps: The host computer sends down the task package; The chassis management unit receives the task package sent by the host computer, parses and determines whether the task package is a task chart: If it is a task chart, a task identification request including the task chart is generated, and the task identification request is sent to the high-speed processing unit through the switching network unit; the high-speed processing unit responds to the task identification request, and the NPU intelligently identifies the task chart through a preset task identification AI model, identifies and outputs each application task in the task chart, and feeds back each application task to the chassis management unit through the switching network unit; The chassis management unit receives and obtains each application task in the task graph; and activates the master server unit / slave server unit corresponding to the task attribute to execute the assigned application task; If it is not a task chart, the task package is directly sent to the main server unit; the main server unit parses the task package to obtain a task pool consisting of several task data packets, and determines whether there is a parent node task in the task pool: If it exists, marking and executing the parent node task; and assigning the child node tasks of other non-parent node tasks to the corresponding slave server units for execution according to the task attributes; If not, all sub-node tasks in the task pool are assigned to the corresponding slave server units for execution according to task attributes.

6. An electronic device, characterized in that: The electronic device comprises: processor; A memory having computer-readable instructions stored thereon, wherein when the computer-readable instructions are executed by the processor, the method according to claim 5 is implemented.

7. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores program codes, which can be called by a processor to execute the method as claimed in claim 5.

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