Thin-film transistors, thin-film transistor fabrication methods, and display panels

Abstract

This application discloses a thin-film transistor (TFT), a TFT fabrication method, and a display panel. The TFT includes: a substrate; a first insulating layer disposed on one side of the substrate, the first insulating layer including a first body portion and a plurality of first protrusions, each first protrusion protruding away from the substrate relative to the first body portion; and an active layer disposed on the side of the first insulating layer away from the substrate, the active layer having second protrusions corresponding to the first protrusions and connecting portions connecting adjacent second protrusions. By utilizing the height difference between the second protrusions and the connecting portions, an additional portion of the active layer extending along the thickness direction of the TFT is added, thereby increasing the overall width of the active layer. Without increasing the overall size of the TFT, the conduction current of the TFT can be increased accordingly, improving the performance of the TFT and facilitating its application in high-resolution display panels.

Description

Technical Field

[0001] This application belongs to the field of electronic product technology, and in particular relates to a thin-film transistor, a method for fabricating a thin-film transistor, and a display panel. Background Technology

[0002] Organic light-emitting diode (OLED) and flat panel display devices based on light-emitting diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display panels.

[0003] As display panels tend to have higher resolution and larger size, the thin-film transistors (TFTs) in display panels require higher conduction current. However, the current conduction current of current TFTs cannot meet the requirements of display panels. Summary of the Invention

[0004] This application provides a thin-film transistor, a method for fabricating a thin-film transistor, and a display panel. Without increasing the overall size of the thin-film transistor, the on-current of the thin-film transistor can be increased accordingly, thereby improving the performance of the thin-film transistor and making it easier to apply in high-resolution display panels.

[0005] One embodiment of this application provides a thin-film transistor, characterized in that it includes: a substrate; a first insulating layer disposed on one side of the substrate, the first insulating layer including a first body portion and a plurality of first protrusions, each of the first protrusions protruding relative to the first body portion in a direction away from the substrate; an active layer disposed on the side of the first insulating layer away from the substrate, the active layer having second protrusions corresponding to the first protrusions and connecting portions connecting adjacent second protrusions.

[0006] According to one aspect of this application, it further includes a first gate layer disposed between the substrate and the first insulating layer.

[0007] According to one aspect of this application, the first gate layer includes a second body portion and a third protrusion disposed on the second body portion on a side facing away from the substrate, wherein the orthographic projection of the third protrusion on the substrate lies within the orthographic projection of the first protrusion on the substrate; preferably, the length of the interval between adjacent third protrusions ranges from 1.5 μm to 2 μm; preferably, the length of the third protrusion ranges from 1.5 μm to 2 μm; preferably, the height of the third protrusion ranges from 0.4 μm to 0.6 μm in a direction perpendicular to the plane of the substrate; preferably, the cross-section of the third protrusion is at least one of a rectangle, a trapezoid, or a semicircle in the thickness direction of the thin-film transistor; preferably, the active layer includes a channel portion disposed opposite to the first gate layer, and the third protrusion is disposed at least in the channel portion; preferably, the thickness of the first insulating layer is uniform everywhere.

[0008] According to one aspect of this application, each of the first protrusions extends along a first direction and is spaced apart along a second direction, the first direction and the second direction intersect, and the second direction is the same as the width direction of the active layer; preferably, along the second direction, the length of the third protrusion is equal to the length of the interval between adjacent third protrusions.

[0009] According to one aspect of this application, the active layer includes at least two stacked sub-active layers along the thickness direction of the thin-film transistor.

[0010] According to one aspect of this application, the spacing between adjacent first protrusions is equal along the second direction; preferably, the ratio between the width of the active layer along the second direction and the thickness of the active layer is greater than or equal to 5.

[0011] According to one aspect of this application, a second insulating layer and a second gate layer are stacked along a direction away from the substrate; the second insulating layer is disposed on the side of the active layer away from the substrate, and a portion of the second insulating layer fills the connection portion so that the surface of the second insulating layer away from the substrate is flat.

[0012] In another aspect, the present invention provides a method for fabricating a thin-film transistor, comprising the following steps: providing a substrate; forming a first insulating layer on one side of the substrate, the first insulating layer including a first body portion and a plurality of first protrusions, each of the first protrusions being disposed protruding away from the substrate relative to the first body portion; forming an active layer on the side of the first insulating layer away from the substrate, the active layer having second protrusions corresponding to the first protrusions and connecting portions connecting adjacent second protrusions.

[0013] In another aspect, the present invention provides a thin-film transistor, comprising: a substrate; a first gate layer and a second gate layer, disposed sequentially on one side of the substrate in a direction away from the substrate; and an active layer disposed between the first gate layer and the second gate layer, wherein the active layer has a concave-convex structure along the width direction of the active layer.

[0014] In another aspect, the present invention provides a display panel, characterized in that it includes thin-film transistors as described in any of the above embodiments.

[0015] Compared with the prior art, the thin-film transistor provided in this application includes a substrate, a first insulating layer, and an active layer. By providing a plurality of first protrusions on the first insulating layer, the active layer on it correspondingly forms second protrusions and connecting portions connecting adjacent second protrusions. Utilizing the height difference between the second protrusions and the connecting portions, a portion of the active layer extending along the thickness direction of the thin-film transistor is increased, thereby increasing the overall width of the active layer. Since the conduction current of the thin-film transistor increases with the increase of the active layer width, by increasing the overall width of the active layer using the second protrusions and connecting portions, the conduction current of the thin-film transistor can be increased accordingly without increasing the overall size of the thin-film transistor, improving the performance of the thin-film transistor and facilitating its application in high-resolution display panels. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a front view of a thin-film transistor provided in one embodiment of the present invention;

[0018] Figure 2 This is a side view of a thin-film transistor provided in one embodiment of the present invention;

[0019] Figure 3 This is a side view of a thin-film transistor provided in another embodiment of the present invention;

[0020] Figure 4 This is a side view of a thin-film transistor provided in another embodiment of the present invention;

[0021] Figure 5 This is a schematic diagram of the structure of the first gate layer provided in one embodiment of the present invention;

[0022] Figure 6 This is a cross-sectional view of the first gate layer provided in one embodiment of the present invention;

[0023] Figure 7 This is a cross-sectional view of the first gate layer provided in another embodiment of the present invention;

[0024] Figure 8 This is a side view of a thin-film transistor provided in another embodiment of the present invention;

[0025] Figure 9 This is a flowchart of a thin-film transistor fabrication method provided in an embodiment of the present invention;

[0026] Figure 10 This is a cross-sectional schematic diagram of the structure obtained in step S110 of the method for fabricating a thin-film transistor according to an embodiment of the present invention;

[0027] Figure 11 This is a cross-sectional schematic diagram of the structure obtained in step S120 of the method for fabricating a thin-film transistor according to an embodiment of the present invention;

[0028] Figure 12 This is a cross-sectional schematic diagram of the structure obtained in step S130 of the method for fabricating a thin-film transistor according to an embodiment of the present invention.

[0029] In the attached image:

[0030] 1-Substrate; 2-First insulating layer; 21-First body portion; 22-First protrusion portion; 3-Active layer; 31-Second protrusion portion; 32-Connection portion; 4-First gate layer; 41-Second body portion; 42-Third protrusion portion; 5-Second gate layer; 6-Second insulating layer; 7-Source; 8-Drain; Z-Sub-active layer; X-First direction; Y-Second direction. Detailed Implementation

[0031] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0032] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0033] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0034] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0035] This application provides a thin-film transistor, a method for fabricating a thin-film transistor, and a display panel. The following will describe these in conjunction with the accompanying drawings. Figures 1 to 12 Various embodiments of thin-film transistors, thin-film transistor fabrication methods, and display panels are described.

[0036] Please see Figures 1 to 2 , Figure 1 This is a front view of a thin-film transistor provided in one embodiment of the present invention; Figure 2 This is a side view of a thin-film transistor provided in one embodiment of the present invention.

[0037] The thin-film transistor provided in this application includes: a substrate 1; a first insulating layer 2 disposed on one side of the substrate 1, the first insulating layer 2 including a first body portion 21 and a plurality of first protrusions 22, each of the first protrusions 22 protruding away from the substrate 1 relative to the first body portion 21; and an active layer 3 disposed on the side of the first insulating layer 2 away from the substrate 1, the active layer 3 having a second protrusion 31 corresponding to the first protrusions and a connecting portion 32 connecting adjacent second protrusions 31.

[0038] The thin-film transistor provided in this embodiment includes a substrate 1, a first insulating layer 2, and an active layer 3. By providing a plurality of first protrusions 22 on the first insulating layer 2, the active layer 3 on it is formed with corresponding second protrusions 31 and connecting portions 32 connecting adjacent second protrusions 31. Utilizing the height difference between the second protrusions 31 and the connecting portions 32, a portion of the active layer 3 extending along the thickness direction of the thin-film transistor is increased, thereby increasing the overall width of the active layer 3. Since the conduction current of the thin-film transistor increases with the increase in the width of the active layer 3, the overall width of the active layer 3 is increased by utilizing the second protrusions 31 and the connecting portions 32. Therefore, without increasing the overall size of the thin-film transistor, the conduction current of the thin-film transistor can be increased accordingly, improving the performance of the thin-film transistor and facilitating its application in high-resolution display panels.

[0039] Optionally, each first protrusion 22 extends along a first direction X and is spaced apart along a second direction Y. The first direction X and the second direction Y intersect, and the second direction Y is the same as the width direction of the active layer 3. The first direction X can be related to the length of active layer 3. Same direction .

[0040] In this embodiment, the first insulating layer 2 can be made of an inorganic material, such as at least one of silicon nitride, silicon oxide, and silicon oxynitride. The first direction X can correspond to the length direction of the active layer 3, and the second direction Y can correspond to the width direction of the active layer 3. The first body portion 21 of the first insulating layer 2 can be a single, flat film layer, and the first protrusion 22 is disposed on the side of the first body portion 21 facing away from the substrate 1. Alternatively, the first body portion 21 can refer only to the portion disposed between adjacent first protrusions 22 for connecting adjacent first protrusions 22. The specific selection can be made according to actual needs and is not particularly limited.

[0041] Substrate 1 can be a rigid substrate, such as a glass substrate; or it can be a flexible substrate, made of materials such as polyimide, polystyrene, polyethylene terephthalate, poly(p-xylene), polyethersulfone, or polyethylene naphthalate. Substrate 1 is mainly used to support the devices mounted on it.

[0042] Please see Figure 3 Optionally, along the thickness direction of the thin-film transistor, the active layer 3 includes at least two stacked sub-active layers Z. Each sub-active layer Z protrudes together to form a second protrusion 31 protruding in a direction away from the substrate 1.

[0043] Optionally, the active layer 3 includes two sub-active layers Z. For example, the lower sub-active layer Z may be IGZO, and the upper sub-active layer Z may be ITO (Indium Tin Oxide). In practical applications, a 3-10 nm thick ITO sub-active layer Z can be additionally grown on the IGZO sub-active layer Z using magnetron sputtering to form a DAL (Dual Active Layer). Of course, the active layer 3 may also include more sub-active layers Z, and the specific materials of each sub-active layer Z can be selected according to actual needs without special limitations.

[0044] Optionally, the thin-film transistor also includes a source 7 and a drain 8. Both the source 7 and the drain 8 can be made of metals such as titanium, aluminum, and molybdenum. For example, both the source 7 and the drain 8 are made of titanium. Titanium has a low work function and can form a good ohmic contact with the active layer, improving the drift motion of electrons and thus obtaining higher device performance.

[0045] Please refer to 4 to Figure 5 In some optional embodiments, the thin-film transistor further includes a first gate layer 4 disposed between the substrate 1 and the first insulating layer 2.

[0046] It is understood that in this embodiment, the first gate layer 4 is disposed between the substrate 1 and the first insulating layer 2, that is, the thin-film transistor adopts a bottom gate structure. When a single gate structure is adopted, the first insulating layer 2 only serves as a buffer layer. The placement of the first insulating layer 2 will not affect the device current, so the first insulating layer 2 can be set as a raised structure, and the first gate layer 4 can be disposed flat. Only through the first raised portion 22 of the first insulating layer 2 can the active layer 3 correspondingly form a second raised portion 31.

[0047] The first gate layer 4 can be made of a metallic material, such as molybdenum, aluminum, titanium, etc.

[0048] Optionally, the active layer 3 includes a channel portion disposed opposite to the first gate layer 4, and the third protrusion 31 is at least disposed in the channel portion.

[0049] It should be noted that the width of the channel portion determines the strength of the device; the wider the device, the more charge carriers can pass through it in parallel. A larger channel width results in lower on-resistance of the thin-film transistor, thus increasing the device speed. Therefore, in this embodiment, by forming an uneven structure between the second protrusion 31 and the connecting portion 32 of the active layer 3, the overall width of the active layer 3 in the second direction Y is increased, thereby increasing the conduction current of the thin-film transistor.

[0050] Optionally, the material for the channel is not limited. In polysilicon devices, due to the high mobility of the channel material, it can be used when the device size is limited in the channel width direction. In oxide devices, due to the lower channel mobility, the channel conductivity is weaker. This material can be used to improve the device's conductivity. The channel material can be a single-layer oxide material or a multi-layer oxide material. Multi-layer oxide materials with different mobilities can be combined to further improve the device's conductivity. Oxide materials include, but are not limited to, IGZO (Indium Gallium Zinc Oxide), IZO (Indium Zinc Oxide), IGO (Indium Gallium Oxide), and ZnOx (ZincOxide).

[0051] The first gate layer 4 includes a second body portion 41 and a third protrusion 42 disposed on the side of the second body portion 41 away from the substrate 1. The orthogonal projection of the third protrusion 42 on the substrate 1 is located within the orthogonal projection of the first protrusion on the substrate 1.

[0052] In this embodiment, due to Substrate 1 typically employs a planar film layer; therefore, the second body portion of the first gate layer 4 41 can be a single, flat film layer, while the second protrusion is located on the side of the second body 41 facing away from the substrate 1. .

[0053] Considering that the first insulating layer 2 is located above the first gate layer 4, when the first insulating layer 2 is formed over the entire layer, the first insulating layer 2 will form a first protrusion 22 corresponding to the third protrusion 42, and The size of the first protrusion 22 will be slightly larger than that of the third protrusion. 42 This ensures that the third protrusion 42 is covered, meaning that the orthographic projection of the third protrusion 42 on the substrate 1 is within the orthographic projection of the first protrusion on the substrate 1, so as to ensure that there is sufficient spacing between the second protrusions formed in the end, and to ensure that the increase in the width of the active layer 3 can meet the requirements.

[0054] In some alternative embodiments, Along the second direction Y, the spacing between adjacent first protrusions is equal, which facilitates... During the fabrication process, it is also ensured that the spacing between the second protrusions formed corresponding to the first protrusions is equal. This allows for adjustments to the overall width of the active layer 3 in the second direction Y, based on specific requirements.

[0055] Optionally, along the second direction Y, the length of the third protrusion 42 is equal to the length of the interval between adjacent third protrusions 42. For example, when the length of the third protrusion 42 along the second direction Y is equal to 2μm, the length of the interval between adjacent third protrusions 42 is also equal to 2μm, thereby improving the regularity of the shape structure of the active layer 3 located on the first gate layer 4 and making it easier to adjust the overall width of the active layer 3 in the second direction Y.

[0056] Optionally, the length of the interval between adjacent third protrusions 42 is in the range of 1.5μm to 2μm. For example, the length of the interval between adjacent third protrusions 42 can be equal to one of 1.5μm, 1.8μm, or 2μm.

[0057] Optionally, the length of the third protrusion 42 is in the range of 1.5μm to 2μm. For example, the length of the third protrusion 42 can be equal to one of 1.5μm, 1.8μm, and 2μm.

[0058] Optionally, the height of the third protrusion 42 in the direction perpendicular to the plane of the substrate 1 ranges from 0.4 μm to 0.6 μm. For example, the height of the third protrusion 42 can be equal to one of 0.4 μm, 0.5 μm, and 0.6 μm.

[0059] Through the inventor's research, it was found that the length of the third protrusion 42 of the first gate layer 4 is 2μm, and the spacing between adjacent third protrusions 42 is 2μm. Compared with the thin film transistors in the prior art with an active layer 3 width of 40μm and a length of 10μm, the thin film transistor provided by the present application is expected to increase the channel width by 10μm and increase the conduction current by 40%, effectively improving the performance of the thin film transistor.

[0060] Optionally, the ratio between the width of the active layer 3 along the second direction Y and the thickness of the active layer 3 is greater than or equal to... 5。 Compared to existing thin-film transistors where the ratio between the width of the active layer 3 along the second direction Y and the thickness of the active layer 3 is less than or equal to 4, the embodiments of this application can effectively increase the width of the active layer 3 along the second direction Y without significantly increasing the area of ​​the thin-film transistor.

[0061] Please see Figures 5 to 6 In some alternative embodiments, the cross-section of the third protrusion 42 along the thickness direction of the thin-film transistor is at least one of a rectangle, a trapezoid, or a semicircle.

[0062] In this embodiment, Each third protrusion 42 can extend in an elongated shape along the first direction X. The cross-section of the third protrusion 42 can be selected from at least one of rectangular, trapezoidal, or semi-circular shapes according to the actual process, as long as the active layer 3 is corresponding to the protrusion, there are no special limitations.

[0063] Please see Figure 8 In some optional embodiments, the thin-film transistor further includes a second insulating layer 6 and a second gate layer 5 stacked along a direction away from the substrate 1; the second insulating layer 6 is disposed on the side of the active layer 3 away from the substrate 1, and a portion of the second insulating layer 6 is filled in the connection portion 32 so that the surface of the second insulating layer 6 away from the substrate 1 is flat.

[0064] It should be noted that when the thin-film transistor provided in this embodiment only includes the second gate layer 5 and does not include the first gate layer 4, that is, the thin-film transistor adopts a top gate structure, and considering that the second gate layer 5 is disposed above the active layer 3, its structural shape will not affect the structural shape of the active layer 3. Therefore, by filling part of the second insulating layer 6 into the connection portion 32, the flatness of the side of the second insulating layer 6 away from the substrate 1 can be ensured, thereby ensuring that the second gate layer 5 can be flatly disposed on the side of the second insulating layer 6 away from the substrate 1, and avoiding the driving effect of the second gate layer 5 being affected.

[0065] Optional, please refer to Figure 2 The thin-film transistor provided in this embodiment can also simultaneously have a first gate layer 4 and a second gate layer 5, i.e., the thin-film transistor adopts a dual-gate structure. In the dual-gate structure, if the first gate layer 4 is flat and the first insulating layer 2 is set as a protruding structure with uneven thickness, the unevenness of the thickness of the first insulating layer 2 may affect the device current. Therefore, in the dual-gate structure, the first gate layer 4 can be flattened while the second gate layer 5 is set as a protruding structure with uneven thickness. The first insulating layer 2 is set to have a uniform thickness everywhere. The first gate layer 4 is provided with a third protrusion 42, so that the first insulating layer 2 and the active layer 3 formed thereon protrude accordingly, forming a first protrusion 22 and a second protrusion 31 respectively, so as to ensure device performance.

[0066] Please see Figure 9 The present invention also provides a method for fabricating a thin-film transistor, comprising the following steps:

[0067] S110: Provides substrate 1, such as Figure 10 As shown;

[0068] S120: A first insulating layer 2 is formed on one side of the substrate 1. The first insulating layer 2 includes a first body portion 21 and a plurality of first protrusions 22. Each first protrusion 22 protrudes relative to the first body portion 21 in a direction away from the substrate 1. Each first protrusion 22 extends along a first direction X and is spaced apart along a second direction Y. The first direction X and the second direction Y intersect. Figure 11 As shown;

[0069] S130: An active layer 3 is formed on the side of the first insulating layer 2 facing away from the substrate 1. The active layer 3 has a second protrusion 31 corresponding to the first protrusion and a connecting portion 32 connecting adjacent second protrusions 31, such as... Figure 12 As shown.

[0070] The thin-film transistor fabrication method provided in this embodiment of the invention forms a first insulating layer 2 including a first body portion 21 and a plurality of first protrusions 22, such that an active layer 3 on the insulating layer 2 correspondingly forms second protrusions 31 and connecting portions 32 connecting adjacent second protrusions 31. Utilizing the height difference between the second protrusions 31 and the connecting portions 32, the active layer 3 extending partially along the optical thickness direction of the thin-film crystal is increased, thereby increasing the overall width of the active layer 3. Since the conduction current of the thin-film transistor increases with the increase in the width of the active layer 3, by increasing the overall width of the active layer 3 using the second protrusions 31 and connecting portions 32, the conduction current of the thin-film transistor can be increased without increasing the overall size of the thin-film transistor, thus improving the performance of the thin-film transistor and facilitating its application in high-resolution display panels.

[0071] In step S110, substrate 1 can be a rigid substrate, such as a glass substrate; or it can be a flexible substrate, made of polyimide, polystyrene, polyethylene terephthalate, poly(p-xylene), polyethersulfone, or polyethylene naphthalate. Substrate 1 is mainly used to support the devices disposed thereon.

[0072] In step S120, the first body portion 21 and multiple first protrusions 22 of the first insulating layer 2 can be formed separately by means of masking or etching. Alternatively, when the thin film transistor includes the first gate layer 4, a whole layer of the first insulating layer 2 can be formed directly, and the first insulating layer 2 will form the first protrusions 22 corresponding to the protrusions of the first gate layer 4.

[0073] For example, between the steps of providing substrate 1 and forming a first insulating layer 2 on one side of substrate 1, the method further includes: forming a first gate layer 4 on one side of substrate 1, the first gate layer 4 including a second body portion 41 and a third protrusion 42 disposed on the second body portion 41 on the side away from substrate 1.

[0074] In this embodiment, the second body portion 41 and the third protrusion portion 42 protruding relative to the second body portion 41 can be directly formed using a halftone mask. Halftone mask technology improves the light transmittance of the opening in the third protrusion 42. The exposure received by the third protrusion 42 is increased to a greater degree than that of the second protrusion after development. Body part 41.

[0075] In step S130, the active layer 3 can be formed by processes such as magnetron sputtering, coating, and photolithography. The material of the active layer 3 can include oxide materials, such as IGZO (indium gallium zinc oxide), and is not particularly limited. Since the first insulating layer 2 located below the active layer 3 includes a plurality of first protrusions 22, when the active layer 3 is formed on the first insulating layer 2, the active layer 3 can correspondingly form second protrusions 31 and connecting portions 32 located between adjacent second protrusions 31.

[0076] Please see Figure 2 The present invention also provides a thin film transistor, comprising: a substrate 1; a first gate layer 4 and a second gate layer 5, which are disposed sequentially on one side of the substrate 1 in a direction away from the substrate 1; and an active layer 3 disposed between the first gate layer 4 and the second gate layer 5, wherein the active layer 3 has a concave-convex structure along the width direction of the active layer 3.

[0077] The thin-film transistor provided in this embodiment of the invention includes a substrate 1; a first gate layer 4, a second gate layer 5, and an active layer 3, i.e., the thin-film transistor adopts a dual-gate structure. In this embodiment, the active layer 3 has a concave-convex structure, i.e., a portion of the active layer 3 protrudes away from the substrate 1 relative to the first gate layer 4, while another portion of the protruding portion of the active layer 3 is recessed. By utilizing the height difference between these two portions, an additional portion of the active layer 3 extending along the thickness direction of the thin-film transistor is added, thereby increasing the overall width of the active layer 3. Since the conduction current of the thin-film transistor increases with the increase of the width of the active layer 3, the conduction current of the thin-film transistor can be increased accordingly without increasing the overall size of the thin-film transistor, thus improving the performance of the thin-film transistor and facilitating its application in high-resolution display panels.

[0078] Optionally, the active layer 3 includes a plurality of second protrusions 31 that protrude in a direction away from the substrate 1 and a connecting portion 32 that connects adjacent second protrusions 31.

[0079] Optionally, a first insulating layer 2 is provided between the first gate layer 4 and the active layer 3. The first insulating layer 2 includes a first body portion 21 and a plurality of first protrusions 22. Each first protrusion 22 protrudes from the first body portion 21 in a direction away from the substrate 1. By providing a plurality of first protrusions 22 on the first insulating layer 2, the active layer 3 located thereon is provided with corresponding second protrusions 31 and connecting portions 32 connecting adjacent second protrusions 31.

[0080] Optionally, each first protrusion 22 extends along a first direction X and is spaced apart along a second direction Y. The first direction X and the second direction Y intersect. The second direction Y is the same as the width direction of the active layer 3, while the first direction X may be the same as the length direction of the active layer 3.

[0081] Optionally, the first gate layer 4 can be disposed flat, and the active layer 3 can be formed with a corresponding second protrusion 31 only through the first protrusion 22 of the first insulating layer 2.

[0082] Alternatively, since the first gate layer 4 is located below the first insulating layer 2 and the active layer 3, the first gate layer 4 can also be provided with a third protrusion 42 so that the first insulating layer 2 and the active layer 3 formed thereon protrude accordingly, forming a first protrusion 22 and a second protrusion 31 respectively. The first gate layer 4 can be made of a metal material, such as molybdenum, aluminum, titanium and other metals.

[0083] Optionally, the active layer 3 includes a channel portion disposed opposite to the first gate layer 4, and the third protrusion 31 is at least disposed in the channel portion.

[0084] It should be noted that the width of the channel portion determines the strength of the device; the wider the device, the more charge carriers can pass through it in parallel. A larger channel width results in lower on-resistance of the thin-film transistor, thus increasing the device speed. Therefore, in this embodiment, by forming an uneven structure between the second protrusion 31 and the connecting portion 32 of the active layer 3, the overall width of the active layer 3 in the second direction Y is increased, thereby increasing the conduction current of the thin-film transistor.

[0085] Optionally, the thin-film transistor may further include a second insulating layer 6 disposed between the second gate layer 5 and the active layer 3.

[0086] Considering that the second gate layer 5 is disposed above the active layer 3 and its structural shape will not affect the structural shape of the active layer 3, the flatness of the second insulating layer 6 away from the substrate 1 can be ensured by filling part of the second insulating layer 6 into the connection portion 32, thereby ensuring that the second gate layer 5 can be flatly disposed on the side of the second insulating layer 6 away from the substrate 1, and avoiding the driving effect of the second gate layer 5 being affected.

[0087] This invention also provides a display panel including a thin-film transistor as described in any of the above embodiments. According to one embodiment of the invention, the display panel includes a pixel driving circuit and a display element. The pixel driving circuit includes a first thin-film transistor and a second thin-film transistor. Any of the aforementioned thin-film transistors can be used as the first thin-film transistor. The first thin-film transistor is a driving transistor that receives data signals to drive the display element to emit light for display. The second thin-film transistor is a switching transistor. The second thin-film transistor is connected to a gate line and a data line, and is turned on or off by a scan signal provided via the gate line.

[0088] The display panel provided in the embodiments of the present invention can be an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, or a micro flat panel display panel (Micro-OLED or Micro-LED), etc.

[0089] The display panel provided in this embodiment of the invention has the technical effects of the thin-film transistor technical solution in any of the above embodiments. The explanations of the same or corresponding structures and terms as in the above embodiments will not be repeated here.

[0090] The display panel provided in this application embodiment can be applied to mobile phones or any electronic product with display function, including but not limited to the following categories: televisions, laptops, desktop monitors, tablets, digital cameras, smart bracelets, smart glasses, vehicle displays, medical devices, industrial control equipment, touch interactive terminals, etc. This application embodiment does not make any special limitations on this.

[0091] The above are merely specific embodiments of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

[0092] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

Claims

1. A thin-film transistor, characterized in that, include: Substrate; A first insulating layer is disposed on one side of the substrate. The first insulating layer includes a first body portion and a plurality of first protrusions. Each first protrusion protrudes from the first body portion in a direction away from the substrate. Each first protrusion extends along a first direction and is spaced apart along a second direction. The first direction and the second direction intersect. An active layer is disposed on the side of the first insulating layer away from the substrate. The active layer has a second protrusion that protrudes corresponding to the first protrusion and a connecting portion that connects adjacent second protrusions. A first gate layer is disposed between the substrate and the first insulating layer. The first gate layer includes a second body portion and a third protrusion disposed on the second body portion on a side away from the substrate. The orthogonal projection of the third protrusion on the substrate lies within the orthogonal projection of the first protrusion on the substrate. Along a second direction, the length of the third protrusion is equal to the length of the interval between adjacent third protrusions. Along the second direction, the interval between adjacent first protrusions is equal, and the interval between the second protrusions formed corresponding to the first protrusions is equal. The second direction is the same as the width direction of the active layer. The length of the interval between adjacent third protrusions ranges from 1.5 μm to 2 μm, and the length of the third protrusion ranges from 1.5 μm to 2 μm. Along a direction perpendicular to the plane of the substrate, the height of the third protrusion ranges from 0.4 μm to 0.6 μm.

2. The thin-film transistor according to claim 1, characterized in that, Along the thickness direction of the thin-film transistor, the cross-section of the third protrusion is at least one of a rectangle, a trapezoid, or a semicircle.

3. The thin-film transistor according to claim 1, characterized in that, The active layer includes a channel portion disposed opposite to the first gate layer, and the third protrusion portion is at least disposed in the channel portion.

4. The thin-film transistor according to claim 1, characterized in that, The thickness of the first insulating layer is the same everywhere.

5. The thin-film transistor according to claim 1, characterized in that, Along the thickness direction of the thin-film transistor, the active layer includes at least two stacked sub-active layers.

6. The thin-film transistor according to claim 1, characterized in that, The ratio between the width of the active layer along the second direction and the thickness of the active layer is greater than or equal to 5.

7. The thin-film transistor according to claim 1, characterized in that, It also includes a second insulating layer and a second gate layer stacked along a direction away from the substrate; The second insulating layer is disposed on the side of the active layer away from the substrate, and a portion of the second insulating layer fills the connection portion so that the surface of the second insulating layer away from the substrate is flat.

8. A method for fabricating a thin-film transistor, used to fabricate the thin-film transistor according to any one of claims 1 to 7, characterized in that, Includes the following steps: Provide substrate; A first insulating layer is formed on one side of the substrate. The first insulating layer includes a first body portion and a plurality of first protrusions. Each of the first protrusions protrudes from the first body portion in a direction away from the substrate. An active layer is formed on the side of the first insulating layer away from the substrate. The active layer has a second protrusion that protrudes corresponding to the first protrusion and a connecting portion that connects adjacent second protrusions.

9. A thin-film transistor, characterized in that, include: Substrate; A first gate layer and a second gate layer are sequentially disposed on one side of the substrate along a direction away from the substrate; A first insulating layer is disposed between the first gate layer and the active layer. The first insulating layer includes a first body portion and a plurality of first protrusions. Each first protrusion protrudes from the first body portion in a direction away from the substrate. Each first protrusion extends along a first direction and is spaced apart along a second direction. The first direction and the second direction intersect. An active layer is disposed between the first gate layer and the second gate layer. Along the width direction of the active layer, the active layer has a concave-convex structure. The active layer includes a second protrusion formed corresponding to the first protrusion and a connecting portion connecting adjacent second protrusions. The first gate layer includes a second body portion and a third protrusion disposed on the second body portion on the side opposite to the substrate. Along a second direction, the length of the third protrusion is equal to the length of the interval between adjacent third protrusions. Along the second direction, the interval between adjacent first protrusions is equal, and the interval between the second protrusions formed corresponding to the first protrusions is equal. The second direction is the same as the width direction of the active layer. The length of the interval between adjacent third protrusions ranges from 1.5 μm to 2 μm, the length of the third protrusion ranges from 1.5 μm to 2 μm, and the height of the third protrusion ranges from 0.4 μm to 0.6 μm in a direction perpendicular to the plane of the substrate.

10. A display panel, characterized in that, Including the thin-film transistor as described in any one of claims 1 to 9.

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