A thyristor duty cycle closed-loop control method and system for phase-controlled arc suppression coils

Abstract

The present invention discloses a closed-loop control method and system for the duty cycle of a phase-controlled arc suppression coil, and a method for controlling the compensation current level of the phase-controlled arc suppression coil. Unlike conventional thyristor conduction angle control methods, this method uses a conditioning circuit to convert the voltage across the thyristor into the thyristor conduction state and perform closed-loop duty cycle control on the thyristor. This control is independent of zero-crossing detection of the zero-sequence voltage across the arc suppression coil, enabling reliable control of the arc suppression coil compensation current level even in grids with high harmonic content and severe zero-sequence voltage waveform distortion.

Description

Technical Field

[0001] This patent belongs to a control method that uses duty cycle closed-loop control of the thyristor of the control winding in the power grid grounding system through a phase-controlled arc suppression coil. It is significantly different from the traditional thyristor conduction angle triggering method and can solve the problem of inaccurate control of the arc suppression coil compensation current level when the system's ground capacitance and the primary leakage reactance of the phase-controlled arc suppression coil resonate. Background Art

[0002] The traditional thyristor conduction angle triggering method is to control the thyristor conduction angle of the arc suppression coil control winding to control the primary compensation current of the arc suppression coil. The voltage across the primary winding of the arc suppression coil is detected by PT, and the voltage zero crossing point is obtained according to the zero crossing detection circuit. The thyristor of the control winding is turned on at the conduction angle position corresponding to the current gear by delay triggering, generating an inductive current of the control winding and controlling the primary compensation current of the arc suppression coil. If the zero crossing point detection of the voltage across the arc suppression coil is inaccurate, the thyristor cannot be correctly controlled to conduct at the corresponding conduction angle, resulting in inaccurate control of the arc suppression coil compensation current. The current of the thyristor conduction will contain a large number of odd harmonics (mainly 3rd and 5th), and the filter winding forms a harmonic low-impedance circuit to prevent a large amount of harmonic current from entering the power grid. If the grid grounding capacitance and the primary leakage reactance of the phase-controlled arc suppression coil produce 3rd or 5th frequency resonance, a large amount of 3rd or 5th harmonic current will enter the grid, causing serious distortion of the voltage waveform at both ends of the arc suppression coil, resulting in inaccurate zero-crossing detection and inaccurate or unstable control of the arc suppression coil compensation current. Summary of the Invention

[0003] The purpose of this patent invention is to address the problem of inaccurate control of the arc suppression coil compensation current caused by the voltage waveform distortion at both ends of the phase-controlled arc suppression coil. A thyristor duty cycle closed-loop control method is used to change the arc suppression coil compensation current from corresponding to the thyristor conduction angle to corresponding to the thyristor duty cycle. The control strategy in this scheme does not rely on the zero crossing point of the voltage, avoiding the control problem caused by inaccurate zero crossing detection caused by the voltage waveform distortion at both ends of the arc suppression coil.

[0004] This patented technical solution utilizes a method for detecting the voltage across the thyristor (SCR) and controlling its conduction duty cycle. This method uses closed-loop control of the SCR duty cycle to control the arc suppression coil compensation current. A current-mode PT is used to detect the voltage across the SCR, and the SCR conduction state waveform is obtained through an op amp conditioning circuit, a rectifier circuit, and a comparator circuit. The arc suppression control system provides a target gear position and converts it into the target duty cycle ρ0 for the SCR. The control begins with the first cycle using the traditional SCR conduction angle triggering method, delaying the voltage from zero crossing to an initial delay time Tdelay corresponding to the delayed conduction angle θ before driving the SCR to conduct. The time from the SCR conduction to the natural turn-off, Ton1, is sampled and detected. The SCR's current conduction duty cycle ρ is calculated based on Ton1 and the period T. This, along with the target duty cycle ρ0 provided by the arc suppression system, is input into a PID controller to calculate the output SCR control duty cycle ρc. The SCR's hold-off time, Toff2, is then calculated based on the period T. From the end of Ton1, start timing Toff2, then drive and control the thyristor to conduct, continue sampling and detecting the time from the thyristor conduction to the natural off time Ton2, calculate the current thyristor conduction duty cycle ρ based on Ton2 and period T, and then continue to perform closed-loop control with PID on the thyristor conduction duty cycle according to the above method. For the definition of the above parameters, please refer to the thyristor control timing diagram ( Figure 5 ) and control flow graph ( Figure 6 ).

[0005] The beneficial effect of this patent is that the control system matches the arc suppression coil compensation current with the thyristor duty cycle of the control winding, realizes closed-loop control of the duty cycle of the thyristor conduction process, and solves the control problem caused by the zero-point detection deviation of the voltage signal waveform distortion at both ends of the arc suppression coil in the previous control. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 This is the single-phase equivalent control system diagram of the phase-controlled arc suppression coil;

[0007] Figure 2 This is the circuit diagram of the SCR conduction state conditioning;

[0008] Figure 3 It is the voltage waveform of the two ends of the thyristor;

[0009] Figure 4 It is the waveform of the output signal of the conditioning circuit;

[0010] Figure 5 It is the thyristor control timing diagram;

[0011] Figure 6 It is a control flow graph;

[0012] Figure 1Middle: Ux, natural unbalanced voltage; Cx, system-to-ground capacitance; U0, phase-controlled arc suppression coil primary voltage measurement PT; I0, phase-controlled arc suppression coil primary current measurement CT; T1, phase-controlled arc suppression coil; SCR1, thyristor; L3, 3rd harmonic filter inductor; C3, 3rd harmonic filter capacitor; L5, 5th harmonic filter inductor; C5, 5th harmonic filter capacitor; U1, conditioning circuit Figure 2 ; B2, driving circuit; B3, control system.

[0013] Figure 2 In the figure: Ui, voltage across the thyristor; PT1, current-type PT; Rp, PT1 common-name input resistor; Rn, PT1 opposite-name input resistor; R4, PT1 secondary voltage sampling resistor; R1, PT1 secondary signal filter resistor; C1, PT1 secondary signal filter capacitor; U1A, signal follower op amp; U1B, first-stage amplifier op amp; U1C, second-stage amplifier op amp; U1D, signal rectifier op amp; R2, first-stage amplifier input resistor; R5, first-stage amplifier ratio adjustment resistor; R6, first-stage amplifier feedback resistor; R3, second-stage amplifier input resistor; R7, second-stage amplifier ratio adjustment resistor; R8, second-stage amplifier feedback resistor; R10, rectifier circuit positive input resistor Input resistor; R13, negative input resistor of rectifier circuit; R16, voltage divider resistor of rectifier circuit; R14, feedback resistor of rectifier circuit; D1, diode of rectifier circuit; R11, filter resistor of rectifier signal; C2, filter capacitor of rectifier signal; U2, comparator; R17, negative input resistor of U2; R15, positive input resistor of U2; R9, feedback resistor of U2; R12, output pull-up resistor of U2; U3, inverter; U01, secondary filter signal of PT1; U02, output signal of op amp follower; U03, output signal of first stage amplification; U04, output signal of second stage amplification; U05, filter signal of rectifier; U06, output signal of comparator; U07, output signal of conditioning circuit.

[0014] Figure 5 In: θ, delayed conduction angle; Tdelay, initial delay time; T0, default period; T, period; Ton1, time 1 from thyristor conduction to natural turn-off; Ton2, time 2 from thyristor conduction to natural turn-off; Ton3, time 3 from thyristor conduction to natural turn-off; Toff2, thyristor maintain turn-off time 2; Toff3, thyristor maintain turn-off time 3.

[0015] Figure 6 In the figure: ρ0, thyristor target duty cycle; ρc, thyristor control duty cycle; ρ, thyristor current on-duty cycle; Ton, thyristor turn-on to natural turn-off time; Toff, thyristor maintain off-time. DETAILED DESCRIPTION

[0016] Refer to the attached Figure 1-6 as follows:

[0017] exist Figure 1 In the embodiment shown, the natural unbalanced voltage (Ux) is connected in series with the system ground capacitance (Cx), the primary winding of the phase-controlled arc suppression coil (T1), and the phase-controlled arc suppression coil primary current measurement CT (I0). The phase-controlled arc suppression coil primary voltage measurement PT (U0) is connected in parallel between the primary winding of the phase-controlled arc suppression coil (T1) and the phase-controlled arc suppression coil primary current measurement CT (I0). Thyristor (SCR1) and conditioning circuit Figure 2 The primary input of the current-type PT (PT1) of (U1) is connected in parallel to the control winding of the phase-controlled arc suppression coil (T1). The third harmonic filter inductor (L3) and the third harmonic filter capacitor (C3) are connected in series and connected to the filter winding of the phase-controlled arc suppression coil (T1). The fifth harmonic filter inductor (L5) and the fifth harmonic filter capacitor (C5) are connected in series and connected to the filter winding of the phase-controlled arc suppression coil (T1). Conditioning circuit Figure 2 (U1) generates a thyristor conduction state signal through conditioning and then inputs it into the control system (B3). The output thyristor control signal is sent to the drive circuit (B2) to drive the thyristor to conduct.

[0018] exist Figure 2 In the embodiment shown, the voltage across the thyristor (Ui, Figure 3The voltage waveform diagram across the thyristor (Figure 1) is the input signal, connected in series with the PT1's symmetric input resistor (Rp), the primary input circuit of the current-mode PT (PT1), and the PT1's opposite-signal input resistor (Rn). The PT1's secondary output is connected in parallel with the PT1's secondary voltage sampling resistor (R4). The PT1's secondary voltage signal then passes through the PT1's secondary signal filter resistor (R1) to produce the PT1's secondary filtered signal (U01), which then enters the positive input of the signal follower op amp (U1A). The PT1's secondary signal filter capacitor (C1) is connected between U1A's positive input and ground. U1A's negative input is connected to its output, and the output op amp follows the output signal (U02). U02 = U01 = Ui / 500kΩ*200Ω = 0.0004*Ui. The output of U1A is connected to the positive input of the first-stage amplifier op amp (U1B) via the first-stage amplifier input resistor (R2). The first-stage amplifier feedback resistor (R6) is connected between the negative input and output of U1B. The first-stage amplifier scaling resistor (R5) is connected between the negative input and ground of U1B, resulting in the output of the first-stage amplifier output signal (U03). U03 = U02 * (1 + R6 / R5) = U02 * (1 + 140K / 2K) = 71 * U02. The output voltage stops increasing when it reaches the op amp's Vom value. The output of U1B is connected to the positive input of the second-stage amplifier op amp (U1C) via the second-stage amplifier input resistor (R3). The second-stage amplifier feedback resistor (R8) is connected between the negative input and output of U1C. The second-stage amplifier scaling resistor (R7) is connected between the negative input and ground of U1C, resulting in the output of the second-stage amplifier output signal (U04). U04 = 71 * U03. The output voltage stops increasing when it reaches the op amp's Vom value. U04 is connected to the negative input of the signal rectifier op amp (U1D) via the rectifier circuit's negative input resistor (R13). U1D's positive input is grounded via the rectifier circuit's positive input resistor (R10). U1D's output is connected to the positive terminal of the rectifier circuit's diode (D1). The rectifier circuit's feedback resistor (R14) is connected between U1D's negative input and D1's negative terminal. The rectifier circuit's voltage divider resistor (R16) connects U1D's negative input to ground. The rectified signal flows from D1's negative terminal through the rectifier signal filter resistor (R11) to output the rectified and filtered signal (U05). The rectifier signal filter capacitor (C2) connects U05 to ground. U05 = |U04 / 2|. U05 is connected to the negative input resistor (R17) of the comparator (U2). The positive input of U2 is connected to the reference voltage +2.5V through the positive input resistor (R15) of U2. The comparator output signal (U06) is connected to the input of the inverter (U3). The U2 output pull-up resistor (R12) connects the signal U06 to +3.3V. The U2 feedback resistor (R9) connects the signal U06 to the positive input of U2. The output signal (U07, Figure 4 (The waveform diagram of the output signal of the conditioning circuit) is connected to the signal input port of the control system (B3).

[0019] exist Figure 5 In the illustrated embodiment, the first cycle at the start of control requires calculating the initial delay time (Tdelay) based on the delayed conduction angle (θ). The timing Tdelay is started from the zero-crossing point of the voltage waveform at both ends of the thyristor. When the time is up, a control signal is sent through the drive circuit (B2) to control the thyristor to turn on. The time from the thyristor to the natural turn-off time 1 (Ton1) is detected. Then, combined with the default period (T0) and the PID regulator, the current conduction duty cycle (ρ) of the thyristor can be calculated and then converted into the thyristor maintenance turn-off time 2 (Toff2). After timing Toff2, a control signal is sent through the drive circuit (B2) to control the thyristor to turn on, and the time from the thyristor to the natural off-time 2 (Ton2) is detected. At this time, T0 is corrected according to Toff2 and Ton2 to obtain the actual cycle (T) of the current control, and then the current on-duty cycle (ρ) of the thyristor is calculated through the PID regulator, and then converted into the thyristor maintenance off-time 3 (Toff3). After timing Toff3, a control signal is sent through the drive circuit (B2) to control the thyristor to turn on, and the time from the thyristor to the natural off-time 3 (Ton3) is detected. Subsequent control cycles are repeated until the output control is stopped.

[0020] exist Figure 6 In the illustrated embodiment, the arc suppression control system provides a target gear position, which is then converted into a thyristor delayed conduction angle (θ, ranging from 5000 to 10000, corresponding to 90° to 180°) according to a configuration file. Based on the initial delay time (Tdelay, Tdelay = θ / 10000*T), the thyristor target duty cycle (ρ0) is calculated (ρ0 = 2*(T-Tdelay) / T = 2-θ / 5000, ranging from 0 to 1, where 0 corresponds to thyristor non-conduction and 1 corresponds to thyristor full conduction). A determination is then made as to whether ρ0 is 0. If ρ0 is 0, output control is stopped. If ρ0 is not 0, the control system continues to determine whether it is operating. If it is operating, no processing is performed and the system automatically follows ρ0. If the control is not operating, output control is started. The first cycle of the control starts in accordance with the traditional thyristor conduction angle triggering method, first detecting the voltage zero crossing point, and then timing the delay conduction angle (θ) corresponding to the initial delay time (Tdelay) from the voltage zero crossing point, and then driving the thyristor to conduct; sampling detection thyristor conduction to natural turn-off time (Ton, corresponding to Figure 5 According to Ton and period T, the current conduction duty cycle of the thyristor (ρ, ρ = Ton / T) is calculated, and the target duty cycle of the thyristor (ρ0) given by the arc suppression system is input into the PID regulator to calculate the output thyristor control duty cycle (ρc, value range 0 ~ 1), and then the thyristor maintenance off time (Toff, corresponding to Figure 5Toff2 in, Toff=(1-ρc)*T); start timing Toff from the end position of Ton, delay the time until the drive control thyristor is turned on again, and continue sampling to detect the time from the thyristor turning on to the natural turn-off time (Ton, corresponding to Figure 5 According to Ton and period T (corrected control cycle time T, such as T = Toff2 + Ton2, the size is limited to ±5% of T0, T0 is the default value of the control cycle, which is 10mS), the thyristor control duty cycle (ρ) is calculated, and then the thyristor maintenance off time (Toff, corresponding to Figure 5 Toff3 in the figure), the timing Toff starts from the end position of Ton, the time delay is until the re-drive control thyristor is turned on, and the sampling detection of the thyristor conduction to the natural turn-off time (Ton, corresponding to Figure 5 The PID closed-loop control of the thyristor conduction duty cycle is continued as described above until the output control is stopped.

[0021] The above embodiments are intended only to illustrate the technical concepts and features of the present invention. Their purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. They are not intended to limit the scope of protection of the present invention. Any equivalent changes or modifications made based on the spirit and essence of the present invention are intended to be covered by the scope of protection of the present invention.

Claims

1. A closed-loop control method for the duty cycle of a thyristor for a phase-controlled arc suppression coil, characterized in that: The voltage across the thyristor is detected to obtain the thyristor conduction state, and then the duty cycle of the thyristor is closed-loop controlled according to the arc suppression coil compensation current gear requirements; specifically: S1. The arc extinguishing control system gives a target gear position, and converts the target gear position into a thyristor delayed conduction angle θ according to the configuration file, corresponding to the initial delay time Tdelay, Tdelay = (θ / 10000) * T, where T is the period; S2. Calculate the target duty cycle ρ0 of the thyristor, ρ0 = 2*(T-Tdelay) / T = 2-θ / 5000, with a value ranging from 0 to 1, where 0 corresponds to the thyristor being non-conductive and 1 corresponds to the thyristor being fully conductive; S3, determining whether the thyristor target duty cycle ρ0 is 0, if so, stopping output control; if not, continuing to determine whether the control is running; S4: If yes, no processing is done and the system automatically follows ρ0; if no, output control is started; S5. Control starts the first cycle according to the traditional thyristor conduction angle triggering method, first detects the voltage zero crossing point, and then starts timing the initial delay time Tdelay corresponding to the delayed conduction angle θ from the voltage zero crossing point, and then drives the thyristor to conduct; S6, sampling and detecting the time Ton1 from the thyristor to the natural off-state, and calculating the current on-duty ratio ρ of the thyristor according to the time Ton1 and the period T, ρ=Ton1 / T; S7, the current conduction duty cycle of the thyristor ρ and the target duty cycle of the thyristor ρ0 given by the arc extinguishing control system in S2 are input into the PID regulator, and the thyristor control duty cycle ρ is output. c , the value range is 0 to 1; S8, the thyristor controls the duty cycle p c Combined with the period T, calculate the thyristor off-time Toff2, Toff2 = (1-ρ c )*T; S9, starting timing Toff2 from the end position of the thyristor conduction to the natural off time Ton1, delaying the time until the thyristor is driven to conduct again, and continuing sampling and detecting the thyristor conduction to the next natural off time Ton2; S10, calculating the next thyristor control duty cycle according to the next natural off time Ton2 and the corrected control period T, wherein the corrected control period is the sum of the next natural off time Toff2 and the thyristor maintained off time Ton2; S11, calculating the next thyristor off-time Toff3 by combining the next thyristor control duty cycle with the corrected control period; S12, starting the timing Toff3 from the end position of the next thyristor maintenance off time, delaying the time until the next drive control thyristor is turned on, and continuing sampling and detecting the thyristor conduction to the next natural off time Ton3; S13. Repeat the above process and continue to perform closed-loop control with PID on the duty cycle of the thyristor until the output control is stopped.

2. The closed-loop control method for thyristor duty cycle of a phase-controlled arc suppression coil according to claim 1, characterized in that: The conditioning circuit is used to convert the voltage across the thyristor into a thyristor conduction state waveform and input it into the control system.

3. The closed-loop control method for thyristor duty cycle of a phase-controlled arc suppression coil according to claim 1, characterized in that: The control system converts the arc suppression coil compensation current gear into the thyristor conduction duty cycle.

4. The closed-loop control method for thyristor duty cycle of a phase-controlled arc suppression coil according to claim 1, characterized in that: The arc suppression coil is used to compensate for the closed-loop control of the current gear and the thyristor conduction duty cycle.

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