Semiconductor device manufacturing method and semiconductor device

Abstract

The invention discloses a method for manufacturing a semiconductor device and a semiconductor device. The method for manufacturing a semiconductor device comprises: preparing a semiconductor substrate; arranging a first insulating layer on the semiconductor substrate; etching a first contact hole in the first insulating layer; forming a titanium silicide layer at the bottom of the first contact hole, etching a second contact hole in the first insulating layer, the second contact hole being located on both sides of the first contact hole in a second direction; arranging a second insulating layer in the second contact hole, and arranging a tungsten film and a titanium nitride film in the first contact hole. Thus, by etching the second contact hole on both sides of the second direction of the first contact hole and arranging the second insulating layer in the second contact hole, the second insulating layer separates the titanium silicide layer from the semiconductor substrate, and the integrity of the titanium nitride film arranged in the first contact hole can be ensured, thereby effectively preventing tungsten from diffusing into the semiconductor substrate.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor device and a semiconductor device. Background Art

[0002] In a trench-gate metal oxide semiconductor field effect transistor or an insulated gate bipolar transistor, in order to connect the mesa portion sandwiched between adjacent trenches to the source electrode or emitter electrode, a through hole (contact hole) is formed in the interlayer insulating film on the mesa portion to expose the mesa portion. A barrier metal such as a titanium film and a titanium nitride film is deposited in the contact hole, and the contact hole is filled with a tungsten film, and then the source electrode or emitter electrode is deposited. In order to prevent the tungsten of the tungsten film from diffusing into the silicon of the mesa portion and to improve the adhesion, the titanium film at the bottom of the contact hole is silicided to form a titanium silicide layer before the tungsten film is filled.

[0003] In the related art, when the titanium film at the bottom of the contact hole is silicided to form a titanium silicide layer, the titanium of the titanium film reacts with the silicon of the mesa portion to reduce the volume of the mesa portion, and the contact hole expands to below the interlayer insulating film, thereby forming an eaves on the interlayer insulating film. Therefore, after the titanium silicide layer is formed, when a metal film such as a titanium nitride film or a tungsten film is formed in the contact hole, the titanium nitride film and the tungsten film will form a vacancy at the position of the eaves, and the tungsten of the tungsten film is prone to diffuse into the silicon of the mesa portion. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a method for manufacturing a semiconductor device, which can prevent tungsten in a tungsten film from diffusing into a semiconductor substrate.

[0005] Another object of the present invention is to provide a semiconductor device.

[0006] A method for manufacturing a semiconductor device according to an embodiment of the present invention comprises: preparing a semiconductor substrate, wherein the semiconductor substrate has a first main surface and a second main surface on the opposite side of the first main surface, the first main surface and the second main surface are spaced apart from each other in a first direction; arranging a plurality of grooves in the semiconductor substrate, wherein the depth of the grooves extends from the first main surface toward the second main surface and is spaced apart from the second main surface, the plurality of grooves are spaced apart in the second direction, and the first direction and the second direction are perpendicular to each other; arranging a first insulating layer on the semiconductor substrate; etching a first contact hole in the first insulating layer, wherein the first contact hole is located between two adjacent grooves, the depth of the first contact hole extends from a side of the first insulating layer away from the first main surface toward the first direction, the first contact hole penetrates the first insulating layer and the bottom of the first contact hole extends from the first main surface into the semiconductor substrate; forming a titanium silicide layer at the bottom of the first contact hole, wherein both ends of the titanium silicide layer in the second direction protrude from the first main surface. The first contact hole is formed in the first insulating layer and is located on the side of the first insulating layer facing the first main surface; a second contact hole is etched in the first insulating layer, the second contact holes are located on both sides of the first contact hole in the second direction and are correspondingly connected with the first contact hole, the depth of the second contact hole extends from the side of the first insulating layer away from the first main surface toward the first direction, the first contact hole penetrates the first insulating layer and the bottom extends from the first main surface into the semiconductor substrate, and the bottom of the second contact hole is protruded relative to the side of the titanium silicide layer facing the second main surface; a second insulating layer is arranged in the second contact hole, a tungsten film is arranged in the first contact hole, and a titanium nitride film is arranged in the first contact hole, wherein the titanium nitride film is partially located between the tungsten film and the titanium silicide layer, and the titanium nitride film is partially located between the tungsten film and the second insulating layer on both sides; an electrode layer is arranged on the side of the first insulating layer away from the first main surface, wherein the electrode layer is in contact with the tungsten film and the titanium nitride film.

[0007] Therefore, by etching a second contact hole on both sides of the first contact hole in the second direction and setting a second insulating layer in the second contact hole, the second insulating layer separates the titanium silicide layer from the semiconductor substrate, thereby ensuring the integrity of the titanium nitride film set in the first contact hole, thereby effectively preventing tungsten from diffusing into the semiconductor substrate.

[0008] In some examples of the present invention, the step of etching a second contact hole in the first insulating layer includes: removing the first insulating layer on both sides of the first contact hole in the second direction so that the two ends of the titanium silicide layer in the second direction are spaced from the first insulating layer; and etching the portion between the two ends of the titanium silicide layer in the second direction and the first insulating layer in the semiconductor substrate.

[0009] In some examples of the present invention, after the step of removing the first insulating layer on both sides of the first contact hole in the second direction so that the two ends of the titanium silicide layer in the second direction are spaced apart from the first insulating layer, before the step of etching the portion between the two ends of the titanium silicide layer in the second direction and the first insulating layer in the semiconductor substrate, the step also includes: at least partially etching away the two ends of the titanium silicide layer in the second direction.

[0010] In some examples of the present invention, the steps of setting a second insulating layer in the second contact hole, setting a tungsten film in the first contact hole, and setting a titanium nitride film in the first contact hole include: depositing the second insulating layer in the first contact hole and the second contact hole, wherein the second insulating layer fills the first contact hole and the second contact hole; etching and removing the second insulating layer in the first contact hole; depositing the titanium nitride film on the side and bottom of the first contact hole, and depositing the titanium nitride film on the side of the first insulating layer and the second insulating layer away from the first main surface; depositing a tungsten film on the inner side of the titanium nitride film, wherein the titanium nitride film includes a first film portion and a second film portion, the first film portion is arranged between the titanium silicide layer and the tungsten film, the second film portion is arranged on both sides of the first film portion in the second direction, and the second film portion is located between the tungsten film and the second insulating layer.

[0011] In some examples of the present invention, before the step of providing an electrode layer on a side of the first insulating layer away from the first main surface, the step further includes: removing the titanium nitride film on a side of the first insulating layer and the second insulating layer away from the first main surface.

[0012] In some examples of the present invention, after the step of providing an electrode layer on a side of the first insulating layer away from the first main surface, the step further includes: grinding the semiconductor substrate from the second main surface to adjust the thickness of the formed semiconductor device.

[0013] In some examples of the present invention, the step of forming a titanium silicide layer at the bottom of the first contact hole also includes: depositing a titanium film on the side and bottom of the first contact hole, and on a side of the first insulating layer away from the first main surface, wherein a portion of the titanium film corresponding to the bottom of the first contact hole forms the titanium silicide layer with the silicide in the semiconductor substrate; and removing the titanium film on the side of the first contact hole and on a side of the first insulating layer away from the first main surface.

[0014] A semiconductor device according to an embodiment of the present invention is applicable to a manufacturing method of the semiconductor device described above, comprising a semiconductor substrate, wherein the semiconductor substrate has a first main surface and a second main surface opposite to the first main surface, wherein the first main surface and the second main surface are spaced apart from each other in a first direction; a groove, wherein the groove is arranged in the semiconductor substrate, the depth of the groove extends from the first main surface toward the second main surface and is spaced apart from the second main surface, the groove is multiple, and the multiple grooves are spaced apart in the second direction; a first insulating layer, wherein the first insulating layer is arranged on the first main surface, the first insulating layer is provided with a contact hole corresponding to a portion between two adjacent grooves, the depth of the contact hole extends from a side of the first insulating layer away from the first main surface toward the first direction, the contact hole penetrates the first insulating layer and the bottom extends from the first main surface into the semiconductor substrate, the contact hole comprises a first contact hole and a second contact hole, and the second contact hole is two and respectively Located on both sides of the first contact hole in the second direction, the second contact hole is connected to the first contact hole; a titanium silicide layer, the titanium silicide layer is arranged at the bottom of the first contact hole, and the bottom of the second contact hole is protruded relative to the titanium silicide layer on the side facing the second main surface; a second insulating layer, the second insulating layer is two and one-to-one arranged in the two second contact holes; a tungsten film, the tungsten film is arranged in the first contact hole, and the tungsten film is respectively spaced from the two second contact holes and the titanium silicide layer; a titanium nitride film, the titanium nitride film includes a first film portion and a second film portion, the first film portion is arranged between the titanium silicide layer and the tungsten film, the second film portion is arranged on both sides of the first film portion in the second direction, and the second film portion is located between the tungsten film and the second insulating layer; an electrode layer, the electrode layer is arranged on the side of the tungsten film and the titanium nitride film in the first direction away from the first main surface, and the electrode layer is in contact with the tungsten film and the titanium nitride film respectively.

[0015] In some examples of the present invention, the titanium nitride film also includes a third film portion, the third film portion is connected to an end of the second film portion away from the first film portion, the third film portion is arranged on a side of the first insulating layer and the second insulating layer away from the first main surface, the side of the third film portion away from the first main surface and the side of the tungsten film away from the first main surface are flush with each other, and the third film portion and the tungsten film are both in contact with the electrode layer.

[0016] In some examples of the present invention, the first insulating layer includes a first sub-insulating layer and a second sub-insulating layer, the first sub-insulating layer is arranged on the first main surface, the second sub-insulating layer is arranged on a side of the first sub-insulating layer away from the first main surface, and the thickness of the second sub-insulating layer in the first direction is greater than the thickness of the first sub-insulating layer in the first direction.

[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0019] Figure 1 is a flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0020] Figure 2 is a partial flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0021] Figure 3 is a partial flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0022] Figure 4 is a partial flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0023] Figure 5 It is a partial schematic diagram of a semiconductor device in the prior art;

[0024] Figure 6 It is a partial schematic diagram of a semiconductor device in the prior art;

[0025] Figure 7 It is a partial schematic diagram of a semiconductor device in the prior art;

[0026] Figure 8 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0027] Fig. 9 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0028] Fig.10 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0029] Fig.11 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0030] Fig.12 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0031] Fig.13 is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention;

[0032] Fig.14is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention.

[0033] Reference numerals:

[0034] 100. Semiconductor devices;

[0035] 1. semiconductor substrate; 101. first main surface; 102. emitter region;

[0036] 2. Grooves;

[0037] 3. first insulating layer; 301. first sub-insulating layer; 302. second sub-insulating layer;

[0038] 4. Contact hole; 401. first contact hole; 402. second contact hole;

[0039] 5. titanium silicide layer; 6. second insulating layer; 7. tungsten film;

[0040] 8. Titanium nitride film; 801. First film portion; 802. Second film portion; 803. Third film portion;

[0041] 9. Electrode layer; 10. Titanium film; 11. Eaves. DETAILED DESCRIPTION

[0042] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0043] Reference below Figure 1-Figure 4 A method for manufacturing a semiconductor device 100 according to an embodiment of the present invention is described. The method for manufacturing a semiconductor device 100 is suitable for manufacturing a semiconductor device 100. The semiconductor device 100 is, for example, an insulated gate bipolar transistor. In the following description, N and P represent the conductivity type of the semiconductor. In the present invention, the first conductivity type is set to N type and the second conductivity type is set to P type for description. Similarly, the first conductivity type can also be set to P type and the second conductivity type can be set to N type.

[0044] Combination Figure 1-Figure 4 As shown, the method for manufacturing the semiconductor device 100 according to the present invention may mainly include:

[0045] S1, preparing a semiconductor substrate 1, wherein the semiconductor substrate 1 has a first main surface 101 and a second main surface opposite to the first main surface 101, and the first main surface 101 and the second main surface are spaced apart from each other in a first direction;

[0046] S2. A plurality of grooves 2 are provided in the semiconductor substrate 1, wherein the depth of the grooves 2 extends from the first main surface 101 toward the second main surface and is spaced apart from the second main surface, and the plurality of grooves 2 are spaced apart in a second direction, and the first direction and the second direction are perpendicular to each other;

[0047] S3, providing a first insulating layer 3 on the semiconductor substrate 1;

[0048] S4, etching a first contact hole 401 in the first insulating layer 3, wherein the first contact hole 401 is located between two adjacent trenches 2, the depth of the first contact hole 401 extends from the side of the first insulating layer 3 away from the first main surface 101 toward the first direction, the first contact hole 401 penetrates the first insulating layer 3, and the bottom of the first contact hole 401 extends from the first main surface 101 into the semiconductor substrate 1;

[0049] S5, forming a titanium silicide layer 5 at the bottom of the first contact hole 401, wherein two ends of the titanium silicide layer 5 in the second direction protrude from the first contact hole 401 and are located on a side of the first insulating layer 3 facing the first main surface 101;

[0050] S6. Etching a second contact hole 402 in the first insulating layer 3. The second contact hole 402 is located on both sides of the first contact hole 401 in the second direction and is correspondingly connected to the first contact hole 401. The depth of the second contact hole 402 extends from the side of the first insulating layer 3 away from the first main surface 101 toward the first direction. The first contact hole 401 penetrates the first insulating layer 3 and the bottom extends from the first main surface 101 into the semiconductor substrate 1. The bottom of the second contact hole 402 is protruding relative to the side of the titanium silicide layer 5 facing the second main surface.

[0051] S7, disposing a second insulating layer 6 in the second contact hole 402, disposing a titanium nitride film 8 in the first contact hole 401, and disposing a tungsten film 7 in the first contact hole 401, wherein the titanium nitride film 8 is partially located between the tungsten film 7 and the titanium silicide layer 5, and the titanium nitride film 8 is partially located between the tungsten film 7 and the second insulating layer 6 on both sides;

[0052] S9 . Dispose an electrode layer 9 on a side of the first insulating layer 3 away from the first main surface 101 , wherein the electrode layer 9 is in contact with the tungsten film 7 and the titanium nitride film 8 .

[0053] Specifically, when manufacturing the semiconductor device 100, a semiconductor substrate 1 is first prepared. The semiconductor substrate 1 is, for example, a silicon substrate. It should be noted that the material of the semiconductor substrate 1 includes but is not limited to at least one of silicon, silicon carbide, gallium nitride, diamond and aluminum nitride.

[0054] Furthermore, the semiconductor substrate 1 has a first main surface 101 and a second main surface, and the first main surface 101 and the second main surface are spaced apart in a first direction to constitute the front side and the back side of the semiconductor device 100 .

[0055] Furthermore, a groove 2 is provided in the semiconductor substrate 1 in the extension direction from the first main surface 101 to the second main surface, and a gate is provided in the groove 2. The groove 2 can extend the gate of the semiconductor device 100 from the first main surface 101 to the drift layer. The gate is electrically connected to the electrode layer 9 of the semiconductor device, and the gate and the electrode layer 9 can be made to have the same potential. The gate is spaced apart from the inner wall of the groove 2, and a gate insulating film is provided between the gate and the groove 2. The gate is arranged opposite to the emitter region 102, the base layer and the drift layer through the gate insulating film, so that the function of the semiconductor device 100 can be normally operated. In an embodiment of the present invention, a plurality of grooves 2 are spaced apart in the second direction, and the first direction and the second direction are perpendicular to each other.

[0056] Furthermore, a first insulating layer 3 is provided on the semiconductor substrate 1, and the first insulating layer 3 can separate the first main surface 101 of the semiconductor substrate 1 from being electrically connected to other structures. A first contact hole 401 is etched in the first insulating layer 3, and the first contact hole 401 is located between two adjacent trenches 2, so that the structural reliability of the trenches 2 can be ensured.

[0057] Furthermore, the first contact hole 401 extends from the side of the first insulating layer 3 away from the first main surface 101 toward the first direction, so that the first contact hole 401 penetrates the first insulating layer 3, and the bottom of the first contact hole 401 extends from the first main surface 101 into the semiconductor substrate 1, so that the first main surface 101 of the semiconductor substrate 1 can be exposed to facilitate the electrical connection of the semiconductor device 100. In order to ensure the reliability of the electrical connection of the semiconductor substrate 1, a titanium silicide layer 5 is formed at the bottom of the first contact hole 401.

[0058] Combination Figure 5-Figure 7 As shown, when the titanium silicide layer 5 is formed, titanium reacts with silicon in the semiconductor substrate 1 on the first main surface 101, so that the portion of the semiconductor substrate 1 corresponding to the first main surface 101 is reduced, so that the position where the first contact hole 401 corresponds to the contact between the first insulating layer 3 and the first main surface 101 is expanded toward both sides of the second direction, which will form an eaves 11 below the first insulating layer 3 near the first contact hole 401, causing the two ends of the titanium silicide layer 5 in the second direction to protrude from the first contact hole 401 and be located on the side of the first insulating layer 3 facing the first main surface 101.

[0059] If the titanium nitride film 8 and the tungsten film 7 continue to be formed in the first contact hole 401 at this time, the titanium nitride film 8 will be disconnected at the position corresponding to the eaves 11, which will cause the tungsten in the tungsten film 7 to diffuse into the semiconductor substrate 1 and react with the silicon in the semiconductor substrate 1.

[0060] In an embodiment of the present invention, the first insulating layer 3 is further etched on both sides of the first contact hole 401 to form a second contact hole 402, the second contact hole 402 is connected to the first contact hole 401, and the depth of the second contact hole 402 extends from the side of the first insulating layer 3 away from the first main surface 101 toward the first direction, so that the eaves 11 formed in the first contact hole 401 corresponding to the first insulating layer 3 can be removed.

[0061] Furthermore, the bottom of the second contact hole 402 is arranged to protrude relative to the side of the titanium silicide layer 5 facing the second main surface. In this way, the two ends of the titanium silicide layer 5 in the second direction that protrude from the first contact hole 401 and are located on the side of the first insulating layer 3 facing the first main surface 101 can be etched away. In this way, the titanium silicide layer 5 can be separated from the semiconductor substrate 1 in the first contact hole 401, and the titanium silicide layer 5 can be prevented from further expanding toward the semiconductor substrate 1.

[0062] Furthermore, a second insulating layer 6 is provided in the second contact hole 402, and the second insulating layer 6 includes but is not limited to a silicon dioxide insulating film. Since the titanium silicide layer 5 no longer expands toward the first main surface 101, a titanium nitride film 8 and a tungsten film 7 are sequentially formed on the inner side of the silicon dioxide insulating film away from the first insulating layer 3, which can ensure the integrity of the titanium nitride film 8, and further ensure that the tungsten film 7 is completely separated from the semiconductor substrate 1, and can effectively prevent the tungsten in the tungsten film 7 from diffusing into the semiconductor substrate 1 so that the tungsten reacts with silicon.

[0063] Furthermore, an electrode layer 9 is provided on one side of the first insulating layer 3 away from the first main surface 101, and the electrode layer 9 is in contact with the tungsten film 7 and the titanium nitride film 8, so that the tungsten film 7 and the titanium nitride film 8 have the same potential as the electrode layer 9. The electrode layer 9 may be formed by, but is not limited to, sputtering or evaporation.

[0064] Combination Figure 2 As shown, step S6 includes:

[0065] S6-1, removing the first insulating layer 3 on both sides of the first contact hole 401 in the second direction, so that both ends of the titanium silicide layer 5 in the second direction are spaced apart from the first insulating layer 3;

[0066] S6 - 3 , etching the portion between the two ends of the titanium silicide layer 5 in the second direction and the first insulating layer 3 in the semiconductor substrate 1 .

[0067] Specifically, when forming the second contact hole 402, the first insulating layer 3 on both sides of the second direction of the first contact hole 401 is first removed by photolithography technology and dry etching, so that the two ends of the titanium silicide layer 5 in the second direction can be spaced from the first insulating layer 3, which can prevent titanium from continuing to react with silicon in the semiconductor substrate 1 and prevent the eaves 11 between the first insulating layer 3 and the semiconductor substrate 1 from expanding.

[0068] Furthermore, the portions between the two ends of the titanium silicide layer 5 in the second direction and the first insulating layer 3 in the semiconductor substrate 1 are etched, so that a second contact hole 402 can be formed between the titanium silicide layer 5 and the first insulating layer 3 to prevent the titanium silicide layer 5 from continuing to expand toward the first main surface 101.

[0069] Combination Figure 2 As shown, after step S6-1 and before step S6-3, the following further includes:

[0070] S6-2, at least partially etching and removing the two ends of the titanium silicide layer 5 in the second direction.

[0071] Specifically, after removing the first insulating layer 3 on both sides of the first contact hole 401 in the second direction, the two ends of the titanium silicide layer 5 in the second direction are at least partially etched away, so that the two ends of the titanium silicide layer 5 in the second direction are spaced apart from the first insulating layer 3 in the second direction, so as to avoid the setting of the second contact hole 402.

[0072] Combination Figure 3 As shown, step S7 includes:

[0073] S7-1, depositing a second insulating layer 6 in the first contact hole 401 and the second contact hole 402, wherein the second insulating layer 6 fills the first contact hole 401 and the second contact hole 402;

[0074] S7-2, etching and removing the second insulating layer 6 in the first contact hole 401;

[0075] S7-3, depositing a titanium nitride film 8 on the side and bottom of the first contact hole 401, and depositing a titanium nitride film 8 on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101;

[0076] S7-4. Deposit a tungsten film 7 on the inner side of the titanium nitride film 8, wherein the titanium nitride film 8 includes a first film portion 801 and a second film portion 802, the first film portion 801 is arranged between the titanium silicide layer 5 and the tungsten film 7, the second film portion 802 is arranged on both sides of the first film portion 801 in the second direction, and the second film portion 802 is located between the tungsten film 7 and the second insulating layer 6.

[0077] Specifically, the first contact hole 401 and the second contact hole 402 are connected, so that the second insulating layer 6 is deposited in the first contact hole 401 and the second contact hole 402, so that the second insulating layer 6 can fill the first contact hole 401 and the second contact hole 402, so that a good second insulating layer 6 can be formed between the tungsten film 7 and the semiconductor substrate 1. In the embodiment of the present invention, the method of forming the second insulating layer 6 includes but is not limited to chemical vapor deposition.

[0078] Furthermore, after the second insulating layer 6 is formed in the first contact hole 401 and the second contact hole 402 by chemical vapor deposition, the first main surface 101 of the semiconductor substrate 1 is polished by chemical mechanical polishing, and then the second insulating layer 6 in the first contact hole 401 is partially etched away to provide a space for the titanium nitride film 8 and the tungsten film 7. In this way, the second insulating layer 6 formed away from the first insulating layer 3 is flat and does not form a vacancy, so that the titanium nitride film 8 and the tungsten film 7 can be separated from the semiconductor substrate 1, which can effectively solve the problem of tungsten in the tungsten film 7 diffusing into the semiconductor substrate 1.

[0079] Further, a titanium nitride film 8 is deposited on the side and bottom of the first contact hole 401, and then a tungsten film 7 is deposited inside the titanium nitride film 8. The titanium nitride film 8 includes a first film portion 801 and a second film portion 802. The first film portion 801 is disposed between the planned silicon layer and the tungsten film 7, and can separate the tungsten film 7 from the titanium silicide layer 5. The second film portion 802 is disposed on both sides of the first film portion 801 and between the tungsten film 7 and the second insulating layer 6, and can separate the tungsten film 7 from the second insulating layer 6. In an embodiment of the present invention, the formation method of the titanium nitride film 8 includes but is not limited to sputtering or evaporation. The formation method of the tungsten film 7 includes but is not limited to chemical vapor deposition.

[0080] Combination Figure 1 As shown, before step S9, the following steps are also included:

[0081] S8 , removing the titanium nitride film 8 on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101 .

[0082] Specifically, after step S7-3 and step S7-4, part of the titanium nitride will remain on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101. The titanium nitride film 8 on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101 can be removed by dry etching, and finally a connecting conductor portion consisting of the titanium silicide layer 5, the titanium nitride film 8 and the tungsten film 7 can be formed in the first contact hole 401.

[0083] In the embodiment of the present invention, it is also possible to choose not to remove the titanium nitride film 8 on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101 .

[0084] Combination Figure 1 As shown, after step S9, the following steps are also included:

[0085] S10 , grinding the semiconductor substrate 1 from the second main surface to adjust the thickness of the formed semiconductor device 100 .

[0086] Specifically, after the electrode layer 9 is formed on the side of the first insulating layer 3 away from the first main surface 101 by sputtering or evaporation, the size of the semiconductor device 100 in the first direction increases. At this time, the semiconductor substrate 1 can be ground from the second main surface side of the semiconductor substrate 1 to adjust the thickness of the semiconductor substrate 1 to the thickness of the semiconductor device 100, thereby preventing the size of the semiconductor device 100 in the first direction from increasing.

[0087] Combination Figure 4 As shown, step S5 also includes:

[0088] S5-1, depositing a titanium film 10 on the side and bottom of the first contact hole 401 and on the side of the first insulating layer 3 away from the first main surface 101, and forming a titanium silicide layer 5 with the silicide in the semiconductor substrate 1 in a portion of the titanium film 10 corresponding to the bottom of the first contact hole 401;

[0089] S5 - 2 , removing the side portion of the first contact hole 401 and the titanium film 10 on the side of the first insulating layer 3 away from the first main surface 101 .

[0090] Specifically, in the process of forming the titanium silicide layer 5 at the bottom of the first contact hole 401, the titanium film 10 is first deposited in the first contact hole 401. At this time, the titanium film 10 covers the bottom, side of the first contact hole 401 and the side of the first insulating layer 3 away from the first main surface 101. Through the rapid thermal annealing process, the part of the titanium film 10 corresponding to the bottom of the first contact hole 401 can form the titanium silicide layer 5 with the silicide in the semiconductor substrate 1 to improve the tightness.

[0091] Furthermore, after the titanium silicide layer 5 is formed, the titanium film 10 located at the side of the first contact hole 401 and the side of the first insulating layer 3 away from the first main surface 101 is removed by wet etching. If there is unreacted titanium film 10 at the bottom of the first contact hole 401, this part of the titanium film 10 is also removed. Finally, the titanium film 10 in the first contact hole 401 is completely etched.

[0092] Combination Figure 8-Figure 14 As shown, the semiconductor device 100 according to the present invention is suitable for a manufacturing method of the semiconductor device 100, and the semiconductor device 100 may mainly include: a semiconductor substrate 1, a trench 2, a first insulating layer 3, a titanium silicide layer 5, a second insulating layer 6, a tungsten film 7, a titanium nitride film 8 and an electrode layer 9, wherein a first main surface 101 and a second main surface of the semiconductor substrate 1 are spaced apart from each other in a first direction, and an emitter region 102 of a first conductivity type, a base layer of a second conductivity type, a carrier storage layer of a first conductivity type, a drift layer of a first conductivity type, a field stop layer of a first conductivity type and a collector layer 9 of a second conductivity type are sequentially arranged in the semiconductor substrate 1 along the first direction from between the first main surface 101 and the second main surface.

[0093] The impurity concentration of the carrier storage layer is higher than that of the drift layer, and the side of the carrier storage layer away from the emitter region 102 is in contact with the drift layer. The carrier storage layer can improve the effect of promoting the injection of carriers, which is beneficial to reducing the turn-on voltage. In addition, by providing the drift layer, the characteristics of the semiconductor device 100 can be improved and enhanced.

[0094] Further, the groove 2 extends from the first main surface 101 toward the second main surface, passing through the emitter region 102 and the base layer in sequence to reach the carrier storage layer. A plurality of grooves 2 are arranged at intervals in the second direction of the semiconductor substrate 1. When the electrode layer 9 is at a ground potential to apply a positive voltage to the electrode on the second main surface of the semiconductor device 100, and a positive voltage higher than the threshold is applied to the gate, a channel is formed at the position of the base layer and the side of the groove 2, and then the semiconductor device 100 is turned on. In the turned-on state, the current flows from the electrode on the second main surface of the semiconductor device 100 through the collector layer 9, the field stop layer, the drift layer, the carrier accumulation layer, the channel of the base layer, and the emitter region 102 to the electrode layer 9 on the first main surface 101 of the semiconductor device 100. When the voltage applied to the gate is lower than the threshold voltage, no channel is formed between the base layer and the groove 2, which is the disconnected state of the semiconductor device 100.

[0095] Furthermore, a first insulating layer 3 is provided on the side of the first main surface 101 of the semiconductor substrate 1 away from the emitter region 102, and a contact hole 4 is etched on the first insulating layer 3 between two adjacent grooves 2. The contact hole 4 extends from the side of the first insulating layer 3 away from the first main surface 101 toward the first direction, and penetrates the first insulating layer 3, and then extends into the semiconductor substrate 1 from the first main surface 101. In this way, the electrode layer 9 provided on the side of the first insulating layer 3 away from the first main surface 101 can contact the semiconductor substrate 1, so that the emitter region 102 and the electrode layer 9 on the first main surface 101 side of the semiconductor substrate 1 have the same potential.

[0096] Furthermore, in the contact hole 4, there are two second contact holes 402, which are respectively located on both sides of the first contact hole 401 in the second direction, and the second contact hole 402 is connected to the first contact hole 401, so that the two ends of the titanium silicide layer 5 at the bottom of the first contact hole 401 in the second direction can be spaced apart from the semiconductor substrate 1 to prevent the titanium on the titanium silicide layer 5 from reacting with the silicon in the semiconductor substrate 1, thereby preventing the titanium silicide layer 5 from continuing to diffuse onto the first main surface 101 of the semiconductor substrate 1, and preventing the eaves 11 structure from being generated between the first insulating layer 3 and the first main surface 101 of the semiconductor substrate 1.

[0097] Furthermore, a second insulating layer 6 is disposed in each of the two second contact holes 402, and the second insulating layer 6 includes but is not limited to a silicon dioxide insulating film. The two silicon dioxide insulating films are located at two ends of the titanium silicide layer 5 in the second direction, respectively, so as to prevent the two ends of the titanium silicide layer 5 in the second direction from contacting the semiconductor substrate 1.

[0098] Further, a tungsten film 7 is provided in the first contact hole 401, for contacting the electrode layer 9 provided on the side of the first insulating layer 3 away from the first main surface 101. A titanium nitride film 8 is provided between the tungsten film 7 and the titanium silicide layer 5, and a titanium nitride film 8 is provided between the tungsten film 7 and the second insulating layer 6, and the titanium nitride film 8 serves as a barrier metal in the first contact hole 401. The titanium nitride film 8 includes a first film portion 801 and a second film portion 802, wherein the first film portion 801 is provided between the titanium silicide layer 5 and the tungsten film 7, and the second film portion 802 is provided on both sides of the first film portion 801 in the second direction, and is located between the tungsten film 7 and the second insulating layer 6.

[0099] Further, the electrode layer 9 is arranged on the side of the first insulating layer 3 away from the first main surface 101, and is in contact with the titanium nitride film 8 and the tungsten film 7 in the first contact hole 401. Specifically, the semiconductor device 100 also includes a contact region of the second conductivity type, and the contact region emitter region 102 is arranged alternately and periodically in parallel along the extension direction of the groove 2. It should be noted that the extension direction of the groove 2 is the long side direction of the groove 2 on the first main surface 101 when the semiconductor device 100 is viewed from above.

[0100] An electrode layer 9 is arranged on the side of the first insulating layer 3 away from the first main surface 101. The electrode layer 9 is electrically connected to the emitter region 102 and the contact region in the semiconductor substrate 1 through a connecting conductor portion composed of a tungsten film 7, a titanium nitride film 8 and a titanium silicide layer 5, and acts as an emitter electrode or an anode electrode.

[0101] Combination Fig.14 As shown, the titanium nitride film 8 also includes a third film portion 803, the third film portion 803 is connected to one end of the second film portion 802 away from the first film portion 801, and the third film portion 803 is arranged on the side of the first insulating layer 3 and the second insulating layer 6 away from the first main surface 101. In the manufacturing method of the semiconductor device 100, the third film portion 803 can be selectively removed by dry etching. So that the side of the third film portion 803 away from the first main surface 101 and the side of the tungsten film 7 away from the first main surface 101 are flush with each other, which can not only facilitate the deposition of the electrode layer 9, but also ensure that the side of the tungsten film 7 away from the first main surface 101 is exposed, and then ensure that the electrode layer 9 is in contact with the titanium nitride film 8 and the tungsten film 7 at the same time.

[0102] Combination Figure 8-Figure 14As shown, the first insulating layer 3 includes a first sub-insulating layer 301 and a second sub-insulating layer 302. The first sub-insulating layer 301 is arranged on the first main surface 101, and the second sub-insulating layer 302 is arranged on the side of the first sub-insulating layer 301 away from the first main surface 101. The thickness of the second sub-insulating layer 302 in the first direction is greater than the thickness of the first sub-insulating layer 301 in the first direction.

[0103] Specifically, the first sub-insulating layer 301 includes but is not limited to a high temperature oxide film, and the second sub-insulating layer 302 includes but is not limited to a borophosphosilicate glass film. According to some embodiments of the present invention, the first insulating layer 3 may be a double-layer structure consisting of the first sub-insulating layer 301 and the second sub-insulating layer 302. According to other embodiments of the present invention, the first insulating layer 3 may be a single-layer structure. According to still other embodiments of the present invention, the first insulating layer 3 may be a stacked structure of more than multiple layers.

[0104] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "circumferential", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0105] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0106] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The following steps are involved: Preparing a semiconductor substrate (1), wherein the semiconductor substrate (1) has a first main surface (101) and a second main surface opposite to the first main surface (101), and the first main surface (101) and the second main surface are spaced apart from each other in a first direction; A plurality of grooves (2) are arranged in the semiconductor substrate (1), wherein the depth of the grooves (2) extends from the first main surface (101) toward the second main surface and is spaced apart from the second main surface, and the plurality of grooves (2) are spaced apart in a second direction, and the first direction and the second direction are perpendicular to each other; Providing a first insulating layer (3) on the semiconductor substrate (1); A first contact hole (401) is etched in the first insulating layer (3), wherein the first contact hole (401) is located between two adjacent grooves (2), the depth of the first contact hole (401) extends from a side of the first insulating layer (3) away from the first main surface (101) toward a first direction, the first contact hole (401) penetrates the first insulating layer (3) and the bottom of the first contact hole (401) extends from the first main surface (101) into the semiconductor substrate (1); A titanium silicide layer (5) is formed at the bottom of the first contact hole (401), wherein two ends of the titanium silicide layer (5) in the second direction protrude from the first contact hole (401) and are located on the side of the first insulating layer (3) facing the first main surface (101); A second contact hole (402) is etched in the first insulating layer (3), the second contact holes (402) are located on both sides of the first contact hole (401) in the second direction and are correspondingly connected to the first contact hole (401), the depth of the second contact hole (402) extends from the side of the first insulating layer (3) away from the first main surface (101) towards the first direction, the first contact hole (401) penetrates the first insulating layer (3) and the bottom extends from the first main surface (101) into the semiconductor substrate (1), and the bottom of the second contact hole (402) is arranged to protrude relative to the side of the titanium silicide layer (5) facing the second main surface; A second insulating layer (6) is arranged in the second contact hole (402), a titanium nitride film (8) is arranged in the first contact hole (401), and a tungsten film (7) is arranged in the first contact hole (401), wherein the titanium nitride film (8) is partially located between the tungsten film (7) and the titanium silicide layer (5), and the titanium nitride film (8) is partially located between the tungsten film (7) and the second insulating layer (6) on both sides; An electrode layer (9) is provided on a side of the first insulating layer (3) away from the first main surface (101), wherein the electrode layer (9) is in contact with the tungsten film (7) and the titanium nitride film (8).

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The step of etching a second contact hole (402) in the first insulating layer (3) comprises: removing the first insulating layer (3) on both sides of the first contact hole (401) in the second direction, so that both ends of the titanium silicide layer (5) in the second direction are spaced apart from the first insulating layer (3); Etching is performed on a portion between the two ends of the titanium silicide layer (5) in the second direction and the first insulating layer (3) in the semiconductor substrate (1).

3. The method for manufacturing a semiconductor device according to claim 2, wherein: After the step of removing the first insulating layer (3) on both sides of the first contact hole (401) in the second direction so that the two ends of the titanium silicide layer (5) in the second direction are spaced from the first insulating layer (3), before the step of etching the portion between the two ends of the titanium silicide layer (5) in the second direction and the first insulating layer (3) in the semiconductor substrate (1), the method further comprises: The two ends of the titanium silicide layer (5) in the second direction are at least partially etched away.

4. The method for manufacturing a semiconductor device according to claim 1, wherein: The steps of providing a second insulating layer (6) in the second contact hole (402), providing a tungsten film (7) in the first contact hole (401), and providing a titanium nitride film (8) in the first contact hole (401) include: Depositing the second insulating layer (6) in the first contact hole (401) and the second contact hole (402), wherein the second insulating layer (6) fills the first contact hole (401) and the second contact hole (402); Etching and removing the second insulating layer (6) in the first contact hole (401); Depositing the titanium nitride film (8) on the side and bottom of the first contact hole (401), and depositing the titanium nitride film (8) on the side of the first insulating layer (3) and the second insulating layer (6) away from the first main surface (101); A tungsten film (7) is deposited on the inner side of the titanium nitride film (8), wherein the titanium nitride film (8) comprises a first film portion (801) and a second film portion (802), the first film portion (801) being arranged between the titanium silicide layer (5) and the tungsten film (7), the second film portion (802) being arranged on both sides of the first film portion (801) in a second direction, and the second film portion (802) being located between the tungsten film (7) and the second insulating layer (6).

5. The method for manufacturing a semiconductor device according to claim 1, wherein: Before the step of providing an electrode layer (9) on a side of the first insulating layer (3) away from the first main surface (101), the method further comprises: The titanium nitride film (8) on the side of the first insulating layer (3) and the second insulating layer (6) away from the first main surface (101) is removed.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: After the step of providing an electrode layer (9) on a side of the first insulating layer (3) away from the first main surface (101), the method further comprises: The semiconductor substrate (1) is ground starting from the second main surface to adjust the thickness of the formed semiconductor device (100).

7. The method for manufacturing a semiconductor device according to claim 1, wherein: The step of forming a titanium silicide layer (5) at the bottom of the first contact hole (401) further comprises: A titanium film (10) is deposited on the side and bottom of the first contact hole (401) and on the side of the first insulating layer (3) away from the first main surface (101), wherein a portion of the titanium film (10) corresponding to the bottom of the first contact hole (401) forms the titanium silicide layer (5) with the silicide in the semiconductor substrate (1); The side portion of the first contact hole (401) and the titanium film (10) on the side of the first insulating layer (3) away from the first main surface (101) are removed.

8. A semiconductor device, applicable to the method for manufacturing a semiconductor device according to any one of claims 1 to 7, characterized in that: include: A semiconductor substrate (1), the semiconductor substrate (1) having a first main surface (101) and a second main surface opposite to the first main surface (101), wherein the first main surface (101) and the second main surface are spaced apart from each other in a first direction; A groove (2), the groove (2) being arranged in the semiconductor substrate (1), the depth of the groove (2) extending from the first main surface (101) toward the second main surface and being spaced apart from the second main surface, the groove (2) being multiple, and the multiple grooves (2) being spaced apart in the second direction; a first insulating layer (3), the first insulating layer (3) being arranged on the first main surface (101), a contact hole (4) being arranged in a portion of the first insulating layer (3) corresponding to the portion between two adjacent grooves (2), the depth of the contact hole (4) extending from a side of the first insulating layer (3) away from the first main surface (101) towards a first direction, the contact hole (4) penetrating the first insulating layer (3) and the bottom of which extends from the first main surface (101) into the semiconductor substrate (1), the contact hole (4) comprising a first contact hole (401) and a second contact hole (402), the second contact holes (402) being two and respectively located on two sides of the first contact hole (401) in the second direction, the second contact hole (402) being connected to the first contact hole (401); a titanium silicide layer (5), the titanium silicide layer (5) being arranged at the bottom of the first contact hole (401), and the bottom of the second contact hole (402) being arranged to protrude relative to the titanium silicide layer (5) on a side facing the second main surface; A second insulating layer (6), wherein the second insulating layer (6) is two and is disposed in a one-to-one correspondence in the two second contact holes (402); a tungsten film (7), the tungsten film (7) being arranged in the first contact hole (401), the tungsten film (7) being spaced apart from the two second contact holes (402) and the titanium silicide layer (5) respectively; A titanium nitride film (8), the titanium nitride film (8) comprising a first film portion (801) and a second film portion (802), the first film portion (801) being arranged between the titanium silicide layer (5) and the tungsten film (7), the second film portion (802) being arranged on both sides of the first film portion (801) in a second direction, and the second film portion (802) being located between the tungsten film (7) and the second insulating layer (6); An electrode layer (9), the electrode layer (9) being arranged on a side of the tungsten film (7) and the titanium nitride film (8) away from the first main surface (101) in a first direction, and the electrode layer (9) being in contact with the tungsten film (7) and the titanium nitride film (8) respectively.

9. The semiconductor device according to claim 8, characterized in that The titanium nitride film (8) further comprises a third film portion (803), wherein the third film portion (803) is connected to an end of the second film portion (802) away from the first film portion (801), and the third film portion (803) is arranged on a side of the first insulating layer (3) and the second insulating layer (6) away from the first main surface (101), and a side of the third film portion (803) away from the first main surface (101) and a side of the tungsten film (7) away from the first main surface (101) are flush with each other, and both the third film portion (803) and the tungsten film (7) are in contact with the electrode layer (9).

10. The semiconductor device according to claim 8, characterized in that The first insulating layer (3) comprises a first sub-insulating layer (301) and a second sub-insulating layer (302), wherein the first sub-insulating layer (301) is arranged on the first main surface (101), and the second sub-insulating layer (302) is arranged on a side of the first sub-insulating layer (301) away from the first main surface (101), and the thickness of the second sub-insulating layer (302) in the first direction is greater than the thickness of the first sub-insulating layer (301) in the first direction.

Images