Driving circuit for suppressing bridge arm crosstalk of wide bandgap device and control method thereof
The driving circuit, composed of push-pull circuit, level shifting circuit and impedance adjustment circuit, solves the problem of poor crosstalk suppression effect of bridge arm of wide bandgap device, realizes reliability and simplifies control in high frequency application, and reduces component cost.
Patent Information
- Application Number
- CN202410786701.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-18
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2044-06-18
AI Technical Summary
Existing wide-bandgap device bridge arm crosstalk suppression techniques are ineffective in third-generation wide-bandgap power semiconductor devices, affecting device switching speed and complicating control signals, thus failing to meet the reliability requirements of high-frequency applications.
The driving circuit, composed of a push-pull circuit, a level shifting circuit, and an impedance adjustment circuit, forms a driving positive voltage, negative voltage, and low impedance current-carrying loop through a combination of capacitors, inductors, Schottky diodes, and transistors, thereby shunting crosstalk current to suppress positive and negative crosstalk.
It effectively reduces the crosstalk voltage spikes of the bridge arms of wide bandgap devices, improves the reliability of devices in high-frequency applications, simplifies the control logic, reduces component costs, and facilitates integrated design.
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Figure CN118713437B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics technology, specifically to a drive circuit and control method for suppressing crosstalk in bridge arms of wide bandgap devices. Background Technology
[0002] In recent years, third-generation wide-bandgap power semiconductor devices, represented by silicon carbide (SiC) and gallium nitride (GaN) devices, have gradually replaced traditional silicon (Si) semiconductor devices due to their superior switching performance. However, when wide-bandgap devices are used in bridge circuits, their fast switching speed means that the transient state of one device can affect the gate state of devices on the complementary bridge arm, a phenomenon known as crosstalk. When the positive crosstalk voltage at the gate of a wide-bandgap device exceeds its turn-on threshold voltage, it may cause the device to turn on incorrectly, increasing switching losses and even leading to a short circuit on the DC-side bus. If the negative crosstalk voltage at the gate exceeds the device's minimum allowable negative voltage, it may damage the gate and cause the device to fail.
[0003] In existing technologies, crosstalk in power semiconductor devices is mainly suppressed from three aspects: (1) multi-level driving; (2) driving loop impedance optimization; and (3) active gate control. Because wide bandgap devices have faster switching speeds, lower turn-on threshold voltages, and lower gate withstand voltages, existing crosstalk suppression technologies suffer from problems such as poor suppression effect, complex control signals, and impact on device switching speed. Therefore, existing crosstalk suppression driving circuits cannot meet the crosstalk suppression requirements of wide bandgap devices. Summary of the Invention
[0004] The purpose of this invention is to address the shortcomings of the above-mentioned technologies by providing a driving circuit and its control method for suppressing crosstalk in the bridge arms of wide bandgap devices. This solves the problems of poor crosstalk suppression and reduced switching speed of wide bandgap device driving circuits, thereby improving the reliability of wide bandgap devices in high-frequency applications.
[0005] To achieve the above objectives, the driving circuit for suppressing crosstalk in the bridge arm of a wide bandgap device involved in this invention includes a push-pull circuit, a level shifting circuit 1, a level shifting circuit 2, and an impedance adjustment circuit. The push-pull circuit is connected to the source S of the wide bandgap device and an external PWM signal. The level shifting circuit 1 is connected to the push-pull circuit and the source S of the wide bandgap device. The level shifting circuit 2 is connected to the level shifting circuit 1 and the source S of the wide bandgap device. The impedance adjustment circuit is connected to the level shifting circuit 2, the gate G of the wide bandgap device, and the source S. The push-pull circuit and the level shifting circuit 1 form a positive driving voltage generation circuit to provide a positive driving voltage for the wide bandgap device to turn on. The level shifting circuit 1 is a high negative voltage generation circuit to provide a high negative voltage for the wide bandgap device to turn off and for positive crosstalk suppression. The level shifting circuit 2 is a low negative voltage generation circuit to provide a low negative voltage for the wide bandgap device to turn off in a steady state and for negative crosstalk suppression. The impedance adjustment circuit is used for crosstalk suppression of the wide bandgap device.
[0006] Preferably, the push-pull circuit includes a voltage source V1, a transistor S1, and a transistor S2. The positive terminal of the voltage source V1 is connected to the collector of the transistor S1, the emitter of the transistor S1 is connected to the emitter of the transistor S2, the collector of the transistor S2 is connected to the negative terminal of the voltage source V1 and then connected to the source S of a wide bandgap device, and the bases of the transistors S1 and S2 are connected to an external PWM signal. The transistor S1 is an NPN transistor, and the transistor S2 is a PNP transistor.
[0007] Preferably, the level shifting circuit 1 includes a capacitor C1, a Zener diode D1, a resistor R1, an inductor L1, a Schottky diode D2, a resistor R2, and a capacitor C2. One end of the capacitor C1 is connected to the cathode of the Zener diode D1 and then to the emitter of the transistor S2 in the push-pull circuit. The anode of the Zener diode D1 is connected to one end of the resistor R1. The other end of the capacitor C1 is connected to the other end of the resistor R1 and then to one end of the inductor L1. The other end of the inductor L1 is connected to the anode of the Schottky diode D2. The cathode of the Schottky diode D2 is connected to one end of the resistor R2 and then to one end of the capacitor C2. The other end of the resistor R2 and the other end of the capacitor C2 are connected to the source S of the wide bandgap device.
[0008] Preferably, the level shifting circuit 2 includes a capacitor C3, a Schottky diode D3, a MOSFET S3, a resistor R3, and a resistor R4. One end of the capacitor C3 is connected to the cathode of the Schottky diode D3 and then to one end of the inductor L1 in the level shifting circuit 1. The other end of the capacitor C3 is connected to one end of the resistor R3 and then to the gate of the MOSFET S3. The other end of the resistor R3 is connected to the source S of the wide bandgap device. The anode of the Schottky diode D3 is connected to the source of the MOSFET S3. The drain of the MOSFET S3 is connected to one end of the resistor R4. The other end of the resistor R4 is connected to the source S of the wide bandgap device. The MOSFET S3 is an NPN MOSFET.
[0009] Preferably, the impedance adjustment circuit includes a resistor R. G Resistors R5 and R6, capacitor C4, Schottky diodes D4, D5, D6, and D7, transistors S4 and S5, and resistor R... G One end of the resistor R5 is connected to the cathode of the Schottky diode D3 in the level shifting circuit 2. G The other end of the resistor is connected to the anode of the Schottky diode D4 and then to the gate G of the wide bandgap device. The other end of the resistor R5 is connected to the base of the transistor S4. The cathode of the Schottky diode D4 is connected to the emitter of the transistor S4. The collector of the transistor S4 is connected to the anode of the Schottky diode D5. The cathode of the diode D5 is connected to the anode of the Schottky diode D7 and then to one end of the capacitor C4. The other end of the capacitor C4 is connected to the source S of the wide bandgap device. The cathode of the Schottky diode D7 is connected to the collector of the transistor S5. One end of the resistor R6 is connected to the cathode of the Schottky diode D3 in the level shifting circuit 2. The other end of the resistor R6 is connected to the base of the transistor S5. The emitter of the transistor S5 is connected to the anode of the Schottky diode D6. The cathode of the Schottky diode D6 is connected to the gate G of the wide bandgap device. The transistor S4 is a PNP transistor, and the transistor S5 is an NPN transistor.
[0010] Preferably, the value of the driving positive voltage in the driving positive voltage generation circuit is configured by voltage source V1, Zener diode D1, resistor R1 and resistor R2, and the value of the high negative voltage in the high negative voltage generation circuit is configured by Zener diode D1, resistor R1 and resistor R2.
[0011] Preferably, the delay between the low negative voltage and the high negative voltage is configured by resistor R3 and capacitor C3.
[0012] Preferably, when the crosstalk current I G When the direction is from the gate G of a wide bandgap device to the drive circuit, the resistor RG A positive crosstalk voltage is formed at both ends, and the transistor S4 is turned on, resulting in a crosstalk current I. G Provides a release channel to suppress positive crosstalk when the crosstalk current I G When the direction of the flow is from the drive circuit to the gate G of the wide bandgap device, the resistor R G A negative crosstalk voltage is formed at both ends, and the transistor S5 is turned on, resulting in a crosstalk current I. G Provides a release channel to suppress negative crosstalk.
[0013] Preferably, the inductor L1 is an isolation inductor, and the diodes D4, D5, D6, and D7 are reverse-blocking Schottky diodes. During the switching transient process of the wide bandgap device, the inductor L1, diodes D4, D5, D6, and D7 isolate the capacitors C2 and C4, without affecting the switching speed of the wide bandgap device.
[0014] A control method for a drive circuit that suppresses crosstalk in a wide bandgap device bridge arm, when applied to a wide bandgap device half-bridge module including an upper bridge arm and a lower bridge arm, wherein each cycle of the half-bridge module is divided into ten modes, and the components in the upper bridge arm drive circuit and the lower bridge arm drive circuit are distinguished by the suffixes H and L, respectively, including the following modes:
[0015] Mode I [t0-t1]: Upper arm device Q H When in a steady-state conduction state, the upper bridge arm device Q H The gate-source voltage is V drive+ Lower bridge arm device Q L When in a turn-off steady state, the lower bridge arm device Q L Gate-source voltage is -V drive1 ;
[0016] Mode II [t1-t2], at time t1, the upper arm drive circuit receives the turn-off signal, and the upper arm device Q... H Gate-source voltage transformed into high negative voltage -V drive- Upper bridge arm device Q H During the turn-off process, the drain-source voltage rises, causing the lower bridge arm device Q to... L The drain-source voltage drops, causing the lower bridge arm device Q to... L The junction capacitance discharges, generating crosstalk current during the discharge process. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor R. GL A negative crosstalk voltage is formed at both ends of the transistor, which causes the transistor S to... 5L The transistor is on, and the source (S) is closed. 5L The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through this branch, thereby reducing the negative crosstalk voltage.
[0017] Mode III [t2-t3]: The lower bridge arm drive circuit receives the turn-on signal, and the voltage source V 1L For capacitor C 1L Capacitor C 2L and lower bridge arm device Q L The junction capacitance is charged due to the inductance L 1L The impact of the initial operation was due to the inductor L. 1L The current is relatively small, therefore the lower bridge arm device Q L The turn-on transient is not affected by this branch, and the lower bridge arm device Q L During the turn-on process, the drain-source voltage drops, causing the upper bridge arm device Q to... H The drain-source voltage rises, which in turn affects the upper bridge arm device Q. H junction capacitance C GSH and C GDH During charging, crosstalk current is generated. This crosstalk current flows from the gate G to the drive circuit, passing through resistor R. GH A positive crosstalk voltage is formed at both ends, and the positive crosstalk causes the transistor S to... 4H The transistor is on, and the source (S) is closed. 4H The conduction of the branch provides a low-impedance current-carrying loop for the crosstalk current, and most of the crosstalk current will pass through this branch, thereby reducing the positive crosstalk voltage.
[0018] Mode IV [t3-t4]: Upper arm device Q H When in a turn-off steady state, the lower bridge arm device Q L When in a steady-state conduction state, the voltage source V in the lower bridge arm drive circuit 1L Continue with capacitor C 1L and capacitor C 2L When charging, when capacitor C 1L Voltage reaches diode D 1L After the breakdown voltage, diode D 1L Breakdown and conduction, capacitor C 1L The voltage then remains constant, and the capacitor C in the upper bridge arm drive circuit... 3H Slowly charged, MOSFET S 3H The gate-source voltage rises slowly, and at time t4, the MOSFET S... 3H The gate voltage reaches the turn-on threshold voltage V th ;
[0019] Mode V [t4-t5]: After time t4, the MOSFET S in the upper bridge arm drive circuit... 3H On, for the upper bridge arm device Q H Turn off capacitor C that provides negative voltage 1H The power was rapidly consumed, and at time t5, the upper bridge arm device Q... H The voltage across the gate and source terminals changes from a high negative voltage -V drive- Increase to low negative pressure -V drive1Because at this time the MOSFET S 3H Gate-source voltage -V drive1 When the voltage is less than the turn-on threshold voltage, the MOSFET S 3H Turn off, upper bridge arm device Q H Then it enters a stable shutdown state, and the lower bridge arm device Q... L It remains in a stable conducting state, with a gate-source voltage of V. drive+ ;
[0020] Mode VI [t5-t6]: Upper arm device Q H When in turn-off steady state, the gate-source voltage is -V drive1 Lower bridge arm device Q L When in the on-steady state, the gate-source voltage is V. drive+ ;
[0021] Mode VII [t6-t7]: The lower arm drive circuit receives a turn-off signal, and the lower arm device Q... L The gate-source voltage change is a high negative voltage -V drive- Lower bridge arm device Q L During the turn-off process, the lower bridge arm device Q L The drain-source voltage rises, causing the upper bridge arm device Q to... H The drain-source voltage drops, and the upper bridge arm device Q... H The decrease in drain-source voltage leads to a decrease in junction capacitance C. GSH and C GDH During discharge, crosstalk current is generated. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor R. GH A negative crosstalk voltage is formed at both ends of the transistor, which causes the transistor S to... 5H The transistor is on, and the source (S) is closed. 5H The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through this branch, thereby reducing the negative crosstalk voltage.
[0022] Mode VIII [t7-t8]: The upper bridge arm drive circuit receives the turn-on signal, and the voltage source V 1H For capacitor C 1H Capacitor C 2H and upper bridge arm device Q H The junction capacitance is charged due to the inductance L 1H The impact of the initial operation was due to the inductor L. 1H and diode D 2H The current is relatively small, and the upper bridge arm device Q H The turn-on transient is not affected by this branch, and the upper bridge arm device Q H During the commissioning process, the upper bridge arm device Q H The drain-source voltage drops, causing the lower bridge arm device Q to... L As the drain-source voltage rises, the lower bridge arm device Q...L As the drain-source voltage rises, the junction capacitance is charged. This charging process generates crosstalk current, which flows from the gate G to the drive circuit, passing through resistor R. GL A positive crosstalk voltage is formed at both ends, and the positive crosstalk causes the transistor S to... 4L The transistor is on, and the source (S) is closed. 4L The conduction of the circuit provides a low-impedance current-carrying loop for the crosstalk current, thereby reducing the positive crosstalk voltage.
[0023] Mode IX [t8-t9]: Upper arm device Q H When in a steady-state conduction state, the voltage source V in the upper bridge arm drive circuit 1H Continue with capacitor C 1H and capacitor C 2H When charging, when capacitor C 1H Voltage reaches diode D 1H After the breakdown voltage, diode D 1H Breakdown and conduction, capacitor C 1H The voltage then remains constant, and capacitor C in the lower bridge arm drive circuit... 3L Slowly charged, MOSFET S 3L The gate-source voltage rises slowly, and at time t9, the MOSFET S... 3L The gate voltage reaches the turn-on threshold voltage V th ;
[0024] Modal X[t9-t] 10 At time t9, the MOSFET S in the lower bridge arm drive circuit... 3L The capacitor C provides a negative voltage to turn the device on and turn it off. 1L The battery power was rapidly depleted. 10 At time, the lower bridge arm device Q L The voltage across the gate and source terminals is changed from a high negative voltage -V drive- Increase to low negative pressure -V drive1 Because at this time the MOSFET S 3L Voltage across terminals -V drive1 The voltage is less than the gate turn-on threshold voltage, MOSFET S 3L Turn off, lower bridge arm device Q L Then it enters a stable shutdown state;
[0025] After mode X, the half-bridge module repeats the above turn-on and turn-off process.
[0026] Compared with the prior art, the present invention has the following advantages:
[0027] 1. The impedance adjustment circuit can conduct at the moment when the other bridge arm device in the same arm branch is turned on and off, reducing the impedance of the drive circuit, thereby shunting the crosstalk current of the device, so as to reduce the positive and negative crosstalk voltage spikes of the gate and source of the device, thereby suppressing the crosstalk of the bridge arm of the wide bandgap device.
[0028] 2. Before another bridge arm device is about to be turned on, the level shifting circuit 1 of that bridge arm reduces the driving voltage to a high negative voltage, effectively reducing the risk of bridge arm shoot-through; before another bridge arm device is about to be turned off, the negative voltage capacitor of that bridge arm can be reversed to a low negative voltage through the level shifting circuit 2, effectively reducing the risk of device gate negative voltage breakdown.
[0029] 3. During the switching transient process of wide bandgap devices, the capacitors in the drive circuit that affect the switching speed of the device are isolated by inductors and Schottky diodes. Therefore, the crosstalk voltage of the device can be suppressed without affecting the switching transient speed of the wide bandgap device.
[0030] 4. No additional control signals are introduced, the control logic is simple, and the reliability of the drive circuit and control is improved;
[0031] 5. The structure is simple and easy to implement, and the component cost is low. Since only one driving power supply and control signal are used, the size of the driving circuit components is greatly reduced, and it is easy to realize the high-density integrated design of the driving circuit. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of the driving circuit for suppressing crosstalk in the bridge arm of a wide bandgap device according to the present invention;
[0033] Figure 2 This is the drive voltage waveform of the gate and source of the wide bandgap device half-bridge module in this embodiment;
[0034] Figure 3 This is a schematic diagram showing the flow of the Mode I drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0035] Figure 4 This is a schematic diagram showing the flow of the mode ⅠⅠ drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0036] Figure 5 This is a schematic diagram showing the flow of the mode IⅢⅠ driving current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0037] Figure 6 This is a schematic diagram showing the flow of the Mode IV drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0038] Figure 7This is a schematic diagram showing the flow of mode V drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0039] Figure 8 This is a schematic diagram showing the flow of the mode VI drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0040] Figure 9 This is a schematic diagram showing the flow of the mode VIⅠ driving current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0041] Figure 10 This is a schematic diagram showing the flow of the mode VIⅠⅠⅠ drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0042] Figure 11 This is a schematic diagram showing the flow of mode IX driving current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0043] Figure 12 This is a schematic diagram showing the flow direction of the mode X drive current during each cycle of the wide bandgap device half-bridge module in this embodiment;
[0044] Figure 13 This is a comparison of the negative crosstalk suppression effects of the driving circuit in this embodiment and the traditional driving circuit in the same double-pulse experiment;
[0045] Figure 14 This demonstrates the crosstalk suppression effect of the driving circuit in this embodiment under different operating conditions. Detailed Implementation
[0046] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.
[0047] like Figure 1As shown, a driving circuit for suppressing crosstalk in the bridge arm of a wide bandgap device is disclosed. In this embodiment, the wide bandgap device includes a GaN HEMT device and a SiC MOSFET device. The driving circuit includes a push-pull circuit, a level shift circuit 1, a level shift circuit 2, and an impedance adjustment circuit. The push-pull circuit is connected to the source S of the wide bandgap device and an external PWM signal. The level shift circuit 1 is connected to the push-pull circuit and the source S of the wide bandgap device. The level shift circuit 2 is connected to the level shift circuit 1 and the source S of the wide bandgap device. The impedance adjustment circuit is connected to the level shift circuit 2, the gate G of the wide bandgap device, and the source S of the wide bandgap device. The push-pull circuit and the level shift circuit 1 form a positive driving voltage generation circuit to provide a positive driving voltage for the wide bandgap device to turn on. The level shift circuit 1 is a high negative voltage generation circuit to provide a high negative voltage for the wide bandgap device to turn off and for positive crosstalk suppression. The level shift circuit 2 is a low negative voltage generation circuit to provide a low negative voltage for the wide bandgap device to turn off in a steady state and for negative crosstalk suppression. The impedance adjustment circuit is used for crosstalk suppression of the wide bandgap device.
[0048] The push-pull circuit includes a voltage source V1, a transistor S1, and a transistor S2. The positive terminal of the voltage source V1 is connected to the collector of transistor S1, the emitter of transistor S1 is connected to the emitter of transistor S2, the collector of transistor S2 is connected to the negative terminal of the voltage source V1 and then connected to the source S of the wide bandgap device, and the bases of transistor S1 and S2 are connected to the external PWM signal. Transistor S1 is an NPN transistor, and transistor S2 is a PNP transistor.
[0049] The level shifting circuit 1 includes a capacitor C1, a Zener diode D1, a resistor R1, an inductor L1, a Schottky diode D2, a resistor R2, and a capacitor C2. One end of the capacitor C1 is connected to the cathode of the Zener diode D1 and then to the emitter of the transistor S2 in the push-pull circuit. The anode of the Zener diode D1 is connected to one end of the resistor R1. The other end of the capacitor C1 is connected to the other end of the resistor R1 and then to one end of the inductor L1. The other end of the inductor L1 is connected to the anode of the Schottky diode D2. The cathode of the Schottky diode D2 is connected to one end of the resistor R2 and then to one end of the capacitor C2. The other end of the resistor R2 and the other end of the capacitor C2 are connected to the source S of the wide bandgap device.
[0050] The level shifting circuit 2 includes a capacitor C3, a Schottky diode D3, a MOSFET S3, a resistor R3, and a resistor R4. One end of the capacitor C3 is connected to the cathode of the Schottky diode D3 and then to one end of the inductor L1 in the level shifting circuit 1. The other end of the capacitor C3 is connected to one end of the resistor R3 and then to the gate of the MOSFET S3. The other end of the resistor R3 is connected to the source S of the wide bandgap device. The anode of the Schottky diode D3 is connected to the source of the MOSFET S3. The drain of the MOSFET S3 is connected to one end of the resistor R4 and the other end of the resistor R4 is connected to the source S of the wide bandgap device. The MOSFET S3 is an NPN MOSFET.
[0051] Impedance adjustment circuit includes resistor R G Resistor R5, resistor R6, capacitor C4, Schottky diode D4, Schottky diode D5, Schottky diode D6, Schottky diode D7, transistors S4 and S5, resistor R G One end of resistor R5 is connected to the cathode of Schottky diode D3 in level shifting circuit 2. Resistor R G The other end is connected to the anode of Schottky diode D4 and then to the gate G of the wide bandgap device. The other end of resistor R5 is connected to the base of transistor S4. The cathode of Schottky diode D4 is connected to the emitter of transistor S4. The collector of transistor S4 is connected to the anode of Schottky diode D5. The cathode of diode D5 is connected to the anode of Schottky diode D7 and then to one end of capacitor C4. The other end of capacitor C4 is connected to the source S of the wide bandgap device. The cathode of Schottky diode D7 is connected to the collector of transistor S5. One end of resistor R6 is connected to the cathode of Schottky diode D3 in level shift circuit 2. The other end of resistor R6 is connected to the base of transistor S5. The emitter of transistor S5 is connected to the anode of Schottky diode D6. The cathode of Schottky diode D6 is connected to the gate G of the wide bandgap device. Transistor S4 is a PNP transistor, and transistor S5 is an NPN transistor.
[0052] In this embodiment, the value of the driving positive voltage in the driving positive voltage generation circuit is configured using voltage source V1, Zener diode D1, resistor R1, and resistor R2. The value of the high negative voltage in the high negative voltage generation circuit is configured using Zener diode D1, resistor R1, and resistor R2. The delay between the low and high negative voltages is configured using resistor R3 and capacitor C3.
[0053] In addition, when the crosstalk current I G When the direction is from the gate G of a wide bandgap device to the drive circuit, the resistance R G A positive crosstalk voltage is formed across the two ends, transistor S4 is turned on, and the crosstalk current I is generated. G Provides a release channel to suppress positive crosstalk when the crosstalk current I G When the direction of the flow is from the drive circuit to the gate G of the wide bandgap device, the resistance R G A negative crosstalk voltage is formed at both ends, transistor S5 is turned on, and the crosstalk current I is generated. G Provides a release channel to suppress negative crosstalk.
[0054] Finally, in this embodiment, inductor L1 is an isolation inductor, and diodes D4, D5, D6, and D7 are reverse-blocking Schottky diodes. During the switching transient process of the wide bandgap device, inductor L1, diodes D4, D5, D6, and D7 isolate capacitors C2 and C4, without affecting the switching speed of the wide bandgap device.
[0055] Combination Figures 2 to 12 As shown, when the driving circuit for suppressing crosstalk in the bridge arms of wide bandgap devices in this embodiment is applied to a half-bridge module of a wide bandgap device that includes an upper bridge arm and a lower bridge arm, each cycle of the half-bridge module is divided into ten modes. The components in the upper bridge arm driving circuit and the lower bridge arm driving circuit are distinguished by the suffixes H and L, respectively, including the following modes:
[0056] Mode I [t0-t1]: Upper arm device Q H When in a steady-state conduction state, the upper bridge arm device Q H The gate-source voltage is V drive+ Lower bridge arm device Q L When in a turn-off steady state, the lower bridge arm device Q L Gate-source voltage is -V drive1 ;
[0057] Mode II [t1-t2], at time t1, the upper arm drive circuit receives the turn-off signal, and the upper arm device Q... H Gate-source voltage transformed into high negative voltage -V drive- Upper bridge arm device Q H During the turn-off process, the drain-source voltage rises, causing the lower bridge arm device Q to... L The drain-source voltage drops, causing the lower bridge arm device Q to... L The junction capacitance discharges, generating crosstalk current during the discharge process. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor R. GL A negative crosstalk voltage is formed at both ends of the transistor, which causes the transistor S to... 5L The transistor is on, and the source (S) is closed. 5L The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through this branch, thereby reducing the negative crosstalk voltage.
[0058] Mode III [t2-t3]: The lower bridge arm drive circuit receives the turn-on signal, and the voltage source V 1L For capacitor C 1L Capacitor C 2L and lower bridge arm device Q L The junction capacitance is charged due to the inductance L 1L The impact of the initial operation was due to the inductor L. 1L The current is relatively small, therefore the lower bridge arm device Q L The turn-on transient is not affected by this branch, and the lower bridge arm device Q L During the turn-on process, the drain-source voltage drops, causing the upper bridge arm device Q to... H The drain-source voltage rises, which in turn affects the upper bridge arm device Q. H junction capacitance C GSH and C GDHDuring charging, crosstalk current is generated. This crosstalk current flows from the gate G to the drive circuit, passing through resistor R. GH A positive crosstalk voltage is formed at both ends, and the positive crosstalk causes the transistor S to... 4H The transistor is on, and the source (S) is closed. 4H The conduction of the branch provides a low-impedance current-carrying loop for the crosstalk current, and most of the crosstalk current will pass through this branch, thereby reducing the positive crosstalk voltage.
[0059] Mode IV [t3-t4]: Upper arm device Q H When in a turn-off steady state, the lower bridge arm device Q L When in a steady-state conduction state, the voltage source V in the lower bridge arm drive circuit 1L Continue with capacitor C 1L and capacitor C 2L When charging, when capacitor C 1L Voltage reaches diode D 1L After the breakdown voltage, diode D 1L Breakdown and conduction, capacitor C 1L The voltage then remains constant, and the capacitor C in the upper bridge arm drive circuit... 3H Slowly charged, MOSFET S 3H The gate-source voltage rises slowly, and at time t4, the MOSFET S... 3H The gate voltage reaches the turn-on threshold voltage V th ;
[0060] Mode V [t4-t5]: After time t4, the MOSFET S in the upper bridge arm drive circuit... 3H On, for the upper bridge arm device Q H Turn off capacitor C that provides negative voltage 1H The power was rapidly consumed, and at time t5, the upper bridge arm device Q... H The voltage across the gate and source terminals changes from a high negative voltage -V drive- Increase to low negative pressure -V drive1 Because at this time the MOSFET S 3H Gate-source voltage -V drive1 When the voltage is less than the turn-on threshold voltage, the MOSFET S 3H Turn off, upper bridge arm device Q H Then it enters a stable shutdown state, and the lower bridge arm device Q... L It remains in a stable conducting state, with a gate-source voltage of V. drive+ ;
[0061] Mode VI [t5-t6]: Upper arm device Q H When in turn-off steady state, the gate-source voltage is -V drive1 Lower bridge arm device Q L When in the on-steady state, the gate-source voltage is V. drive+ ;
[0062] Mode VII [t6-t7]: The lower arm drive circuit receives a turn-off signal, and the lower arm device Q... L The gate-source voltage change is a high negative voltage -V drive- Lower bridge arm device Q L During the turn-off process, the lower bridge arm device Q L The drain-source voltage rises, causing the upper bridge arm device Q to... H The drain-source voltage drops, and the upper bridge arm device Q... H The decrease in drain-source voltage leads to a decrease in junction capacitance C. GSH and C GDH During discharge, crosstalk current is generated. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor R. GH A negative crosstalk voltage is formed at both ends of the transistor, which causes the transistor S to... 5H The transistor is on, and the source (S) is closed. 5H The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through this branch, thereby reducing the negative crosstalk voltage.
[0063] Mode VIII [t7-t8]: The upper bridge arm drive circuit receives the turn-on signal, and the voltage source V 1H For capacitor C 1H Capacitor C 2H and upper bridge arm device Q H The junction capacitance is charged due to the inductance L 1H The impact of the initial operation was due to the inductor L. 1H and diode D 2H The current is relatively small, and the upper bridge arm device Q H The turn-on transient is not affected by this branch, and the upper bridge arm device Q H During the commissioning process, the upper bridge arm device Q H The drain-source voltage drops, causing the lower bridge arm device Q to... L As the drain-source voltage rises, the lower bridge arm device Q... L As the drain-source voltage rises, the junction capacitance is charged. This charging process generates crosstalk current, which flows from the gate G to the drive circuit, passing through resistor R. GL A positive crosstalk voltage is formed at both ends, and the positive crosstalk causes the transistor S to... 4L The transistor is on, and the source (S) is closed. 4L The conduction of the circuit provides a low-impedance current-carrying loop for the crosstalk current, thereby reducing the positive crosstalk voltage.
[0064] Mode IX [t8-t9]: Upper arm device Q H When in a steady-state conduction state, the voltage source V in the upper bridge arm drive circuit 1H Continue with capacitor C 1H and capacitor C 2H When charging, when capacitor C 1HVoltage reaches diode D 1H After the breakdown voltage, diode D 1H Breakdown and conduction, capacitor C 1H The voltage then remains constant, and capacitor C in the lower bridge arm drive circuit... 3L Slowly charged, MOSFET S 3L The gate-source voltage rises slowly, and at time t9, the MOSFET S... 3L The gate voltage reaches the turn-on threshold voltage V th ;
[0065] Modal X[t9-t] 10 At time t9, the MOSFET S in the lower bridge arm drive circuit... 3L The capacitor C provides a negative voltage to turn the device on and turn it off. 1L The battery power was rapidly depleted. 10 At time, the lower bridge arm device Q L The voltage across the gate and source terminals is changed from a high negative voltage -V drive- Increase to low negative pressure -V drive1 Because at this time the MOSFET S 3L Voltage across terminals -V drive1 The voltage is less than the gate turn-on threshold voltage, MOSFET S 3L Turn off, lower bridge arm device Q L Then it enters a stable shutdown state;
[0066] After mode X, the half-bridge module repeats the above turn-on and turn-off process.
[0067] To test the effect of the driving circuit for suppressing crosstalk of wide bandgap devices in this invention on the crosstalk of GaN HEMT devices, the crosstalk voltage spike of the upper arm in the GaN HEMT half-bridge module was measured in a double-pulse experiment (the lower arm device is an active switching device). Figure 13 This paper compares the negative crosstalk suppression performance of the driving circuit in this embodiment and the conventional driving circuit in the same double-pulse experiment. The left side shows the negative crosstalk waveform tested using the conventional driving circuit. As can be seen from the figure, at the instant the lower bridge arm turns off, the peak negative crosstalk voltage of the upper bridge arm is -8.96V, which is close to the device's negative safe voltage boundary, posing a risk of gate breakdown. The right side shows the upper bridge arm gate voltage waveform tested using the driving circuit in this embodiment at the instant the lower bridge arm turns off in the same double-pulse experiment. As can be seen from the figure, at the instant the lower bridge arm turns off, the negative crosstalk voltage of the upper bridge arm is -3.8V, far less than the negative breakdown voltage, and within the safe range. The negative crosstalk suppression effect is 5.16V, verifying the effectiveness of the driving circuit of this invention.
[0068] Figure 14To assess the crosstalk suppression effect under different operating conditions, compared with the traditional GaN HEMT driving circuit, the driving circuit proposed in this embodiment achieves a maximum suppression effect of 2.8V for positive crosstalk of GaN HEMT devices; for negative crosstalk, the maximum suppression effect reaches 5.16V, which fully demonstrates that the driving circuit proposed in this embodiment has a significant suppression effect on the bridge arm crosstalk of GaN HEMT devices.
[0069] This invention relates to a driving circuit and control method for suppressing bridge arm crosstalk in wide bandgap devices. It exhibits good suppression of bridge arm crosstalk in wide bandgap devices, such as GaN HEMT devices, without affecting the device's switching transient performance. The driving circuit has a simple and easy-to-implement structure, uses low-cost components, and requires only one driving power supply and control signal, greatly reducing the size of the driving circuit components. This allows for high-density integrated design of the driving circuit, and the driving circuit does not introduce additional control signals, resulting in simple control logic and high reliability.
Claims
1. A control method for a drive circuit that suppresses crosstalk in the bridge arm of a wide bandgap device, characterized in that: The driving circuit also includes a push-pull circuit, a level shifting circuit 1, a level shifting circuit 2, and an impedance adjustment circuit. The push-pull circuit is connected to the source S of the wide bandgap device and the external PWM signal. The level shifting circuit 1 is connected to the push-pull circuit and the source S of the wide bandgap device. The level shifting circuit 2 is connected to the level shifting circuit 1 and the source S of the wide bandgap device. The impedance adjustment circuit is connected to the level shifting circuit 2, the gate G of the wide bandgap device, and the source S of the wide bandgap device. The push-pull circuit and the level shifting circuit 1 form a positive driving voltage generation circuit to provide a positive driving voltage for the wide bandgap device to turn on. The level shifting circuit 1 is a high negative voltage generation circuit to provide a high negative voltage for the wide bandgap device to turn off and for positive crosstalk suppression. The level shifting circuit 2 is a low negative voltage generation circuit to provide a low negative voltage for the wide bandgap device to turn off in a steady state and for negative crosstalk suppression. The impedance adjustment circuit is used for crosstalk suppression of the wide bandgap device. The push-pull circuit includes a voltage source. V 1. Transistor S 1 and transistor S 2. The voltage source V 1. Positive electrode and the transistor S The collector of the transistor is connected. S 1. Emitter and the transistor S The emitters of the transistor are connected. S 2 collectors and the voltage source V The negative terminal of the transistor is connected to the source S of the wide bandgap device. S 1. Base and the transistor S The base of the transistor is connected to an external PWM signal. S 1 is an NPN transistor, the transistor S 2 is a PNP type transistor; The level shifting circuit 1 includes a capacitor. C 1. Zener diode D 1. Resistance R 1. Inductor L 1. Schottky diode D 2. Resistance R 2 and capacitor C 2. The capacitor C One end of 1 is connected to the Zener diode. D After the cathode is connected, it is connected to the transistor in the push-pull circuit. S The two emitters are connected, and the Zener diode is... D The anode of 1 and the resistor R One end of 1 is connected, the capacitor C The other end of 1 is connected to the resistor. R The other end of 1 is connected to the inductor. L 1 One end is connected, the inductor L The other end of 1 is connected to a Schottky diode. D The anode of 2 is connected, and the Schottky diode is connected. D 2. Cathode and the resistor R After one end of 2 is connected to the capacitor C 2 One end is connected, the resistor R The other end of 2 and the capacitor C The other end of 2 is connected to the source S of the wide bandgap device; The level shifting circuit 2 includes a capacitor. C 3. Schottky diode D 3. MOSFET S 3. Resistance R 3 and resistance R 4. The capacitor C 3 One end is connected to the Schottky diode D After the cathode is connected, it is connected to the inductor in the level shifting circuit 1. L 1 One end is connected, the capacitor C 3. The other end is connected to the resistor. R 3. After one end is connected to the MOS transistor S The three gates are connected, and the resistors are... R 3. The other end is connected to the source S of the wide bandgap device, the Schottky diode. D 3. Anode and the MOS transistor S The MOS transistor has three sources connected. S 3. Drain and the resistor R 4 One end is connected, the resistor R 4. The other end is connected to the source S of the wide bandgap device, the MOS transistor. S 3 is an NPN type MOSFET; The impedance adjustment circuit includes a resistor. R G ,resistance R 5. Resistance R 6. Capacitors C 4. Schottky diode D 4. Schottky diode D 5. Schottky diode D 6. Schottky diode D 7. Transistor S 4 and transistor S 5. The resistor R G With the resistor R 5 is connected at one end to the Schottky diode in the level shifting circuit 2. D The cathode of 3 is connected, and the resistor R G The other end is connected to the Schottky diode. D 4. After the anode is connected, it is connected to the gate G of the wide bandgap device. The resistor... R 5. The other end is connected to the transistor. S The four bases are connected together, and the Schottky diode is... D 4. Cathode and the transistor S The transistor has 4 emitters connected. S 4 collectors and the Schottky diode D 5. Anodes are connected, the diode D 5. Cathode and the Schottky diode D 7. After the anode is connected, it is connected to the capacitor. C 4 One end is connected, the capacitor C 4. The other end is connected to the source S of the wide bandgap device, the Schottky diode. D 7. Cathode and the transistor S The five collectors are connected, and the resistor R One end of 6 is connected to the Schottky diode in the level shifting circuit 2. D 3. The cathode is connected, and the resistor is... R 6. The other end is connected to the transistor. S The base of the transistor is connected to the base. S 5. Emitter and the Schottky diode D The six anodes are connected, and the Schottky diode is... D The cathode of the transistor is connected to the gate G of the wide bandgap device. S 4 is a PNP type transistor, the transistor S 5 is an NPN transistor; When the control method is applied to a wide-bandgap device half-bridge module containing an upper arm and a lower arm, each cycle of the half-bridge module is divided into ten modes. The components in the upper arm drive circuit and the lower arm drive circuit are distinguished by the suffixes H and L, respectively, including the following modes: Mode I [ t 0- t 1]: Upper bridge arm device Q H In the on-steady state, the upper bridge arm device Q H Gate-source voltage is V drive+ Lower bridge arm device Q L In the off steady state, the lower bridge arm device Q L Gate-source voltage is - V drive1 ; Mode II t 1- t 2], t At time 1, the upper arm drive circuit receives the turn-off signal, and the upper arm device... Q H Gate-source voltage transformed into high negative voltage - V drive- Upper bridge arm components Q H During the turn-off process, the drain-source voltage rises, causing the lower bridge arm device to... Q L The drain-source voltage drops, causing the lower bridge arm device to... Q L The junction capacitance discharges, generating crosstalk current during the discharge process. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor... R GL A negative crosstalk voltage is generated at both ends of the transistor, and the negative crosstalk voltage causes the transistor to... S 5L On, transistor S 5L The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through the low-impedance current-carrying loop, thereby reducing the negative crosstalk voltage. Modal III t 2- t 3]: The lower bridge arm drive circuit receives the turn-on signal, voltage source V 1L For capacitors C 1L ,capacitance C 2L and lower bridge arm devices Q L The junction capacitance is charged due to the inductance. L 1L The impact of inductance during the initial stage of operation L 1L The current is relatively small, therefore the lower bridge arm device Q L The turn-on transient is not affected by the inductance. L 1L The influence of the branch circuit, lower bridge arm components Q L During the turn-on process, the drain-source voltage drops, causing the upper bridge arm devices to... Q H The drain-source voltage rises, which in turn affects the upper bridge arm devices. Q H junction capacitance C GSH and C GDH During charging, crosstalk current is generated. This crosstalk current flows from the gate G to the drive circuit, and then through the resistor... R GH A positive crosstalk voltage is formed at both ends of the transistor, and the positive crosstalk causes the transistor to... S 4H On, transistor S 4H The conduction of the circuit provides a low-impedance current-carrying loop for the crosstalk current. Most of the crosstalk current will pass through the low-impedance current-carrying loop, thereby reducing the positive crosstalk voltage. Mode IV t 3- t 4]: Upper bridge arm components Q H In the off steady state, the lower bridge arm device Q L In the on-steady state, the voltage source in the lower bridge arm drive circuit V 1L Continue with the capacitor C 1L and capacitor C 2L Charging, when the capacitor C 1L Voltage reaches diode D 1L After breakdown voltage, the diode D 1L Breakdown and conduction, capacitor C 1L The voltage then remains constant, and the capacitor in the upper bridge arm drive circuit... C 3H Slowly charged, MOSFET S 3H The gate-source voltage rises slowly, at t At time 4, the MOSFET S 3H Gate voltage reaches turn-on threshold voltage V th ; Modal V [ t 4- t 5]: t After time 4, the MOSFET in the upper bridge arm drive circuit S 3H On, for the upper bridge arm device Q H Turn off the capacitor that provides negative voltage C 1H The battery was consumed rapidly. t At time 5, the upper bridge arm device Q H The voltage across the gate and source terminals changes from a high negative voltage to a low negative voltage. V drive- Increase to low negative pressure - V drive1 Because at this time the MOSFET S 3H Gate-source voltage - V drive1 Less than the turn-on threshold voltage, MOSFET S 3H Shutdown, upper bridge arm device Q H Then it enters a stable shutdown state, and the lower bridge arm device... Q L It is still in a stable conducting state, and the gate-source voltage is V drive+ ; Modal VI t 5- t 6]: Upper bridge arm components Q H When in the turn-off steady state, the gate-source voltage is - V drive1 Lower bridge arm device Q L When in a steady-state conduction state, the gate-source voltage is V drive+ ; Modal VII t 6- t 7]: The lower bridge arm drive circuit receives a shutdown signal, and the lower bridge arm device... Q L The gate-source voltage change is a high negative voltage. V drive- Lower bridge arm device Q L During the shutdown process, the lower bridge arm device Q L The drain-source voltage rises, causing the upper bridge arm device to... Q H Drain-source voltage drops, upper bridge arm devices Q H The decrease in drain-source voltage leads to a decrease in junction capacitance. C GSH and C GDH During discharge, crosstalk current is generated. This crosstalk current flows from the drive circuit to the gate G, and then through the resistor... R GH A negative crosstalk voltage is generated at both ends of the transistor, and the negative crosstalk voltage causes the transistor to... S 5H On, transistor S 5H The conduction of the circuit provides a low-impedance current-carrying loop for negative crosstalk, and most of the crosstalk current will pass through the low-impedance current-carrying loop, thereby reducing the negative crosstalk voltage. Modal VIII t 7- t 8]: The upper bridge arm drive circuit receives the turn-on signal, voltage source V 1H For capacitors C 1H ,capacitance C 2H and upper bridge arm devices Q H The junction capacitance is charged due to the inductance. L 1H The impact of inductance during the initial stage of operation L 1H and diodes D 2H The current is relatively small, and the upper bridge arm device Q H The transient response is not affected by inductance. L 1H The influence of the branch circuit, upper bridge arm components Q H During the commissioning process, the upper bridge arm components Q H The drain-source voltage drops, causing the lower bridge arm device to... Q L The drain-source voltage rises, and the lower bridge arm device... Q L The rising drain-source voltage charges the junction capacitance, generating a crosstalk current during this charging process. This crosstalk current flows from the gate G to the drive circuit, and then through the resistor... R GL A positive crosstalk voltage is formed at both ends of the transistor, and the positive crosstalk causes the transistor to... S 4L On, transistor S 4L The conduction of the circuit provides a low-impedance current-carrying loop for the crosstalk current, thereby reducing the positive crosstalk voltage; Modal IX t 8- t 9]: Upper bridge arm components Q H In the on-steady state, the voltage source in the upper bridge arm drive circuit V 1H Continue with the capacitor C 1H and capacitor C 2H Charging, when the capacitor C 1H Voltage reaches diode D 1H After breakdown voltage, the diode D 1H Breakdown and conduction, capacitor C 1H The voltage then remains constant, and the capacitor in the lower bridge arm drive circuit... C 3L Slowly charged, MOSFET S 3L The gate-source voltage rises slowly, at t At time 9, the MOSFET S 3L The gate voltage reaches the turn-on threshold voltage V th ; Modal X [ t 9- t 10 ]:exist t At time 9, the MOSFET in the lower bridge arm drive circuit S 3L A capacitor that provides negative voltage to turn on the device and turns it off. C 1L The battery is being consumed rapidly. t 10 At that moment, the lower bridge arm device Q L The voltage across the gate and source terminals changes from a high negative voltage to a low negative voltage. V drive- Increase to low negative pressure - V drive1 Because at this time the MOSFET S 3L Voltage at both ends - V drive1 Less than the gate turn-on threshold voltage, MOSFET S 3L Shutdown, lower bridge arm device Q L Then it enters a stable shutdown state; After mode X, the half-bridge module repeats the above turn-on and turn-off process.
2. The control method for the drive circuit that suppresses crosstalk in the bridge arm of a wide bandgap device as described in claim 1, characterized in that: The value of the driving positive pressure in the driving positive pressure generation circuit is obtained through a voltage source. V 1. Zener diode D 1. Resistance R 1 and resistance R 2. Configuration is performed, and the value of the high negative voltage in the high negative voltage generation circuit is regulated by a Zener diode. D 1. Resistance R 1 and resistance R 2. Configure it.
3. The control method for the drive circuit that suppresses crosstalk in the bridge arm of a wide bandgap device as described in claim 1, characterized in that: The delay between low and high negative voltages is achieved through a resistor. R 3 and capacitor C 3. Configure it.
4. The control method for the drive circuit that suppresses crosstalk in the bridge arm of a wide bandgap device as described in claim 1, characterized in that: When crosstalk current I G When the direction is from the gate G of a wide bandgap device to the driving circuit, the resistor... R G A positive crosstalk voltage is formed at both ends of the transistor. S 4 is on, for crosstalk current. I G Provides a release path to suppress positive crosstalk when crosstalk current... I G When the direction is from the drive circuit to the gate G of the wide bandgap device, the resistor R G A negative crosstalk voltage is formed at both ends of the transistor. S 5 is on, providing crosstalk current. I G Provides a release channel to suppress negative crosstalk.
5. The control method for the drive circuit that suppresses crosstalk in the bridge arm of a wide bandgap device as described in claim 1, characterized in that: The inductor L 1 is an isolation inductor, diode D 4. Diode D 5. Diode D 6. Diode D 7 is a reverse-biased Schottky diode. During the switching transient of a wide-bandgap device, the inductance... L 1. Diode D 4. Diode D 5. Diode D 6 and diodes D 7. Capacitor C 2 and capacitor C 4. Isolation does not affect the switching speed of wide bandgap devices.
Citation Information
Patent Citations
Silicon carbide MOSFET bridge arm crosstalk suppression circuit
CN111614234A