Chip monitoring method, device, equipment and storage medium

Abstract

The present invention relates to the technical field of chip monitoring, and provides a chip monitoring method, device, equipment and storage medium, including collecting the electrical signal amplitude, frequency characteristics and waveform distortion of the chip; generating a digital quantization signal according to the electrical signal amplitude, calculating the frequency characteristics based on the digital quantization signal, and obtaining frequency domain characteristic data; generating a state characteristic vector and a fault indication vector based on the frequency domain characteristic data; processing the state characteristic vector to obtain a working state index, combining and analyzing the working state index and the fault indication vector to obtain the current working state and potential fault points, based on which, abnormal detection is performed on the waveform distortion, waveform abnormality characteristic data and fault root cause analysis results are obtained and analyzed, and fault warning information and maintenance suggestions are obtained. The chip is monitored by the above scheme to improve the problems of insufficient analysis accuracy and limited fault diagnosis capabilities in complex signal processing and fault diagnosis.

Description

Technical Field

[0001] The present application relates to the technical field of chip monitoring, and in particular to a chip monitoring method, device, equipment and storage medium. Background Art

[0002] With the rapid development of semiconductor technology, integrated circuit chips are becoming increasingly complex, and the stability and reliability of their performance have become extremely critical to the normal operation of modern electronic devices. Therefore, in order to ensure the efficient operation of the chip, timely and accurate monitoring of the chip's working status and potential failure points has become an important demand in the industry.

[0003] Among the relevant technical means, the use of analog-to-digital conversion to monitor electrical signal characteristics, frequency analysis and waveform diagnosis technology can monitor the electrical signals of the chip in real time. Through these methods, engineers can promptly detect abnormal signals during chip operation and predict failures, thereby intervening in possible problems at an early stage, reducing system failure rates and ensuring the continued reliability of electronic products.

[0004] Regarding the above technical solution, although the instantaneous electrical signal parameters of the chip can be monitored through analog-to-digital conversion and frequency analysis to achieve basic fault prediction, there are problems of insufficient analysis accuracy and limited fault diagnosis capabilities when processing complex signals and diagnosing faults. Summary of the invention

[0005] In order to improve the problems of insufficient analysis accuracy and limited fault diagnosis capability in complex signal processing and fault diagnosis, the present application provides a chip monitoring method, device, equipment and storage medium.

[0006] The present invention provides a chip monitoring method, comprising: collecting the electrical signal amplitude, frequency characteristics and waveform distortion of the chip; inputting the electrical signal amplitude into an analog-to-digital converter to generate a digital quantization signal, performing fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data; inputting the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector; performing multi-dimensional data analysis processing on the state characteristic vector to obtain a working state index of the chip, combining and analyzing the working state index and the fault indication vector to obtain a current working state and potential fault points; performing abnormal detection on the waveform distortion using the current working state and the potential fault points to obtain waveform abnormality characteristic data and fault root cause analysis results; analyzing the waveform abnormality characteristic data and the fault root cause analysis results using a nonlinear regression model to obtain a regression coefficient and a prediction curve, mapping the regression coefficient and the prediction curve to obtain fault warning information and maintenance suggestions.

[0007] As a preferred solution, the step of acquiring the amplitude, frequency characteristics and waveform distortion of the electrical signal of the chip includes: using an electrical signal acquisition device to capture the electrical signal emitted by the chip in real time; wherein the electrical signal acquisition device includes a voltage sensor, a current sensor and a waveform capture sensor; inputting the electrical signal into a signal conditioner for signal adjustment to obtain the electrical signal amplitude corresponding to the electrical signal; inputting the electrical signal into a preset time-frequency analysis algorithm, using clock synchronization technology to determine the time characteristics of the electrical signal, and based on the time characteristics, extracting the characteristics of the electrical signal through a fast Fourier transform algorithm to obtain the frequency characteristic data of the electrical signal; inputting the electrical signal into a waveform distortion analysis device, and using fuzzy logic and nonlinear dynamic system modeling technology in the waveform distortion analysis device to perform high-sensitivity detection and quantify the waveform distortion of the electrical signal to obtain the waveform distortion of the electrical signal.

[0008] As a preferred solution, the step of inputting the amplitude of the electrical signal into an analog-to-digital converter to generate a digital quantization signal, performing fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal, and obtaining frequency domain characteristic data includes: inputting the amplitude of the electrical signal into an analog-to-digital converter, quantizing the amplitude of the electrical signal using the analog-to-digital converter, performing analog-to-digital conversion on the amplitude of the electrical signal through high-precision sampling in the analog-to-digital converter to obtain a digital quantized electrical signal; filtering and enhancing the digital quantized electrical signal through a digital signal processor to obtain a purified signal, and performing data enhancement processing on the frequency characteristics based on the purified signal to obtain an enhanced signal; preprocessing the enhanced signal according to a frequency domain analysis algorithm to obtain frequency components and amplitude information, filtering the frequency components and amplitude information through an optimization algorithm to obtain optimized frequency data; performing fast Fourier transform calculation on the frequency characteristics based on the optimized frequency data, and performing spectral analysis on the frequency characteristics and the optimized frequency data in the fast Fourier transform calculation to obtain frequency domain characteristic data.

[0009] As a preferred scheme, the step of inputting the frequency domain characteristic data into a preset electrical signal analysis model to generate a state feature vector and a fault indication vector includes: extracting features from the frequency domain characteristic data through a preset feature extraction algorithm to obtain important frequency domain features; vectorizing the important frequency domain features to obtain a multidimensional vector, and calculating cosine similarity based on the multidimensional vector and a preset frequency domain feature vector; using the cosine similarity as a new feature to generate a similarity vector, and calculating the deviation between the two similarity vectors to generate a signal deviation vector; combining the similarity vector and the signal deviation vector to obtain a comprehensive feature vector, and analyzing the comprehensive feature vector through a comprehensive feature processor to obtain state parameters; inputting the state parameters into a preset electrical signal analysis model, and using regression analysis in the preset electrical signal analysis model to model and analyze the state parameters to obtain a state feature vector and a fault indication vector.

[0010] As a preferred solution, the step of performing multi-dimensional data analysis on the state feature vector to obtain the working state index of the chip, and performing combined analysis on the working state index and the fault indication vector to obtain the current working state and potential fault points includes: inputting the state feature vector into a preset multi-dimensional data analysis model, performing dimensionality reduction processing on the state feature vector in the multi-dimensional data analysis model using principal component analysis to obtain the principal component vector after dimensionality reduction, and classifying the principal component vector after dimensionality reduction through linear discriminant analysis to obtain classification results and a principal component distribution diagram; performing cluster analysis on the classification results according to the principal component distribution diagram to obtain cluster centers and cluster densities, and The clustering density is segmented by the class center to obtain a classification cluster; the classification cluster is correlated with the fault indication vector to obtain a preliminary working state index; based on a preset state evaluation algorithm, the preliminary working state index is evaluated by using the classification result and the principal component vector after dimensionality reduction to obtain a precise working state index; the fault indication vector is probability inferred according to preset state evaluation parameters to obtain a fault type probability; the precise working state index is comprehensively matched with the fault type probability by using a preset matching model to obtain a comprehensive state description parameter and a fault location parameter, the comprehensive state description parameter is used as the current working state, and the fault location parameter is used as the potential fault point.

[0011] As a preferred scheme, the step of using the current working state and the potential fault point to perform abnormality detection on the waveform distortion to obtain waveform abnormality feature data and fault root cause analysis results includes: performing feature mapping on the current working state and the potential fault point through a preset convolutional neural network to obtain a high-dimensional feature map and a feature mapping result; based on the high-dimensional feature map and the feature mapping result combined with a preset abnormality detection algorithm, performing abnormality detection on the waveform distortion to generate a waveform abnormality identification map and a root source distribution map; using the waveform abnormality identification map as the waveform abnormality feature data, and using the root source distribution map as the fault root cause analysis result.

[0012] As a preferred scheme, the steps of analyzing the waveform abnormality feature data and the fault root cause analysis results using a nonlinear regression model to obtain regression coefficients and prediction curves, mapping the regression coefficients and the prediction curves to obtain fault warning information and maintenance suggestions include: formatting the waveform abnormality feature data and the fault root cause analysis results through a preset data perspective model to obtain structured data and feature parameters; performing regression analysis on the structured data using a multivariate nonlinear regression model to obtain regression coefficients and prediction curves; performing abnormal trend analysis on the feature parameters using the prediction curves to obtain a fault probability distribution; performing early warning judgment on the feature parameters based on the fault probability distribution to obtain an early warning signal, performing correlation analysis on the early warning signal with the waveform abnormality feature data to generate maintenance suggestions; inputting the early warning signal and the maintenance suggestion into a preset data mapping table, mapping the early warning signal and the maintenance suggestion in the data mapping table through preset logical rules to obtain fault warning information and maintenance suggestions.

[0013] The present application also provides a chip monitoring device, including: an acquisition module, used to acquire the electrical signal amplitude, frequency characteristics and waveform distortion of the chip; a calculation module, used to input the electrical signal amplitude into an analog-to-digital converter to generate a digital quantization signal, and perform fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data; a generation module, used to input the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector; an analysis module, used to perform multi-dimensional data analysis and processing on the state characteristic vector to obtain a working state index of the chip, and perform combined analysis on the working state index and the fault indication vector to obtain a current working state and potential fault points; a detection module, used to perform abnormal detection on the waveform distortion using the current working state and the potential fault points to obtain waveform abnormality characteristic data and fault root cause analysis results; a mapping module, used to analyze the waveform abnormality characteristic data and the fault root cause analysis results using a nonlinear regression model to obtain a regression coefficient and a prediction curve, and map the regression coefficient and the prediction curve to obtain fault warning information and maintenance suggestions.

[0014] The present application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the computer program, any of the chip monitoring methods described above is implemented.

[0015] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the processor is enabled to execute the chip monitoring method as described in any one of the above.

[0016] Compared with the prior art, the present application has the following beneficial effects: high analysis accuracy and strong fault diagnosis capability. By comprehensively adopting a series of advanced technical means such as signal processing, machine learning, statistical analysis, pattern recognition, and nonlinear mathematical modeling, the present monitoring method can comprehensively and deeply monitor and diagnose the chip. Starting from the precise collection of electrical signal amplitude, frequency characteristics, and waveform distortion, to the application of models to analyze frequency domain characteristic data, extraction of state characteristic vectors and fault indication vectors, and then to multi-dimensional processing of the analysis results to generate a working status index, and finally combining waveform abnormality characteristic data for fault root cause analysis and nonlinear regression model prediction, it significantly improves the judgment accuracy of chip faults, the foresight of predicting faults, and the response speed of similar faults, and improves the problems of insufficient analysis accuracy and limited fault diagnosis capability in complex signal processing and fault diagnosis. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0018] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which the present invention can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical contents disclosed by the present invention.

[0019] Figure 1 It is a flowchart of a chip monitoring method, device, equipment and storage medium provided by an embodiment of the present invention;

[0020] Figure 2 It is a schematic block diagram of the structure of a chip monitoring method, device, equipment and storage medium provided by an embodiment of the present invention;

[0021] Figure 3 It is a schematic block diagram of the structure of an electronic device provided by an embodiment of the present invention.

[0022] Description of reference numerals:

[0023] 10. Chip monitoring device; 11. Acquisition module; 12. Calculation module; 13. Generation module; 14. Analysis module; 15. Detection module; 16. Mapping module; 20. Electronic device; 21. Memory; 22. Processor. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0026] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0027] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0028] The technical solution of the present invention is further described below with reference to the accompanying drawings and through specific implementation methods.

[0029] Embodiment 1:

[0030] like Figure 1 As shown, a chip monitoring method provided in an embodiment of the present application includes steps S100 to S600.

[0031] Step S100: collecting the chip's electrical signal amplitude, frequency characteristics, and waveform distortion.

[0032] In this step, sensors and acquisition equipment are used to collect the electrical signal amplitude of the chip under different working conditions in real time to obtain the electrical signal amplitude, frequency characteristics and waveform distortion. Specifically, the input and output ports of the chip are monitored in real time, and the electrical signal parameters such as voltage and current of each port are recorded. The changes in the electrical signal in the time series and the deviation of the waveform are collected for subsequent analysis.

[0033] For example, an oscilloscope is used to capture the chip's operating voltage in real time, record the instantaneous current waveform of each pin during functional testing, and the stability of electrical signals under extreme working conditions.

[0034] Step S200: input the amplitude of the electrical signal into an analog-to-digital converter to generate a digital quantization signal, and perform fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data.

[0035] In this step, the collected electrical signal amplitude is converted into a digital signal through an analog-to-digital converter; specifically, the analog-to-digital converter samples, quantizes and encodes the electrical signal to obtain a digital quantized signal that is easy to digitally process, and a digital signal processor (DSP) is used to perform a fast Fourier transform (FFT) on these digital signals to extract the frequency components and their intensities of the signals to obtain frequency domain characteristic data.

[0036] For example, when the sampling frequency is more than twice the highest frequency of the signal, the electrical signal is sampled without distortion according to the Nyquist sampling theorem, and the FFT algorithm is run in the DSP to convert the time domain signal into the frequency domain signal in real time to obtain a frequency distribution diagram.

[0037] Step S300: input the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector.

[0038] In this step, the frequency domain characteristic data is imported into a trained electrical signal analysis model; specifically, the model is trained using a machine learning method so that it can output a state feature vector that can represent the working state of the chip and a fault indication vector that represents the fault based on the input frequency domain data.

[0039] For example, a support vector machine (SVM) algorithm is used to build a classification model, and the model is trained to distinguish the differences in frequency domain characteristics under normal conditions and under abnormal conditions, and output state feature vectors and fault indication vectors representing their respective states.

[0040] Step S400: Perform multi-dimensional data analysis on the state feature vector to obtain the working state index of the chip, and perform combined analysis on the working state index and the fault indication vector to obtain the current working state and potential fault points.

[0041] In this step, statistical analysis and data mining techniques are used to process the state feature vector; specifically, methods such as principal component analysis (PCA) are used to reduce the dimension, highlight the most important features to form a working state index, and compare the state index with the fault indication vector to identify the current working state and possible fault points.

[0042] For example, if the value of the state feature vector on a certain principal component exceeds a preset threshold, it is marked as abnormal, and its correlation with the fault indication vector is further analyzed to identify the problem and predict the fault location and cause.

[0043] Step S500: perform abnormal detection on the waveform distortion using the current working state and potential fault points to obtain waveform abnormality feature data and fault root cause analysis results.

[0044] In this step, waveform analysis technology is used to compare normal waveforms and abnormal waveforms; specifically, according to the working status index and fault indication vector, pattern recognition and signal processing methods are used to analyze the collected waveform distortion, separate the abnormal features, and find out the root cause of the abnormality.

[0045] For example, waveform matching technology is applied to extract characteristic parameters of distorted signals, compare them with typical fault waveforms in the knowledge base, and use expert systems to judge the matching results to determine the abnormal type of waveform and the source of the fault.

[0046] Step S600: Analyze the waveform abnormality feature data and the fault root cause analysis results using a nonlinear regression model to obtain a regression coefficient and a prediction curve, map the regression coefficient and the prediction curve, and obtain fault warning information and maintenance suggestions.

[0047] In this step, nonlinear mathematical models are applied to process complex data relationships. Specifically, through nonlinear regression analysis, a model between waveform abnormality feature data and fault development trends is established to obtain regression coefficients and prediction curves that characterize fault evolution. These mathematical results are then converted into intuitive fault warning charts and maintenance recommendations for specific operations.

[0048] For example, by relying on neural networks or deep learning algorithms, historical waveform data can be learned to obtain a model that characterizes the evolution law of faults. The prediction curve of fault development in the short term can be calculated through the model, and based on this, the maintenance engineers can be provided with possible fault types, time windows for occurrence, and recommended maintenance measures.

[0049] In this embodiment, first, the electrical signal amplitude, frequency characteristics and waveform distortion of the chip are collected, and the electrical signal amplitude is input into the analog-to-digital converter to generate a digital quantization signal; the digital quantization signal is then used to perform a fast Fourier transform calculation to obtain frequency domain characteristic data; then, these frequency domain characteristic data are input into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector, and then multi-dimensional data analysis and processing are performed to obtain the working state index of the chip; the working state index and the fault indication vector are combined and analyzed to determine the current working state and potential fault points; using this information, the waveform distortion is detected for abnormalities to obtain waveform abnormality characteristic data and fault root cause analysis results; finally, the waveform abnormality characteristic data and fault root cause analysis results are analyzed by a nonlinear regression model to obtain regression coefficients and prediction curves, and they are mapped to generate fault warning information and maintenance suggestions.

[0050] Through the combination of models and multi-dimensional data analysis, the monitoring method can not only accurately identify the current working status, but also predict and diagnose potential fault points, further improving the fault detection and diagnosis capabilities; on this basis, the fault warning information and maintenance suggestions provided by anomaly detection and nonlinear regression analysis will provide important decision-making support for chip maintenance and fault repair, and improve the problems of insufficient analysis accuracy and limited fault diagnosis capabilities in complex signal processing and fault diagnosis.

[0051] Embodiment 2:

[0052] In step S100, an electrical signal acquisition device is used to capture the electrical signal emitted by the chip in real time; wherein the electrical signal acquisition device includes a voltage sensor, a current sensor and a waveform capture sensor.

[0053] By installing the above sensors at the circuit nodes and connecting their outputs to the data acquisition system; specifically, using a voltage sensor to measure the node voltage, using a current sensor to monitor the current flowing through the chip, and using a waveform capture sensor to record the time domain waveform of the signal, the complete electrical signal can be obtained in real time.

[0054] For example, high-precision voltage sensors and current sensors are connected to the power supply and signal output ports of the chip respectively, and high-speed sampling waveform capture sensors are used to capture rapidly changing signal edges to achieve comprehensive monitoring of the chip's electrical signal characteristics.

[0055] The electrical signal is input into the signal conditioner for signal adjustment to obtain the electrical signal amplitude corresponding to the electrical signal.

[0056] The noise and interference in the electrical signal are removed by using a signal conditioner; specifically, a filter is used to remove high-frequency noise, and a signal amplifier is used to enhance the strength of the electrical signal to ensure that the amplitude of the electrical signal is accurate.

[0057] For example, a low-pass filter circuit and an automatic gain control amplifier are designed to adjust the amplification factor according to the real-time signal conditions, purify and amplify the weak sensor output signal for subsequent analog-to-digital conversion.

[0058] The electrical signal is input into a preset time-frequency analysis algorithm, and the time characteristics of the electrical signal are determined using clock synchronization technology. Based on the time characteristics, the features of the electrical signal are extracted using a fast Fourier transform algorithm to obtain the frequency characteristic data of the electrical signal.

[0059] The adjusted electrical signal is analyzed by using a time-frequency analysis algorithm; specifically, a clock synchronization technology is introduced to ensure the consistency of timing during the acquisition process, and then the FFT algorithm is used to separate the frequency characteristics from the time domain signal.

[0060] For example, during the signal acquisition process, an accurate clock source is used to ensure the synchronization of each acquisition point, and then the FFT algorithm is applied to transform these synchronized time series data, analyze their spectral characteristics in real time, and identify different frequency components and their amplitudes.

[0061] The electrical signal is input into a waveform distortion analysis device, in which fuzzy logic and nonlinear dynamic system modeling technology are used to perform high-sensitivity detection and quantify the waveform distortion of the electrical signal to obtain the waveform distortion of the electrical signal.

[0062] The quality of the signal waveform is detected by a specially designed distortion analysis device; specifically, fuzzy logic is introduced to determine the slight distortion of the waveform, and nonlinear dynamic system modeling is applied for detailed analysis to quantify the waveform distortion.

[0063] For example, a dedicated circuit containing a fuzzy logic controller is developed that can evaluate the waveform of the input signal in real time and simulate the performance of the signal in a nonlinear circuit through dynamic modeling software to quantitatively evaluate the degree of distortion of the signal waveform.

[0064] In step S200, the amplitude of the electrical signal is input into an analog-to-digital converter, the amplitude of the electrical signal is quantized by the analog-to-digital converter, and the amplitude of the electrical signal is converted from analog to digital by high-precision sampling in the analog-to-digital converter to obtain a digital quantized electrical signal.

[0065] The amplitude of the electrical signal is sampled and quantized by a high-precision analog-to-digital converter; specifically, an analog-to-digital converter with high resolution and sampling rate is selected to ensure that the amplitude of the electrical signal is accurately converted into digital form, providing accurate input data for subsequent digital signal processing.

[0066] For example, an analog-to-digital converter with a sampling rate of 16 bits (such as 16 bits) is used to sample the signal at a sampling frequency of 1 microsecond (MHz (such as 1 MHz)), ensuring that any rapid changes in the electrical signal can be captured and converted into a high-precision digital signal.

[0067] The digital quantized electrical signal is filtered and enhanced by a digital signal processor to obtain a purified signal, and the frequency characteristics are data enhanced based on the purified signal to obtain an enhanced signal.

[0068] The quantized signal is processed by a powerful digital signal processor; specifically, the digital filtering function of the DSP is used to remove the remaining noise, and the signal enhancement algorithm is used to enhance the specific frequency bands in the signal, thereby highlighting the key frequency information.

[0069] For example, a customized digital bandpass filter is designed to remove high-frequency and low-frequency noise introduced during the analog-to-digital conversion process, and then an adaptive enhancement algorithm is used to enhance the characteristics of the relevant electrical signal frequency to facilitate subsequent frequency analysis.

[0070] The enhanced signal is preprocessed according to the frequency domain analysis algorithm to obtain frequency components and amplitude information, and the frequency components and amplitude information are filtered through the optimization algorithm to obtain optimized frequency data.

[0071] The signal is initially extracted using advanced frequency domain analysis algorithms; specifically, the enhanced signal is decomposed to obtain amplitude information of different frequency components, and the result is further filtered and cleaned using an optimization algorithm to remove non-critical features, thereby simplifying the computational burden of subsequent processing steps.

[0072] For example, a digital waveform analyzer is used to decompose the processed signal in the frequency domain, identify key frequency points and measure their energy intensity, and then a particle swarm optimization (PSO) algorithm is used to select the most representative frequency components for further frequency data optimization.

[0073] The frequency characteristics are calculated by fast Fourier transform based on the optimized frequency data, and the frequency characteristics and the optimized frequency data are subjected to spectrum analysis in the fast Fourier transform calculation to obtain frequency domain characteristic data.

[0074] The optimized frequency data is spectrally analyzed using an efficient FFT algorithm; specifically, the FFT computing core is used to quickly transform the filtered and optimized signal to obtain the signal's spectrum, and the signal's energy distribution is analyzed in detail from the spectrum to obtain frequency domain characteristic data that reflects the overall characteristics of the signal.

[0075] For example, the FFT algorithm is used to transform the optimized data of the electrical signal, extract the relative energy and phase information of different frequency points, and form a detailed spectrum diagram to represent the overall picture of the signal in the frequency domain. By identifying and comparing the peaks in the spectrum diagram, the main frequency domain characteristic data of the signal can be obtained.

[0076] In step S300, feature extraction is performed on the frequency domain characteristic data using a preset feature extraction algorithm to obtain important frequency domain features.

[0077] The most informative features are selected from the frequency domain characteristic data through a specially designed feature extraction algorithm; specifically, the spectrum lines closely related to chip performance are screened and converted into quantifiable feature vectors to provide basic data for model analysis.

[0078] For example, wavelet transform is used to perform multi-scale analysis on the signal's spectrum, accurately extract the frequency characteristics of short-term changes and long-term trends, and construct a set of vectors describing the signal characteristics based on these characteristics.

[0079] The important frequency domain features are vectorized to obtain a multi-dimensional vector, and the cosine similarity is calculated based on the multi-dimensional vector and the preset frequency domain feature vector.

[0080] The frequency domain features are converted into a computer-processable format through vectorization technology; specifically, the feature points are expressed as vectors in a high-dimensional space, and the cosine similarity formula is used to evaluate their consistency with the frequency domain feature vector under known normal operating conditions.

[0081] For example, a key point in the frequency domain characteristic data is selected and represented as a point in n-dimensional space. Then, cosine similarity is calculated with the standard frequency domain feature vector in the database. The similarity is evaluated by the cosine value of the angle to determine the current chip status.

[0082] The cosine similarity is used as a new feature to generate a similarity vector, and the deviation between the two similarity vectors is calculated to generate a signal deviation vector.

[0083] A new information hierarchy is constructed through similarity analysis; specifically, the similarity between the current signal and the reference signal is calculated, and the gap is determined, and the deviation is extracted and quantified as a deviation vector, providing basic data for capturing fault trends.

[0084] For example, based on the cosine similarity of the current state and the historical similarity data, a signal deviation vector is established to record the difference between normal operating conditions and current conditions, which helps to provide early prompts for possible drift or anomalies.

[0085] The similarity vector and the signal deviation vector are combined and processed to obtain a comprehensive feature vector, which is analyzed by a comprehensive feature processor to obtain a state parameter.

[0086] A variety of feature data are fused through an integrated processing strategy; specifically, feature vectors composed of features of different dimensions are fused, and intelligent analysis is performed through a comprehensive feature processor to extract the parameters that best reflect the actual state of the chip.

[0087] For example, by combining cosine similarity features and deviation feature vectors, an adaptive neural network is used to analyze these composite data and output a comprehensive feature parameter that represents the operating status and stability of the chip, facilitating subsequent state identification and fault prediction.

[0088] The state parameters are input into a preset electric signal analysis model, and the state parameters are modeled and analyzed using regression analysis in the preset electric signal analysis model to obtain a state characteristic vector and a fault indication vector.

[0089] The state parameters are analyzed by the optimized model; specifically, the state parameters obtained from the comprehensive feature processor are modeled by using a statistical regression method to analyze the relationship between the state parameters and normal functions and potential failure modes, and a set of vectors for subsequent processing is obtained.

[0090] For example, linear or nonlinear regression analysis tools, such as support vector machine (SVM) or multi-layer perceptron (MLP), are applied to analyze state parameters and identify state feature vectors and potential fault indication features, providing multi-dimensional data support for accurate diagnosis.

[0091] In step S400, the state feature vector is input into a preset multidimensional data analysis model, and principal component analysis is used in the multidimensional data analysis model to perform dimensionality reduction processing on the state feature vector to obtain the reduced principal component vector, and the reduced principal component vector is classified by linear discriminant analysis to obtain the classification result and the principal component distribution diagram.

[0092] Reduce data complexity through multi-dimensional analysis; specifically, apply principal component analysis technology to reduce irrelevant or redundant information and highlight the most critical state variables, and then use linear discriminant analysis methods to stratify and classify data according to these principal components to form a visual distribution map.

[0093] For example, PCA dimensionality reduction technology is used to find the most important variables that represent the operating status of the chip, and these variables are used to construct a principal component space diagram. Then, data points are classified in this space based on linear discriminant analysis to separate normal working status and different abnormal status.

[0094] The classification results are clustered according to the principal component distribution diagram to obtain the cluster center and cluster density. The cluster density is segmented based on the cluster center to obtain the classification cluster.

[0095] The classification results are further refined through cluster analysis methods; specifically, the clustering status of data points in the principal component space is calculated, the cluster center and distribution density are determined, these parameters are used to divide the data clusters, and significantly separated clusters are identified.

[0096] For example, the PCA classification results are analyzed using the k-means clustering algorithm to identify data clusters under different operating states, and the different working modes of the chip are obtained based on the changes in the cluster center and the distance within the cluster, and this information is used as the basis for subsequent fault detection.

[0097] The classification clusters are associated with the fault indication vectors to obtain the preliminary working status index.

[0098] By combining the clustering results with the expected failure modes; specifically, comparing the similarity between the classification clusters and the historical failure indication vectors, an index describing the current state of the chip and its corresponding potential failure trend is generated.

[0099] For example, a preliminary working status index is generated based on clusters, and then the index is calibrated using historical failure data to determine whether the operating chip is close to any known failure state.

[0100] Based on the preset status assessment algorithm, the classification results and the principal component vector after dimensionality reduction are used to conduct status assessment on the preliminary working status index to obtain the accurate working status index.

[0101] The state index is optimized through a refined state assessment algorithm; specifically, the state assessment algorithm is used in combination with dimensionality reduction information and classified data, the working state is accurately characterized through a complex mathematical model, and the state index is refreshed to reflect the current equipment state.

[0102] For example, a neural network model based on deep learning is applied, the principal components and classification data are input, and a comprehensive index that accurately describes the complete working status of the chip is obtained through multi-layer processing of the network.

[0103] The fault indication vector is probability inferred according to the preset state evaluation parameters to obtain the fault type probability.

[0104] The probability of failure is quantified through a mathematical model of probabilistic reasoning; specifically, Bayesian statistics or other probabilistic models are used to analyze and quantify the probability of occurrence of different types of failures based on known factors and generate a probability distribution.

[0105] For example, a Bayesian network is constructed, and a fault indication vector is input. Based on the relationship between the historical fault records of the chip and the operating parameters, the probability of occurrence of different fault types is predicted, providing a method for accurately predicting the types of faults that may occur in the future. The network can infer and evaluate the probability of unknown conditions by learning known fault cases and corresponding electrical signal characteristics. When implementing fault diagnosis, the posterior probability can be calculated based on the fault indication vector under the guidance of prior knowledge to determine which type of fault is most likely at the moment. The system can then automatically adjust the detection strategy and maintenance plan accordingly, such as first troubleshooting and repairing the fault type with the highest probability. This not only effectively improves the accuracy of fault detection, but also significantly improves maintenance efficiency and the overall reliability of the system.

[0106] The preset matching model is used to comprehensively match the precise working state index with the fault type probability to obtain comprehensive state description parameters and fault location parameters. The comprehensive state description parameters are used as the current working state, and the fault location parameters are used as potential fault points.

[0107] By adopting a data matching algorithm, the status information and fault information from multiple sources are integrated and analyzed; specifically, data fusion is performed based on the working status index and fault probability distribution, the current working status is comprehensively assessed, and the location or component where problems are most likely to occur is predicted.

[0108] For example, by combining comprehensive state description parameters with statistical analysis results of fault occurrence, fuzzy logic or pattern recognition technology can be used to determine which components or modules in the system have a higher risk of failure, thereby providing more targeted early warning information and maintenance guidelines. This method can quickly locate the cause of the problem and accurately formulate a maintenance strategy for the fault, greatly improving the efficiency and success rate of fault handling.

[0109] In step S500, feature mapping is performed on the current working state and potential fault points through a preset convolutional neural network to obtain a high-dimensional feature map and feature mapping results.

[0110] By designing a specific network structure and tuning weights and bias parameters during training; specifically, using building blocks such as convolutional layers, pooling layers, and fully connected layers, the network can capture the essential feature associations and map them to a high-dimensional space, thereby enhancing the feature discrimination capability.

[0111] For example, in order to analyze electrical signals with complex waveform characteristics, a deep convolutional network is designed. By learning the characteristic patterns of known normal and abnormal waveforms, the network can perform high-precision feature mapping on new waveform data and distinguish between normal and abnormal waveform patterns.

[0112] Based on the high-dimensional feature graph and feature mapping results combined with the preset anomaly detection algorithm, anomaly detection is performed on the waveform distortion to generate a waveform anomaly identification map and root cause distribution map.

[0113] By integrating advanced anomaly detection techniques and deep learning algorithms; specifically, using algorithms such as autoencoders or isolation forests to identify signal behaviors that deviate from normal patterns and graphically display the location of the anomaly and its possible root cause.

[0114] For example, the trained autoencoder is used to perform reconstruction error analysis on the feature mapping results, identify areas with high reconstruction errors as waveform anomalies, and generate an anomaly identification map. Deep generative models, such as generative adversarial networks (GANs), are further applied to estimate the root cause distribution of abnormal features on the entire device, which is represented as a root cause distribution map.

[0115] The waveform anomaly identification diagram is used as waveform anomaly feature data, and the root cause distribution diagram is used as the fault root cause analysis result.

[0116] By converting the image results into data format; specifically, extracting the key information in the waveform anomaly identification diagram as abnormal feature data through image processing algorithms, and converting the data points on the root distribution diagram into quantitative parameter forms that can be understood by the machine for further analysis.

[0117] For example, edge detection and image segmentation techniques are used to extract characteristic parameters corresponding to abnormal waveforms from waveform anomaly identification maps, and these parameters are associated with the position and density of data points in the root distribution map to form a structured fault data set, providing input for subsequent analysis.

[0118] In step S600, the waveform abnormality feature data and the fault root cause analysis results are formatted using a preset data perspective model to obtain structured data and feature parameters.

[0119] By adopting data pivoting and cleaning techniques; specifically, the raw data are activated and standardized through data format conversion and cleaning processes to ensure that they can be effectively input into the regression model, maximizing the utilization of data features and the accuracy of modeling.

[0120] For example, pivot tables are used to accumulate and summarize the data extracted from waveform anomaly feature maps and root cause distribution maps, and then data cleaning techniques are applied to remove redundant and erroneous information, resulting in a clear, consistent, and analyzable data set.

[0121] The multivariate nonlinear regression model is used to perform regression analysis on structured data to obtain regression coefficients and prediction curves.

[0122] By constructing a mathematical model containing nonlinear elements; specifically, the functional form that can describe the complex relationship between the input data and the response variable is determined, and the parameter values ​​of the regression model are estimated using mathematical optimization techniques.

[0123] For example, if there is a nonlinear relationship between the waveform characteristics and the environmental conditions and equipment operating parameters, a multivariate nonlinear regression model containing polynomial terms and interaction terms can be constructed, and the gradient descent method can be used to solve the model regression coefficients.

[0124] The prediction curve is used to analyze the abnormal trend of characteristic parameters and obtain the fault probability distribution.

[0125] By performing inference analysis based on the model prediction results; specifically, using the output of the regression model to estimate future fault development trends, and converting the prediction results into probability distributions, represented as a probability value for each possible fault condition.

[0126] For example, prediction curves are used to assess the risk of failure within a certain period of time in the future. By calculating the probability distribution of failures at different time points, accurate data support can be provided for maintenance decisions and resource allocation.

[0127] Based on the fault probability distribution, the characteristic parameters are judged and early warning is obtained, and the early warning signal is correlated with the waveform abnormality characteristic data to generate maintenance suggestions.

[0128] Risk assessment is performed by applying statistical decision rules; specifically, a warning threshold is set. When the failure probability exceeds the threshold, the warning mechanism is triggered, and specific maintenance or intervention suggestions are given in combination with abnormal feature data.

[0129] For example, a dynamic early warning system is set up, which continuously adjusts the early warning threshold according to the real-time updated failure probability distribution, and identifies the signal exceeding the threshold as a potential maintenance demand. On this basis, the system analyzes the waveform abnormality feature data, determines the components that may fail, and provides specific maintenance suggestions, such as replacing wearing parts or adjusting operating parameters.

[0130] The warning signal and the maintenance suggestion are input into a preset data mapping table, and the warning signal and the maintenance suggestion are mapped in the data mapping table according to preset logic rules to obtain fault warning information and maintenance suggestions.

[0131] By using customized logic mapping rules; specifically, combining the logic mapping table with the warning signals issued by the system and the maintenance suggestions generated, they are converted into operation steps and maintenance information that are easy for users to understand and follow.

[0132] For example, a user interface was developed that displays a mapping table and updates fault warning information and maintenance recommendations in real time. Operators can intuitively see the priority and reasons for maintenance recommendations, helping them make quick and accurate maintenance decisions, reducing system downtime and improving overall production efficiency.

[0133] In this embodiment, the waveform distortion of the electrical signal is accurately analyzed through a convolutional neural network and anomaly detection algorithm, and important signal anomaly features are effectively obtained, and a waveform anomaly identification map and a root cause distribution map are generated based on this; then, a structured analysis method is used to convert these abnormal data into quantifiable indicators of fault potential, and then a multivariate nonlinear regression model is used to perform trend analysis on these indicators and generate a fault probability distribution; finally, the early warning system generates operation suggestions and maintenance information based on this, helping maintenance personnel make effective maintenance and repair decisions, which not only improves the accuracy and efficiency of the chip monitoring method, but also provides a strong guarantee for the stability and reliability of electronic equipment.

[0134] Embodiment 3:

[0135] The present application also provides a chip monitoring device 10 , which includes a collection module 11 , a calculation module 12 , a generation module 13 , an analysis module 14 , a detection module 15 and a mapping module 16 .

[0136] The acquisition module 11 is mainly used to acquire the chip's electrical signal amplitude, frequency characteristics and waveform distortion.

[0137] The calculation module 12 is mainly used to input the amplitude of the electrical signal into the analog-to-digital converter to generate a digital quantization signal, and perform fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data.

[0138] The generation module 13 is mainly used to input the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector.

[0139] The analysis module 14 is mainly used to perform multi-dimensional data analysis on the state feature vector to obtain the working state index of the chip, and to perform combined analysis on the working state index and the fault indication vector to obtain the current working state and potential fault points.

[0140] The detection module 15 is mainly used to perform abnormal detection on the waveform distortion by using the current working state and potential fault points, and obtain waveform abnormality feature data and fault root cause analysis results.

[0141] The mapping module 16 is mainly used to analyze the waveform abnormality feature data and the fault root cause analysis results using a nonlinear regression model to obtain regression coefficients and prediction curves, map the regression coefficients and prediction curves, and obtain fault warning information and maintenance suggestions.

[0142] In this embodiment, by constructing a chip monitoring device 10 including multiple specialized modules, comprehensive monitoring of the chip electrical signal amplitude, frequency characteristics and waveform distortion is achieved. At the same time, efficient signal processing and analysis methods are adopted to ensure the accuracy and real-time nature of the monitoring data. Specifically, the acquisition module 11 uses precise sensor technology to capture the key operating signals of the chip in real time, providing raw data for subsequent analysis; the calculation module 12 uses analog-to-digital converters and fast Fourier transform calculations to convert analog signals into digital quantized signals that can be processed by the power signal analysis model, ensuring the continuity and speed of data processing; the generation module 13 converts the calculated frequency domain characteristic data into state feature vectors and fault indication vectors, laying the foundation for state judgment and fault detection; on this basis, the analysis module 14 uses multi-dimensional data processing technology to extract the core working state index from a large number of state features, and analyzes the current working state and potential fault points in combination with the fault indication vector; the detection module 15 further uses the state data and fault indications to perform in-depth anomaly detection on the waveform distortion, and obtains more accurate waveform anomaly feature data and fault root cause analysis results; finally, the mapping module 16 uses a nonlinear regression model to comprehensively consider the above analysis results, and generates fault warning information and practical maintenance suggestions.

[0143] It should be noted that technicians in the relevant technical field can clearly understand that for the convenience and simplicity of description, the specific working process of the above-described device and each module can refer to the corresponding process in the aforementioned chip monitoring method embodiment, and will not be repeated here.

[0144] Embodiment 4:

[0145] The present application also provides an electronic device 20, including a memory 21 and a processor 22, wherein the memory 21 stores a computer program that can be run on the processor 22, and the chip monitoring method of Example 1 is implemented when the processor 22 executes the computer program.

[0146] In this embodiment, by implanting the chip monitoring method into the memory 21 and processor 22 of the electronic device 20, this process is automated and integrated into the normal operation of the electronic device 20. The memory 21 in the electronic device 20 is pre-loaded with a computer program that implements the monitoring function, and the program is executed by the processor 22, making the chip monitoring seamless and transparent. This design not only simplifies the maintenance process of the electronic device 20, but also brings the intelligence of chip monitoring and fault prevention to a new level. Under the control of the processor 22, the electronic device 20 can autonomously detect its own operating status, diagnose potential fault points in real time and respond.

[0147] Embodiment 5:

[0148] The present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the processor executes the chip monitoring method as described in Example 1.

[0149] In this embodiment, by providing a specially designed computer-readable storage medium for the processor, the storage medium stores an executable computer program, and executing the program can start the chip monitoring method detailed in Example 1. This implementation means that equipment manufacturers and maintenance personnel can deploy the chip monitoring function in the form of software updates to existing electronic devices, thereby instantly improving the intelligent monitoring capabilities of the equipment without having to change the hardware. The design of the computer program allows easy integration into various processor architectures, ensuring the wide applicability and ease of deployment of this monitoring solution. In addition, the computer program carried by the storage medium provides a simple and direct way for the device to perform complex data acquisition, signal processing, fault analysis, and early warning generation processes, greatly reducing the workload of system maintenance and increasing the possibility of autonomous operation and self-repair of electronic equipment.

[0150] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A chip monitoring method, characterized in that: include: Acquire the chip's electrical signal amplitude, frequency characteristics, and waveform distortion; Inputting the amplitude of the electrical signal into an analog-to-digital converter to generate a digital quantization signal, and performing fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data; Inputting the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector; Input the state feature vector into a preset multi-dimensional data analysis model, perform dimensionality reduction processing on the state feature vector using principal component analysis in the multi-dimensional data analysis model to obtain a principal component vector after dimensionality reduction, and classify the principal component vector after dimensionality reduction through linear discriminant analysis to obtain a classification result and a principal component distribution diagram; perform cluster analysis on the classification result according to the principal component distribution diagram to obtain a cluster center and a cluster density, and perform segmentation processing on the cluster density based on the cluster center to obtain a classification cluster; Performing correlation analysis on the classification cluster and the fault indication vector to obtain a preliminary working status index; Based on a preset state evaluation algorithm, the preliminary working state index is evaluated using the classification result and the principal component vector after dimensionality reduction to obtain an accurate working state index; Probabilistically inferring the fault indication vector according to preset state evaluation parameters to obtain the fault type probability; comprehensively matching the precise working state index with the fault type probability using a preset matching model to obtain comprehensive state description parameters and fault location parameters, taking the comprehensive state description parameters as the current working state, and taking the fault location parameters as the potential fault point; Using the current working state and the potential fault point to perform abnormal detection on the waveform distortion, and obtain waveform abnormality feature data and fault root cause analysis results; The waveform abnormality feature data and the fault root cause analysis results are analyzed using a nonlinear regression model to obtain a regression coefficient and a prediction curve, and the regression coefficient and the prediction curve are mapped to obtain fault warning information and maintenance suggestions.

2. The chip monitoring method according to claim 1, characterized in that: The step of collecting the amplitude, frequency characteristics and waveform distortion of the electrical signal of the chip includes: An electrical signal acquisition device is used to capture the electrical signal emitted by the chip in real time; wherein the electrical signal acquisition device includes a voltage sensor, a current sensor and a waveform capture sensor; Inputting the electrical signal into a signal conditioner for signal adjustment to obtain an electrical signal amplitude corresponding to the electrical signal; Input the electrical signal into a preset time-frequency analysis algorithm, use clock synchronization technology to determine the time characteristics of the electrical signal, and based on the time characteristics, extract the characteristics of the electrical signal through a fast Fourier transform algorithm to obtain frequency characteristic data of the electrical signal; The electrical signal is input into a waveform distortion analysis device, in which fuzzy logic and nonlinear dynamic system modeling technology are used to perform high-sensitivity detection and quantify the waveform distortion of the electrical signal to obtain the waveform distortion of the electrical signal.

3. The chip monitoring method according to claim 1, characterized in that: The step of inputting the amplitude of the electrical signal into an analog-to-digital converter to generate a digital quantization signal, and performing fast Fourier transform calculation on the frequency characteristics based on the digital quantization signal to obtain frequency domain characteristic data includes: Inputting the amplitude of the electrical signal into an analog-to-digital converter, quantizing the amplitude of the electrical signal using the analog-to-digital converter, performing analog-to-digital conversion on the amplitude of the electrical signal by high-precision sampling in the analog-to-digital converter, and obtaining a digital quantized electrical signal; Performing filtering and enhancement processing on the digital quantized electrical signal through a digital signal processor to obtain a purified signal, and performing data enhancement processing on the frequency feature based on the purified signal to obtain an enhanced signal; Preprocessing the enhanced signal according to a frequency domain analysis algorithm to obtain frequency components and amplitude information, and filtering the frequency components and amplitude information through an optimization algorithm to obtain optimized frequency data; The frequency characteristics are calculated by fast Fourier transform based on the optimized frequency data, and spectrum analysis is performed on the frequency characteristics and the optimized frequency data in the fast Fourier transform calculation to obtain frequency domain characteristic data.

4. The chip monitoring method according to claim 1, characterized in that: The step of inputting the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector comprises: Extracting features from the frequency domain characteristic data using a preset feature extraction algorithm to obtain important frequency domain features; Vectorizing the important frequency domain features to obtain a multi-dimensional vector, and calculating the cosine similarity based on the multi-dimensional vector and a preset frequency domain feature vector; The cosine similarity is used as a new feature to generate a similarity vector, and the deviation between two similarity vectors is calculated to generate a signal deviation vector; The similarity vector and the signal deviation vector are combined and processed to obtain a comprehensive feature vector, and the comprehensive feature vector is analyzed by a comprehensive feature processor to obtain a state parameter; The state parameters are input into a preset electric signal analysis model, and the state parameters are modeled and analyzed using regression analysis in the preset electric signal analysis model to obtain a state characteristic vector and a fault indication vector.

5. The chip monitoring method according to claim 1, characterized in that: The step of performing abnormal detection on the waveform distortion by using the current working state and the potential fault point to obtain waveform abnormality feature data and fault root cause analysis results comprises: Performing feature mapping on the current working state and the potential fault point through a preset convolutional neural network to obtain a high-dimensional feature map and a feature mapping result; Based on the high-dimensional feature graph and the feature mapping result combined with a preset anomaly detection algorithm, anomaly detection is performed on the waveform distortion to generate a waveform anomaly identification graph and a root source distribution graph; The waveform anomaly identification diagram is used as waveform anomaly feature data, and the root cause distribution diagram is used as a fault root cause analysis result.

6. The chip monitoring method according to claim 1, characterized in that: The step of analyzing the waveform abnormality feature data and the fault root cause analysis result by using a nonlinear regression model to obtain a regression coefficient and a prediction curve, mapping the regression coefficient and the prediction curve to obtain fault warning information and maintenance suggestions includes: Formatting the waveform abnormality feature data and the fault root cause analysis result through a preset data perspective model to obtain structured data and feature parameters; Performing regression analysis on the structured data using a multivariate nonlinear regression model to obtain regression coefficients and prediction curves; Using the prediction curve to analyze the abnormal trend of the characteristic parameters to obtain the fault probability distribution; Performing early warning judgment on the characteristic parameters based on the fault probability distribution to obtain an early warning signal, performing correlation analysis on the early warning signal and the waveform abnormality characteristic data to generate maintenance suggestions; The warning signal and the maintenance suggestion are input into a preset data mapping table, and the warning signal and the maintenance suggestion are mapped in the data mapping table according to preset logic rules to obtain fault warning information and maintenance suggestions.

7. A chip monitoring device, characterized in that: include: The acquisition module is used to collect the chip's electrical signal amplitude, frequency characteristics and waveform distortion; A calculation module, used for inputting the amplitude of the electrical signal into an analog-to-digital converter to generate a digital quantization signal, and performing a fast Fourier transform calculation on the frequency characteristic based on the digital quantization signal to obtain frequency domain characteristic data; A generating module, used for inputting the frequency domain characteristic data into a preset electrical signal analysis model to generate a state characteristic vector and a fault indication vector; An analysis module is used to input the state feature vector into a preset multi-dimensional data analysis model, perform dimensionality reduction processing on the state feature vector by principal component analysis in the multi-dimensional data analysis model to obtain a principal component vector after dimensionality reduction, and classify the principal component vector after dimensionality reduction by linear discriminant analysis to obtain a classification result and a principal component distribution diagram; perform cluster analysis on the classification result according to the principal component distribution diagram to obtain a cluster center and a cluster density, and perform segmentation processing on the cluster density based on the cluster center to obtain a classification cluster; Performing correlation analysis on the classification cluster and the fault indication vector to obtain a preliminary working status index; Based on a preset state evaluation algorithm, the preliminary working state index is evaluated using the classification result and the principal component vector after dimensionality reduction to obtain an accurate working state index; Probabilistically inferring the fault indication vector according to preset state evaluation parameters to obtain the fault type probability; comprehensively matching the precise working state index with the fault type probability using a preset matching model to obtain comprehensive state description parameters and fault location parameters, taking the comprehensive state description parameters as the current working state, and taking the fault location parameters as the potential fault point; A detection module, used to perform abnormal detection on the waveform distortion by using the current working state and the potential fault point, and obtain waveform abnormality feature data and fault root cause analysis results; A mapping module is used to analyze the waveform abnormality feature data and the fault root cause analysis results using a nonlinear regression model to obtain a regression coefficient and a prediction curve, and to map the regression coefficient and the prediction curve to obtain fault warning information and maintenance suggestions.

8. An electronic device, characterized in that: The invention comprises a memory and a processor, wherein the memory stores a computer program executable on the processor, and the processor implements the chip monitoring method according to any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, the processor is enabled to execute the chip monitoring method according to any one of claims 1 to 6.

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