Fault injection method, device and electronic device

Abstract

The present invention provides a fault injection method, device and electronic device, which belong to the field of chip technology. The method includes: obtaining an energy curve when the chip to be tested is working; performing signal processing on the energy curve to screen out the execution operation time interval of the chip to be tested in the energy curve; calculating the key time points in the execution operation time interval based on the correlation between the input data of the chip to be tested and the energy curve, and the correlation between the output data of the chip to be tested and the energy curve; obtaining a functional area distribution map of the chip to be tested; determining a fault injection scanning method based on the fault protection type of the object to be fault injected in the functional area distribution map; performing a fault injection scan based on the fault injection scanning method, and determining key physical location points based on the scanning results. The present invention is based on a fault injection method based on a dual-domain of time and space, and locates key time points and key physical location points from the time domain and the space domain respectively, thereby improving the accuracy of fault injection and the efficiency of fault injection attacks.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a fault injection method, a fault injection device, an electronic device, a fault injection system, a machine-readable storage medium, and a computer program product. Background Art

[0002] A fault injection attack involves introducing faults during the normal operation of a chip or cryptographic module, causing it to operate abnormally. This can cause unexpected changes in program and data flows, leading to erroneous output and even the leakage of sensitive information. Common fault injection methods include voltage, laser, electromagnetic, bias, radiation, and temperature. To assess the chip and cryptographic module's resilience to fault attacks, attackers typically test various fault injection methods and attack parameter combinations.

[0003] Existing fault injection methods have the problems of low fault injection accuracy and low fault injection attack efficiency. Summary of the Invention

[0004] The purpose of the embodiments of the present invention is to provide a fault injection method, a fault injection device, an electronic device, a fault injection system, a machine-readable storage medium, and a computer program product to solve the problems of low fault injection accuracy and low fault injection attack efficiency in existing fault injection methods.

[0005] To achieve the above objectives, an embodiment of the present invention provides a fault injection method, including:

[0006] Obtain the energy curve of the chip under test when it is working;

[0007] Performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve;

[0008] Calculating a key time point in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve;

[0009] Obtain a functional area distribution map of the chip to be tested;

[0010] Determining a fault injection scanning mode based on a fault protection type of an object to be fault-injected in the functional area distribution map;

[0011] A fault injection scan is performed based on the fault injection scan method, and key physical location points are determined based on the scan results.

[0012] Optionally, performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve includes:

[0013] performing noise reduction processing on the energy curve;

[0014] Amplitude points greater than or equal to a set energy threshold are screened out in the energy curve after noise reduction processing, so as to screen out the execution operation time interval of the chip under test in the energy curve.

[0015] Optionally, the performing noise reduction processing on the energy curve includes:

[0016] Perform any one of filtering, moving average processing, and Fourier transform noise reduction processing on the energy curve.

[0017] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0018] Calculating a first Pearson correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Pearson correlation coefficient within the execution operation time interval as an input data time point;

[0019] Calculating a second Pearson correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point;

[0020] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0021] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0022] Calculating a first Spearman correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Spearman correlation coefficient within the execution operation time interval as an input data time point;

[0023] Calculating a second Spearman correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point;

[0024] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0025] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0026] When the fault protection type of the object to be fault-injected in the functional area distribution map is no fault protection, the fault injection scanning mode is determined to be point-by-point fault injection.

[0027] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0028] When the fault protection type of the object to be fault-injected in the functional area distribution map is spatial randomization protection, the fault injection scanning mode is determined to be random point fault injection.

[0029] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0030] In a case where the fault protection type of the object to be fault-injected in the functional area distribution map is a distributed sensor detection circuit, the fault injection scanning mode is determined to be arbitrary shape fault injection.

[0031] On the other hand, an embodiment of the present invention further provides a fault injection device, comprising:

[0032] The first acquisition module is used to obtain the energy curve of the chip under test when it is working;

[0033] a signal processing module, configured to perform signal processing on the energy curve to filter out a time interval during which the chip under test performs calculations in the energy curve;

[0034] a correlation analysis module, configured to calculate a key time point in the execution operation time interval based on a correlation between input data of the chip under test and the energy curve, and a correlation between output data of the chip under test and the energy curve;

[0035] The second acquisition module is used to obtain a functional area distribution map of the chip to be tested;

[0036] A scanning mode determination module, configured to determine a fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map;

[0037] The location point determination module is used to perform a fault injection scan based on the fault injection scanning method and determine key physical location points based on the scanning results.

[0038] Optionally, performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve includes:

[0039] performing noise reduction processing on the energy curve;

[0040] Amplitude points greater than or equal to a set energy threshold are screened out in the energy curve after noise reduction processing, so as to screen out the execution operation time interval of the chip under test in the energy curve.

[0041] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0042] Calculating a first Pearson correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Pearson correlation coefficient within the execution operation time interval as an input data time point;

[0043] Calculating a second Pearson correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point;

[0044] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0045] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0046] Calculating a first Spearman correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Spearman correlation coefficient within the execution operation time interval as an input data time point;

[0047] Calculating a second Spearman correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point;

[0048] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0049] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0050] When the fault protection type of the object to be fault-injected in the functional area distribution map is no fault protection, the fault injection scanning mode is determined to be point-by-point fault injection.

[0051] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0052] When the fault protection type of the object to be fault-injected in the functional area distribution map is spatial randomization protection, the fault injection scanning mode is determined to be random point fault injection.

[0053] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0054] In a case where the fault protection type of the object to be fault-injected in the functional area distribution map is a distributed sensor detection circuit, the fault injection scanning mode is determined to be arbitrary shape fault injection.

[0055] On the other hand, the present invention further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned fault injection method when executing the program.

[0056] On the other hand, the present invention also provides a fault injection system, comprising the above-mentioned electronic device, a signal acquisition device for collecting the energy curve of the chip to be tested when it is working, and an image imaging device for identifying the functional areas of the layout of the chip to be tested to form a functional area distribution map; the signal acquisition device is also used to send the energy curve to the electronic device, and the image imaging device is also used to send the functional area distribution map to the electronic device.

[0057] On the other hand, the present invention further provides a machine-readable storage medium having a computer program stored thereon, which implements the above-mentioned fault injection method when executed by a processor.

[0058] On the other hand, the present invention further provides a computer program product, comprising a computer program, wherein the computer program implements the above-mentioned fault injection method when executed by a processor.

[0059] Through the above technical solution, the embodiment of the present invention determines the critical time points for fault injection in the energy curve of the chip under test through signal processing and correlation analysis in the time domain. In the spatial domain, the fault injection scanning method is determined based on the fault protection type of the target to be fault-injected in the functional area distribution map, and the key physical locations of the fault injection are determined through the fault injection scanning method. The embodiment of the present invention adopts a fault injection method based on the dual time and space domains, locating the critical time points and key physical locations in the time and space domains respectively, thereby improving the accuracy of fault injection and the efficiency of fault injection attacks.

[0060] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following detailed description, they are used to explain the embodiments of the present invention, but do not constitute a limitation of the embodiments of the present invention. In the accompanying drawings:

[0062] Figure 1 This is one of the flow charts of the fault injection method provided by the present invention;

[0063] Figure 2 This is the second flow chart of the fault injection method provided by the present invention;

[0064] Figure 3 This is a schematic diagram of locating key time points in the time interval of the chip under test performing operations provided by the present invention;

[0065] Figure 4 is a schematic diagram of point-by-point fault injection provided by the present invention;

[0066] Figure 5 is a schematic diagram of random point fault injection provided by the present invention;

[0067] Figure 6 is a schematic diagram of arbitrary shape fault injection provided by the present invention;

[0068] Figure 7 This is the third flow chart of the fault injection method provided by the present invention;

[0069] Figure 8 It is a structural diagram of the fault injection device provided by the present invention;

[0070] Figure 9 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0071] The following describes the specific implementation of the embodiment of the present invention in detail with reference to the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the embodiment of the present invention and is not used to limit the embodiment of the present invention.

[0072] Method Example

[0073] Please refer to Figure 1 , an embodiment of the present invention provides a fault injection method, comprising:

[0074] Step 100: Obtain an energy curve of the chip under test when it is working.

[0075] The operator who implements the fault injection can send instructions through the host computer to put the chip under test and the cryptographic device into normal working state, and use a signal acquisition device (such as an oscilloscope, etc.) to collect the energy curve of the leakage of the chip under test. The electronic device connected to the signal acquisition device obtains the energy curve of the chip under test when it is working. Among them, the energy curve can be a curve reflecting the relationship between the operating voltage amplitude of the chip under test and time, or it can be a curve reflecting the relationship between the operating current amplitude of the chip under test and time. The embodiment of the present invention is described by taking the energy curve reflecting the relationship between the operating voltage amplitude of the chip under test and time as an example.

[0076] Please note that, please refer to Figure 2 Fault injection generally involves four steps: setting up the fault injection environment, locating the fault injection, implementing the fault injection, and statistically analyzing the fault injection results. To address the aforementioned issues of low fault injection accuracy and low fault injection attack efficiency, the present invention proposes a fault injection method based on both the temporal and spatial domains for fault injection location and implementation. This method locates the fault injection in both the temporal and spatial domains, thereby improving both the accuracy and efficiency of the fault injection attack. The following describes the fault injection method based on both the temporal and spatial domains.

[0077] Step 200: performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve.

[0078] To make the energy curve's characteristics more distinct and eliminate noise interference, the electronic device can perform noise reduction processing on the energy curve to remove the noise interference in the energy curve and filter out the time interval in the energy curve where the chip under test performs operations. Because the amplitude of the energy curve when the chip under test performs operations is different from the amplitude when the chip under test does not perform operations, the time interval in the energy curve where the chip under test performs operations can be filtered out based on the difference between the amplitude when the chip under test performs operations and the amplitude when the chip under test does not perform operations.

[0079] Step 300 : Calculate key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve.

[0080] Since the input data of the chip to be tested is correlated with the energy curve, that is, the amplitude of the energy curve is related to the data volume of the input data of the chip to be tested. If the input data of the chip to be tested is different, then the amplitude of the energy curve of the chip to be tested at the same time will also be different. Thus, by calculating the correlation between the input data of the chip to be tested and the amplitude in the energy curve during the execution operation time interval (for example, 0-200 microseconds), the time when the correlation between the two is the strongest is found, which is the time point when the data is input on the energy curve of the chip to be tested. Similarly, since the output data of the chip to be tested is correlated with the energy curve, that is, the amplitude of the energy curve is related to the data volume of the output data of the chip to be tested. If the output data of the chip to be tested is different, then the amplitude of the energy curve of the chip to be tested at the same time will also be different. Thus, by calculating the correlation between the output data of the chip to be tested and the amplitude in the energy curve during the execution operation time interval (for example, 0-200 microseconds), the time when the correlation between the two is the strongest is found, which is the time point when the data is output on the energy curve of the chip to be tested. Then, please refer to Figure 3 The time between the time when data is input to the energy curve of the chip under test and the time when data is output from the energy curve of the chip under test is the critical time point in the time interval during which the chip under test executes operations. Fault injection should be performed at this critical time point, and the fault injection time should be precisely controlled to improve fault injection accuracy. This embodiment of the present invention uses signal processing methods and data correlation statistical methods in the time domain to identify the critical time point for fault injection.

[0081] Step 400: Obtain a functional area distribution map of the chip layout to be tested.

[0082] For example, embodiments of the present invention can utilize imaging equipment, such as a microscope or near-infrared imager, to identify the distribution of major functional areas on the layout of the chip under test, such as the layout locations of digital logic circuits, analog circuits, memory decoding circuits, and interface circuits, and obtain a functional area distribution map. The electronic device obtains the functional area distribution map of the layout of the chip under test from the imaging equipment.

[0083] Step 500: Determine a fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map.

[0084] The electronic device can select the physical location area corresponding to the fault injection in the functional area distribution map according to the object to be fault injected, such as cryptographic operation digital circuit, data storage unit, analog detection circuit, etc. The embodiment of the present invention selects the appropriate fault injection scanning method for different fault protection types. The traditional fault injection attack adopts the point-by-point fault injection method, please refer to Figure 4 As shown. If there is a fault protection detection circuit in the chip layout, when the scanning fault is injected into the fault protection detection circuit, it will cause the fault protection detection circuit to respond, thereby generating an alarm or reset operation. At this time, you can choose the following according to the situation: Figure 5 Random point fault injection as shown, or Figure 6 The scanning method for arbitrary-shaped fault injection is shown. By determining the fault injection scanning method based on the fault protection type of the object to be fault-injected in the functional area distribution diagram, the embodiment of the present invention can effectively circumvent different fault protection types through different fault injection scanning methods (such as point-by-point fault injection, random point fault injection, and arbitrary point fault injection), thereby improving the fault injection efficiency and success rate.

[0085] Step 600: Perform a fault injection scan based on the fault injection scanning method, and determine key physical locations based on the scan results.

[0086] Based on the determination of a fault injection scanning method, the electronic device can perform a fault injection scan based on the method and determine key physical locations based on the scan results. For example, if the fault injection scanning method is point-by-point fault injection, after performing a point-by-point fault injection scan, the output results indicate the location where the fault error occurred. This location is then considered a key physical location. Therefore, the present invention employs a fault injection method based on both temporal and spatial domains, locating key time points and key physical locations in both the temporal and spatial domains, respectively, resulting in more accurate fault injection locations.

[0087] In the time domain, this embodiment of the present invention uses signal processing and correlation analysis to identify critical time points for fault injection in the energy curve of the chip under test. In the spatial domain, the fault injection scanning method is determined based on the fault protection type of the target to be injected, as shown in the functional area distribution map. This method also identifies key physical locations for fault injection. This embodiment of the present invention employs a fault injection method based on both the time and space domains, locating key time points and key physical locations in both the time and space domains, thereby improving both the accuracy and efficiency of fault injection attacks.

[0088] In other aspects of the embodiments of the present invention, step 200, performing signal processing on the energy curve to filter out the execution operation time interval of the chip under test in the energy curve, includes: performing noise reduction processing on the energy curve; filtering out amplitude points in the energy curve after noise reduction processing that are greater than or equal to the set energy threshold to filter out the execution operation time interval of the chip under test in the energy curve.

[0089] Specifically, in one embodiment, the energy curve is subjected to noise reduction processing, including filtering, moving average processing, and Fourier transform processing. The filtering may adopt a limiting filter method, a median filter method, an arithmetic mean filter method, etc.

[0090] By using any one of the noise reduction processes such as filtering, moving average and Fourier transform to reduce the noise of the energy curve, the signal-to-noise ratio of the energy curve is improved so as to more accurately and qualitatively determine the time interval for executing the operation. Since the amplitude of the energy curve will be higher than the amplitude when the chip under test executes the operation when the operation is executed, the time interval for executing the operation in the energy curve of the chip under test can be preliminarily and qualitatively determined by setting the energy threshold. For example, in the energy curve of 0-500 microseconds, the amplitude of 0-200 microseconds is higher than or equal to the set energy threshold, then 0-200 microseconds is determined as the time interval for executing the operation in the energy curve of the chip under test. Therefore, the embodiment of the present invention qualitatively determines the time interval for executing the operation of the chip under test by comparing the signal processing method of noise reduction with the threshold value of setting the energy threshold.

[0091] In other aspects of the embodiments of the present invention, step 300, based on the correlation between the input data of the chip to be tested and the energy curve, and the correlation between the output data of the chip to be tested and the energy curve, calculates the key time point in the execution operation time interval, including: calculating the first Pearson correlation coefficient between the input data of the chip to be tested and the energy curve within the execution operation time interval, and determining the peak point time of the first Pearson correlation coefficient within the execution operation time interval as the input data time point; calculating the second Pearson correlation coefficient between the output data of the chip to be tested and the energy curve within the execution operation time interval, and determining the peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point; determining the time point between the input data time point and the output data time point as the key time point in the execution operation time interval.

[0092] In an embodiment of the present invention, a Pearson correlation calculation method is used to calculate a first Pearson correlation coefficient between the amount of input data of the chip under test and the amplitude of the energy curve at each moment within a calculation time interval (e.g., 0-200 microseconds). The peak time of the first Pearson correlation coefficient within the calculation time interval (e.g., 0 microseconds) is determined to be the time point at which the input data of the chip under test and the amplitude of the energy curve have the strongest correlation and are closest to each other, i.e., the input data time point of the chip under test. Similarly, a second Pearson correlation calculation method is used to calculate the amount of output data of the chip under test and the amplitude of the energy curve at each moment within the calculation time interval (e.g., 0-200 microseconds). The peak time of the second Pearson correlation coefficient within the calculation time interval (e.g., 140 microseconds) is determined to be the time point at which the output data of the chip under test and the amplitude of the energy curve have the strongest correlation and are closest to each other, i.e., the output data time point of the chip under test. The time points between the input data time points and the output data time points of the chip under test are the key time points in the time interval during which the chip under test executes the calculation. Specifically, the time points between 0 and 140 microseconds are the key time points in the time interval during which the chip under test executes the calculation. The Pearson correlation coefficient is calculated by taking the quotient of the covariance and standard deviation between the two variables, specifically the quotient of the covariance and standard deviation between the amount of input data and the amplitude of the energy curve of the chip under test within the period of 0 to 200 microseconds. The specific formula for calculating the Pearson correlation coefficient is common knowledge and will not be elaborated upon here.

[0093] The embodiment of the present invention uses the Pearson correlation calculation method to calculate the time point between the input data time point and the output data time point of the chip under test as the key time point in the time interval of the chip under test executing the operation, thereby achieving quantitative judgment of the time point of executing the operation, and thus accurately locating the key time point of fault injection.

[0094] In other aspects of the embodiments of the present invention, step 300, based on the correlation between the input data of the chip to be tested and the energy curve, and the correlation between the output data of the chip to be tested and the energy curve, calculates the key time point in the execution operation time interval, including: calculating the first Spearman correlation coefficient between the input data of the chip to be tested and the energy curve within the execution operation time interval, and determining the peak point time of the first Spearman correlation coefficient within the execution operation time interval as the input data time point; calculating the second Spearman correlation coefficient between the output data of the chip to be tested and the energy curve within the execution operation time interval, and determining the peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point; determining the time point between the input data time point and the output data time point as the key time point in the execution operation time interval.

[0095] In an embodiment of the present invention, a Spearman correlation correlation calculation method is used to calculate a first Spearman correlation coefficient between the amount of input data of the chip under test and the amplitude of the energy curve at each moment within an execution operation time interval (e.g., 0-200 microseconds), and the peak point time (e.g., 0 microseconds) of the first Spearman correlation coefficient within the execution operation time interval is determined to be the time point at which the input data of the chip under test and the amplitude of the energy curve have the strongest correlation and are closest to each other, i.e., the input data time point of the chip under test. Similarly, a second Spearman correlation coefficient is calculated between the amount of output data of the chip under test and the amplitude of the energy curve at each moment within the execution operation time interval (e.g., 0-200 microseconds), and the peak point time (e.g., 140 microseconds) of the second Spearman correlation coefficient within the execution operation time interval is determined to be the time point at which the output data of the chip under test and the amplitude of the energy curve have the strongest correlation and are closest to each other, i.e., the output data time point of the chip under test. The time points between the input data time points and the output data time points of the chip under test are the key time points in the time interval during which the chip under test executes the calculation. Specifically, the time points between 0 and 140 microseconds are the key time points in the time interval during which the chip under test executes the calculation. The formula for calculating the Spearman correlation coefficient is common knowledge and will not be elaborated on here.

[0096] The embodiment of the present invention uses the Spearman phase calculation method to calculate the time point between the input data time point and the output data time point of the chip under test as the key time point in the time interval of the chip under test executing the operation, thereby achieving quantitative judgment of the time point of executing the operation, and thus accurately locating the key time point of fault injection.

[0097] In other aspects of the embodiments of the present invention, determining the fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map includes: when the fault protection type of the object to be fault injected in the functional area distribution map is no fault protection, determining the fault injection scanning mode to be point-by-point fault injection.

[0098] When the chip under test is a chip without fault protection, there is no need to worry about the detection circuit responding when the fault is injected into a certain position, thereby generating an alarm or reset operation. Therefore, when the fault protection type of the object to be fault injected is no fault protection, the electronic device determines the fault injection scanning method as point-by-point fault injection. Please refer to Figure 4 ,Point-by-point fault injection performs fault injection point by point in the physical location area of the object to be fault-injected. Figure 4 The sequence numbers in indicate the order of fault injection.

[0099] By determining that the fault injection scanning mode is point-by-point fault injection when the fault protection type of the object to be fault injected is no fault protection, a fault injection scanning mode that is adapted to the fault protection type of the object to be fault injected is effectively selected, thereby improving the success rate of fault injection.

[0100] In other aspects of the embodiments of the present invention, determining the fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map includes: when the fault protection type of the object to be fault injected in the functional area distribution map is spatial randomization protection, determining the fault injection scanning mode to be random point fault injection.

[0101] When the chip under test is a chip that uses spatial randomization protection, the electronic device determines that the fault injection scanning method is random point fault injection. Figure 5 ,Random point fault injection performs fault injection at random points in the physical location area of the object to be ,injected with faults. Figure 5 The sequence numbers in indicate the order of fault injection.

[0102] By determining that the fault injection scanning method is random point fault injection when the fault protection type of the object to be fault injected is without spatial randomization protection, a fault injection scanning method that is adapted to the fault protection type of the object to be fault injected is effectively selected, thereby improving the success rate of fault injection.

[0103] In other aspects of the embodiments of the present invention, determining the fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map includes: when the fault protection type of the object to be fault injected in the functional area distribution map is a distributed sensor detection circuit, determining the fault injection scanning mode to be arbitrary shape fault injection.

[0104] When the chip under test adopts the fault protection type of distributed sensor detection circuit (such as optical sensor detection circuit, etc.), the electronic device determines the fault injection scanning mode as arbitrary shape fault injection. Figure 6 ,in Figure 6 A represents the shape of any fault injection, B represents the detection circuit coverage, and C represents the detection circuit coverage. If the fault injection is implemented point by point scanning, the detection circuit will respond at positions B and C. However, if Figure 6 The arbitrary shape scanning method of A can successfully implement fault injection by bypassing the fault protection detection circuit.

[0105] By determining the fault injection scanning mode as arbitrary shape fault injection when the fault protection type of the object to be fault injected is that there is no distributed sensor detection circuit, the fault injection scanning mode that is adapted to the fault protection type of the object to be fault injected is effectively selected, thereby improving the success rate of fault injection.

[0106] Finally, please refer to Figure 7 , the fault injection method of an embodiment of the present invention is described through an embodiment.

[0107] First, the electronic device sends a command and uses the signal acquisition device to collect the energy curve leaked by the chip under test when it is working; then, signal processing and data correlation analysis are performed on the energy curve to locate the key time point of fault injection; then, image imaging tools are used to identify the distribution of the main functional areas of the chip under test layout; then, based on the object to be fault injected (the target of attack), the physical location area of the chip under test where the fault injection is to be implemented is selected; then, for different fault protection types, the appropriate fault injection scanning method is selected; finally, the key physical location point of the fault injection is determined.

[0108] When locating fault injection in the time domain, the embodiment of the present invention performs signal processing and data correlation statistical analysis on the energy curve to achieve qualitative and quantitative judgment of the critical time interval for fault injection. When implementing fault injection in the spatial domain, different fault injection scanning methods are used to achieve point-by-point fault injection, random point fault injection, and arbitrary point fault injection, so as to accurately determine the key physical location of the fault injection site. The embodiment of the present invention improves the fault injection accuracy, fault injection attack efficiency, and fault injection success rate.

[0109] Device embodiment

[0110] Please refer to Figure 8 On the other hand, an embodiment of the present invention further provides a fault injection device, comprising:

[0111] The first acquisition module 801 is used to obtain the energy curve of the chip under test when it is working;

[0112] The signal processing module 802 is configured to perform signal processing on the energy curve to filter out the execution operation time interval of the chip under test in the energy curve;

[0113] A correlation analysis module 803 is configured to calculate a key time point in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve;

[0114] The second acquisition module 804 is used to obtain a functional area distribution map of the chip to be tested;

[0115] A scanning mode determination module 805 is configured to determine a fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map;

[0116] The location point determination module 806 is configured to perform a fault injection scan based on the fault injection scanning method and determine key physical location points based on the scan results.

[0117] Optionally, performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve includes:

[0118] performing noise reduction processing on the energy curve;

[0119] Amplitude points greater than or equal to a set energy threshold are screened out in the energy curve after noise reduction processing, so as to screen out the execution operation time interval of the chip under test in the energy curve.

[0120] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0121] Calculating a first Pearson correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Pearson correlation coefficient within the execution operation time interval as an input data time point;

[0122] Calculating a second Pearson correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point;

[0123] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0124] Optionally, the calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes:

[0125] Calculating a first Spearman correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Spearman correlation coefficient within the execution operation time interval as an input data time point;

[0126] Calculating a second Spearman correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point;

[0127] A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

[0128] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0129] When the fault protection type of the object to be fault-injected in the functional area distribution map is no fault protection, the fault injection scanning mode is determined to be point-by-point fault injection.

[0130] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0131] When the fault protection type of the object to be fault-injected in the functional area distribution map is spatial randomization protection, the fault injection scanning mode is determined to be random point fault injection.

[0132] Optionally, determining the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes:

[0133] In a case where the fault protection type of the object to be fault-injected in the functional area distribution map is a distributed sensor detection circuit, the fault injection scanning mode is determined to be arbitrary shape fault injection.

[0134] The fault injection device includes a processor and a memory. The first acquisition module, signal processing module, correlation analysis module, second acquisition module, scanning mode determination module, and location point determination module are all stored in the memory as program units. The processor executes the program units stored in the memory to implement corresponding functions.

[0135] The processor includes a kernel, which calls the corresponding program unit from the memory. There can be one or more kernels.

[0136] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0137] Figure 9 An example of a physical structure diagram of an electronic device is shown below. Figure 9 As shown, the electronic device may include: a processor 910, a communication interface 920, a memory 930, and a communication bus 940, wherein the processor 910, the communication interface 920, and the memory 930 communicate with each other via the communication bus 940. The processor 910 may call logic instructions in the memory 930 to execute a fault injection method, which includes: obtaining an energy curve of a chip under test when it is operating; performing signal processing on the energy curve to filter out an execution operation time interval of the chip under test in the energy curve; calculating a key time point in the execution operation time interval based on a correlation between input data of the chip under test and the energy curve, and a correlation between output data of the chip under test and the energy curve; obtaining a functional area distribution map of the chip under test layout; determining a fault injection scanning method based on the fault protection type of the object to be fault injected in the functional area distribution map; performing a fault injection scan based on the fault injection scan method, and determining key physical location points based on the scan results.

[0138] In addition, the logic instructions in the above-mentioned memory 930 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0139] On the other hand, the present invention also provides a fault injection system, comprising the above-mentioned electronic device, a signal acquisition device (not shown) for collecting the energy curve of the chip to be tested when it is working, and an image imaging device (not shown) for identifying the functional areas of the chip layout to be tested to form a functional area distribution map; the signal acquisition device is also used to send the energy curve to the electronic device, and the image imaging device is also used to send the functional area distribution map to the electronic device.

[0140] Among them, the signal acquisition equipment can use an oscilloscope to collect the energy curve of the leakage of the chip under test, and the image imaging equipment can use a microscope, near-infrared imager, etc. to identify the distribution of major functional areas on the layout of the chip under test, such as the layout positions of digital logic circuits, analog circuits, memory decoding circuits, interface circuits, etc.

[0141] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a machine-readable storage medium. When the computer program is executed by a processor, the computer can execute a fault injection method, which includes: obtaining an energy curve when the chip to be tested is working; performing signal processing on the energy curve to screen out an execution operation time interval of the chip to be tested in the energy curve; calculating a key time point in the execution operation time interval based on the correlation between the input data of the chip to be tested and the energy curve, and the correlation between the output data of the chip to be tested and the energy curve; obtaining a functional area distribution map of the chip to be tested layout; determining a fault injection scanning method based on the fault protection type of the object to be fault injected in the functional area distribution map; performing a fault injection scan based on the fault injection scanning method, and determining key physical location points based on the scanning results.

[0142] On the other hand, the present invention also provides a machine-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to perform a fault injection method, the method comprising: obtaining an energy curve of a chip to be tested when it is working; performing signal processing on the energy curve to screen out an execution operation time interval of the chip to be tested in the energy curve; calculating a key time point in the execution operation time interval based on the correlation between the input data of the chip to be tested and the energy curve, and the correlation between the output data of the chip to be tested and the energy curve; obtaining a functional area distribution map of the chip to be tested layout; determining a fault injection scanning method based on the fault protection type of the object to be fault injected in the functional area distribution map; performing a fault injection scan based on the fault injection scanning method, and determining key physical location points based on the scanning results.

[0143] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0144] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.

[0145] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A fault injection method, characterized in that: include: Obtain the energy curve of the chip under test when it is working; Performing signal processing on the energy curve to filter out a time interval in which the chip under test performs calculations in the energy curve; Calculating a key time point in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve; Obtain a functional area distribution map of the chip to be tested; Determining a fault injection scanning mode based on a fault protection type of an object to be fault-injected in the functional area distribution map; A fault injection scan is performed based on the fault injection scan method, and key physical location points are determined based on the scan results.

2. The fault injection method according to claim 1, characterized in that: The performing signal processing on the energy curve to filter out the execution operation time interval of the chip under test in the energy curve includes: performing noise reduction processing on the energy curve; Amplitude points greater than or equal to a set energy threshold are screened out in the energy curve after noise reduction processing, so as to screen out the execution operation time interval of the chip under test in the energy curve.

3. The fault injection method according to claim 2, characterized in that: The performing noise reduction processing on the energy curve includes: Perform any one of filtering, moving average processing, and Fourier transform noise reduction processing on the energy curve.

4. The fault injection method according to claim 1, wherein: The calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes: Calculating a first Pearson correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Pearson correlation coefficient within the execution operation time interval as an input data time point; Calculating a second Pearson correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point; A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

5. The fault injection method according to claim 1, characterized in that: The calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes: Calculating a first Spearman correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Spearman correlation coefficient within the execution operation time interval as an input data time point; Calculating a second Spearman correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point; A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

6. The fault injection method according to claim 1, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is no fault protection, the fault injection scanning mode is determined to be point-by-point fault injection.

7. The fault injection method according to claim 1, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is spatial randomization protection, the fault injection scanning mode is determined to be random point fault injection.

8. The fault injection method according to claim 1, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is a distributed sensor detection circuit, the fault injection scanning mode is determined to be arbitrary shape fault injection.

9. A fault injection device, characterized in that: include: The first acquisition module is used to obtain the energy curve of the chip under test when it is working; a signal processing module, configured to perform signal processing on the energy curve to filter out a time interval during which the chip under test performs calculations in the energy curve; a correlation analysis module, configured to calculate a key time point in the execution operation time interval based on a correlation between input data of the chip under test and the energy curve, and a correlation between output data of the chip under test and the energy curve; The second acquisition module is used to obtain a functional area distribution map of the chip to be tested; A scanning mode determination module, configured to determine a fault injection scanning mode based on the fault protection type of the object to be fault injected in the functional area distribution map; The location point determination module is used to perform a fault injection scan based on the fault injection scanning method and determine key physical location points based on the scanning results.

10. The fault injection device according to claim 9, characterized in that: The performing signal processing on the energy curve to filter out the execution operation time interval of the chip under test in the energy curve includes: performing noise reduction processing on the energy curve; Amplitude points greater than or equal to a set energy threshold are screened out in the energy curve after noise reduction processing, so as to screen out the execution operation time interval of the chip under test in the energy curve.

11. The fault injection device according to claim 9, characterized in that: The calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes: Calculating a first Pearson correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Pearson correlation coefficient within the execution operation time interval as an input data time point; Calculating a second Pearson correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Pearson correlation coefficient within the execution operation time interval as the output data time point; A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

12. The fault injection device according to claim 9, characterized in that: The calculating of the key time points in the execution operation time interval based on the correlation between the input data of the chip under test and the energy curve, and the correlation between the output data of the chip under test and the energy curve, includes: Calculating a first Spearman correlation coefficient between the input data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the first Spearman correlation coefficient within the execution operation time interval as an input data time point; Calculating a second Spearman correlation coefficient between the output data of the chip under test and the energy curve within the execution operation time interval, and determining a peak point time of the second Spearman correlation coefficient within the execution operation time interval as the output data time point; A time point between the input data time point and the output data time point is determined as a key time point in the operation execution time interval.

13. The fault injection device according to claim 9, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is no fault protection, the fault injection scanning mode is determined to be point-by-point fault injection.

14. The fault injection device according to claim 9, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is spatial randomization protection, the fault injection scanning mode is determined to be random point fault injection.

15. The fault injection device according to claim 9, characterized in that: The determining of the fault injection scanning mode based on the fault protection type of the object to be fault-injected in the functional area distribution map includes: When the fault protection type of the object to be fault-injected in the functional area distribution map is a distributed sensor detection circuit, the fault injection scanning mode is determined to be arbitrary shape fault injection.

16. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the fault injection method according to any one of claims 1 to 8 is implemented.

17. A fault injection system, characterized in that: It comprises the electronic device according to claim 16, a signal acquisition device for acquiring an energy curve of the chip to be tested when it is working, and an image imaging device for identifying the functional areas of the layout of the chip to be tested to form a functional area distribution map; the signal acquisition device is also used to send the energy curve to the electronic device, and the image imaging device is also used to send the functional area distribution map to the electronic device.

18. A machine-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the fault injection method according to any one of claims 1 to 8 is implemented.

19. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the fault injection method according to any one of claims 1 to 8 is implemented.

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