Gate Commutated Thyristor Unit, Preparation Method Thereof, and Semiconductor Device

Abstract

The present disclosure relates to a gate commutated thyristor unit, a preparation method thereof, and a semiconductor device, including: an anode region, a buffer region, a first initial base region, a second initial base region, and a cathode region arranged in sequence from the anode metal to the cathode metal; a first doped base region and a second doped base region, respectively located on both sides of the top of the second initial base region; a first gate metal, at least partially located in the trench of the first doped base region; a second gate metal, at least partially located in the trench of the second doped base region, wherein the anode region, the base region, the first doped base region, and the second doped base region have the same conductivity type, the first initial base region and the cathode region have the same conductivity type and are different from the conductivity type of the anode region; the ion concentrations in the first doped base region and the second doped base region are greater than the ion concentration in the second initial base region. It can at least effectively reduce the risk of dynamic avalanche retriggering during the turn-off process of the gate commutated thyristor unit and improve the turn-off ability of the IGCT chip.

Description

Technical Field

[0001] The present disclosure relates to the field of integrated circuit manufacturing technologies, and particularly to a gate commutated thyristor unit, a preparation method thereof, and a semiconductor device. Background Art

[0002] An integrated gate commutated thyristor unit (IGCT) is a new type of power semiconductor device used in high-capacity power electronic devices. It was first in 1957 that the General Electric Company of the United States invented the first thyristor (Silicon Controlled Rectifier, SCR; also known as Thyristor) for industrial power conversion and control. By applying a certain positive voltage between the gate and the cathode, the device can be turned on. The thyristor can control a larger power with a small current, marking the entry of the transformation, transmission, and application of electrical energy into a new era of technological development. Power electronic conversion devices began to be widely used in various fields such as industry, transportation, and energy, realizing the control of low voltage over high voltage and achieving the purpose of controlling high-power electrical energy. The power electronics technology has developed rapidly, and thyristors with a rating of 4 kA / 8 kV have entered mass production at the beginning of this century.

[0003] In order to overcome the weakness that the thyristor cannot be turned off through the gate, the gate turn-off thyristor (GTO) was introduced in 1960. Through structural and technological optimizations such as gate-wrapped discrete cathode parallel connection and reduction of the saturation depth during conduction, gate turn-off control was achieved, greatly simplifying the complex supporting circuit and improving the reliability. However, due to the large gate drive power, complex drive circuit of the GTO, and the non-uniformity of the current in the turn-off device, a large buffer circuit is required, and these disadvantages limit the application of the GTO.

[0004] Integrated Gate-Commutated Thyristor (IGCT) is a device that integrates an improved GTO chip with a gate drive circuit. Essentially belonging to the thyristor class of devices, it has a strong conductance modulation effect during conduction to ensure low on-state voltage drop and high current-carrying capacity. At the same time, due to the introduction of a transparent anode, a field-stop layer, and hard drive technology, it has fast and reliable switching characteristics and can be used without a snubber circuit during application. The design concept of IGCT was first proposed by Swiss ABB in 1996, then called the hard-driven transparent anode GTO (HD-GTO), and officially named IGCT in 1997. Compared with Insulated Gate Bipolar Transistor (IGBT), IGCT has a lower switching frequency (<1kHz), but has advantages such as higher voltage withstand, larger current-carrying capacity, lower on-state voltage drop, higher reliability, and lower manufacturing cost. In fact, compared with AC grid applications, key equipment such as medium-voltage and high-capacity AC-DC converters, DC transformers, and DC circuit breakers in DC grids have many new characteristics. For example, the switching frequency of modular multilevel AC-DC converters is very low, the dual-active full-bridge DC transformer has soft-switching capabilities, and the DC circuit breaker only requires a single operation. These characteristics largely circumvent the disadvantage of the relatively low operating frequency of IGCT and bring opportunities for the application of IGCT in DC grids.

[0005] Although IGCT has excellent performance, in practical applications, many factors restrict the further expansion of the Safe Operating Area (SOA) of IGCT, and the reliability of IGCT still needs to be improved. Especially during the turn-off process of IGCT, turn-off failures or even device damage often occur. When IGCT turns off under high voltage and large current conditions, due to the influence of excess carriers in the base region, the device is prone to dynamic avalanche at a voltage much lower than the static blocking voltage, resulting in device turn-off failure or even irreversible electrothermal breakdown.

[0006] In 2013, a research paper published by ABB pointed out two main failure mechanisms during the turn-off of IGCTs: when the DC-side voltage is low, hard drive failure is the main failure mechanism; when the DC-side voltage is high, dynamic avalanche is the main failure mechanism. The paper conducted in-depth research on the previously established 3D simulation model of IGCTs and elaborated on the failure mechanism of IGCTs. It was pointed out that in the initial stage of turn-off, the mobile charges in the region below the cathode of the IGCT are rapidly depleted, and the injection is interrupted. In the next stage of turn-off, the depletion of excess carriers penetrates deep into the P-base and N-base regions, and the dynamic avalanche maintains the concentration of free carriers at a high level. The carrier density below the cathode is greater, which leads to the conduction current being concentrated near it. This increased lateral current density strongly increases the quasi-Fermi potential difference between the cathode and the middle of the P-base region junction. At the beginning of the fault, the flowing current becomes large enough to locally compensate for the barrier of this junction and cause the thyristor to trigger again, which fills the nearby area with plasma, the depletion layer completely collapses, and this highly conductive region takes over the entire load current, resulting in the final failure of the device.

[0007] For the hard drive failure mechanism during the turn-off of IGCTs, the main reason is that the operating principle of IGCTs requires the gate drive unit to commutate all the anode current to the gate unit in a very short time. Therefore, the requirements for the inductance and impedance of the IGCT gate drive circuit are very high, that is, the gate resistance R G and the parasitic inductance L G must be very small to ensure the hard drive operation of IGCTs.

[0008] For the dynamic avalanche failure mechanism during the turn-off of IGCTs, currently, mainly through optimized structures such as the corrugated P-base structure, strip reinforcement structure, and gate carrier extraction enhancement structure, etc., to reduce the risk of cathode re-triggering caused by the dynamic avalanche of IGCTs and improve the turn-off ability of IGCT devices.

[0009] In 2007, ABB first proposed the concept of the corrugated P-base IGCT. As Figure 1 shown, the test results show that the corrugated P-base IGCT can effectively improve the current turn-off ability of the device, especially at room temperature. At 25°C, the current turn-off ability of the corrugated P-base IGCT is increased from 5 kA to 7.2 kA; however, at 125°C, the improvement in the current turn-off ability of the corrugated P-base IGCT is not obvious, increasing from 6 kA to about 6.7 kA.

[0010] In 2013, researchers from the University of Cambridge in the UK and ABB compared the traditional structure IGCT ( Figure 2 the structure in (b) in Figure 2The turn-off ability of the (a) structure was studied, and the reason for the excellent turn-off ability of the wavy P-base IGCT structure was analyzed. This is because the lateral electric field component in the wavy P-base IGCT design deflects the hole current towards the gate metal contact point, preventing holes from reaching near the cathode junction. This more preferred current path can prevent the dynamic avalanche current from triggering the current gain mechanism of the transistor-transistor.

[0011] In 2014, ABB proposed a stripe fortified GCT (StriPe Fortified GCT) structure for IGCT chips. The design concept of this structure is to make the P-base region lightly doped to achieve a high gate-cathode breakdown voltage, while the P+ buried layer set inside the P-base region aims to restore the lateral resistance of this region to reduce the thyristor latching risk during device turn-off and improve the current turn-off ability of the device. Three stripe enhancement structures were designed in this paper, namely the structure under the gate, the structure under the cathode, and the structure covering the entire cell. The simulation results show that the structure covering the entire cell has the strongest current turn-off ability, and there is an optimal value (30 μm) for the distance between the P+ region and the chip surface. The maximum current turn-off ability can be increased from 4000 A to 5200 A.

[0012] In 2015, Tsinghua University proposed a double P-base gate-cathode structure (patent number CN105590959B) to improve the current turn-off ability of IGCTs. As Figure 3 shown, the P-base region 2 of this patented structure uses the epitaxial method, and the concentration can be set lower than that of the P-base region to increase the gate-cathode breakdown voltage and the commutation speed. The P+ short base region will not affect the gate-cathode breakdown voltage, and the peak concentration of the P+ short base region can be increased to form a low-resistance channel for current transfer to achieve fast commutation. The design concept of this patent is similar to the stripe fortified IGCT structure proposed by ABB.

[0013] In addition, CRRC proposed a carrier extraction enhancement technology (CEET) for the gate in 2016. As Figure 4 shown, it mainly optimizes the doping concentration distribution of the P-base region under the gate, making the doping concentration of the P2+ base region greater than that of the P1+ base region to form a lateral barrier. During the turn-off process, the high-concentration P2+ base region quickly extracts carriers to the gate, thereby improving the turn-off ability of the gate-commutated thyristor unit. In a specific embodiment, the width of the P2+ base region can increase with the distance between the cathode comb and the gate ring.

[0014] In the traditional IGCT chip design, the ion doping concentration distribution of the second initial base region (P base region) under the gate metal is optimized to improve the turn-off ability of the gate-commutated thyristor unit. However, since the increase in the ion doping concentration in the entire P base region is limited, the improvement in the maximum current turn-off ability of the gate-commutated thyristor unit is also small, and there is a large risk of dynamic avalanche re-triggering during the turn-off process. Summary of the Invention

[0015] Based on this, in view of the above technical problems, it is necessary to provide a gate-commutated thyristor unit, a preparation method thereof, and a semiconductor device, which can at least effectively reduce the risk of dynamic avalanche re-triggering during the turn-off process of the gate-commutated thyristor unit and improve the turn-off ability of the IGCT chip.

[0016] To achieve the above and other objects, in a first aspect, the present disclosure provides a gate-commutated thyristor unit, including: an anode region, a first initial base region, a second initial base region, and a cathode region arranged in sequence from the anode metal to the cathode metal; a first doped base region and a second doped base region, respectively located on both sides of the top of the second initial base region; a first gate metal, at least partially located in the trench of the first doped base region; a second gate metal, at least partially located in the trench of the second doped base region, wherein the anode region, the second initial base region, the first doped base region, and the second doped base region have the same conductivity type, the first initial base region and the cathode region have the same conductivity type and are different from the conductivity type of the anode region; the ion concentrations in the first doped base region and the second doped base region are greater than the ion concentration in the second initial base region.

[0017] In the gate-commutated thyristor unit in the above embodiment, by providing a first doped base region and a second doped base region with ion concentrations greater than that of the second initial base region on both sides of the top of the second initial base region, and making the first gate metal at least partially located in the trench of the first doped base region and the second gate metal at least partially located in the trench of the second doped base region, since the ion concentrations of the first doped base region and the second doped base region in contact with the first gate metal and the second gate metal are enhanced, the path for the carriers generated by the dynamic avalanche under the IGCT cathode to flow to the contact of the first gate metal and / or the second gate metal is shortened. At the same time, the high-concentration ion doping is beneficial to reducing the sheet resistance of the second initial base region near the gate, effectively reducing the risk of dynamic avalanche re-triggering during the turn-off process of the IGCT, and improving the turn-off ability of the IGCT.

[0018] In addition, the first gate metal and the second gate metal are at least partially located in the trenches of the first doped base region and the second doped base region, which can increase the height difference between the cathode metal and the gate metal in the gate-commutated thyristor unit, facilitating the press-packaging of the gate-commutated thyristor unit.

[0019] In one embodiment, the thickness of the first gate metal is greater than the depth of the trench in the first doped base region, and the thickness of the second gate metal is greater than the depth of the trench in the second doped base region. By restricting the depth of the trenches in the first doped base region and the second doped base region, a large stress generated in the gate commutated thyristor cell is avoided. At the same time, it is ensured that the first gate metal and the second gate metal completely cover the trenches in the first doped base region and the second doped base region.

[0020] In one embodiment, the depth of the trench in the first doped base region and the depth of the trench in the second doped base region both range from 0.5 μm to 6 μm, and the junction depth of the first doped base region and the second doped base region ranges from 5 μm to 20 μm. By restricting the range of the trench depth and the junction depth, it is more conducive to avoiding a large stress generated in the gate commutated thyristor cell.

[0021] In one embodiment, the peak doping concentration of the first doped base region and the second doped base region is. By restricting the doping concentration of the first doped base region and the second doped base region, the influence on the performance of the gate-cathode breakdown voltage, on-state voltage drop, parasitic capacitance, and stability of the IGCT caused by too high ion doping concentration in the first doped base region and the second doped base region is avoided.

[0022] In one embodiment, the second initial base region includes a first sub-initial base region and a second sub-initial base region. The first sub-initial base region is located on top of the second sub-initial base region, and the ion concentration in the first initial base region is greater than the ion concentration in the second initial base region.

[0023] In one embodiment, the second initial base region includes a planar junction or a wavy junction. By providing the second initial base region with a wavy junction, the turn-off performance of the gate commutated thyristor cell is further improved.

[0024] In one embodiment, the thickness of the first gate metal and the thickness of the second gate metal both range from 8 μm to 15 μm. By setting the thickness range of the first gate metal and the second gate metal, it is ensured that the first gate metal and the second gate metal are at least partially located in the trenches of the first doped base region and the second doped base region. At the same time, the height difference between the cathode metal and the gate metal in the gate commutated thyristor cell can be ensured, which is more conducive to the press-pack packaging of the gate commutated thyristor cell.

[0025] In a second aspect, the embodiments of the present disclosure further provide a semiconductor device, including: the gate commutated thyristor cell in any of the above embodiments, which can effectively reduce the risk of dynamic avalanche re-triggering during the turn-off process of the IGCT and improve the turn-off ability of the IGCT.

[0026] In a third aspect, the disclosed embodiments of the present application also provide an electronic device, including: the gate-commutated thyristor unit in any of the above embodiments; or the above semiconductor device, which can effectively reduce the risk of dynamic avalanche retriggering during the turn-off process of the IGCT and improve the turn-off ability of the IGCT.

[0027] In a fourth aspect, the disclosed embodiments of the present application also provide a method for manufacturing a gate-commutated thyristor unit, including: forming an anode region, a first initial base region, a second initial base region, and a cathode region in sequence from the anode metal to the cathode metal; forming a first gate metal and a second gate metal in the trenches of the first doped base region and the second doped base region respectively; wherein, the anode region, the second initial base region, the first doped base region, and the second doped base region have the same conductivity type, the first initial base region and the cathode region have the same conductivity type and are different from the conductivity type of the anode region; forming trenches on both sides of the top of the second initial base region; forming a first doped base region and a second doped base region at the joints of the trenches on both sides of the top of the second initial base region and the second initial base region respectively, and the ion concentration in the first doped base region and the second doped base region is greater than that of the second initial base region.

[0028] In the method for manufacturing the gate-commutated thyristor unit in the above embodiments, by forming a first doped base region and a second doped base region with an ion concentration greater than that of the second initial base region on both sides of the top of the second initial base region, and making the first gate metal at least partially formed in the trench of the first doped base region and the second gate metal at least partially formed in the trench of the second doped base region, since the ion concentrations of the first doped base region and the second doped base region in contact with the first gate metal and the second gate metal are enhanced, the path for the carriers generated by dynamic avalanche under the cathode of the IGCT to flow to the contact of the first gate metal and / or the second gate metal is shortened. At the same time, the high-concentration ion doping is beneficial to reducing the sheet resistance of the second initial base region near the gate, effectively reducing the risk of dynamic avalanche retriggering during the turn-off process of the IGCT and improving the turn-off ability of the IGCT.

[0029] In addition, the first gate metal and the second gate metal are at least partially located in the trenches of the first doped base region and the second doped base region, which can increase the height difference between the cathode metal and the gate metal in the gate-commutated thyristor unit and is beneficial to the press-packaging of the gate-commutated thyristor unit.

[0030] In one of the embodiments, forming trenches on both sides of the top of the second initial base region includes: forming a mask layer on the second initial base region, the mask layer including a first opening pattern and a second opening pattern located on both sides; etching and removing a target thickness of the second initial base region within the first opening pattern and the second opening pattern to form trenches on both sides of the top of the second initial base region respectively.

[0031] In the method for fabricating a gate-commutated thyristor unit of the above embodiment, a mask layer is formed on the second initial base region, and trenches are formed on the second initial base region through etching based on a mask plate, providing a basic structure for subsequent ion implantation.

[0032] In one embodiment, a dry etching process is used to etch and remove a target thickness of the second initial base region within the first opening pattern and the second opening pattern.

[0033] In the method for fabricating a gate-commutated thyristor unit of the above embodiment, by using a dry etching process, it is beneficial to optimize the trench morphology and reduce the etching deviation.

[0034] In one embodiment, a first doped base region and a second doped base region are respectively formed at the connections of the trenches on both sides of the top of the second initial base region to the second initial base region, including: performing high-concentration doping ion implantation on the connections of the trenches on both sides of the top of the second initial base region to the second initial base region based on the mask layer formed on the second initial base region; adopting an annealing process to respectively form a first doped base region and a second doped base region at the connections of the trenches on both sides of the top of the second initial base region to the second initial base region.

[0035] In the method for fabricating a gate-commutated thyristor unit of the above embodiment, the first doped base region and the second doped base region formed after high-concentration doping ion implantation and annealing using the mask layer of trench etching reduce the consumption of the mask layer and can rapidly and stably form the first doped base region and the second doped base region. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0037] Figure 1 It is a cross-sectional schematic diagram of a first existing gate-commutated thyristor unit;

[0038] Figure 2 It is a cross-sectional schematic diagram of a second existing gate-commutated thyristor unit;

[0039] Figure 3 It is a cross-sectional schematic diagram of a third existing gate-commutated thyristor unit;

[0040] Figure 4 It is a cross-sectional schematic diagram of a fourth existing gate-commutated thyristor unit;

[0041] Figure 5It is a flowchart of a method for fabricating a gate-commutated thyristor unit provided in an embodiment of the present application;

[0042] Figure 6 It is a schematic cross-sectional view of a fifth existing gate-commutated thyristor unit;

[0043] Figure 7 It is a schematic cross-sectional view of a gate-commutated thyristor unit provided in an embodiment of the present application;

[0044] Figure 8 It is a schematic cross-sectional view of a gate-commutated thyristor unit provided in another embodiment of the present application;

[0045] Figure 9 It is a comparison diagram of the cathode current during the turn-off process of the gate-commutated thyristor unit of the present application and the cathode current during the turn-off process of a traditional gate-commutated thyristor unit;

[0046] Figure 10 It is a comparison diagram of the current distribution at the turn-off moment of the gate-commutated thyristor unit of the present application and the current distribution at the turn-off moment of a traditional gate-commutated thyristor unit;

[0047] Figure 11 It is a comparison diagram of the potential distribution at the turn-off moment of the gate-commutated thyristor unit of the present application and the potential distribution at the turn-off moment of a traditional gate-commutated thyristor unit.

[0048] Explanation of reference numerals:

[0049] 701, First initial base region; 702, Third doping region; 703, Anode region; 704, Second sub-initial base region; 705, First sub-initial base region; 707, Cathode region; 708, First gate metal; 709, Cathode metal; 710, Anode metal; 711, Second gate metal; 801, First doped base region; 802, Second doped base region; 901, Wavy junction P base region. Detailed implementation manners

[0050] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present disclosure more thorough and comprehensive.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present disclosure belongs. The terms used in the description of the present disclosure herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0052] It should be understood that when an element or layer is referred to as being “on,” “adjacent to,” “connected to,” or “coupled to” another element or layer, it can be directly on, adjacent to, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,” “directly adjacent to,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Thus, without departing from the teachings of the present disclosure, the first element, component, region, layer, doping type, or portion discussed below may be denoted as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, e.g., the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0053] Spatial relationship terms such as “under,” “below,” “beneath,” “underneath,” “above,” “over,” etc. may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms also encompass different orientations of the device in use and operation. For example, if the device in the figures is flipped, an element or feature described as “under” or “beneath” or “underneath” another element or feature will be oriented “over” the other element or feature. Thus, the exemplary terms “under” and “beneath” can include both an upper and a lower orientation. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0054] As used herein, the singular forms “a,” “an,” and “the” may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that when the terms “comprises” and / or “comprising” are used in this specification, the presence of features, integers, steps, operations, elements, and / or components can be ascertained, but one or more other features, integers, steps, operations, elements, components, and / or groups are not precluded from the presence or addition. Also, as used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0055] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the present disclosure, so that variations in the shapes shown can be expected due to, for example, manufacturing techniques and / or tolerances. Accordingly, embodiments of the present disclosure should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing techniques. For example, an implantation region shown as rectangular typically has rounded or curved features and / or an implantation concentration gradient at its edges, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which the implantation occurs. Thus, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of the regions of the device and do not limit the scope of the present disclosure.

[0056] Referring to Figure 7 , in some embodiments, a gate-commutated thyristor unit is provided, including an anode region 703, a first initial base region 701, a second initial base region, and a cathode region 707 arranged in sequence from an anode metal 710 to a cathode metal 709; a first doped base region 801 and a second doped base region 802 respectively located on two sides of the top of the second initial base region; a first gate metal 708 at least partially located in a trench of the first doped base region 801; and a second gate metal 711 at least partially located in a trench of the second doped base region 802.

[0057] Among them, the anode region 703, the second initial base region, the first doped base region 801, and the second doped base region 802 have the same conductivity type, the first initial base region 701 and the cathode region 707 have the same conductivity type and are different from the conductivity type of the anode region 703; the ion concentrations in the first doped base region 801 and the second doped base region 802 are greater than the ion concentration of the second initial base region.

[0058] In some embodiments, a third doped region 702 is formed between the anode region 703 and the first initial base region 701.

[0059] The gate-commutated thyristor unit proposed in this application can be applied to various GCT devices such as reverse-blocking type, asymmetric, and reverse-conducting type.

[0060] As an example, the anode region 703 can be a P+ anode region 703, the third doped region 702 can be an N-type buffer region, the first initial base region 701 can be an N base region, the second initial base region includes a second sub-initial base region 704 and a first sub-initial base region 705, the first sub-initial base region 705 is located on top of the second sub-initial base region 704, the cathode region 707 can be an N+ cathode region 707, and the first doped base region 801 and the second doped base region 802 can be P++ base regions.

[0061] As an example, the anode region 703 can be a P+ anode region 703, the third doped region 702 can be a P-type anode region, the first initial base region 701 can be an N base region, the second initial base region includes a second sub-initial base region 704 and a first sub-initial base region 705, the first sub-initial base region 705 is located on top of the second sub-initial base region 704, the cathode region 707 can be an N+ cathode region 707, and the first doped base region 801 and the second doped base region 802 can be P++ base regions.

[0062] As an example, the first sub-initial base region can be a P+ base region, the second initial base region can be a P base region, and the doping element of the first doped base region 801 and the second doped base region 802 can be boron.

[0063] Please refer to Figure 6 - Figure 7 , compared with the existing gate-commutated thyristor unit, in the present application, by arranging the first doped base region 801 and the second doped base region 802 with an ion concentration greater than that of the second initial base region on both sides of the top of the second initial base region, and making the first gate metal 708 at least partially located in the trench of the first doped base region 801 and the second gate metal 711 at least partially located in the trench of the second doped base region 802, since the ion concentrations of the first doped base region 801 and the second doped base region 802 in contact with the first gate metal 708 and the second gate metal 711 are enhanced, the path for the carriers generated by the dynamic avalanche under the IGCT cathode to flow to the contact of the first gate metal 708 and / or the second gate metal 711 is shortened. At the same time, the high-concentration ion doping is beneficial to reducing the sheet resistance of the second initial base region near the gate, effectively reducing the risk of dynamic avalanche re-triggering during the turn-off process of the IGCT, and improving the turn-off ability of the IGCT.

[0064] In addition, the first gate metal 708 and the second gate metal 711 are at least partially located in the trenches of the first doped base region 801 and the second doped base region 802, which can increase the height difference between the cathode metal 709 and the gate metal in the gate-commutated thyristor unit, facilitating the press-pack packaging of the gate-commutated thyristor unit.

[0065] As an example, please continue to refer to Figure 7 , the thickness of the first gate metal 708 is greater than the depth of the trench of the first doped base region 801, and the thickness of the second gate metal 711 is greater than the depth of the trench of the second doped base region 802. By restricting the depth of the trenches of the first doped base region 801 and the second doped base region 802, a large stress in the gate-commutated thyristor unit is avoided. At the same time, the complete coverage of the trenches of the first doped base region 801 and the second doped base region 802 by the first gate metal 708 and the second gate metal 711 is ensured.

[0066] In some embodiments, the depth of the trench in the first doped base region 801 and the depth of the trench in the second doped base region 802 both range from 0.5 μm to 6 μm, and the junction depth of the first doped base region 801 and the second doped base region 802 ranges from 5 μm to 20 μm. By restricting the trench depth and the junction depth range, it is more beneficial to avoid large stress in the gate commutated thyristor unit.

[0067] In some embodiments, the peak doping concentration of the first doped base region 801 and the second doped base region 802 is , by restricting the doping concentration of the first doped base region 801 and the second doped base region 802, it is avoided that the too high ion doping concentration in the first doped base region 801 and the second doped base region 802 affects the performance of the IGCT such as the gate-cathode breakdown voltage, conduction voltage drop, parasitic capacitance and stability.

[0068] In some embodiments, the thickness of the first gate metal 708 and the thickness of the second gate metal 711 both range from 8 μm to 15 μm. By setting the thickness range of the first gate metal 708 and the second gate metal 711, it is ensured that the first gate metal 708 and the second gate metal 711 are at least partially located in the trenches of the first doped base region 801 and the second doped base region 802. At the same time, the height difference between the cathode metal 709 and the gate metal in the gate commutated thyristor unit can be ensured, which is more beneficial to the press-pack packaging of the gate commutated thyristor unit.

[0069] In some embodiments, please refer to Figure 8 , the second initial base region includes a first sub-initial base region and a second sub-initial base region. The first sub-initial base region is located on top of the second sub-initial base region. The ion concentration in the first initial base region 701 is greater than the ion concentration in the second initial base region, where the second initial base region includes a wavy junction. By setting the second initial base region with a wavy junction, the turn-off performance of the gate commutated thyristor unit is further improved.

[0070] Wherein, the second initial base region includes a planar junction or a wavy junction.

[0071] In some embodiments, please refer to Figure 8 , the second initial base region with a wavy junction includes a first sub-initial base region 705 and a wavy junction P base region 901.

[0072] As an example, the anode region 703 can be a P+ anode region 703, the third doped region 702 can be an N-type buffer region, the first initial base region 701 can be an N base region, the second initial base region includes a wavy junction P base region 901 and a first sub-initial base region 705. The first sub-initial base region 705 is located on top of the wavy junction P base region 901. The cathode region 707 can be an N+ cathode region 707, and the first doped base region 801 and the second doped base region 802 can be P++ base regions.

[0073] As an example, the anode region 703 can be a P+ anode region 703, the third doping region 702 can be a P-type anode region, the first initial base region 701 can be an N base region, the second initial base region includes a wavy junction P base region 901 and a first sub-initial base region 705, the first sub-initial base region 705 is located on top of the wavy junction P base region 901, the cathode region 707 can be an N+ cathode region 707, and the first doping base region 801 and the second doping base region 802 can be P++ base regions.

[0074] Please refer to Figure 5 , in some embodiments, a method for fabricating a gate-commutated thyristor unit is provided, including:

[0075] S1. Form the anode region 703, the first initial base region 701, the second initial base region, and the cathode region 707 in sequence from the anode metal 710 to the cathode metal 709.

[0076] S2. Form trenches on both sides of the top of the second initial base region.

[0077] S3. Form the first doping base region 801 and the second doping base region 802 below the trenches on both sides of the top of the second initial base region.

[0078] Wherein, the ion concentrations in the first doping base region 801 and the second doping base region 802 are greater than the ion concentration of the second initial base region.

[0079] S4. Form the first gate metal 708 and the second gate metal 711 in the trenches of the first doping base region 801 and the trenches of the second doping base region 802 respectively.

[0080] Wherein, the anode region 703, the second initial base region, the first doping base region 801, and the second doping base region 802 have the same conduction type, the first initial base region 701 and the cathode region 707 have the same conduction type and are different from the conduction type of the anode region 703; the ion concentrations in the first doping base region 801 and the second doping base region 802 are greater than the ion concentration of the second initial base region.

[0081] In some embodiments, a third doping region 702 is formed between the anode region 703 and the first initial base region 701.

[0082] The method for fabricating a gate-commutated thyristor unit proposed in this application can be applied to various GCT devices such as reverse-blocking type, asymmetric, and reverse-conducting type.

[0083] As an example, the third doping region 702 can be an N-type buffer region or a P-type anode region, the first initial base region 701 can be an N-base region, the second initial base region includes a second sub-initial base region 704 and a first sub-initial base region 705, the first sub-initial base region 705 is located on top of the second sub-initial base region 704, the cathode region 707 can be an N+ cathode region 707, and the first doped base region 801 and the second doped base region 802 can be P++ base regions.

[0084] In the method for preparing the gate-commutated thyristor unit in the above embodiment, by forming the first doped base region 801 and the second doped base region 802 with an ion concentration greater than that of the second initial base region on both sides of the top of the second initial base region, and making the first gate metal 708 at least partially formed in the trench of the first doped base region 801 and the second gate metal 711 at least partially formed in the trench of the second doped base region 802, since the ion concentrations of the first doped base region 801 and the second doped base region 802 in contact with the first gate metal 708 and the second gate metal 711 are enhanced, the path for the carriers generated by dynamic avalanche under the IGCT cathode to flow to the contact of the first gate metal 708 and / or the second gate metal 711 is shortened. At the same time, the high-concentration ion doping is beneficial to reducing the sheet resistance of the second initial base region near the gate, effectively reducing the risk of dynamic avalanche retriggering during the turn-off process of the IGCT, and improving the turn-off ability of the IGCT.

[0085] In addition, the first gate metal 708 and the second gate metal 711 are at least partially located in the trenches of the first doped base region 801 and the second doped base region 802, which can increase the height difference between the cathode metal 709 and the gate metal in the gate-commutated thyristor unit, facilitating the press-packaging of the gate-commutated thyristor unit.

[0086] In some embodiments, trenches are respectively formed on both sides of the top of the second initial base region, including: forming a mask layer on the second initial base region, the mask layer including a first opening pattern and a second opening pattern located on both sides; etching and removing a target thickness of the second initial base region within the first opening pattern and the second opening pattern to respectively form trenches on both sides of the top of the second initial base region. By forming a mask layer on the second initial base region and etching based on the mask plate to form trenches on the second initial base region, a basic structure is provided for subsequent ion implantation.

[0087] In some embodiments, a dry etching process is used to etch and remove a target thickness of the second initial base region within the first opening pattern and the second opening pattern. This is beneficial to optimizing the trench morphology and reducing the etching deviation.

[0088] Here, by controlling the groove depth, the thickness of the first gate metal 708 is made greater than the depth of the groove in the first doped base region 801, and the thickness of the second gate metal 711 is made greater than the depth of the groove in the second doped base region 802, avoiding large stress in the gate commutated thyristor unit. At the same time, it ensures that the first gate metal 708 and the second gate metal 711 completely cover the grooves in the first doped base region 801 and the second doped base region 802.

[0089] As an example, the peak doping concentration of the first doped base region 801 and the second doped base region 802 is . By restricting the doping concentration of the first doped base region 801 and the second doped base region 802, it is avoided that the too high ion doping concentration in the first doped base region 801 and the second doped base region 802 affects the performance of the IGCT such as the gate-cathode breakdown voltage, on-state voltage drop, parasitic capacitance and stability.

[0090] As an example, the depth range of the groove in the first doped base region 801 and the depth range of the groove in the second doped base region 802 are both 0.5 μm to 6 μm, and the junction depth range of the first doped base region 801 and the second doped base region 802 is 5 μm to 20 μm. By restricting the groove depth and the junction depth range, it is more beneficial to avoid large stress in the gate commutated thyristor unit.

[0091] As an example, the thickness range of the first gate metal 708 and the thickness range of the second gate metal 711 are both 8 μm to 15 μm. By setting the thickness range of the first gate metal 708 and the second gate metal 711, it is ensured that the first gate metal 708 and the second gate metal 711 are at least partially located in the grooves of the first doped base region 801 and the second doped base region 802. At the same time, it can ensure the height difference between the cathode metal 709 and the gate metal in the gate commutated thyristor unit, which is more beneficial to the press-pack packaging of the gate commutated thyristor unit.

[0092] In some embodiments, the first doped base region and the second doped base region are respectively formed at the joints of the two side grooves at the top of the second initial base region and the second initial base region, including: based on the mask layer formed on the second initial base region, performing high-concentration doping ion implantation on the joints of the two side grooves at the top of the second initial base region and the second initial base region; adopting an annealing process to respectively form the first doped base region 801 and the second doped base region 802 at the joints of the two side grooves at the top of the second initial base region and the second initial base region. By using the mask layer for groove etching to perform high-concentration doping ion implantation, annealing and junction pushing to form the first doped base region 801 and the second doped base region 802, the consumption of the mask layer is reduced, and the first doped base region 801 and the second doped base region 802 can be formed quickly and stably.

[0093] As an example, a push - junction process can also be adopted after the annealing process to more precisely control the introduction and distribution of doped atoms, thereby achieving precise adjustment of the electrical characteristics of the IGCT.

[0094] As an example, please refer to Figure 9 , Figure 9 which is a comparison diagram of the cathode current during the turn - off process of the gate - commutated thyristor unit of this application and the cathode current during the turn - off process of the traditional gate - commutated thyristor unit. Figure 9 In , the blue line represents the gate - commutated thyristor unit disclosed in this application, with a trench depth of 5 μm, a junction depth of the formed P++ base region of 15 μm, and a peak doping concentration of the P++ base region of , and in the case where both the traditional IGCT chip structure ( Figure 9 the red line in ) and the patented IGCT chip structure adopt the wavy - junction P - base region 901 technology. Since the regions near and far from the gate contact in the IGCT always have slightly different gate impedances, during the current turn - off period, there will be a slight time offset between each IGCT cathode ring, which will lead to a redistribution of the current during the turn - off process. The IGCT cathode ring far from the gate contact is prone to current crowding and thus failure. For the sake of comparison, Figure 9 only shows the cathode current in the traditional IGCT chip and the IGCT chip of this application during the turn - off process. When the cathode - to - gate commutation is completed during the IGCT turn - off process, if the cathode current exceeds 10% of its conduction current, it can be determined as cathode re - trigger failure. From Figure 9 , it can be seen that the cathode current of the traditional structure increases significantly and will experience cathode re - trigger failure prior to the IGCT of this application structure. At time t1, the cathode current of the traditional IGCT reaches 181 A, which is determined as cathode re - trigger turn - off failure, while the cathode current of the IGCT of this application does not increase significantly and turns off normally.

[0095] As an example, please refer to Figure 9 and Figure 10 , Figure 10 which is a comparison diagram of the current distribution at the turn - off moment of the gate - commutated thyristor unit of this application and the current distribution at the turn - off moment of the traditional gate - commutated thyristor unit. From Figure 10 , it can be seen that at time t1 in Figure 9 , Figure 10 in (a) (traditional IGCT), there is an obvious increase in the current density at the cathode center, that is, cathode re - trigger failure, while Figure 10 in (b) (the IGCT structure of this application), no abnormality is found at the cathode center and the current still flows from the cathode to the gate.

[0096] As an example, please refer to Figure 9 and Figure 11 ,Figure 11 This is a comparison diagram of the potential distribution of the gate-commutated thyristor unit of the present application at the turn-off moment and that of the traditional gate-commutated thyristor unit at the turn-off moment. As can be seen from Figure 11 it that, at Figure 9 the t1 moment in Figure 11 (a) (traditional IGCT), the potential below the cathode center reaches 0.7V at this moment, and the PN junction formed by the second sub-initial base region 704 and the N+ cathode region 707 at this position will be forward-biased, which also causes the cathode center to have a re-triggering failure; while Figure 11 in (b) (the IGCT structure of the present application), the potential below the cathode center is still negative (about -9.6V) at this moment, and the PN junction formed by the second sub-initial base region 704 / N+ cathode region 707 at this position is still in the reverse-biased state.

[0097] In some embodiments, the present disclosure also provides a semiconductor device, including: The gate-commutated thyristor unit in any of the above embodiments can effectively reduce the risk of dynamic avalanche re-triggering during the turn-off process of the IGCT and improve the turn-off ability of the IGCT.

[0098] In some embodiments, the present disclosure provides an electronic device, including the gate-commutated thyristor unit in any of the above embodiments; or the semiconductor device described in any one of the embodiments of the present disclosure. The electronic device is, for example but not limited to, a large-capacity power electronic device, a high-voltage direct current transmission system, a power grid stability device, a high-power motor drive system, a renewable energy power generation system, an uninterruptible power supply (UPS) system, an energy storage system, etc.

[0099] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0100] The above embodiments only represent several implementation manners of the present disclosure, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present disclosure, several deformations and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure should be subject to the appended claims.

Claims

1. A gate-commutated thyristor unit, characterized in that: include: An anode region, a first initial base region, a second initial base region, and a cathode region are arranged in sequence from the anode metal to the cathode metal, wherein the second initial base region includes a first sub-initial base region and a second sub-initial base region, the first sub-initial base region is located on top of the second sub-initial base region, and the ion concentration in the first sub-initial base region is greater than the ion concentration in the second sub-initial base region; A first doped base region and a second doped base region are respectively located at two sides of a top of the first initial sub-base region; a first gate metal, at least partially located in the trench of the first doped base region; a second gate metal, at least partially located in the trench of the second doped base region; Among them, the conductivity type of the anode region, the second initial base region, the first doped base region, and the second doped base region is the same, the conductivity type of the first initial base region and the cathode region is the same and different from the conductivity type of the anode region; the ion concentration in the first doped base region and the second doped base region is greater than the ion concentration in the first sub-initial base region, the thickness of the first gate metal is greater than the depth of the trench of the first doped base region, and the thickness of the second gate metal is greater than the depth of the trench of the second doped base region.

2. The gate-commutated thyristor unit according to claim 1, characterized in that: The depth of the trench of the first doped base region and the depth of the trench of the second doped base region are both in the range of 0.5 μm to 6 μm, and the junction depth of the first doped base region and the second doped base region is in the range of 5 μm to 20 μm.

3. The gate-commutated thyristor unit according to claim 1, characterized in that: The peak doping concentrations of the first doped base region and the second doped base region are .

4. The gate-commutated thyristor unit according to claim 1, characterized in that: The second initial base region includes a planar junction or a wavy junction.

5. The gate-commutated thyristor unit according to claim 1, characterized in that: The thickness of the first gate metal and the thickness of the second gate metal are both in the range of 8 μm to 15 μm.

6. A semiconductor device, characterized in that: include: A gate-commutated thyristor unit as claimed in any one of claims 1 to 5.

7. An electronic device, characterized in that: include: The gate-commutated thyristor unit according to any one of claims 1 to 5; or The semiconductor device according to claim 6.

8. A method for preparing a gate-commutated thyristor unit, characterized in that: include: An anode region, a first initial base region, a second initial base region, and a cathode region are sequentially formed from the anode metal to the cathode metal, wherein the second initial base region includes a first sub-initial base region and a second sub-initial base region, wherein the first sub-initial base region is located on top of the second sub-initial base region, and the ion concentration in the first sub-initial base region is greater than the ion concentration in the second sub-initial base region; forming trenches on both sides of the top of the first initial sub-base region; A first doped base region and a second doped base region are formed at the connection between the two side trenches on the top of the first sub-initial base region and the first sub-initial base region, respectively, wherein the ion concentrations in the first doped base region and the second doped base region are greater than the ion concentration in the first sub-initial base region; Forming a first gate metal and a second gate metal in the trench of the first doped base region and in the trench of the second doped base region respectively; Among them, the anode region, the second initial base region, the first doped base region, and the second doped base region have the same conductivity type, the first initial base region and the cathode region have the same conductivity type and are different from the conductivity type of the anode region; the thickness of the first gate metal is greater than the depth of the trench of the first doped base region, and the thickness of the second gate metal is greater than the depth of the trench of the second doped base region.

9. The method for preparing a gate-commutated thyristor unit according to claim 8, characterized in that: Grooves are formed on both sides of the top of the first initial sub-base region, including: forming a mask layer on the first initial base sub-region, wherein the mask layer comprises a first opening pattern and a second opening pattern located on two sides; The first sub-initial base region of target thickness is etched and removed in the first opening pattern and the second opening pattern to form grooves on both sides of the top of the first sub-initial base region respectively.

10. The method for preparing a gate-commutated thyristor unit according to claim 9, characterized in that: A dry etching process is used to etch and remove the first sub-initial base region of a target thickness in the first opening pattern and the second opening pattern.

11. The method for preparing a gate-commutated thyristor unit according to claim 9, characterized in that: A first doped base region and a second doped base region are respectively formed at the connection between the two side trenches on the top of the first sub-initial base region and the first sub-initial base region, including: Based on the mask layer formed on the first sub-initial base region, high-concentration doping ion implantation is performed on the connection between the two side trenches on the top of the first sub-initial base region and the first sub-initial base region; An annealing process is adopted to form a first doped base region and a second doped base region respectively at the connection between the two side trenches on the top of the first sub-initial base region and the first sub-initial base region.

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