Loop interlock diagnostic circuit and detection method of the circuit

Abstract

The present application discloses a loop interlock diagnostic circuit and a detection method for the circuit, wherein the loop interlock diagnostic circuit includes a power module, a constant current source module and a resistance loop module, the input end of the constant current source module is connected to the output end of the power module, the output end is connected to the input end of the resistance loop module, the output end of the resistance loop module is grounded, the resistance loop module includes a first loop, a second loop and a third loop, the power module is used to power the resistance loop module through the constant current source module; and also includes a loop interlock detection module for fault detection and judgment of the loop interlock diagnostic circuit, the input end of the loop interlock detection module is respectively connected to the output end of the first loop and the input end of the second loop, and the output end of the loop interlock detection module is respectively connected to the output end of the second loop and the input end of the third loop. The present application realizes continuous monitoring and fault detection of high-voltage loop interlocks, and improves the accuracy and reliability of detection.

Description

Technical Field

[0001] The present application relates to the field of safety detection of automobile high voltage systems, and in particular to a loop interlock diagnostic circuit and a detection method for the circuit. Background Art

[0002] In the field of electric vehicle technology, the High Voltage Interlock (HVIL) system is a key component to ensure the safety of the high voltage system. On the one hand, the high voltage interlock starts the protective measure of safely disconnecting the high voltage electricity when the high voltage system circuit is disconnected or the integrity is damaged; on the other hand, it is used to confirm the integrity of the entire high voltage system. Therefore, its main function is to monitor the integrity of the high voltage circuit and trigger protective measures when an abnormality is detected. As the voltage level of the electric vehicle battery system increases, the safety risks brought by high voltage also increase. Therefore, the detection of high voltage loop interlock is very important.

[0003] At present, the detection methods of high-voltage loop interlock mainly include DC source solution, PWM solution and constant current source solution. Although these solutions can realize the basic functions of high-voltage loop interlock, they still have many shortcomings in practical application, such as low detection accuracy and limited fault identification ability. For example, Figure 1 The DC source scheme shown and Figure 2 The PWM scheme shown cannot effectively distinguish between a short circuit to ground and an open circuit. Figure 3 The components in the constant current source solution are interdependent. The failure of one component affects the characteristics of the entire circuit, thereby affecting the effectiveness of the circuit and also affecting the accuracy and reliability of the detection.

[0004] Therefore, how to optimize and improve the existing solutions to improve the detection accuracy and reliability of high-voltage loop interlocking has become an important technical issue facing the current high-voltage interlocking system. Summary of the invention

[0005] In order to solve the problem of insufficient diagnostic capability of the loop interlock detection circuit in the prior art, the present application provides a loop interlock diagnostic circuit and a detection method for the circuit, which can reduce power consumption, improve circuit stability, and ensure detection accuracy and reliability.

[0006] In a first aspect, the present application provides a loop interlock diagnostic circuit, which adopts the following technical solution:

[0007] A loop interlock diagnostic circuit comprises a power supply module, a constant current source module and a resistance loop module, wherein the input end of the constant current source module is connected to the output end of the power supply module, the output end is connected to the input end of the resistance loop module, the output end of the resistance loop module is grounded, the resistance loop module comprises a first loop, a second loop and a third loop, and the power supply module is used to supply power to the resistance loop module through the constant current source module;

[0008] It also includes a loop interlock detection module for performing fault detection and judgment on the loop interlock diagnostic circuit, the input end of the loop interlock detection module is respectively connected to the output end of the first loop and the input end of the second loop, and the output end of the loop interlock detection module is respectively connected to the output end of the second loop and the input end of the third loop.

[0009] By adopting the above technical means, a stable current supply is provided to the resistance loop module through the constant current source module; a loop network is formed by multiple loops of the resistance loop to improve the fault tolerance of the circuit and improve the reliability of the entire circuit; and the voltage of each loop is collected and analyzed through the loop interlock detection module to achieve accurate judgment and positioning of the fault, ensuring that timely response protection measures can be taken when the integrity of the high-voltage system is damaged.

[0010] Preferably, the first loop, the second loop and the third loop are connected in series in sequence, the first loop includes a first resistor R1 and a second resistor R2 connected in parallel, the second loop includes a third resistor R3 and a fourth resistor R4 connected in parallel, and the third loop includes a fifth resistor R5 and a sixth resistor R6 connected in parallel.

[0011] By adopting the above-mentioned technical means, multiple fault detection capabilities are provided. This parallel and then series resistor configuration helps to keep the circuit simple while providing sufficient detection points for fault judgment. It can also more accurately detect the voltage changes of each circuit and further improve the accuracy of fault location.

[0012] Preferably, the resistance loop module includes a first voltage acquisition port, a second voltage acquisition port and a third voltage acquisition port, wherein the first voltage acquisition port is located at the input end of the second resistor R2, the second voltage acquisition port and the third voltage acquisition port are arranged on the loop interlock detection module, the second voltage acquisition port is connected to the input end of the loop interlock detection module, and the third voltage acquisition port is connected to the output end of the loop interlock detection module.

[0013] By adopting the above technical means, several voltage acquisition ports are set to respectively acquire the first voltage V1, the second voltage V2 and the third voltage V3. These voltage values ​​reflect the working status of each part of the loop interlocking diagnosis circuit. Through real-time monitoring and analysis of these voltages, it is possible to accurately determine whether the circuit has a fault and the specific type of the fault.

[0014] Preferably, it also includes a normally open switch S1 and a diode D1 for preventing current backflow, wherein the two ends of the normally open switch S1 are respectively connected to the output end of the power supply module and the input end of the constant current source module; the diode D1 is arranged between the constant current source module and the resistance loop module, the input end of the diode D1 is connected to the output end of the constant current source module, and the output end of the diode D1 is connected to the input end of the resistance loop module.

[0015] By adopting the above technical means, a diode is set to prevent current backflow from damaging the current source, thereby improving the safety and reliability of the diagnostic circuit and ensuring the safe and stable operation of the circuit.

[0016] In a second aspect, the present application provides a detection method for a loop interlock diagnostic circuit, which adopts the following technical solution:

[0017] A detection method for a loop interlock diagnostic circuit, the detection method is based on the loop interlock diagnostic circuit as described in any one of the above, the detection method comprises the following steps:

[0018] S1, detect the state of the normally open switch S1, when the normally open switch S1 is in normal state, close the normally open switch S1 and record the first voltage V1, the second voltage V2 and the third voltage V3, the first voltage V1 is the voltage value collected by the first voltage acquisition port in the resistance loop module, the second voltage V2 is the voltage value collected by the second voltage acquisition port in the resistance loop module, and the third voltage V3 is the voltage value collected by the third voltage acquisition port in the resistance loop module; S2, make a judgment based on the third voltage V3, when the third voltage V3 does not meet , determining that the loop interlock diagnostic circuit has a first fault;

[0019] S3, when the loop interlock diagnostic circuit meets When the second voltage V2 is used for determination, if the second voltage V2 does not satisfy , determining that the loop interlock diagnostic circuit has a second fault;

[0020] S4, when the loop interlock diagnostic circuit meets When the first voltage V1 is used to determine, if the first voltage V1 does not satisfy , it is determined that there is a third fault in the loop interlock diagnostic circuit, otherwise the loop interlock diagnostic circuit is in normal state.

[0021] By adopting the above technical means, the voltage values ​​collected by each voltage collection port are monitored in real time. When the loop interlock diagnosis circuit is working normally, each voltage value should be within the preset normal range. By comparing the voltage value with the preset range, the abnormal situation of the circuit can be discovered in time and the cause of the fault can be accurately determined.

[0022] Preferably, the first fault includes a loop interlock detection module short-to-ground fault, a loop interlock detection module short-to-ground fault and increased resistance, a loop interlock detection module short-power fault, and a third loop fault; the diagnosis method of the first fault specifically includes:

[0023] When the first fault exists, if V3=0V, the loop interlock diagnostic circuit at least has a short-to-ground fault of the loop interlock detection module, specifically:

[0024] When V3=0V, if , and V2=0V, the fault in the loop interlock diagnostic circuit is a short-to-ground fault in the loop interlock detection module;

[0025] When V3=0V, if , and V2>0V, the fault existing in the loop interlock diagnostic circuit is that the loop interlock detection module is short-to-ground and the resistance of the loop interlock detection module increases.

[0026] Preferably, when the first fault exists, if V3=5V, V2=5V and V1=5V, the fault existing in the loop interlock diagnostic circuit is a short power fault of the loop interlock detection module;

[0027] like The fault in the loop interlock diagnostic circuit is a third loop fault, and the third loop fault is an open circuit fault of one of the fifth resistor R5 or the sixth resistor R6.

[0028] Preferably, when the second fault occurs, if , the fault of the loop interlock diagnostic circuit is that the resistance of the loop interlock detection module increases.

[0029] Preferably, when the third fault occurs, if The fault in the loop interlock diagnostic circuit is a first loop fault, specifically an open circuit fault of one of the first resistor R1 or the second resistor R2.

[0030] By adopting the above-mentioned technical means, a more detailed fault judgment logic is provided, and detailed fault analysis and troubleshooting methods are set according to the third voltage V3, the second voltage V2 and the first voltage V1 respectively, providing theoretical support for the diagnosis of each fault and ensuring the accuracy of the final diagnostic result.

[0031] In summary, the present application includes at least one of the following beneficial technical effects:

[0032] 1. The present application is provided with a power supply module, a constant current source module, a resistance loop module and a loop interlock detection module. The resistance loop module is powered by the power supply module and the constant current source module, and the loop interlock detection module is used to perform fault detection and judgment on the loop interlock diagnosis circuit. By adding a controllable normally open switch, the power consumption of the loop interlock diagnosis circuit is reduced; by connecting multiple resistors in parallel and then in series, the fault tolerance performance of the loop interlock diagnosis circuit is improved, the failure rate of the circuit is reduced, and the accuracy and reliability of the detection are improved.

[0033] 2. The present application sets a voltage acquisition port in each loop of the resistance loop module to respectively acquire the first voltage V1, the second voltage V2 and the third voltage V3. In combination with a loop interlock detection module connected to the resistance loop module, the present application can judge the fault of the loop interlock diagnosis circuit through the acquired voltage, thereby improving the intelligence of the loop interlock diagnosis circuit.

[0034] 3. This application realizes the protection function of the loop interlock diagnostic circuit by setting up a protection module and a switch module, preventing current backflow from damaging the circuit and improving the safety of the loop interlock diagnostic circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is the circuit diagram of the existing DC source solution;

[0036] Figure 2 This is the circuit diagram of the existing PWM solution;

[0037] Figure 3 This is the circuit diagram of the existing constant current source solution;

[0038] Figure 4 is an equivalent circuit diagram of the loop interlock diagnostic circuit of Example 1 of the present application;

[0039] Figure 5 It is one of the flow charts of the detection method of the loop interlock diagnostic circuit of Example 2 of the present application;

[0040] Figure 6 This is the second flow chart of the detection method of the loop interlock diagnostic circuit of Example 2 of the present application;

[0041] Figure 7This is the third flow chart of the detection method of the loop interlock diagnostic circuit of Example 2 of the present application;

[0042] Figure 8 This is the fourth flow chart of the detection method of the loop interlock diagnostic circuit of Example 2 of the present application;

[0043] Fig. 9 This is the fifth flow chart of the detection method of the loop interlock diagnostic circuit of Example 2 of the present application. DETAILED DESCRIPTION

[0044] The present application provides a loop interlock diagnostic circuit and a detection method for the circuit. To make the purpose, technical solution and advantages of the present application clearer, the implementation method of the present application will be further described in detail below.

[0045] The following is a further detailed description of the embodiments of the loop interlock diagnostic circuit and the detection method of the circuit of the present application in conjunction with the drawings of the specification.

[0046] Embodiment 1:

[0047] This embodiment discloses a loop interlock diagnostic circuit. Figure 4 , Figure 4 is an equivalent circuit diagram of the loop interlock diagnostic circuit of this embodiment, including a power supply module, a constant current source module, and a resistance loop module.

[0048] like Figure 4 As shown, the power module provides a stable operating voltage for the entire circuit. The power module is specifically a battery Vbat. The constant current source module is responsible for outputting a constant current to ensure that the battery obtains a stable and safe current supply during the charging process. The power module supplies power to the resistance loop module through the constant current source module.

[0049] like Figure 4 As shown, the input end of the constant current source module CCS1 is connected to the output end of the power module, and the output end of the constant current source CCS1 is further connected to the input end of the resistance loop module. The resistance loop module is composed of three parallel resistor pairs connected in series to form multiple detection nodes. At the same time, the output end of the resistance loop module is grounded to ensure the normal operation of the circuit.

[0050] like Figure 3 The circuit shown is an existing constant current source solution, which determines the resistance value of the loop interlock by generating a voltage on the resistor through the constant current source, and is used to continuously monitor the state of the entire circuit. The interlock resistance is calculated by collecting the voltage at the input and output ends, and various fault modes are diagnosed. However, the existing solution only uses a single resistor in series. If one of the resistors fails, such as an open circuit or a short circuit, the entire circuit may be affected and cannot work normally.

[0051] This embodiment is an optimization and improvement based on the traditional constant current source solution. By setting the resistance loop module into a resistor network combined with series and parallel connections, the failure rate of the entire circuit can be reduced. Even if one resistor fails, the constant current source CCS1 can continue to output.

[0052] The three parallel resistor pairs of the resistance loop module respectively form a first loop, a second loop and a third loop. Figure 4 As shown, the first loop specifically includes a first resistor R1 and a second resistor R2 connected in parallel, the second loop specifically includes a third resistor R3 and a fourth resistor R4 connected in parallel, the third loop specifically includes a fifth resistor R5 and a sixth resistor R6 connected in parallel, and the first loop, the second loop and the third loop are connected in series in sequence and then connected to GND.

[0053] In this embodiment, if Figure 4 As shown, the loop interlock diagnostic circuit also includes a normally open switch S1 and a diode D1 for preventing current backflow. The two ends of the normally open switch S1 are respectively connected to the output end of the power module and the input end of the constant current source module to control the on and off of the entire circuit.

[0054] The diode D1 is arranged between the constant current source CCS1 and the resistance loop module, the input end of the diode D1 is connected to the output end of the constant current source module, and the output end of the diode D1 is connected to the input end of the resistance loop module. The diode D1 plays a role of current source protection in the entire circuit system. When a short power failure occurs in the resistance loop module, it can prevent current backflow from damaging the current source.

[0055] The loop interlock diagnostic circuit also includes a loop interlock detection module for detecting and judging faults in the loop interlock diagnostic circuit. The loop interlock detection module is the core part of the circuit. In this embodiment, the loop interlock detection module includes a loop interlock harness equivalent resistor R HVIL Ideally, R HVIL The value is 0, the input end of the loop interlock detection module is connected to the output end of the first loop and the input end of the second loop respectively, and the output end of the loop interlock detection module is connected to the output end of the second loop and the input end of the third loop respectively.

[0056] In this embodiment, if Figure 4 As shown, the resistance loop module is provided with three voltage acquisition ports, namely a first voltage acquisition port, a second voltage acquisition port and a third voltage acquisition port. The voltage acquired by the first voltage acquisition port is a first voltage V1, the voltage acquired by the second voltage acquisition port is a second voltage V2, and the voltage acquired by the third voltage acquisition port is a third voltage V3.

[0057] The first voltage acquisition port is connected in series with the second resistor R2 and connected to the input end of the second resistor R2. The second voltage acquisition port and the third voltage acquisition port are arranged on the loop interlock detection module. The second voltage acquisition port is connected to the input end of the loop interlock detection module, and the third voltage acquisition port is connected to the output end of the loop interlock detection module, that is, the second voltage acquisition port is located between the first resistor R1 and the third resistor R3, and the third voltage acquisition port is located between the third resistor R3 and the fifth resistor R5.

[0058] In this embodiment, the vehicle battery Vbat is powered by the constant current source CCS1. When high-voltage loop interlock diagnosis is required, the vehicle's microcontroller unit (MCU) controls the normally open switch S1 to close, and the current passing through the constant current source CCS1 passes through the diode D1 and then is given to the series-parallel resistance loop module.

[0059] In this embodiment, when the loop interlock detection module is not connected, the loop interlock diagnostic circuit can be self-checked by the collected first voltage V1, second voltage V2 and third voltage V3; it should be noted that since the loop interlock wiring harness equivalent resistance R is introduced into the loop interlock diagnostic circuit on the whole vehicle, HVIL The judgment process is relatively complicated, so self-test is generally performed during offline testing at the factory to ensure that the entire circuit is normal.

[0060] After the loop interlock detection module is connected, the fault detection and judgment of the entire loop interlock diagnosis circuit can be performed by measuring the voltage values ​​of the first voltage V1, the second voltage V2 and the third voltage V3.

[0061] Embodiment 2:

[0062] This embodiment discloses a detection method for a loop interlock diagnosis circuit. The detection method performs circuit fault detection based on the loop interlock diagnosis circuit of Embodiment 1.

[0063] During detection, the voltage value of the loop interlock diagnostic circuit is collected in real time through three voltage acquisition ports to obtain a first voltage V1, a second voltage V2 and a third voltage V3, wherein the first voltage V1 is the voltage value collected by the first voltage acquisition port in the resistance loop module, that is, the voltage value from the first voltage acquisition port to GND, the second voltage V2 is the voltage value collected by the second voltage acquisition port in the resistance loop module, that is, the voltage value from the second voltage acquisition port to GND, and the third voltage V3 is the voltage value collected by the third voltage acquisition port in the resistance loop module, that is, the voltage value from the third voltage acquisition port to GND.

[0064] Fault diagnosis of the loop interlock diagnostic circuit is performed based on the collected voltage values, wherein the voltage collection range is 0V-5V; in the present embodiment, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are all ideal resistors, and the resistance values ​​are all R.

[0065] When the loop interlock diagnostic circuit is working normally, each voltage value should be within the preset normal range. By monitoring these voltage values ​​in real time and comparing them with the preset range, abnormal conditions of the circuit can be discovered in time.

[0066] The detection method process includes the following steps:

[0067] S1, detect the state of the normally open switch S1, when the normally open switch S1 is in normal state, close the normally open switch S1 and record the first voltage V1, the second voltage V2 and the third voltage V3, such as Figure 5 As shown, the specific steps include:

[0068] Detect the state of the normally open switch S1, record the first voltage V1 collected by the first voltage acquisition port and the third voltage V3 collected by the third voltage acquisition port. When V1=0 and V3=0, it means that the state of the normally open switch S1 is normal and the next test can be performed. Otherwise, the normally open switch S1 is normally closed.

[0069] When the normally open switch S1 is in a normal state, the normally open switch S1 is closed to re-record the first voltage V1 collected by the first voltage collection port, the second voltage V2 collected by the second voltage collection port, and the third voltage V3 collected by the third voltage collection port.

[0070] S2, such as Figure 6 As shown, the judgment is made based on the third voltage V3. When the third voltage V3 does not meet When , it is determined that the loop interlock diagnostic circuit has a first fault.

[0071] in, is the constant current source current, is the current deviation of the constant current source, and R is the ideal resistance value of all resistors.

[0072] Combination Figure 5 As shown, the loop interlock detection module in this embodiment only includes a loop interlock harness equivalent resistor R HVIL , ideally, the equivalent resistance of the loop interlock harness is R HVIL The resistance is 0, and the current source exists The output current range of the current source is , the fifth resistor R5 and the sixth resistor R6 are connected in parallel and the resistance is R / 2, so the equivalent resistance of the loop interlock harness is R HVILWhen the value of is 0, the voltage range of the third voltage V3 is .

[0073] The first fault includes a loop interlock detection module short-to-ground fault, a loop interlock detection module short-to-ground fault with increased resistance, a loop interlock detection module short-to-power fault, and a third loop fault.

[0074] like Figure 7 As shown, the diagnosis method of the first fault specifically includes that when the first fault exists, if V3=0V, the loop interlock diagnosis circuit at least has a short-to-ground fault of the loop interlock detection module, specifically.

[0075] S21, when V3=0V, if , and V2=0V, the fault in the loop interlock diagnostic circuit is the equivalent resistance R of the loop interlock wiring harness. HVIL Short to ground fault, the reasons are as follows.

[0076] Ideally, the equivalent resistance R of the loop interlock harness HVIL The resistance is 0, so the third voltage V3 is the same as the second voltage V2. If V3=0, V2=0, and the test is There is only one situation, that is, the input terminal HVIL_IN of the loop interlock detection module is short-circuited with GND, that is, the fault in the loop interlock diagnosis circuit is the equivalent resistance R of the loop interlock wiring harness. HVIL Short to ground fault.

[0077] When V2=0, it means that no current flows between the second voltage acquisition port and GND. When the constant current source works normally, there is only one short-to-ground situation. However, V2=0 can prove that the input terminal HVIL_IN of the loop interlock detection module is short-to-ground, but it cannot prove that the output terminal HVIL_OUT of the loop interlock detection module is also short-to-ground. Therefore, the above fault can be understood as HVIL_IN is short-to-ground.

[0078] S22, when V3=0V, if , and V2>0V, the fault in the loop interlock diagnostic circuit is a short-to-ground fault and the resistance of the loop interlock detection module increases. The reasons are as follows.

[0079] V3=0V can prove that the above HVIL short-to-ground fault is caused by the short-to-ground of the HVIL_OUT terminal. If the equivalent resistance of the loop interlock harness R HVIL is 0, the value of the second voltage V2 is also 0, and the range of the first voltage V1 is , if the loop interlock harness equivalent resistance R HVIL is not 0, then the value of the second voltage V2 is also not 0, and the range of the first voltage V1 is .

[0080] The first voltage V1 takes the maximum value in the range when the loop interlock harness equivalent resistance R HVIL When V2 is infinite, the parallel resistance of the third resistor R3 and the fourth resistor R4 is close to R / 2. Therefore, V2>0V can be used to infer that the cause of the fault also includes the equivalent resistance R of the loop interlock harness. HVIL The resistance value increases.

[0081] like , and , the unit is V. The fault in the loop interlock diagnostic circuit is a short power fault in the loop interlock detection module. The reasons are as follows.

[0082] The short power failure of the loop interlock detection module means that the equivalent resistance R of the loop interlock harness HVIL It is directly connected to the power supply (the power supply voltage in this embodiment is 12V), which will cause the voltage values ​​of the first voltage V1, the second voltage V2, and the third voltage V3 to increase abnormally. Regardless of whether the loop interlock circuit is normal at this time, the actual voltages of the first voltage V1, the second voltage V2, and the third voltage V3 are greater than 5V. However, as can be seen from the above, the maximum voltage acquisition range is 5V, so when the voltages collected by the first voltage V1, the second voltage V2, and the third voltage V3 are 5V, the fault is the equivalent resistance R of the loop interlock harness. HVIL Short power failure.

[0083] S24, if ,and The fault in the loop interlock diagnostic circuit is a third loop fault, and the third loop fault is specifically an open circuit fault of one of the fifth resistor R5 or the sixth resistor R6, for the following reasons.

[0084] It indicates that the voltage between the first voltage acquisition port and the second voltage acquisition port is normal, and it can be inferred that there is no abnormality in the first resistor R1 and the second resistor R2; in the third loop, the fifth resistor R5 and the sixth resistor R6 are connected in parallel. Under normal circumstances, if the resistance values ​​of the fifth resistor R5 and the sixth resistor R6 are the same, then they will each share the same voltage drop.

[0085] Since Ia is the total current flowing through the third loop, and ideally the resistance values ​​of the fifth resistor R5 and the sixth resistor R6 are both R, then under normal circumstances the total voltage drop of the third loop should be , if the equivalent value of the parallel resistance is considered, it should be , but this voltage drop will be distributed across the fifth resistor R5 and the sixth resistor R6.

[0086] If one of the fifth resistor R5 or the sixth resistor R6 is open-circuited, the current will not flow through the open resistor. Therefore, the total voltage drop in the third loop will fall entirely on the other unopened resistor. If the value of the third voltage V3 measured at this time happens to be , then this indicates that only one resistor is working, that is, the other resistor is open.

[0087] Therefore, when This usually means that in the third loop, only half of the resistors are functional, or only one resistor (the fifth resistor R5 or the sixth resistor R6) is connected in the circuit, while the other resistor is open, that is, not conducting.

[0088] S3, when the loop interlock diagnostic circuit meets When the second voltage V2 is used for determination, if the second voltage V2 does not satisfy , it is determined that there is a second fault in the loop interlock diagnostic circuit.

[0089] When the second fault occurs, Figure 8 As shown, if The specific fault of the loop interlock diagnostic circuit is the increase in resistance of the loop interlock detection module, that is, in this embodiment, the second fault is the equivalent resistance R of the loop interlock wiring harness. HVIL The resistance increases for the following reasons.

[0090] When the loop interlock diagnostic circuit is normal and has no faults, the range of the second voltage V2 should satisfy , reversely, if the equivalent resistance of the loop interlock harness here is R HVIL The resistance value of the second voltage V2 increases, which will cause the total resistance value of the loop interlock detection module and the third resistor R3 and the fourth resistor R4 connected in parallel to increase, and the resistance value ranges from 0 to R / 2 after parallel connection. Therefore, if the maximum value of the range of the second voltage V2 becomes , which can indicate that the loop interlock diagnostic circuit has a loop interlock harness equivalent resistance R HVIL Resistance increase fault.

[0091] Based on the above analysis, it can be concluded that the fault in the loop interlock diagnostic circuit in the above case is the equivalent resistance R of the loop interlock wiring harness. HVIL Resistance increases, loop interlock harness equivalent resistance R HVIL The increase in resistance causes it to share more voltage, so that the value of the second voltage V2 is between and between.

[0092] S4, when the loop interlock diagnostic circuit meets , it can be inferred that the voltage distribution in the second circuit is normal. At this time, a judgment is made based on the first voltage V1. If the first voltage V1 does not meet , it is determined that there is a third fault in the loop interlock diagnostic circuit.

[0093] like Fig. 9 As shown, when the third fault exists, if , which indicates that the voltage drop of the first circuit measured by the first voltage V1 is larger than expected, and the fault in the loop interlock diagnostic circuit is a first circuit fault, specifically an open circuit fault of one of the first resistor R1 or the second resistor R2.

[0094] Considering that there are two resistors, the first resistor R1 and the second resistor R2, connected in series in the first loop, and the value of the first voltage V1 is 1.5 times the voltage drop of a single resistor, it can be inferred that one of the first resistor R1 or the second resistor R2 is not working properly. Since the voltage drop increases, it can be inferred that the reason is that one of the resistors is open, resulting in current flowing only through the remaining resistor, resulting in an increase in the voltage drop across the resistor, thereby generating a higher voltage drop.

[0095] S5. When the first fault, the second fault and the third fault do not exist, the loop interlock diagnostic circuit is normal.

[0096] By implementing the above detection method, comprehensive fault detection and judgment of the loop interlock diagnostic circuit can be achieved, ensuring that protection measures can be triggered in time when an abnormality occurs in the high-voltage system, thereby improving the safety and reliability of electric vehicles.

[0097] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A detection method for a loop interlock diagnostic circuit, the detection method is based on a loop interlock diagnostic circuit, the circuit includes a power supply module, a constant current source module and a resistance loop module, the input end of the constant current source module is connected to the output end of the power supply module, the output end is connected to the input end of the resistance loop module, the output end of the resistance loop module is grounded, the resistance loop module includes a first loop, a second loop and a third loop, the power supply module is used to power the resistance loop module through the constant current source module; the circuit also includes a loop interlock detection module for fault detection and judgment of the loop interlock diagnostic circuit, the input end of the loop interlock detection module is respectively connected to the output end of the first loop and the input end of the second loop, the output end of the loop interlock detection module is respectively connected to the output end of the second loop and the input end of the third loop; the first loop, the second loop and the third loop are connected in series in sequence, the first loop includes a first resistor R1 and a second resistor R2 connected in parallel, the second loop includes The circuit comprises a third resistor R3 and a fourth resistor R4 connected in parallel, and the third loop comprises a fifth resistor R5 and a sixth resistor R6 connected in parallel; the resistance loop module comprises a first voltage acquisition port, a second voltage acquisition port and a third voltage acquisition port, wherein the first voltage acquisition port is located at the input end of the second resistor R2, the second voltage acquisition port and the third voltage acquisition port are arranged on the loop interlock detection module, the second voltage acquisition port is connected to the input end of the loop interlock detection module, and the third voltage acquisition port is connected to the output end of the loop interlock detection module; the circuit also comprises a normally open switch S1 and a diode D1 for preventing current backflow, the two ends of the normally open switch S1 are respectively connected to the output end of the power supply module and the input end of the constant current source module; the diode D1 is arranged between the constant current source module and the resistance loop module, the input end of the diode D1 is connected to the output end of the constant current source module, and the output end of the diode D1 is connected to the input end of the resistance loop module, characterized in that, The steps include: S1, detecting the state of the normally open switch S1, when the state of the normally open switch S1 is normal, closing the normally open switch S1 and recording a first voltage V1, a second voltage V2 and a third voltage V3, wherein the first voltage V1 is a voltage value collected by a first voltage collection port in a resistance loop module, the second voltage V2 is a voltage value collected by a second voltage collection port in the resistance loop module, and the third voltage V3 is a voltage value collected by a third voltage collection port in the resistance loop module; S2, judging according to the third voltage V3, when the third voltage V3 does not satisfy (Ia-ΔIa)*R / 2<V3<(Ia+ΔIa)*R / 2, determining that the loop interlock diagnostic circuit has a first fault; S3, when the loop interlock diagnostic circuit satisfies (Ia-ΔIa)*R / 2<V3<(Ia+ΔIa)*R / 2, a judgment is made based on the second voltage V2; if the second voltage V2 does not satisfy (Ia-ΔIa)*R / 2<V2<(Ia+ΔIa)*R / 2, it is determined that the loop interlock diagnostic circuit has a second fault; S4. When the loop interlock diagnostic circuit satisfies (Ia-ΔIa)*R / 2<V2<(Ia+ΔIa)*R / 2, a judgment is made according to the first voltage V1. If the first voltage V1 does not satisfy (Ia-ΔIa)*R<V1<(Ia+ΔIa)*R, it is determined that the loop interlock diagnostic circuit has a third fault. Otherwise, the loop interlock diagnostic circuit is in a normal state. Where, Ia is the constant current source current, ΔIa is the constant current source current deviation, and R is the ideal resistance value of all resistors; The first fault includes a short-to-ground fault of the loop interlock detection module, a short-to-ground fault of the loop interlock detection module and an increased resistance, a short-power fault of the loop interlock detection module, and a third-loop fault; the second fault is an increased resistance of the loop interlock harness equivalent resistance RHVIL; when the third fault exists, the fault existing in the loop interlock diagnostic circuit is a first-loop fault.

2. The detection method of the loop interlock diagnostic circuit according to claim 1, characterized in that: The diagnosis method of the first fault specifically includes: When the first fault exists, if V3=0V, the loop interlock diagnostic circuit at least has a short-to-ground fault of the loop interlock detection module, specifically: When V3=0V, if (Ia-ΔIa)*R / 2<V1<(Ia+ΔIa)*R / 2, and V2=0V, the fault existing in the loop interlock diagnosis circuit is the short-to-ground fault of the loop interlock detection module; When V3=0V, if (Ia+ΔIa)*R / 2<V1<(Ia+ΔIa)*R, and V2>0V, the fault of the loop interlock diagnosis circuit is that the loop interlock detection module is short-to-ground and the resistance of the loop interlock detection module increases.

3. The detection method of the loop interlock diagnostic circuit according to claim 2, characterized in that: When the first fault exists, if V3=5V, V2=5V and V1=5V, the fault existing in the loop interlock diagnostic circuit is a short power fault of the loop interlock detection module; If (Ia-ΔIa)*R<V3<(Ia+ΔIa)*R, the fault in the loop interlock diagnostic circuit is a third loop fault, and the third loop fault is an open circuit fault of one of the fifth resistor R5 or the sixth resistor R6.

4. The detection method of the loop interlock diagnostic circuit according to claim 1, characterized in that: When the second fault exists, if (Ia+ΔIa)*R / 2<V2<(Ia+ΔIa)*R, the fault existing in the loop interlock diagnosis circuit is that the resistance of the loop interlock detection module increases.

5. The detection method of the loop interlock diagnostic circuit according to claim 1, characterized in that: When the third fault exists, if (Ia-ΔIa)*3R / 2<V1<(Ia+ΔIa)*3R / 2, the fault existing in the loop interlock diagnostic circuit is a first loop fault, specifically an open circuit fault of one of the first resistor R1 or the second resistor R2.

Images