Write protection mapping method, device, computer readable storage medium and electronic device

Abstract

The present invention discloses a write protection mapping method, device, computer-readable storage medium and electronic device; the write protection state corresponding to the write address is matched in the first-level protection table, and if the write protection state is on, the target second-level protection table is obtained according to the write address; the write protection type corresponding to the write address is matched in the target second-level protection table. The present invention can only store the first-level protection table, and then obtain the corresponding second-level protection table into the memory after the first-level protection table is successfully matched, thereby reducing the amount of data that needs to be stored in the memory by hierarchically storing the write protection state and type, saving memory resources, and first matching the write protection state, and further matching the write protection type if it is on, thereby improving the judgment speed.

Description

Technical Field

[0001] The present invention relates to the field of storage devices, and in particular to a write protection mapping method, device, computer-readable storage medium and electronic equipment. Background Art

[0002] Write protection is one of the important functions of eMMC (Embedded Multi Media Card) devices. Any eMMC device needs to support two levels of write protection: write protection for the entire device and write protection for a certain area. The former enables or disables write protection for the entire device by configuring the CSD register (register in the eMMC device), and the latter enables or disables write protection for the specified area through the CCC6 (Device Command Class 6, Write Protection Functions) command set. The area size is defined in the CSD and EXT_CSD register write protection group fields. Therefore, the latter is also called write protection group write protection. According to the eMMC 5.1 protocol definition, there are three types of write protection: temporary write protection, power-on write protection, and permanent write protection. The corresponding binary representations are 01b, 10b, and 11b (00b means no write protection). Obviously, the three possible protection types of each write protection group require at least 2 bits to represent. Considering protocol compatibility, the size of the eMMC write protection group is usually limited to 16MB. Taking a small-capacity eMMC device with a capacity less than or equal to 128GB as an example, it contains 128GB*1024 / 16MB=8192 write protection groups. Therefore, 16384 bits are required to represent the status of each write protection group. After conversion, 2KB RAM (Random Access Memory) resources are required to store this information.

[0003] As the demand for large-capacity eMMC devices in smartphones and tablets is driven, it is imperative to support large-capacity eMMC with existing hardware resources and technical solutions. However, if the size of the write protection group remains unchanged, the increase in capacity means that the required table cache also doubles. The biggest resource bottleneck and technical difficulty is the shortage of on-chip RAM resources. In terms of distance, if the status of the eMMC write protection group still uses the current mapping solution, taking a large-capacity 512GB eMMC device as an example, 8KB of on-chip RAM resources are required, exacerbating the RAM resource conflict of the large-capacity solution. If it is supported by external RAM or redesigning the chip to increase the on-chip RAM resources, its technical risks and costs will increase greatly. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a write protection mapping method, device, computer-readable storage medium and electronic device to reduce the storage space required for write protection mapping.

[0005] In order to solve the above technical problems, a technical solution adopted by the present invention is:

[0006] A write protection mapping method comprises the steps of:

[0007] receiving a write request, wherein the write request includes a write address;

[0008] Matching the write protection state corresponding to the write address in the first-level protection table, and if the write protection state is on, obtaining a target second-level protection table according to the write address;

[0009] The write protection type corresponding to the write address is matched in the target second-level protection table.

[0010] In order to solve the above technical problems, another technical solution adopted by the present invention is:

[0011] A write protection mapping device, comprising:

[0012] A receiving module, used for receiving a write request, wherein the write request includes a write address;

[0013] A first matching module, configured to match a write protection state corresponding to the write address in a first-level protection table, and if the write protection state is on, obtain a target second-level protection table according to the write address;

[0014] The second matching module matches the write protection type corresponding to the write address in the target second-level protection table.

[0015] In order to solve the above technical problems, another technical solution adopted by the present invention is:

[0016] A computer-readable storage medium stores a computer program, which implements each step of the above-mentioned write protection mapping method when executed by a processor.

[0017] In order to solve the above technical problems, another technical solution adopted by the present invention is:

[0018] An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements each step of the above-mentioned write protection mapping method when executing the computer program.

[0019] The beneficial effects of the present invention are as follows: a first-level protection table and a second-level protection table are set, and the write protection status is stored as on or off in the first-level protection table, and the write protection type corresponding to the write address is stored in the second-level protection table. Therefore, it is not necessary to store all the second-level protection tables in the memory for matching, and only the first-level protection table can be stored. After the first-level protection table is successfully matched, the corresponding second-level protection table is obtained into the memory, thereby reducing the amount of data that needs to be stored in the memory by hierarchically storing the write protection status and type, saving memory resources, and first matching the write protection status, and if it is on, further matching the write protection type, thereby improving the judgment speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A flowchart of a write protection mapping method according to an embodiment of the present invention;

[0021] Figure 2 A schematic diagram of a storage method of a first-level protection table and a second-level protection table according to an embodiment of the present invention;

[0022] Figure 3 Another step flow chart of a write protection mapping method according to an embodiment of the present invention;

[0023] Figure 4 A schematic diagram of a first-level protection table reconstruction process according to an embodiment of the present invention;

[0024] Figure 5 A schematic diagram of the structure of a write protection mapping device according to an embodiment of the present invention;

[0025] Figure 6 The figure is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.

[0027] Please refer to Figure 1 , a write protection mapping method, comprising the steps of:

[0028] receiving a write request, wherein the write request includes a write address;

[0029] Matching the write protection state corresponding to the write address in the first-level protection table, and if the write protection state is on, obtaining a target second-level protection table according to the write address;

[0030] The write protection type corresponding to the write address is matched in the target second-level protection table.

[0031] From the above description, it can be seen that the beneficial effects of the present invention are: setting a first-level protection table and a second-level protection table, storing the write protection status as on or off in the first-level protection table, and storing the write protection type corresponding to the write address in the second-level protection table. It is not necessary to store all the second-level protection tables in the memory for matching, and only the first-level protection table can be stored. After the first-level protection table is matched successfully, the corresponding second-level protection table is obtained into the memory, thereby reducing the amount of data that needs to be stored in the memory by hierarchically storing the write protection status and type, saving memory resources, and matching the write protection status first, and if it is on, further matching the write protection type, thereby improving the judgment speed.

[0032] Further, obtaining the address length corresponding to each bit in the first-level protection table;

[0033] Calculate the number of offset bits of the first-level protection table according to the write address and the address length;

[0034] The write protection state corresponding to the offset bit number is obtained as the write protection state corresponding to the write address.

[0035] From the above description, it can be seen that each bit in the first-level protection table corresponds to a protection status of an address length. The address length can be set according to the size of the write protection group, so that the write protection status of multiple write protection groups can be represented by one bit in the first-level protection table, saving storage space.

[0036] Further, acquiring a target second-level protection table according to the write address includes:

[0037] Get the write protection group size and the total number of write protection groups corresponding to a second-level protection table;

[0038] Calculate the number of write protection group indexes corresponding to the write address according to the write address and the write protection group size;

[0039] The table index number of the second-level protection table is calculated according to the write protection group index number and the total number of write protection groups, and the target second-level protection table is obtained according to the table index number.

[0040] From the above description, it can be seen that a second-level protection table can correspond to multiple write protection groups, which stores the write protection type corresponding to each write protection group. The write protection group index number corresponding to the write address can be obtained according to the write address and the write protection group size of a write protection group; because the write protection groups are divided according to the address order; the table index number can be obtained according to the total number of write protection groups corresponding to a single second-level protection table and the write protection group index number, that is, the write protection type corresponding to the write address is stored in the order of the second-level protection table, so that the write protection type of the write protection group corresponding to the write address can be successfully matched.

[0041] Further, the write protection type corresponding to the write address is matched in the target second-level protection table, including:

[0042] Obtain a remainder obtained by dividing the number of table indexes by the total number of write protection groups;

[0043] The write protection type corresponding to the write address is matched in the target second-level protection table according to the remainder.

[0044] From the above description, it can be seen that the write protection group index number represents the ranking of the current write protection group among all write protection groups. The write protection group index number divided by the total number of write protection groups corresponding to a single second-level protection table can tell which second-level protection table, i.e., the target second-level protection table, the write protection type of the write address is written on. The remainder is the position corresponding to the nth write protection group on the target second-level protection table. By taking the remainder, the determination of the second-level protection table and the determination of the specific position on the second-level protection table are combined in one step.

[0045] Furthermore, after obtaining the target second-level protection table according to the index number, the step further includes:

[0046] Determine whether the target second-level protection table is in the memory, and if so, execute the step of matching the write protection type corresponding to the write address in the target second-level protection table;

[0047] Otherwise, the historical second-level protection table in the memory is deleted, and after the target second-level protection table is stored in the memory, the step of matching the write protection type corresponding to the write address in the target second-level protection table is performed.

[0048] From the above description, it can be seen that only the second-level protection table in use is stored in the memory, and the second-level protection table that is not in use is deleted. Then, only the first-level protection table that indicates the write protection status is stored in the memory for a long time. For the specific write protection type, it is stored in the memory only when it is needed, which further reduces the memory occupancy.

[0049] Furthermore, the write protection state corresponding to the write address matched in the first level protection table includes:

[0050] If the write protection state is off, write permission information is returned.

[0051] From the above description, it can be seen that if the write protection state is off, it means that the write protection group where the corresponding write address is located has not enabled the write protection state and allows direct writing. Then, the write permission information is directly returned, and the corresponding information can be directly written according to the write address.

[0052] Furthermore, it also includes:

[0053] Get the first level protection table reconstruction information;

[0054] Copy all second level protection tables into memory;

[0055] Traverse all the second-level protection tables in order of address from small to large. When traversing to the pending second-level protection table, obtain the write protection type of the write protection group therein. If it is not protected, continue traversing; otherwise, mark the write protection status as on at the corresponding position of the first-level protection table, and jump to the new pending second-level protection table according to the address length and continue traversing.

[0056] From the above description, it can be seen that the first-level protection table is not saved for a long time, but is constructed based on the second-level protection table. Therefore, only one copy of the first-level protection table needs to be stored in the memory, which further saves space. In the event of a write protection status update or restart, the first-level protection table is reconstructed based on the second-level protection table, which saves storage space while improving the flexibility of the configuration system.

[0057] Please refer to Figure 5 Another embodiment of the present invention provides a write protection mapping device, comprising:

[0058] A receiving module, used for receiving a write request, wherein the write request includes a write address;

[0059] A first matching module, configured to match a write protection state corresponding to the write address in a first-level protection table, and if the write protection state is on, obtain a target second-level protection table according to the write address;

[0060] The second matching module matches the write protection type corresponding to the write address in the target second-level protection table.

[0061] Another embodiment of the present invention provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned write protection mapping method are implemented.

[0062] Please refer to Figure 6 Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements each step in the above-mentioned write protection mapping method when executing the computer program.

[0063] The write protection mapping method, device, computer-readable storage medium and electronic device of the present invention can be applied to the storage of write protection types of write protection groups, especially the storage of write protection types of eMMC-based storage devices, which is described below through specific implementation methods.

[0064] Please refer to Figure 1-3 , Embodiment 1 of the present invention is:

[0065] A write protection mapping method comprises the steps of:

[0066] S1. receiving a write request, wherein the write request includes a write address;

[0067] S2, matching the write protection state corresponding to the write address in the first level protection table, including:

[0068] S21, obtaining the address length corresponding to each bit in the first-level protection table;

[0069] S22, calculating the first level protection table offset bit LEVEL1_OFFSET according to the write address HOST_LBA and the address length;

[0070] LEVEL1_OFFSET=HOST_LBA / length; it can be seen that the position of the mark of the write protection status of the area corresponding to the write address after rounding up;

[0071] If the address length is a power of 2, it can also be calculated directly through the offset:

[0072] HOST_LBA>>n; means shifting to the right by n bits, which is equivalent to dividing by 2 to the power of n;

[0073] S23, obtaining the write protection state corresponding to the offset bit number as the write protection state corresponding to the write address;

[0074] S3, if the write protection state is on, execute S4; if the write protection state is off, execute S5;

[0075] In an optional implementation, setting 0 indicates that the write protection state is off, and 1 indicates that the write protection state is on; then obtaining whether the mark on the offset bit is 0 or 1 can determine the write protection state;

[0076] S4 obtains a target second-level protection table according to the write address, including:

[0077] S41, obtaining the write protection group size WPGSize and the total number of write protection groups WPGPerZone corresponding to a second-level protection table;

[0078] S42. Calculate the write protection group index number WPGIndex corresponding to the write address according to the write address LBA and the write protection group size:

[0079] WPGIndex=LBA / WPGSize; it can be seen that the write protection group index number corresponding to the write address is rounded up;

[0080] S43, calculating the table index number LEVEL2_INDEX of the second-level protection table according to the write protection group index number and the total number of write protection groups, and acquiring the target second-level protection table according to the table index number;

[0081] LEVEL2_INDEX=WPGIndex / WPGPerZone; it can be seen that the table index number of the target second-level protection table corresponding to the write address is rounded up;

[0082] S44, determining whether the target second-level protection table is in the memory, if so, executing S6; otherwise, executing S45;

[0083] S45, after deleting the historical second-level protection table in the memory and storing the target second-level protection table in the memory, executing S6;

[0084] Please refer to Figure 2 In an optional implementation, after the target second-level protection table is added, it is determined whether the number or size of all second-level protection tables in the memory (RAM) is greater than a threshold value. If so, S45 is executed, otherwise, the target second-level protection table is directly stored in the memory; for example, the threshold value is 1 second-level protection table (or 1KB in size), if the target second-level protection table is Index3, but the historical second-level protection table stored in the memory is Index2, if the target second-level protection table is added, there are two second-level protection tables in the memory, which is greater than the threshold value 1 (if the threshold value is set to 1KB, the total size after the target second-level protection table is added also exceeds the threshold value), then the historical second-level protection table Index2 is deleted at this time, and then the target second-level protection table Index3 is stored in the memory; by setting the threshold value, the contradiction between storage space occupancy and hit rate is balanced in different scenarios, and it can be flexibly configured according to different requirements of retrieval rate and memory occupancy;

[0085] S5, returning write permission information, and writing target information into the write address according to the write request;

[0086] S6, matching the write protection type corresponding to the write address in the target second-level protection table, including:

[0087] S61, obtaining a remainder LEVEL2_OFFSET of the number of write protection group indexes divided by the total number of write protection groups;

[0088] LEVEL2_OFFSET = WPGIndex % WPGPerZone;

[0089] S62, matching the write protection type corresponding to the write address in the target second-level protection table according to the remainder; that is, obtaining the bit length of the write protection type, multiplying the bit length by the remainder to obtain the starting position of the write protection type; obtaining the bit length backward from the starting position to obtain the write protection type corresponding to the write address;

[0090] S63. If the write protection type is write-prohibited, the host is prohibited from writing; otherwise, the host is allowed to write according to the conditions set by the write protection type.

[0091] Please refer to Figure 4 , Embodiment 2 of the present invention is:

[0092] A write protection mapping method, which is different from the first embodiment in that it also includes:

[0093] S01, obtaining the reconstruction information of the first-level protection table; for example, if the eMMC is powered on again, the data stored in the RAM will be lost. Since the first-level protection table can be rebuilt by the second-level protection table, the first-level protection table is only stored in the RAM and needs to be rebuilt if it is powered on again;

[0094] S02, copy all second-level protection tables to the memory;

[0095] Each second-level protection table in the Write Protect Group Block is loaded and copied to the memory in sequence to improve the processing speed of subsequent reconstruction;

[0096] S03, traversing all the second-level protection tables in order of address from small to large, and when traversing to the pending second-level protection table, obtaining the write protection type of the write protection group therein, and if it is not protected, continuing to traverse; otherwise, marking the write protection state as on at the corresponding position of the first-level protection table, and jumping to the new pending second-level protection table according to the address length and continuing to traverse;

[0097] In an optional implementation, the write protection type of the write protection group is determined according to a preset word length, for example, one byte or one half word in the second-level protection table is determined at a time, and the selection can be made according to the processing speed. The longer the word length determined at a time, the fewer the number of determinations; for example, one half word at a time reduces the number of determinations by half compared to one byte at a time;

[0098] It can be understood that if the first-level protection table corresponds to the write protection states of multiple write protection groups in the second-level protection table, then the write protection state of one of these write protection groups is turned on, and the flag of the corresponding position of the first-level protection table is turned on. Therefore, if the write protection state of a write protection group traversed to is turned on, there is no need to continue traversing other write protection groups corresponding to this position in the first-level protection table; for example, the address length corresponding to an flag bit is the address length of the write protection groups in the three second-level protection tables; when traversing to the second second-level protection table, there is a write protection group with a write protection type of protected, then because the third second-level protection table also corresponds to the same flag, there is no need to continue traversing, and you can directly jump to the fourth second-level protection table for traversal. If there is a write protection group with a write protection type of protected in the fourth second-level protection table, you can jump to the seventh second-level protection table to continue traversing;

[0099] In an optional implementation, the process further includes S04: after rebuilding the first-level protection table, copying the first copy of the second-level granularity table to the memory.

[0100] Please refer to the figure, the third embodiment of the present invention is:

[0101] Apply the above write protection mapping method to a practical scenario:

[0102] First-level protection table: size 1KB, mapping granularity 64MB, 1 bit records whether the 64MB area is write-protected, 1KB RAM resource can represent the write-protection status of 512GB (64*1024*8);

[0103] The firmware can quickly determine whether there is a write protection state through the first-level protection table. If not, the determination of the write protection type is skipped;

[0104] Second-level protection table: 1KB in size, with a mapping granularity of 16MB. Since each write protection group needs to record the write protection type, the mapping granularity here is the same as the size of the write protection group. Two bits record the write protection type information of a 16MB area. One second-level granularity table can represent the write protection type of a 64GB (16*1024*8 / 2) range.

[0105] In an optional implementation, the mapping granularity of the first-level protection table is a multiple of the second-level protection table, which can make conversion and reconstruction more convenient;

[0106] In the write protection group, the LBA (Logical Block Address) range is specified through the eMMC 5.1 Write Protection Functions command set to enable and disable write protection. The offset and index of the first-level protection table and the second-level protection table need to be calculated according to the LBA range. The first-level protection table and the second-level protection table can be divided according to the power of 2, so the shift and AND logical operations can be used instead of the division and modulus operations to further reduce the firmware overhead;

[0107] Taking 512GB capacity as an example, a total of 8 second-level protection tables are required, totaling 8KB, which are stored in WPG Block (Write Protect Block) in units of Flash Page; please refer to Figure 2 , a secondary granularity table is always resident in RAM, occupying 1KB RAM memory. When querying or setting the write protection group or the host accesses the write protection area, the firmware swaps in and out the secondary granularity table from the WPG Block; if the host writes to the sector in the 192GB range, the second-level protection table points to the fourth index number, that is, Index3;

[0108] During the reconstruction process, since the mapping granularity of 64MB corresponding to the first-level protection table is four times the mapping granularity of 16MB corresponding to the second-level protection table, when traversing the second-level protection table, judgment can be made according to bytes, one byte has 8 bits, and the judgment of the four write protection groups is completed in sequence;

[0109] It can be seen that the solution in this specification solves the problem of large-capacity eMMC protocol compatibility with extremely small resources (2KB), and supports downward compatibility or upward expansion of capacity by reducing the number of second-level protection tables stored in the memory; for example, if the eMMC capacity is only 64GB, through calculation, only one second-level protection table is needed using this solution, and its format and content remain unchanged, and there is no swapping in and out of the second-level protection table; if a larger capacity eMMC is to be supported, only the number of second-level protection tables needs to be increased according to the capacity, and its format and content remain unchanged, and the mapping granularity of the first-level protection table is doubled by a multiple of 2, for example, the mapping granularity is adjusted from 64MB to 128MB, then the size of the first-level protection table remains unchanged, and its firmware design implementation will not be adjusted, thereby reducing the firmware development cost.

[0110] Please refer to Figure 5 , Embodiment 4 of the present invention is:

[0111] A write protection mapping device, comprising:

[0112] A receiving module, used for receiving a write request, wherein the write request includes a write address;

[0113] A first matching module, configured to match a write protection state corresponding to the write address in a first-level protection table, and if the write protection state is on, obtain a target second-level protection table according to the write address;

[0114] A second matching module, matching the write protection type corresponding to the write address in the target second-level protection table;

[0115] It can also be used to implement each step of any write protection mapping method in embodiments 1 to 3.

[0116] Embodiment 5 of the present invention is:

[0117] A computer-readable storage medium stores a computer program, which can implement each step of any write protection mapping method in embodiments 1 to 3 when executed by a processor.

[0118] Please refer to Figure 6 , Embodiment 6 of the present invention is:

[0119] An electronic device comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements each step of any write protection mapping method in embodiments 1 to 3 when executing the computer program.

[0120] In summary, the write protection mapping method, device, computer-readable storage medium and electronic device provided by the present invention realize large-capacity eMMC write protection group mapping management through a multi-granularity and multi-level write protection mapping method, that is, for the first-level protection table, the write protection status of multiple write protection groups can be recorded through an identifier, and the specific write protection type of each write protection group is recorded through the second-level protection table, which can save cache space without increasing hardware storage space, and reduce hardware costs and technical risks. In actual applications, the write protection address interval set by the host is usually continuous and relatively concentrated. In this solution, the size of a second-level protection table can cover a larger address interval, and the second-level protection table will not be frequently swapped in and out when the host writes; at the same time, if there is no write protection mapping in the first-level protection table, that is, the write protection state is closed, then the write protection type judgment of the second protection table can be skipped, and the write protection judgment logic is consistent with the existing solution. Therefore, this solution has little impact on write performance on the basis of supporting the write protection function.

[0121] In the above embodiments provided in the present application, it should be understood that the disclosed methods, devices, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple components or modules can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or components or modules, which can be electrical, mechanical or other forms.

[0122] The components described as separate components may or may not be physically separated, and the components shown as components may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the components may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0123] In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each component may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0124] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0125] It should be noted that, for the convenience of description, the aforementioned method embodiments are all described as a series of action combinations, but those skilled in the art should be aware that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0126] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0127] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A write protection mapping method, characterized in that: Includes steps: receiving a write request, wherein the write request includes a write address; Matching the write protection state corresponding to the write address in the first-level protection table, and if the write protection state is on, obtaining a target second-level protection table according to the write address; Matching the write protection type corresponding to the write address in the target second-level protection table; The acquiring of the target second-level protection table according to the write address comprises: Get the write protection group size and the total number of write protection groups corresponding to a second-level protection table; Calculate the number of write protection group indexes corresponding to the write address according to the write address and the write protection group size; Calculate the table index number of the second-level protection table according to the write protection group index number and the total number of write protection groups, and obtain the target second-level protection table according to the table index number; The write protection type corresponding to the write address matched in the target second-level protection table includes: Obtain a remainder obtained by dividing the number of write protection group indexes by the total number of write protection groups; The write protection type corresponding to the write address is matched in the target second-level protection table according to the remainder.

2. A write protection mapping method according to claim 1, characterized in that: The write protection state corresponding to the write address matching the first level protection table includes; Obtain the address length corresponding to each bit in the first-level protection table; Calculate the number of offset bits of the first-level protection table according to the write address and the address length; The write protection state corresponding to the offset bit number is obtained as the write protection state corresponding to the write address.

3. A write protection mapping method according to claim 1, characterized in that: After acquiring the target second-level protection table according to the table index number, the following step further includes: Determine whether the target second-level protection table is in the memory, and if so, execute the step of matching the write protection type corresponding to the write address in the target second-level protection table; Otherwise, the historical second-level protection table in the memory is deleted, and after the target second-level protection table is stored in the memory, the step of matching the write protection type corresponding to the write address in the target second-level protection table is performed.

4. A write protection mapping method according to claim 1, characterized in that: The write protection state corresponding to the write address matched in the first level protection table includes: If the write protection state is off, write permission information is returned.

5. A write protection mapping method according to claim 2, characterized in that: include: Get the first level protection table reconstruction information; Copy all second level protection tables into memory; Traverse all the second-level protection tables in order of address from small to large. When traversing to the pending second-level protection table, obtain the write protection type of the write protection group therein. If it is not protected, continue traversing; otherwise, mark the write protection status as on at the corresponding position of the first-level protection table, and jump to the new pending second-level protection table according to the address length and continue traversing.

6. A write protection mapping device, comprising: A receiving module, used for receiving a write request, wherein the write request includes a write address; A first matching module, configured to match a write protection state corresponding to the write address in a first-level protection table, and if the write protection state is on, obtain a target second-level protection table according to the write address; A second matching module, matching the write protection type corresponding to the write address in the target second-level protection table; The acquiring of the target second-level protection table according to the write address comprises: Get the write protection group size and the total number of write protection groups corresponding to a second-level protection table; Calculate the number of write protection group indexes corresponding to the write address according to the write address and the write protection group size; Calculate the table index number of the second-level protection table according to the write protection group index number and the total number of write protection groups, and obtain the target second-level protection table according to the table index number; The write protection type corresponding to the write address matched in the target second-level protection table includes: Obtain a remainder obtained by dividing the number of write protection group indexes by the total number of write protection groups; The write protection type corresponding to the write address is matched in the target second-level protection table according to the remainder.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, each step in a write protection mapping method according to any one of claims 1 to 5 is implemented.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the processor implements the various steps in the write protection mapping method described in any one of claims 1 to 5.

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