A square wave inverter multi-level multiple harmonics joint elimination method and device

Abstract

The present invention provides a square wave inverter multi-level multiple harmonics joint elimination method and device, belonging to the field of multi-level inverter technology. The present invention adopts a simplified idea of ​​symmetrical phase shifting and phase elimination of multiple module waveforms, utilizes multiple superimposed harmonic elimination of square wave inverter modules, and eliminates multiple harmonics in combination; the present invention studies how to shift phases between multiple cascaded square wave inverter modules, and finally achieves harmonic elimination of superimposed multi-level waveforms. The present invention utilizes the ability of multiple harmonic combination elimination to eliminate low-order harmonics to the maximum extent, solving the problem of low-order harmonic suppression; not only can single harmonic elimination of multi-level circuits with 2 or 3 modules be achieved, but also multiple harmonic elimination of multi-level circuits with a module number that is a prime number greater than 3 (5, 7, 11, 13, 17, 19, 21) or a prime factor greater than 3 (10, 14, 20) can be achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of multi-level inverter, and in particular to a method and device for jointly eliminating multi-level harmonics of square wave inverter. Background Art

[0002] Multiple superposition of square wave inverter circuits is a method of generating a multi-level inverter. The output voltage of the square wave inverter module is a square wave. The output voltage of the square wave inverter module is phase-shifted and superimposed in series through the secondary of the output transformer to produce a step wave.

[0003] The square wave contains abundant harmonic components. The high-order harmonic components (such as 23rd and above harmonics) in the step wave obtained by multiple superposition can be greatly attenuated by connecting the inverter module output in series with a low-pass filter to meet the requirements of spurious suppression. However, the filter has a weak harmonic suppression ability for harmonics below the 23rd order, especially low-order harmonics close to the fundamental wave, and it is difficult to achieve an ideal filtering effect through a low-pass filter. In order to solve the above contradictions, the industry usually adopts the method of eliminating the fundamental harmonics by eliminating the single harmonics one by one. This method is based on the simplified idea of ​​symmetrical phase shift and elimination of multiple module waveforms. For a multi-level circuit formed by the series superposition of two square wave inverter modules with the same output amplitude and phase difference (k is a non-zero positive odd number), the kth harmonic can be eliminated; for three square wave inverter modules with the same output amplitude and phase difference (k is a non-zero positive odd number), the kth harmonic can be eliminated. For the above single harmonic elimination method, the number of square wave inverter modules can be factorized into 2 s ×3 t The method can eliminate (s+t) groups of harmonics one by one by superimposing waveforms on a multi-level circuit. However, this method is no longer applicable to a multi-level circuit with a prime number greater than 3 (such as 5, 7, 11, 13, 17, 19, and 21 modules) or a multi-level circuit with a prime factor greater than 3 (such as 10, 14, and 20 modules). Summary of the invention

[0004] The present invention provides a square wave inverter multi-level multiple harmonics joint elimination method and device, which are used to solve the defect that a single harmonic successive elimination method is no longer applicable to a prime number whose number of modules is greater than 3.

[0005] In a first aspect, the present invention provides a method for joint elimination of multi-level harmonics of a square wave inverter, comprising: representing the basic output waveform of a square wave inverter module as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0; according to the number of cascaded square wave inverter modules m Determine the number of harmonic frequencies that can be eliminated j And the harmonic frequency that can be eliminated; the number of square wave inverter modules m When is an odd number greater than 1, ; The number of square wave inverter modulesm When is an even number greater than 1, ; Take the phase shift angle as the quantity to be solved, and the coefficient of the harmonic component of the harmonic frequency that can be eliminated is 0 as the constraint to establish a system of equations and solve j phase shift angle; based on the basic output waveform, j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j The phase-shifted waveform; m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j waveforms are superimposed to generate a multi-level waveform; according to the multi-level waveform and 2 j The phase shift angle determines the turn-on and turn-off time of each square wave inverter module outputting a high level.

[0006] According to a square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, based on the basic output waveform, j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j The waveforms after phase shift are as follows: Taking the basic output waveform as the reference, the basic output waveform is phase shifted by , , , ,……, , Phase shift; obtain the basic output waveform and perform phase shift operation to generate 2 j A phase-shifted waveform.

[0007] According to a square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, after determining m When is an odd number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically:

[0008]

[0009] in, , ,……, express j Phase shift angle.

[0010] According to a square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, after determining m When is an even number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically:

[0011]

[0012] in, , ,……, express j Phase shift angle.

[0013] According to a square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, the basic output waveform of the square wave inverter module is a two-level waveform with a duty cycle of 50%.

[0014] According to a square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, when there are multiple solutions to the equation group, a group of solutions with the smallest sum of the absolute values ​​of all solutions is selected as the final solution.

[0015] According to the present invention, a square wave inverter multi-level multiple harmonics joint elimination method is provided, and the square wave inverter multi-level multiple harmonics joint elimination method is applicable to the number of square wave inverter modules. m Multi-level circuits with a value less than or equal to 21.

[0016] In a second aspect, the present invention further provides a square wave inverter multi-level multiple harmonics joint elimination device, comprising:

[0017] A first processing module, used for expressing the basic output waveform of the square wave inverter module as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0;

[0018] The second processing module is used to convert the square wave inverter modules into m Determine the number of harmonic frequencies that can be eliminated j And the harmonic frequency that can be eliminated; the number of square wave inverter modules m When is an odd number greater than 1, ; The number of square wave inverter modules m When is an even number greater than 1, ;

[0019] The third processing module is used to establish a set of equations with the phase shift angle as the quantity to be solved and the coefficient of the relevant harmonic component of the harmonic frequency that can be eliminated as 0 as a constraint, and solve the j Phase shift angle;

[0020] The fourth processing module is used to use the basic output waveform as a reference, according to j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 jA phase-shifted waveform;

[0021] The fifth processing module is used to determine m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j Waveforms are superimposed to generate multi-level waveforms;

[0022] The sixth processing module is used for processing the multi-level waveform and 2 j The phase shift angle determines the turn-on and turn-off time of each square wave inverter module outputting a high level.

[0023] In a third aspect, the present invention provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the square wave inverter multi-level multiple harmonics joint elimination method as described in any one of the above are implemented.

[0024] In a fourth aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above-described square wave inverter multi-level multiple harmonics joint elimination methods.

[0025] The square wave inverter multi-level multiple harmonics combined elimination method and device provided by the present invention utilize the multiple harmonics combination elimination capability to eliminate low-order harmonics to the maximum extent, thus solving the problem of low-order harmonic suppression.

[0026] The present invention can not only achieve single harmonic elimination of a multi-level circuit with 2 or 3 modules, but also achieve multiple harmonic elimination of a multi-level circuit with a module number that is a prime number greater than 3 (5, 7, 11, 13, 17, 19, 21) or a prime factor greater than 3 (10, 14, 20). The number of harmonics that can be eliminated is positively correlated to the number of modules, and the harmonic content of the eliminated frequency is no more than -100 dB. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 This is one of the flow charts of the square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention;

[0029] Figure 2 This is the second flow chart of the square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention;

[0030] Figure 3 This is a multi-level waveform diagram after the multi-level circuit containing 20 square wave inverter modules provided by the present invention is superimposed;

[0031] Figure 4 This is a multi-level waveform diagram after the multi-level circuit containing 21 square wave inverter modules provided by the present invention is superimposed;

[0032] Figure 5 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] It should be noted that, in the description of the embodiments of the present invention, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "include one..." do not exclude the existence of other identical elements in the process, method, article or device including the elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0035] The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more.

[0036] The square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention is applicable to the number of square wave inverter modules. mThe invention adopts the simplification idea of ​​symmetrical phase shift and phase cancellation of multiple module waveforms, utilizes the multiple superposition harmonic elimination of square wave inverter modules, and combines to eliminate multiple harmonics.

[0037] Combine the following Figure 1-Figure 5 The invention describes a method and device for joint elimination of multi-level harmonics of square wave inverter provided by an embodiment of the invention.

[0038] Figure 1 FIG. 1 is one of the flow charts of the square wave inverter multi-level multiple harmonics joint elimination method provided by the present invention, such as Figure 1 As shown, including but not limited to the following steps:

[0039] Step 101: Representing the basic output waveform of the square wave inverter module as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0.

[0040] Specifically, the inverter output (basic output waveform) of the square wave inverter module is expressed in Fourier series form as:

[0041] (1)

[0042] in, n is an odd number, the basic output waveform naturally does not contain even components, is a constant, t is the time variable.

[0043] Step 102: According to the number of cascaded square wave inverter modules m Determine the number of harmonic frequencies that can be eliminated j and harmonic frequencies that can be eliminated.

[0044] Figure 2 FIG. 2 is a flow chart of the method for joint elimination of multiple harmonics of square wave inverter multi-level provided by the present invention. Figure 2 As shown, the number of square wave inverter modules m When is an odd number greater than 1, , the harmonic frequency that can be eliminated is , ;

[0045] Number of square wave inverter modules m When is an even number greater than 1, , the harmonic frequency that can be eliminated is , .

[0046] Specifically, Table 1 is a summary table of harmonic frequencies eliminated by multi-level circuit combinations, showing the number of harmonic frequencies that can be eliminated corresponding to different square wave inverter modules. 、Eliminable harmonic frequencies and minimum harmonic frequencies.

[0047] Table 1 Summary of harmonic frequency elimination by multi-level circuit combination

[0048]

[0049] From the table above, we can see that: 1) The more modules there are, the more harmonics can be eliminated; 2) m =2 j +1 or m =2 j , the output voltage of the multi-level circuit is not greater than 2 j +1 harmonics can be eliminated. From the perspective of the lowest harmonic frequency, when the lowest harmonic frequency is 23, the number of modules is only 20; 3) The multiple harmonic combination elimination method is suitable for multi-level circuits with a module number not exceeding 21. For example, 5 modules can eliminate 2 low-order harmonic frequencies, and the lowest harmonic frequency is 7; 20 modules can eliminate 10 low-order harmonic frequencies, and the lowest harmonic frequency is 23.

[0050] Step 103: Establish a system of equations with the phase shift angle as the quantity to be solved and the coefficient of the harmonic component of the harmonic frequency that can be eliminated as 0 as the constraint, and solve j Phase shift angle.

[0051] ( a ) in determining m When the value is an odd number greater than 1, the basic output waveform is used as the reference and the , , , ,……, , After phase shifting, the basic output waveform and 2 j The waveforms obtained by phase shifting are superimposed, and the synthetic voltage waveform can be expressed as:

[0052] (2)

[0053] for Subharmonics, and their related harmonic components can be simplified as:

[0054] (3)

[0055] If in formula (3) The coefficient is zero. That is:

[0056] (4)

[0057] Then for any time t , formula (3) ≡ 0, that is, the output waveform of the multi-level circuit does not contain Subharmonics.

[0058] Similarly, for other frequencies ( ,……, )The coefficients of the relevant harmonic components are zero, forming equation group (5).

[0059] (5)

[0060] The solution , ,……, The output waveform of the multi-level circuit represented by equation (2) can be made to not contain , ,……, Subharmonics.

[0061] Equation (5) is j The system of equations can be solved with the help of mathematical tools such as Mathcad.

[0062] ( b ) in determining m When the value is an even number greater than 1, the basic output waveform is used as the reference and the , , , ,……, , After phase shifting, the basic output waveform and 2 j The waveforms obtained by phase shifting are superimposed, and the synthetic voltage waveform can be expressed as:

[0063] (6)

[0064] for Subharmonics, and their related harmonic components can be simplified as:

[0065] (7)

[0066] If in formula (7) The coefficient is zero. That is:

[0067] (8)

[0068] Then for any time t , formula (7) ≡ 0, that is, the output waveform of the multi-level circuit does not contain Subharmonics.

[0069] Similarly, for other frequencies ( ,……, )The coefficients of the relevant harmonic components are zero, forming equation group (9).

[0070] (9)

[0071] The solution , ,……, The output waveform of the multi-level circuit represented by equation (6) does not contain , ,……, Subharmonics.

[0072] Equation (9) is j The system of equations can be solved with the help of mathematical tools such as Mathcad.

[0073] Optionally, when there are multiple solutions to the system of equations, a solution with the smallest sum of the absolute values ​​of all solutions is selected as the final solution. The smaller solution is taken as the phase shift angle.

[0074] Step 104: Based on the basic output waveform, j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j A phase-shifted waveform.

[0075] The present invention takes the basic output waveform as a reference, and performs phase shifting of the basic output waveform by , , , ,……, , Phase shift; obtain the basic output waveform and perform phase shift operation to generate 2 j A phase-shifted waveform.

[0076] Step 105: After confirming m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j The waveforms are superimposed to generate a multi-level waveform.

[0077] In determining m When is an odd number greater than 1, the generated multi-level waveform is shown in formula (2); m For an even number greater than 1, according to 2 j The multi-level waveform is generated by superimposing the waveforms, see formula (6).

[0078] Step 106: According to the multi-level waveform and 2 jThe phase shift angle determines the turn-on and turn-off time of each square wave inverter module outputting a high level. The basic output waveform phase is used as the reference for calculation. If the basic output waveform phase is 0, the turn-on and turn-off time of the square wave inverter module corresponding to the basic output waveform are 0 and π respectively. j The turn-on and turn-off times of the square wave inverter module corresponding to the phase-shifted waveform are , , , ,……, , and , , , ,……, , , i is an integer whose value is chosen to adjust the switching time and the turning-off time in the interval [0, 2π].

[0079] In general, for m When it is an odd number greater than 1, the corresponding opening and closing times of each square wave inverter module are: 0 and π, and , and , and , and ,……, and , and .for m When is an even number greater than 1, the corresponding turn-on and turn-off times of each square wave inverter module are: and , and , and , and ,……, and , and .

[0080] The square wave inverter multi-level multiple harmonics combined elimination method and device provided by the present invention utilize the multiple harmonics combination elimination capability to eliminate low-order harmonics to the maximum extent, thus solving the problem of low-order harmonic suppression.

[0081] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention further describes the implementation methods by taking 20 modules and 21 modules as examples.

[0082] 1. 20 modules

[0083] The inverter output of the square wave inverter module is expressed in Fourier series form as:

[0084] (10)

[0085] 1) Determine the number of cascaded square wave inverter modules m = 20. According to the number of square wave inverter modules, determine the number of harmonic frequencies that can be eliminated j = 10. The inverter output (i.e., the basic output waveform) of a single square wave inverter module is a two-level waveform with an amplitude of 1 and a duty cycle of 50%.

[0086] 2) Determine the harmonic frequencies that need to be eliminated. According to the number of harmonic frequencies that can be eliminated 10, select the harmonic frequencies that need to be eliminated 3, 5, 7, 9, 11, 13, 15, 17, 19, 21.

[0087] 3) Determine the phase relationship between the 10 square wave inverter modules. Establish equation group (10) as follows:

[0088] (11)

[0089] Using Mathcad to solve the system of equations, phase angle , ,……, They are: 0.08205, 0.42553, 0.25223, 1.91719, 0.62864, 0.84698, 0.66287, 2.46701, 1.2785 and 1.11858.

[0090] 4) Based on the phase shift angle determined in step 3), draw a multi-level waveform diagram after 20 inverter modules are superimposed, as shown in Figure 3 As shown, Figure 3 It is a multi-level waveform diagram after the multi-level circuit provided by the present invention contains 20 square wave inverter modules superimposed, wherein the sine waveform (red waveform) is the fundamental wave.

[0091] Table 2 The time table of turning on and off the high level output of each module in the 20-module multi-level circuit

[0092]

[0093] 5) According to the phase shift angle , ,……, , , ,……, , and obtain the high-level turn-on and turn-off time of each square wave inverter module output. As shown in Table 2, Table 2 shows the high-level turn-on and turn-off time of each module output of the 20-module multi-level circuit.

[0094] 6) According to the above parameter configuration, the harmonic content of the multi-level circuit is shown in Table 3. Table 3 shows the harmonic content of the 20-module multi-level circuit. The odd-order harmonic content is the logarithm of the effective value of each harmonic relative to the effective value of the fundamental wave. . Fundamental content h 1 means the output voltage fundamental effective value and harmonic content of the multi-level circuit with 20 modules superimposed It indicates the effective value of the nth harmonic of the output voltage of the multi-level circuit with 20 modules superimposed.

[0095] Table 3 Harmonic content of 20-module multi-level circuit

[0096]

[0097] It can be seen from Table 3 that the 3rd to 21st harmonic contents are all less than -119dB.

[0098] 21 modules

[0099] The inverter output of the square wave inverter module is expressed in the form of Fourier series:

[0100] (12)

[0101] 1) Determine the number of cascaded inverter modules m = 21. According to the number of inverter modules, determine the number of harmonic frequencies that can be eliminated j = 10. The inverter output (i.e., the basic output waveform) of a single square wave inverter module is a two-level waveform with an amplitude of 1 and a duty cycle of 50%.

[0102] 2) Determine the harmonic frequencies that need to be eliminated. According to the number of harmonic frequencies that can be eliminated 10, select the harmonic frequencies that need to be eliminated 3, 5, 7, 9, 11, 13, 15, 17, 19, 21.

[0103] 3) Determine the phase relationship between the 10 square wave inverter modules. Establish equation group (13) as follows:

[0104] (13)

[0105] Using Mathcad to solve the system of equations, phase angle , ,……, They are: 0.31131, 0.66092, 0.1535, 2.36422, 0.77163, 0.8778, 1.13585, 0.47635, 1.28921 and 1.90467.

[0106] 4) Based on the phase shift angle determined in step 3), draw a multi-level waveform diagram after superimposing 21 inverter modules, as shown in Figure 4 As shown, Figure 4 It is a multi-level waveform diagram after the multi-level circuit containing 21 square wave inverter modules provided by the present invention is superimposed, wherein the sine waveform (red waveform) is the fundamental wave.

[0107] 5) According to the phase shift angle , ,……, , , ,……, , and obtain the high-level turn-on and turn-off time of each square wave inverter module output. As shown in Table 4, Table 4 shows the high-level turn-on and turn-off time of each module output of the 21-module multi-level circuit.

[0108] Table 4 The time table of turning on and off the high level output of each module in the 21-module multi-level circuit

[0109]

[0110] 6) According to the above parameter configuration, the harmonic content of the multi-level circuit is shown in Table 5. Table 5 shows the harmonic content of the 21-module multi-level circuit. The odd-order harmonic content is the logarithm of the effective value of each harmonic relative to the effective value of the fundamental wave. . Fundamental content h 1 means the output voltage fundamental effective value and harmonic content of the multi-level circuit with 21 modules superimposed It indicates the effective value of the nth harmonic of the output voltage of the multi-level circuit with 21 modules superimposed.

[0111] Table 5 Harmonic content of 21-module multi-level circuit

[0112]

[0113] It can be seen from the above table that the 3rd to 21st harmonic contents are all no greater than -117dB.

[0114] In summary, the present invention can not only achieve single harmonic elimination of a multi-level circuit with 2 or 3 modules, but also achieve multiple harmonic elimination of a multi-level circuit with a module number that is a prime number greater than 3 (5, 7, 11, 13, 17, 19, 21) or a prime factor greater than 3 (10, 14, 20). The number of harmonics that can be eliminated is positively correlated to the number of modules, and the harmonic content of the eliminated frequency is no more than -100 dB.

[0115] In another aspect, the present invention further provides a square wave inverter multi-level multiple harmonics joint elimination device, comprising:

[0116] A first processing module, used for expressing the basic output waveform of the square wave inverter module as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0;

[0117] The second processing module is used to convert the square wave inverter modules into m Determine the number of harmonic frequencies that can be eliminated j And the harmonic frequency that can be eliminated; the number of square wave inverter modules m When is an odd number greater than 1, ; The number of square wave inverter modules m When is an even number greater than 1, ;

[0118] The third processing module is used to establish a set of equations with the phase shift angle as the quantity to be solved and the coefficient of the relevant harmonic component of the harmonic frequency that can be eliminated as 0 as a constraint, and solve the j Phase shift angle;

[0119] The fourth processing module is used to use the basic output waveform as a reference, according to j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j A phase-shifted waveform;

[0120] The fifth processing module is used to determine m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j Waveforms are superimposed to generate multi-level waveforms;

[0121] The sixth processing module is used for processing the multi-level waveform and 2 j The phase shift angle determines the turn-on and turn-off time of each square wave inverter module outputting a high level.

[0122] It should be noted that the square wave inverter multi-level multiple harmonics joint elimination device provided in the embodiment of the present invention can execute the square wave inverter multi-level multiple harmonics joint elimination method described in any of the above embodiments during specific operation, which will not be described in detail in this embodiment.

[0123] Figure 5 is a schematic diagram of the structure of the electronic device provided by the present invention, such as Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 communicate with each other through the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute the square wave inverter multi-level multiple harmonics joint elimination method provided in the above embodiment.

[0124] On the other hand, the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the square wave inverter multi-level multiple harmonics joint elimination method provided in the above embodiments.

[0125] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which is implemented when the computer program is executed by a processor to execute the square wave inverter multi-level multiple harmonics joint elimination method provided in the above embodiments.

[0126] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. Those of ordinary skill in the art may understand and implement the present invention without creative effort.

[0127] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A square wave inverter multi-level multiple harmonics joint elimination method, characterized in that: include: The basic output waveform of the square wave inverter module is represented as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0 and does not contain an even-order component; According to the number of cascaded square wave inverter modules m Determine the number of harmonic frequencies that can be eliminated j And the harmonic frequency that can be eliminated; the number of square wave inverter modules m When is an odd number greater than 1, ; The number of square wave inverter modules m When is an even number greater than 1, ; The phase shift angle is the quantity to be solved, and the coefficient of the harmonic component of the harmonic frequency that can be eliminated is 0 as the constraint to establish the equation system and solve it. j Phase shift angle; Based on the basic output waveform, j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j A phase-shifted waveform; In determining m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j Waveforms are superimposed to generate multi-level waveforms; According to the multi-level waveform and 2 j A phase shift angle is used to determine the turn-on and turn-off time of each square wave inverter module outputting a high level; In determining m When is an odd number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically: in, , ,……, express j Phase shift angle; In determining m When is an even number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically: in, , ,……, express j Phase shift angle.

2. The square wave inverter multi-level multiple harmonics joint elimination method according to claim 1 is characterized in that: Based on the basic output waveform, j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j The waveform after phase shift is: Taking the basic output waveform as the reference, the basic output waveform is phase shifted by , , , ,……, , Phase shift; Get the basic output waveform and perform phase shift operation to generate 2 j A phase-shifted waveform.

3. The square wave inverter multi-level multiple harmonics joint elimination method according to claim 1 is characterized in that: The basic output waveform of the square wave inverter module is a two-level waveform with a duty cycle of 50%.

4. The square wave inverter multi-level multiple harmonics joint elimination method according to claim 1 is characterized in that: When there are multiple solutions to the system of equations, a solution with the smallest sum of the absolute values ​​of all solutions is selected as the final solution.

5. The square wave inverter multi-level multiple harmonics joint elimination method according to claim 1 is characterized in that: The square wave inverter multi-level multiple harmonics joint elimination method is applicable to the number of square wave inverter modules m Multi-level circuits with a value less than or equal to 21.

6. A square wave inverter multi-level multiple harmonics joint elimination device, characterized in that: include: A first processing module, used for expressing the basic output waveform of the square wave inverter module as a preset Fourier series; the basis function of the preset Fourier series is a sine function with an initial phase of 0; The second processing module is used to convert the square wave inverter modules into m Determine the number of harmonic frequencies that can be eliminated j And the harmonic frequency that can be eliminated; the number of square wave inverter modules m When is an odd number greater than 1, ; The number of square wave inverter modules m When is an even number greater than 1, ; The third processing module is used to establish a set of equations with the phase shift angle as the quantity to be solved and the coefficient of the relevant harmonic component of the harmonic frequency that can be eliminated as 0 as a constraint, and solve the j Phase shift angle; In determining m When is an odd number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically: in, , ,……, express j Phase shift angle; In determining m When is an even number greater than 1, the harmonic frequency that can be eliminated is , , then the established equation group is specifically: in, , ,……, express j Phase shift angle; The fourth processing module is used to use the basic output waveform as a reference, according to j The phase shift angle and the corresponding j A negative phase shift angle, generating 2 j A phase-shifted waveform; The fifth processing module is used to determine m For an odd number greater than 1, the output waveform is based on the basic output waveform and 2 j The phase-shifted waveforms are superimposed to generate a multi-level waveform; m For an even number greater than 1, according to 2 j Waveforms are superimposed to generate multi-level waveforms; The sixth processing module is used for processing the multi-level waveform and 2 j The phase shift angle determines the turn-on and turn-off time of each square wave inverter module outputting a high level.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the square wave inverter multi-level multiple harmonics joint elimination method as claimed in any one of claims 1 to 5 are implemented.

8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the square wave inverter multi-level multiple harmonics joint elimination method as claimed in any one of claims 1 to 5 are implemented.

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