A DCDC type source measurement unit

Abstract

The present invention discloses a DCDC type source measurement unit, which includes a first and a second FPGA controller, an adjustable Buck-Boost circuit, a bidirectional isolation DCDC circuit, an electronic load, and an adjustable bidirectional Buck-Boost DCDC circuit. Among them, the first and second controllers are the control parts of the entire DCDC type source measurement unit. The adjustable Buck-Boost circuit is used to adjust the voltage of the input bidirectional isolation DCDC power supply to achieve different hardware gear voltages, and can also simplify the transformer design of the bidirectional isolation DCDC circuit. The bidirectional isolation DCDC circuit is used to provide positive and negative power supplies for the subsequent isolation output. The electronic load is used to consume the current absorbed by the bidirectional isolation DCDC power supply. The adjustable bidirectional Buck-Boost DCDC power supply is used to achieve rapid transformation of the output voltage and a powerful output driving ability, and can output current or absorb current. The present invention adopts a DCDC type power supply architecture to improve the overall efficiency and power of the device, uses a bidirectional isolation DCDC power supply to achieve dual power supply and power backflow, and uses an adjustable bidirectional Buck-Boost DCDC power supply to achieve a high-efficiency and high-power output stage. Compared with the prior art, the present invention has the advantages of flexible configuration, high efficiency, and high output power.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic measurement, and more specifically, relates to a DCDC type source measure unit. Background Art

[0002] A source measure unit (SMU for short) is an instrument used to accurately measure current and voltage, and is usually used in electronic test and measurement applications. The SMU combines the functions of a power supply and a measurement device, and can provide a source current or voltage in the same device, and simultaneously measure the corresponding current or voltage value, thus simplifying the configuration and connection of the test system. This device is widely used in the fields of semiconductors, materials science, electronic component testing, and other fields that require precise electrical measurements.

[0003] Existing source measure units have three development directions. One is to improve measurement accuracy, the second is to increase measurement bandwidth, and the third is to improve efficiency and output power.

[0004] As Figure 1 shown, the source measure unit can be used as a four-quadrant power supply. As the name implies, a four-quadrant power supply can output positive voltage and positive current (first quadrant), negative voltage and positive current (second quadrant), negative voltage and negative current (third quadrant), and positive voltage and negative current (fourth quadrant).

[0005] Since a power operational amplifier can achieve the four-quadrant power supply function under the power supply conditions of positive and negative dual power supplies, traditional source measure units use a power operational amplifier as the output stage. Although the power operational amplifier has the advantages of simple design, large output bandwidth, small output noise, etc., it has a natural defect that its efficiency is extremely low when outputting small voltage and large current, which severely limits the output power of the source measure unit. For example, when the power operational amplifier is powered by ±xV, outputs yV voltage and zA current, its output efficiency is:

[0006]

[0007] It can be seen from the above formula that when outputting small voltage and large current, the output efficiency of the power operational amplifier is extremely low and the internal thermal power consumption is extremely large. Therefore, the power operational amplifier type source measure unit cannot achieve high-power output.

[0008] Using DCDC as the output stage of the source measure unit can achieve high-power output. At the same time, the power supply of the instrument equipment is generally single-power supply. How to achieve the four-quadrant output of DCDC through single-power supply has become a key problem to be solved. Summary of the Invention

[0009] The object of the present invention is to overcome the deficiencies of the prior art and provide a DCDC type source measurement unit, which realizes the four-quadrant output with DCDC as the output stage under the condition of single power supply.

[0010] To achieve the above object of the invention, the DCDC type source measurement unit of the present invention includes a host computer for setting the output voltage value and current value. It is characterized by further comprising:

[0011] A first controller for receiving the voltage value and current value output from the host computer;

[0012] An adjustable Buck-Boost DCDC circuit for converting the voltage VCC of a single power supply into the voltage VPP: The first controller controls the output of different voltages by controlling a DAC according to the voltage value from the host computer, so as to control the adjustable Buck-Boost DCDC circuit to output different voltages, realize the voltage level transformation, and the output voltage VPP is sent to the input end of the bi-directional isolation DCDC circuit through a diode. Wherein, the positive end of the diode is connected to the voltage VPP, the negative end of the diode is connected to the input end of the bi-directional isolation DCDC circuit, and the ground of the adjustable Buck-Boost DCDC circuit is connected to the ground GND1 of the single power supply;

[0013] An isolation circuit, a second controller and an electronic load. The voltage value and current value output from the host computer received by the first controller are sent to the second controller through the isolation circuit;

[0014] The bi-directional isolation DCDC circuit includes two groups of transformers T1 and T2. Among them, both ends of the primary side of the transformer T1 are connected to the MOS switch tubes Q1 and Q2. The voltage VPP is connected to one end of the primary side of the transformer T1, and this end is the same-name terminal. The other end of the primary side of the transformer T1 is grounded to GND1 through the MOS switch tube Q2. The center tap of the secondary side of the transformer T1 is used as the isolated ground GND2. The same-name terminal of the secondary side of the transformer T1 is output to the rectifier circuit through the MOS switch tube Q4 to obtain the negative voltage -VDD, and the different-name terminal of the secondary side of the transformer T1 is output to another rectifier circuit through the MOS switch tube Q3 to obtain the positive voltage +VDD; Both ends of the primary side of the transformer T2 are connected to the MOS switch tubes Q5 and Q6. The connection end of the MOS switch tube Q3 and another rectifier circuit is connected to one end of the primary side of the transformer T2, and this end is the same-name terminal. The other end of the primary side of the transformer T2 is grounded to GND2 through the MOS switch tube Q6. The same-name terminal of the secondary side of the transformer T2 is grounded to GND1, and the different-name terminal of the secondary side of the transformer T2 is output to the positive end of the electronic load through the MOS switch tube Q7, and the ground terminal of the electronic load is grounded to GND1;

[0015] Adjust the output power of the bidirectional isolation DCDC circuit by controlling the on-off time of the switching tubes: The MOS transistors Q1, Q2, and Q7 of the switch are directly controlled by the first controller, and the MOS switching transistors Q3, Q4, Q5, and Q6 are controlled by the first controller through an isolation circuit. When the DCDC type source measurement unit outputs a positive current as a source, the transformer T1 works and the transformer T2 does not work. The operations of the MOS switching transistors related to the T1 transformer are as follows: First, the MOS switching transistor Q2 is turned on, and the MOS switching transistors Q1, Q3, and Q4 are turned off. The primary side of the transformer T1 is charged, and the primary side's same-name terminal is positive. The current flows into from the primary side's same-name terminal and flows out from the opposite-name terminal, passing through the MOS switching transistor Q2 to the ground GND1. At this time, the secondary side of the transformer T1 accumulates energy due to the turning off of the MOS switching transistors Q3 and Q4. Then, the MOS switching transistor Q2 is turned off, and the MOS switching transistors Q1, Q3, and Q4 are turned on. The primary side of the transformer T1 discharges, and the primary side's same-name terminal is negative. The current flows into the same-name terminal from the opposite-name terminal through the MOS switching transistor Q1. The secondary side of the transformer T1 discharges, and the current output from the opposite-name terminal of the secondary side passes through the MOS switching transistor Q3 to another rectifier circuit to obtain the positive voltage +VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. The negative current output from the same-name terminal of the secondary side passes through the MOS switching transistor Q4 to the rectifier circuit to obtain the negative voltage -VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. Adopt the constant-frequency PWM control method to control the power transmission of the converter T1 by adjusting the duty cycle of the MOS switching transistors Q1 to Q4. The operations of the MOS switching transistors related to the transformer T2 are as follows: The MOS switching transistor Q5 is turned on, and the MOS switching transistors Q6 and Q7 are turned off. The transformer T2 does not work;

[0016] When the DCDC type source measurement unit absorbs a negative current as a load, the working mode of the transformer T1 is the same as when it is a source, and the transformer T2 starts to work: First, the MOS switching transistor Q6 is turned on, and the MOS switching transistors Q5 and Q7 are turned off. The primary side of the transformer T2 is charged, and the primary side's same-name terminal is positive. The current flows into from the primary side's same-name terminal and flows out from the opposite-name terminal, passing through the MOS switching transistor Q6 to the ground GND2. At this time, the secondary side of the transformer T2 accumulates energy due to the turning off of the MOS switching transistor Q7. Then, the MOS switching transistor Q6 is turned off, and the MOS switching transistors Q5 and Q7 are turned on. The primary side of the transformer T2 discharges, and the primary side's same-name terminal is negative. The current flows into the same-name terminal from the opposite-name terminal through the MOS switching transistor Q5. The secondary side of the transformer T1 discharges, and the current output from the opposite-name terminal of the secondary side passes through the MOS switching transistor Q7 to the electronic load. Adopt the constant-frequency PWM control method to control the absorption power of the electronic load by adjusting the duty cycle of each switching transistor of the MOS switching transistors Q5 to Q7;

[0017] The second controller collects the negative voltage -VDD output by the bidirectional isolated DCDC circuit through the analog-to-digital converter ADC1, and collects the positive voltage +VDD output by the bidirectional isolated DCDC circuit through the analog-to-digital converter ADC2, and then returns to the first controller through the isolation circuit to form a closed-loop control to achieve power transmission control and absorption power control;

[0018] The adjustable bidirectional Buck-Boost DCDC circuit, as the output driving stage of the DCDC type source measurement unit, includes an upper MOS switch tube, a lower MOS switch tube and an LC filter. The positive voltage +VDD output of the bidirectional isolated DCDC circuit passes through the upper MOS switch tube and the lower MOS switch tube to the negative voltage -VDD output. The connection between the upper MOS switch tube and the lower MOS switch tube is connected to the LC filter. The voltage at the connection is output as the negative voltage -VDD to the adjustable voltage of the positive voltage +VDD through the inductor of the LC filter. The filter capacitor of the LC filter is connected from its inductor output terminal to the ground GND2;

[0019] The adjustable voltage output by the adjustable bidirectional Buck-Boost DCDC circuit is connected to the voltage input terminal of the device under test, and the ground of the device under test is connected to the isolated ground GND2;

[0020] When the positive voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the first quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and positive current with -VDD as the reference. The positive voltage is greater than GND2 and less than VDD; when the negative voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the second quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and positive current with -VDD as the reference. The positive voltage is greater than -VDD and less than GND2; when the negative voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the third quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and negative current with -VDD as the reference. The positive voltage is greater than -VDD and less than GND2; when the positive voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the fourth quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and negative current with -VDD as the reference. The positive voltage is greater than GND2 and less than VDD; The second controller collects the adjustable voltage output by the adjustable bidirectional Buck-Boost DCDC circuit through the analog-to-digital converter ADC3, and collects the current output by the adjustable bidirectional Buck-Boost DCDC circuit through the analog-to-digital converter ADC4. The collected adjustable voltage and current are transmitted to the second controller, and are calculated according to the voltage value and current value output from the host computer, and the corresponding duty cycle is output to control the upper MOS switch tube and the lower MOS switch tube of the bidirectional Buck-Boost DCDC circuit to achieve the voltage and current output in the four quadrants.

[0021] The object of the present invention is achieved as follows:

[0022] The DCDC type source measurement unit of the present invention includes a first and a second FPGA controller, an adjustable Buck - Boost circuit, a bi - directional isolation DCDC circuit, an electronic load, and an adjustable bi - directional Buck - Boost DCDC circuit. Among them, the first and second controllers are the control parts of the entire DCDC type source measurement unit. The adjustable Buck - Boost circuit is used to adjust the voltage of the input bi - directional isolation DCDC power supply to achieve different hardware - level voltages, and can also simplify the transformer design of the bi - directional isolation DCDC circuit. The bi - directional isolation DCDC circuit is used to provide positive and negative power supplies for the subsequent isolation output. The electronic load is used to consume the current absorbed by the bi - directional isolation DCDC power supply. The adjustable bi - directional Buck - Boost DCDC power supply is used to achieve rapid transformation of the output voltage and strong output driving ability, and can output current or absorb current. The present invention adopts a DCDC type power architecture to improve the overall efficiency and power of the device, uses a bi - directional isolation DCDC power supply to achieve dual - power supply and power back - feeding, and uses an adjustable bi - directional Buck - Boost DCDC power supply to achieve a high - efficiency and high - power output stage. Compared with the prior art, the present invention has the advantages of flexible configuration, high efficiency, and high output power. Description of the Drawings

[0023] Figure 1 is the voltage - current region diagram of the source measurement unit as a four - quadrant power supply;

[0024] Figure 2 is the hardware architecture block diagram of a specific embodiment of the DCDC type source measurement unit of the present invention;

[0025] Figure 3 is Figure 2 the schematic diagram of the principle of the bi - directional isolation DCDC circuit shown;

[0026] Figure 4 is Figure 2 the schematic diagram of the principle of the adjustable bi - directional Buck - Boost DCDC circuit shown;

[0027] Figure 5 is the power - quadrant conversion diagram of the present invention. Specific Embodiments

[0028] The following describes the specific embodiments of the present invention with reference to the drawings, so that those skilled in the art can better understand the present invention. It should be particularly noted that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0029] Figure 2It is a hardware architecture block diagram of a specific embodiment of the DCDC type source measurement unit of the present invention.

[0030] The present invention provides a DCDC type source measurement unit, which realizes four-quadrant output by optimizing power supply division and output drive stage. Specifically, by constructing a three-stage DCDC circuit and adjusting the input voltage and output voltage of the DCDC circuit, the output quadrant requirements of each stage of the DCDC circuit can be simplified, so as to realize four-quadrant power output under single power supply. In this embodiment, as Figure 1 shown, the DCDC type source measurement unit of the present invention includes a host computer 1, a first controller 2, an adjustable Buck-Boost DCDC circuit 3, an isolation circuit 4, a second controller 5, an electronic load 6, a bi-directional isolation DCDC circuit 7, and an adjustable bi-directional Buck-Boost DCDC circuit 8.

[0031] The host computer 1 is used to set the output voltage value and current value. In this embodiment, the host computer 1 is used to run the host computer software, set parameters such as voltage value and current value in the software, and then send them to the first controller 2 through the PCIe bus protocol.

[0032] The first controller 2 is used to receive the output voltage value and current value from the host computer 1. The adjustable Buck-Boost DCDC circuit 3 converts the voltage VCC of the single power supply into the voltage VPP: the first controller 2 controls the adjustable Buck-Boost DCDC circuit 3 to output different voltages by controlling a DAC to output different voltages according to the voltage value from the host computer 1, so as to realize voltage level conversion, and this method can also simplify the transformer design of the subsequent bi-directional isolation DCDC. The output voltage VPP is sent to the input end of the bi-directional isolation DCDC circuit 3 through the diode D1. Among them, the positive end of the diode D is connected to the voltage VPP, the negative end of the diode D1 is connected to the input end of the bi-directional isolation DCDC circuit 7, and the ground of the adjustable Buck-Boost DCDC circuit 3 is connected to the ground GND1 of the single power supply.

[0033] In this embodiment, the first controller 2 is constructed by a piece of FPGA, denoted as FPGA1. The diode D1 plays a role in preventing backflow. The voltage value and current value output from the host computer 1 received by the first controller 2 are sent to the second controller 5 through the isolation circuit 4.

[0034] In this embodiment, as Figure 3As shown, the bidirectional isolation DCDC circuit 7 includes two sets of transformers T1 and T2. Among them, both ends of the primary side of transformer T1 are connected to MOS switch Q1, voltage VPP is connected to one end of the primary side of transformer T1, and this end is the same-named terminal. The other end of the primary side of transformer T1 is grounded to GND1 through MOS switch Q2. The center tap of the secondary side of transformer T1 is used as the isolated ground GND2 after isolation. The same-named terminal of the secondary side of transformer T1 is output to the rectifier circuit through MOS switch Q4 to obtain a negative voltage -VDD, and the opposite-named terminal of the secondary side of transformer T1 is output to another rectifier circuit through MOS switch Q3 to obtain a positive voltage +VDD. Both ends of the primary side of transformer T2 are connected to MOS switch Q5. The connection terminal of MOS switch Q3 and another rectifier circuit is connected to one end of the primary side of transformer T2, and this end is the same-named terminal. The other end of the primary side of transformer T2 is grounded to GND2 through MOS switch Q6. The same-named terminal of the secondary side of transformer T2 is grounded to GND1, and the opposite-named terminal of the secondary side of transformer T2 is output to the positive end of the electronic load through MOS switch Q7, and the ground terminal of the electronic load is grounded to GND1.

[0035] In this embodiment, as Figure 3 shown, capacitors C1 to C12 are filter capacitors. Among them, capacitors C7 and C9 and inductor L2 form a rectifier circuit, and capacitors C6 and C8 and inductor L1 form another rectifier circuit.

[0036] Adjust the output power of the bidirectional isolation DCDC circuit by controlling the conduction and cutoff time of the switching tubes: The MOS transistors Q1, Q2, and Q7 are directly controlled by the first controller, and the MOS switching transistors Q3, Q4, Q5, and Q6 are controlled by the first controller through an isolation circuit. When the DCDC type source measurement unit outputs a positive current as a source, the transformer T1 works and the transformer T2 does not work. The operations of the MOS switching transistors related to the T1 transformer are as follows: First, the MOS switching transistor Q2 conducts, and the MOS switching transistors Q1, Q3, and Q4 turn off. The primary side of the transformer T1 is charged, and the primary side's same-name terminal is positive. The current flows in from the primary side's same-name terminal and out from the primary side's different-name terminal, passing through the MOS switching transistor Q2 to the ground GND1. At this time, the secondary side of the transformer T1 accumulates energy due to the cutoff of the MOS switching transistors Q3 and Q4. Then, the MOS switching transistor Q2 turns off, and the MOS switching transistors Q1, Q3, and Q4 conduct. The primary side of the transformer T1 discharges, and the primary side's same-name terminal is negative. The current flows from the different-name terminal through the MOS switching transistor Q1 into the same-name terminal. The secondary side of the transformer T1 discharges, and the current output from the secondary side's different-name terminal passes through the MOS switching transistor Q3 to another rectifier circuit to obtain a positive voltage +VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. The negative current output from the secondary side's same-name terminal passes through the MOS switching transistor Q4 to the rectifier circuit to obtain a negative voltage -VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. Adopt the constant-frequency PWM control method, and control the power transmission of the transformer T1 by adjusting the duty cycle of the MOS switching transistors Q1 to Q4. The operations of the MOS switching transistors related to the transformer T2 are as follows: The MOS switching transistor Q5 conducts, and the MOS switching transistors Q6 and Q7 turn off. The transformer T2 does not work.

[0037] When the DCDC type source measurement unit absorbs a negative current as a load, the working mode of the transformer T1 is the same as when it is a source, and the transformer T2 starts to work: First, the MOS switching transistor Q6 conducts, and the MOS switching transistors Q5 and Q7 turn off. The primary side of the transformer T2 is charged, and the primary side's same-name terminal is positive. The current flows in from the primary side's same-name terminal and out from the primary side's different-name terminal, passing through the MOS switching transistor Q6 to the ground GND2. At this time, the secondary side of the transformer T2 accumulates energy due to the cutoff of the MOS switching transistor Q7. Then, the MOS switching transistor Q6 turns off, and the MOS switching transistors Q5 and Q7 conduct. The primary side of the transformer T2 discharges, and the primary side's same-name terminal is negative. The current flows from the different-name terminal through the MOS switching transistor Q5 into the same-name terminal. The secondary side of the transformer T1 discharges, and the current output from the secondary side's different-name terminal passes through the MOS switching transistor Q7 to the electronic load. Adopt the constant-frequency PWM control method, and control the absorption power of the electronic load 6 by adjusting the duty cycle of each of the MOS switching transistors Q5 to Q7.

[0038] The second controller 5 collects the negative voltage -VDD output by the bidirectional isolated DCDC circuit 7 through the analog-to-digital converter ADC1, and collects the positive voltage +VDD output by the bidirectional isolated DCDC circuit 7 through the analog-to-digital converter ADC2, and then returns to the first controller 2 through the isolation circuit 4 to form a closed-loop control to achieve power transmission control and absorbed power control.

[0039] The primary-side switching MOS transistor of the bidirectional isolated DCDC circuit 7 is directly controlled by the FPGA1, the control signal of the secondary-side synchronous rectification MOS switching transistor is controlled through the isolation circuit 4, the feedback voltage signal is collected by the secondary-side ADC1 and ADC2 and then transmitted to the FPGA2, and the FPGA2 is then transmitted to the FPGA1 through the isolation chip to achieve complete isolation between the primary side and the secondary side.

[0040] As Figure 4 shown, the adjustable bidirectional Buck-Boost DCDC circuit 8 serves as the output driving stage of the DCDC type source measurement unit, and includes an LC filter composed of an upper MOS switching transistor Q8, a lower MOS switching transistor Q9, an inductor L3, and a capacitor C14. The positive voltage +VDD output of the bidirectional isolated DCDC circuit 8 passes through the upper MOS switching transistor Q8 and the lower MOS switching transistor Q9 to the negative voltage -VDD output. The connection between the upper MOS switching transistor Q8 and the lower MOS switching transistor Q9 is connected to the LC filter. The voltage at the connection is output as an adjustable voltage from the negative voltage -VDD to the positive voltage +VDD through the inductor L3 of the LC filter. The filtering capacitor C14 of the LC filter is connected to the output end of its inductor L3 to the ground GND2. The adjustable voltage of -VDD to +VDD output by the adjustable bidirectional Buck-Boost DCDC circuit 8 is connected to the voltage input end of the device under test DUT, and the ground of the device under test DUT is connected to the isolated ground GND2.

[0041] The adjustable bidirectional Buck-Boost DCDC circuit 8 serves as the output driving stage of the DCDC type source measurement unit. Adopting a synchronous control method, the conduction time of the upper MOS switching transistor Q8 and the lower MOS switching transistor Q9 of the adjustable bidirectional Buck-Boost DCDC circuit 8 is controlled by the second controller 5, that is, the FPGA2, to adjust the output voltage value. As Figure 3 shown, according to the switching method and conduction time of controlling the upper MOS switching transistor Q8 and the lower MOS switching transistor Q9, a Buck power supply, a Boost power supply, and a Buck-Boost power supply can be obtained.

[0042] Let the unit working cycle of the circuit be Ts. The conduction duration of the upper MOS switch Q8 is t1 = d1*Ts, where d1 is the proportion of the conduction time of the upper MOS switch Q8 in the working cycle, also known as the duty cycle. The conduction duration of the lower MOS switch Q9 is t2 = d2*Ts, where d2 is the proportion of the conduction time of Q2 in the working cycle. The circuit current is positive from left to right and negative from right to left.

[0043] When the left side is used as the input terminal and the right side is used as the output terminal, that is, when the current is positive, the circuit is equivalent to a Buck circuit. At this time, the output voltage U2 = (t1 / Ts)*U1 = d1*U1. The output voltage U2 depends on the duty cycle of the conduction time of the upper MOS switch Q8. The output current is positive, and the lower MOS switch Q9 constitutes synchronous control to improve the power supply efficiency.

[0044] When the right side is used as the input terminal and the left side is used as the output terminal, that is, when the current is negative, the circuit is equivalent to a Boost circuit. At this time, the output voltage U1 = U2 / (1 - d2). After simple transformation, we can get U2 = U1*(1 - d2). The output voltage U2 depends on the duty cycle of the conduction time of the lower MOS switch Q9. The output current is negative, and the upper MOS switch Q8 is used to constitute synchronous control to improve the power supply efficiency.

[0045] Through the above method, by adjusting the duty cycles of the conduction times of the upper MOS switch Q8 and the lower MOS switch Q9, an adjustable first and fourth quadrant power supply output can be achieved.

[0046] Such as Figure 2As shown, the input voltage of the adjustable bidirectional Buck-Boost DCDC circuit 8 is ±VDD, and the output voltage range is 0 to 2VDD with -VDD as the reference. Adjusting the VPP voltage can adjust the output voltage level. The output port is equivalent to -VDD to +VDD with GND as the reference. When the positive voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the first quadrant, the adjustable bidirectional Buck-Boost DCDC circuit 8 outputs a positive voltage and positive current with -VDD as the reference, and the positive voltage is greater than GND2 and less than VDD; when the negative voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the second quadrant, the adjustable bidirectional Buck-Boost DCDC circuit 8 outputs a positive voltage and positive current with -VDD as the reference, and the positive voltage is greater than -VDD and less than GND2; when the negative voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the third quadrant, the adjustable bidirectional Buck-Boost DCDC circuit 8 outputs a positive voltage and negative current with -VDD as the reference, and the positive voltage is greater than -VDD and less than GND2; when the positive voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the fourth quadrant, the adjustable bidirectional Buck-Boost DCDC circuit 8 outputs a positive voltage and negative current with -VDD as the reference, and the positive voltage is greater than GND2 and less than VDD; the second controller collects the adjustable voltage output by the adjustable bidirectional Buck-Boost DCDC circuit 8 through the analog-to-digital converter ADC3, collects the current output by the adjustable bidirectional Buck-Boost DCDC circuit 8 through the analog-to-digital converter ADC4, transmits the collected adjustable voltage and current to the second controller, performs operations according to the voltage value and current value output from the host computer, and outputs the corresponding duty cycle to control the upper MOS switch tube Q8 and the lower MOS switch tube Q9 of the bidirectional Buck-Boost DCDC circuit 8 to achieve the voltage and current output in the four quadrants.

[0047] For easy understanding, an example is given with the actual voltage VDD being 10V, -VDD being -10V, GND being 0V, the output voltage being ±5V, and the output current being ±1A. When the output is 5V and 1A, with 0V (GND) as the reference, it is the output of positive voltage and positive current (first quadrant), and with -10V (-VDD) as the reference, it is the output of positive voltage and positive current (first quadrant); when the output is -5V and 1A, with 0V (GND) as the reference, it is the output of negative voltage and positive current (second quadrant), and with -10V (-VDD) as the reference, it is the output of positive voltage and positive current (first quadrant); when the output is -5V and -1A, with 0V (GND) as the reference, it is the output of negative voltage and negative current (third quadrant), and with -10V (-VDD) as the reference, it is the output of positive voltage and negative current (fourth quadrant); when the output is 5V and -1A, with 0V (GND) as the reference, it is the output of positive voltage and negative current (fourth quadrant), and with -10V (-VDD) as the reference, it is the output of positive voltage and negative current (fourth quadrant).

[0048] In the present invention, as Figure 5 shown, in all output cases, as Figure 5 (a) shows, the adjustable Buck-Boost DCDC circuit 3 operates in one quadrant, as Figure 5 (b) shows, the bidirectional isolated DCDC circuit 7 outputs in the first and third quadrants, as Figure 5 (c) shows that when the adjustable bidirectional Buck-Boost DCDC circuit 8 operates in the first and fourth quadrants and outputs in the first quadrant, the power reverse injection circuit of the bidirectional isolated DCDC circuit 7, i.e., the transformer T2, is not turned on. When the output bidirectional Buck-Boost DCDC circuit 8 outputs in the fourth quadrant, the power reverse injection circuit, i.e., the transformer T2, is turned on, and the reverse-injected current can be supplied for other devices to use or consumed through an electronic load.

[0049] Through the above power supply architecture, it is possible to achieve four-quadrant power output without each stage of the DCDC circuit meeting the four-quadrant output requirement, as Figure 5 (d) shows.

[0050] Although the above-described illustrative specific embodiments of the present invention have been described to facilitate those skilled in the art of the present technology to understand the present invention, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art of the present technology, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions created using the concept of the present invention are within the scope of protection.

Claims

1. A DCDC type source measurement unit, including a host computer for setting the output voltage value and current value, characterized in that, It further includes: A first controller for receiving the voltage value and current value output from the host computer; An adjustable Buck-Boost DCDC circuit for converting the voltage VCC of a single power supply into the voltage VPP: The first controller controls the adjustable Buck-Boost DCDC circuit to output different voltages by controlling a DAC to output different voltages according to the voltage value from the host computer, realizing voltage level conversion. The output voltage VPP is sent to the input end of the bidirectional isolation DCDC circuit through a diode. The positive end of the diode is connected to the voltage VPP, and the negative end of the diode is connected to the input end of the bidirectional isolation DCDC circuit. The ground of the adjustable Buck-Boost DCDC circuit is connected to the ground GND1 of the single power supply; An isolation circuit, a second controller, and an electronic load. The voltage value and current value output from the host computer received by the first controller are sent to the second controller through the isolation circuit; A bidirectional isolation DCDC circuit, including two groups of transformers T1 and T2. The two ends of the primary side of the transformer T1 are connected to the MOS switch tube Q1. The voltage VPP is connected to one end of the primary side of the transformer T1, and this end is the same-name end. The other end of the primary side of the transformer T1 is grounded to GND1 through the MOS switch tube Q2. The center tap of the secondary side of the transformer T1 is used as the isolated ground GND2. The same-name end of the secondary side of the transformer T1 is output to the rectifier circuit through the MOS switch tube Q4 to obtain the negative voltage -VDD. The different-name end of the secondary side of the transformer T1 is output to another rectifier circuit through the MOS switch tube Q3 to obtain the positive voltage +VDD. The two ends of the primary side of the transformer T2 are connected to the MOS switch tube Q5. The connection end of the MOS switch tube Q3 and another rectifier circuit is connected to one end of the primary side of the transformer T2, and this end is the same-name end. The other end of the primary side of the transformer T2 is grounded to GND2 through the MOS switch tube Q6. The same-name end of the secondary side of the transformer T2 is grounded to GND1. The different-name end of the secondary side of the transformer T2 is output to the positive end of the electronic load, and the ground end of the electronic load is grounded to GND1; Adjust the output power of the bidirectional isolation DCDC circuit by controlling the conduction and cut-off time of the switching tubes: The MOS transistors Q1, Q2, and Q7 are directly controlled by the first controller, and the MOS switching transistors Q3, Q4, Q5, and Q6 are controlled by the first controller through an isolation circuit. When the DCDC type source measurement unit outputs positive current as a source, transformer T1 works and transformer T2 does not work. The operations of the MOS switching transistors related to transformer T1 are as follows: First, MOS switching transistor Q2 conducts, and MOS switching transistors Q1, Q3, and Q4 turn off. The primary side of transformer T1 is charged, and the primary side's same-name terminal is positive. Current flows into from the primary side's same-name terminal and out from the opposite-name terminal, through MOS switching transistor Q2 to ground GND1. At this time, the secondary side of transformer T1 accumulates energy due to the turn-off of MOS switching transistors Q3 and Q4. Then, MOS switching transistor Q2 turns off, and MOS switching transistors Q1, Q3, and Q4 conduct. The primary side of transformer T1 discharges, and the primary side's same-name terminal is negative. Current flows from the opposite-name terminal through MOS switching transistor Q1 into the same-name terminal. The secondary side of transformer T1 discharges, and the current output from the secondary side's opposite-name terminal is output to another rectifier circuit through MOS switching transistor Q3 to obtain positive voltage +VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. The negative current output from the secondary side's same-name terminal is output to the rectifier circuit through MOS switching transistor Q4 to obtain negative voltage -VDD and output it to the adjustable bidirectional Buck-Boost DCDC circuit. Adopt the constant frequency PWM control method to control the power transmission of converter T1 by adjusting the duty cycle of MOS switching transistors Q1~Q4. The operations of the MOS switching transistors related to transformer T2 are as follows: MOS switching transistor Q5 conducts, and MOS switching transistors Q6 and Q7 turn off. Transformer T2 does not work; When the DCDC type source measurement unit absorbs negative current as a load, the working mode of transformer T1 is the same as when it is a source, and transformer T2 starts to work: First, MOS switching transistor Q6 conducts, and MOS switching transistors Q5 and Q7 turn off. The primary side of transformer T2 is charged, and the primary side's same-name terminal is positive. Current flows into from the primary side's same-name terminal and out from the opposite-name terminal, through MOS switching transistor Q6 to ground GND2. At this time, the secondary side of transformer T2 accumulates energy due to the turn-off of MOS switching transistor Q7. Then, MOS switching transistor Q6 turns off, and MOS switching transistors Q5 and Q7 conduct. The primary side of transformer T2 discharges, and the primary side's same-name terminal is negative. Current flows from the opposite-name terminal through MOS switching transistor Q5 into the same-name terminal. The secondary side of transformer T1 discharges, and the current output from the secondary side's opposite-name terminal is output to the electronic load through MOS switching transistor Q7. Adopt the constant frequency PWM control method to control the absorption power of the electronic load by adjusting the duty cycle of each switching transistor of MOS switching transistors Q5~Q7; The second controller collects the negative voltage -VDD output by the bidirectional isolation DCDC circuit through analog-to-digital converter ADC1, collects the positive voltage +VDD output by the bidirectional isolation DCDC circuit through analog-to-digital converter ADC2, and then returns to the first controller through the isolation circuit to form a closed-loop control to achieve power transmission control and absorption power control; The adjustable bidirectional Buck-Boost DCDC circuit, as the output driving stage of the DCDC type source measurement unit, includes an upper MOS switch tube, a lower MOS switch tube, and an LC filter. The positive voltage +VDD output of the bidirectional isolation DCDC circuit passes through the upper MOS switch tube and the lower MOS switch tube to the negative voltage -VDD output. The connection between the upper MOS switch tube and the lower MOS switch tube is connected to the LC filter. The voltage at the connection is output as the adjustable voltage from the negative voltage -VDD to the positive voltage +VDD through the inductor of the LC filter. The filtering capacitor of the LC filter is connected from its inductor output terminal to the ground GND2; The adjustable voltage output by the adjustable bidirectional Buck-Boost DCDC circuit is connected to the voltage input terminal of the device under test, and the ground of the device under test is connected to the isolated ground GND2; When the positive voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the first quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and positive current with -VDD as the reference. The positive voltage is greater than GND2 and less than VDD. When the negative voltage and positive current are output with GND2 as the reference, that is, the voltage and current in the second quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and positive current with -VDD as the reference. The positive voltage is greater than -VDD and less than GND2. When the negative voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the third quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and negative current with -VDD as the reference. The positive voltage is greater than -VDD and less than GND2. When the positive voltage and negative current are output with GND2 as the reference, that is, the voltage and current in the fourth quadrant, the adjustable bidirectional Buck-Boost DCDC circuit outputs a positive voltage and negative current with -VDD as the reference. The positive voltage is greater than GND2 and less than VDD. The second controller collects the adjustable voltage output by the adjustable bidirectional Buck-Boost DCDC circuit through the analog-to-digital converter ADC3, and collects the current output by the adjustable bidirectional Buck-Boost DCDC circuit through the analog-to-digital converter ADC4. The collected adjustable voltage and current are transmitted to the second controller, which performs operations based on the voltage value and current value output from the host computer, and outputs the corresponding duty cycle to control the upper MOS switch tube and the lower MOS switch tube of the bidirectional Buck-Boost DCDC circuit to achieve the voltage and current output in the four quadrants.

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