An ultra-high blocking sensitivity ultra-short wave multi-path parallel receiving radio frequency front end

Abstract

The application relates to the technical field of receiving radio frequency front ends, and discloses a super-high-blocking-sensitivity super-short-wave multi-channel parallel receiving radio frequency front end. After sampling processing of sampling data, a target analog-to-digital converter turns on corresponding channel selection input switches and channel selection output switches according to the type of the sampled radio frequency signals, so as to select a suitable radio frequency signal processing branch to be accessed, to perform low-noise amplification and large-signal attenuation processing on the radio frequency signals, and to ensure that the radio frequency signals entering the target analog-to-digital converter are within the target analog-to-digital converter's spurious-free dynamic range, thus getting rid of the narrow-band signal processing capability in the traditional superheterodyne signal architecture. The advantage lies in that, through the frequency conversion effect of a mixing circuit, interference is mixed to zero frequency or is pulled away from useful signals. For zero-frequency signals, the interference can be suppressed through a blocking capacitor, and the frequency multiplication of the interference signals can be suppressed through a low-pass filter, so that the function of only suppressing interference signals without deteriorating useful signals is realized, and the dynamic range of the receiving front end is improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of multi-signal reception technology, specifically to an ultra-high blocking sensitivity ultra-shortwave multi-channel parallel reception radio frequency front-end. Background Technology

[0002] Multipoint communication refers to a communication state where a single device may simultaneously receive information from different devices or send information to multiple devices. When receiving information from multiple devices, both useful and useless signals are received simultaneously. These useless signals, falling into the receiving front-end, will significantly impact the communication quality of the receiving front-end. This problem is mainly due to the spurious-free dynamic range (SFDR) of the target analog-to-digital converter (ADC). When two signals enter the target ADC simultaneously, if the difference in their amplitudes does not exceed the SFDR of the target ADC, both signals can be demodulated. However, if one signal exceeds the upper limit of the SFDR of the target ADC, the target ADC can only demodulate the larger signal, while the smaller signal will be distorted or lost. In practical applications, however, many problems exist, such as the increased noise floor caused by receiver front-end saturation due to useless large signals, which in turn affects the demodulation of smaller signals. Summary of the Invention

[0003] In view of the above problems, embodiments of the present invention provide an ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end, which is used to solve the technical problem that it is difficult for existing receiving terminals to demodulate two signals at the same time when receiving multiple signals simultaneously.

[0004] According to one aspect of the present invention, an ultra-high blocking sensitivity VHF multi-channel parallel receiving radio frequency front-end is provided, comprising:

[0005] Antenna, used to receive radio frequency signals;

[0006] A signal attenuation circuit, the input of which is connected to the antenna, amplifies or attenuates the radio frequency signal according to a preset amplification and attenuation method, so that the power of the processed radio frequency signal is within the dynamic range of the target analog-to-digital converter (ADC).

[0007] The target analog-to-digital converter (ADC) is used to acquire the radio frequency signal, analyze the magnitude and type of the radio frequency signal, and output the corresponding first channel selection signal according to the analysis result of the radio frequency signal.

[0008] The channel selection input switch has a controlled terminal, an input terminal, and multiple output terminals. The input terminal of the channel selection input switch is connected to the output terminal of the signal attenuation circuit, and the corresponding output terminal of the channel selection input switch is turned on according to the first channel selection signal.

[0009] Multiple radio frequency (RF) signal processing branches are provided, with their input terminals connected one-to-one to the multiple output terminals of the channel selection input switch. The RF signal is then connected to the corresponding RF signal processing branch according to the output terminal of the channel selection input switch to further process the amplified and attenuated RF signal to suppress interference.

[0010] The channel selection output switch has a controlled terminal, multiple input terminals and an output terminal. The multiple input terminals of the channel selection output switch are connected one-to-one with the output terminals of multiple radio frequency signal processing branches. The input terminal of the corresponding channel selection output switch is turned on according to the first channel selection signal so that the corresponding radio frequency signal processing branch is connected.

[0011] The target analog-to-digital converter (ADC) has its input terminal connected to the output terminal of the channel selection output switch, and its control signal output terminal connected to both the controlled terminal of the channel selection output switch and the controlled terminal of the channel selection input switch. It is used to convert the radio frequency signal, after amplification / attenuation processing and interference suppression processing, into a digital signal and output it.

[0012] In one alternative approach, the target analog-to-digital converter (ADC) resolves the magnitude and type of the radio frequency signal as follows:

[0013] S1. When the radio frequency signal is parsed as a single signal and the signal amplitude is lower than the dynamic range of the target analog-to-digital converter (ADC), or when the radio frequency signal cannot be parsed, the radio frequency signal is confirmed to be a small signal.

[0014] S2. When the radio frequency signal is analyzed into a single signal and the signal amplitude is within the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful large signal.

[0015] S3. When the radio frequency signal is analyzed into a single signal and the signal amplitude is higher than the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful ultra-large signal.

[0016] S4. When the radio frequency signal is parsed into dual signals or multiple signals, the number of signals in the radio frequency signal and the type of each signal are determined according to the transmission format, and the classification result of each signal is determined according to S1-S3.

[0017] In one alternative approach, when the radio frequency signal is a dual-signal or multi-signal, and one or more of them are large interference signals and one is a small useful signal, the power difference between the large interference signal and the small useful signal is determined by the transmission baseband of each signal.

[0018] In one alternative approach, when the power difference between the useful signal and the useless signal in the dual signals or the multiple signals is within the target power difference range, and the signal-to-noise ratio of the radio frequency signal is less than or within the spurious-free dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal processing path is selected and accessed based on the large interference signal in the dual signals or the multiple signals, and the small signal is simulated based on the selected radio frequency signal processing path.

[0019] When the signal-to-noise ratio of the small signal after simulation processing is greater than or equal to the minimum demodulation threshold of the baseband, it is confirmed that the current RF signal processing path is selected correctly.

[0020] If the signal-to-noise ratio of the small signal after analog processing is less than the minimum demodulation threshold of the baseband, then the radio frequency signal processing path that can suppress large interference signals and amplify small signals without attenuation is reselected for signal processing.

[0021] In one alternative approach, when the power difference between the useful signal and the useless signal in the dual signals or the multiple signals is within the target power difference range, and the signal-to-noise ratio of the radio frequency signal is greater than the spurious-free dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal processing path that can suppress large interference signals and amplify small signals without attenuation is selected for signal processing.

[0022] In one alternative embodiment, the plurality of radio frequency signal processing paths include a first radio frequency signal processing path, a second radio frequency signal processing path, a third radio frequency signal processing path, and a fourth radio frequency signal processing path;

[0023] The first radio frequency signal processing path is used to amplify small signals in the radio frequency signal with low noise.

[0024] The second radio frequency signal processing path is used to attenuate the radio frequency signal.

[0025] The third radio frequency signal processing path is used to amplify and filter the signal according to the power range of the radio frequency signal.

[0026] The fourth radio frequency signal processing path is used to suppress large interference signals and amplify small signals without attenuation.

[0027] In one alternative embodiment, the first radio frequency signal processing path includes a first bandpass filter, a first low-noise amplifier, a first digitally controlled attenuator, and a second low-noise amplifier connected in sequence.

[0028] In one alternative embodiment, the second radio frequency signal processing path includes a second bandpass filter and a first attenuator connected in sequence.

[0029] In one alternative embodiment, the third radio frequency signal processing path includes a third bandpass filter, a second digitally controlled attenuator, and a third low-noise amplifier connected in sequence.

[0030] In one alternative embodiment, the fourth radio frequency signal processing path includes a first power divider and a first band-stop filter, a fourth low-noise amplifier, a third digitally controlled attenuator, a first mixer, and a fourth band-pass filter connected in sequence, wherein the first power divider is connected to the first mixer.

[0031] In one alternative embodiment, the ultra-high blocking sensitivity VHF multi-channel parallel receiving radio frequency front-end further includes:

[0032] A control circuit is used to sample the radio frequency signal and output a corresponding radio frequency control signal based on the sampling result;

[0033] A signal power reduction circuit, wherein the input terminal of the signal power reduction circuit is connected to the antenna and is used to filter out interference of the radio frequency signal and reduce its power when the radio frequency signal is at high power;

[0034] An amplification and attenuation selection input switch has a controlled terminal, an input terminal, and multiple output terminals. The controlled terminal of the amplification and attenuation selection input switch is connected to the control circuit, and the input terminal of the amplification and attenuation selection input switch is connected to the output terminal of the signal power reduction circuit. The switch also conducts the path between the corresponding output terminal and the input terminal according to the radio frequency control signal.

[0035] The amplification and attenuation network has multiple amplification and attenuation branches. The input terminal of each amplification and attenuation branch is connected one-to-one with multiple output terminals of the amplification and attenuation selection input switch, and the corresponding amplification and attenuation branch is connected according to the output terminal of the connected amplification and attenuation selection input switch.

[0036] The amplification and attenuation selection output switch has a controlled terminal, multiple input terminals, and an output terminal. The controlled terminal of the amplification and attenuation selection output switch is connected to the control circuit, and the multiple input terminals of the amplification and attenuation selection output switch are connected one-to-one with the output terminals of the multiple amplification and attenuation branches.

[0037] This invention, after sampling and processing the sampled data, allows the target analog-to-digital converter (ADC) to activate the corresponding channel selection input switch and channel selection output switch based on the sampled RF signal type. This selects the appropriate RF signal processing branch for connection, performing low-noise amplification and large-signal attenuation on the RF signal. This ensures that the RF signal entering the target ADC remains within its spurious-free dynamic range, overcoming the narrowband signal processing limitations of traditional superheterodyne signal architectures. Its advantage lies in using a mixer circuit to transform the frequency, mixing interference to zero frequency or separating it from the useful signal. Zero-frequency signals can be suppressed using devices such as DC blocking capacitors, while the harmonics of interference signals are suppressed using low-pass filters. This achieves the function of suppressing interference signals without degrading the useful signal, thereby improving the dynamic range of the receiving front end.

[0038] The above description is merely an overview of the technical solutions of the embodiments of the present invention. In order to better understand the technical means of the embodiments of the present invention and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0039] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0040] Figure 1 This invention illustrates a schematic diagram of a module of an embodiment of an ultra-high blocking sensitivity VHF multi-channel parallel receiving radio frequency front-end provided by the present invention.

[0041] Figure 2 This invention provides a schematic diagram of another embodiment of the ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end.

[0042] Figure 3 This invention illustrates a schematic diagram of a multi-signal model of the ultra-high blocking sensitivity VHF multi-channel parallel receiver radio frequency front-end.

[0043] Figure 4 The signal spectrum diagram of node 4 of the multi-signal model of the ultra-high blocking sensitivity VHF multi-channel parallel receiver RF front-end provided by the present invention is shown.

[0044] Figure 5 The following is a signal spectrum diagram of node 1 of the multi-signal model of the ultra-high blocking sensitivity VHF multi-channel parallel receiver radio frequency front-end provided by the present invention;

[0045] Figure 6 A schematic diagram of the superheterodyne double frequency converter structure topology is shown. Detailed Implementation

[0046] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0047] The background of this application is stated below in conjunction with existing technology:

[0048] With the rapid development of science and technology, digital mobile communication technology has also developed rapidly; the problem of mutual interference in VHF multi-point communication has become increasingly prominent and urgently needs to be solved. This invention presents a new VHF communication architecture aimed at solving the interference problem in current VHF multi-point communication.

[0049] To solve this problem, there are two main approaches: one is to improve the SFDR of the ADC, and the other is to reduce the difference between strong and weak signals in the RF front end.

[0050] Improving the SFDR of an ADC is largely related to the chip's manufacturing process. Based on current chip development trends, there are unlikely to be any revolutionary breakthroughs in the manufacturing process in the near future. Therefore, the approach of improving the chip itself is not feasible at this time.

[0051] To achieve better blocking performance, a low-noise amplifier (LNA) with an IP1dB rating and good filtering capabilities is essential for the RF front-end. The LNA falls under the category of components and can be selected based on specific requirements in practical designs. Currently, to achieve better filtering performance, RF front-ends primarily utilize a superheterodyne double-conversion structure, with the overall framework as follows: Figure 6 As shown:

[0052] After the antenna receives the useful signal and the blocking signal, the blocking signal is filtered out by the frequency hopping filter of the radio frequency processing module to ensure that the blocking signal entering the low noise amplifier does not exceed the IP1dB of the low noise amplifier. The processed signal is then mixed to the first intermediate frequency by the first mixer. The blocking signal can be suppressed to the dynamic range of the ADC by the first intermediate frequency filter.

[0053] The superheterodyne approach primarily uses filter characteristics to suppress large signals, preventing them from blocking subsequent circuits after multiple amplification stages. This approach is mature and reliable; a high dynamic range can be achieved by balancing the insertion loss of the preceding bandpass filter and the input IP of the low-noise amplifier to 1dB. However, due to the bandwidth limitations of the filters, it only supports single-node communication. Existing solutions cannot meet the demands of modern communication, such as ultra-high dynamic range, multi-node communication, and ultra-wideband communication.

[0054] This application proposes an ultra-high blocking sensitivity VHF multi-channel parallel receiver RF front-end to solve...

[0055] In an alternative embodiment, refer to Figure 1 As shown, the ultra-high blocking sensitivity VHF multi-channel parallel receiving RF front-end includes an antenna 1, a signal attenuation circuit, a target analog-to-digital converter (ADC), a channel selection input switch 9, multiple RF signal processing branches, and a channel selection output switch 25. The input terminal of the signal attenuation circuit is connected to the antenna 1. The channel selection input switch 9 has a controlled terminal, an input terminal, and multiple output terminals. The input terminal of the channel selection input switch 9 is connected to the output terminal of the signal attenuation circuit. The input terminals of the multiple RF signal processing branches are connected one-to-one with the multiple output terminals of the channel selection input switch 9. The channel selection output switch 25 has a controlled terminal, multiple input terminals, and an output terminal. The multiple input terminals of the channel selection output switch 25 are connected one-to-one with the output terminals of the multiple RF signal processing branches. The input terminal of the target analog-to-digital converter (ADC) is connected to the output terminal of the channel selection output switch 25. The control signal output terminal of the target analog-to-digital converter (ADC) is connected to both the controlled terminal of the channel selection output switch 25 and the controlled terminal of the channel selection input switch 9.

[0056] Antenna 1 receives radio frequency (RF) signals. A signal attenuation circuit amplifies or attenuates the RF signals according to a preset amplification and attenuation method, ensuring that the power of the processed RF signal is within the dynamic range of the target analog-to-digital converter (ADC). The target ADC acquires the RF signals, analyzes their magnitude and type, and outputs a corresponding first channel selection signal based on the analysis result. The channel selection input switch 9 activates its corresponding output terminal according to the first channel selection signal. Multiple RF signal processing branches connect to their corresponding RF signal processing branches via the output terminals of the connected channel selection input switches 9 to further process the amplified and attenuated RF signals to suppress interference. The channel selection output switch 25 activates its corresponding input terminal according to the first channel selection signal, allowing the corresponding RF signal processing branch to connect. The target ADC converts the amplified / attenuated and interference-suppressed RF signals into digital signals for output.

[0057] In the above embodiments, after sampling data processing, the target analog-to-digital converter (ADC) connects the corresponding channel selection input switch 9 and channel selection output switch 25 according to the sampled RF signal type to select a suitable RF signal processing branch for access. This performs low-noise amplification and large-signal attenuation processing on the RF signal, ensuring that the RF signal entering the target ADC is within its spurious-free dynamic range, thus overcoming the narrowband signal processing capability of traditional superheterodyne signal architectures. Its advantage lies in using the frequency conversion effect of the mixer circuit to mix interference to zero frequency or separate it from the useful signal. Zero-frequency signals can be suppressed using devices such as DC blocking capacitors, and the harmonics of interference signals are suppressed by low-pass filters, thereby achieving the function of suppressing only interference signals without degrading the useful signal, thus improving the dynamic range of the receiving front end.

[0058] Optionally, the sampling method is time-sharing sampling.

[0059] In an optional embodiment, the target analog-to-digital converter (ADC) parses the magnitude and type of the radio frequency signal as follows:

[0060] S1. When the radio frequency signal is parsed as a single signal and the signal amplitude is lower than the dynamic range of the target analog-to-digital converter (ADC), or when the radio frequency signal cannot be parsed, the radio frequency signal is confirmed to be a small signal.

[0061] At this point, there is no need to concern ourselves with whether it is a single tone or a double tone, as the dynamic range of the ADC meets the requirements.

[0062] S2. When the radio frequency signal is analyzed into a single signal and the signal amplitude is within the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful large signal.

[0063] S3. When the radio frequency signal is analyzed into a single signal and the signal amplitude is higher than the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful ultra-large signal.

[0064] S4. When the radio frequency signal is parsed into dual signals or multiple signals, the number of signals in the radio frequency signal and the type of each signal are determined according to the transmission format, and the classification result of each signal is determined according to S1-S3.

[0065] It should be noted that before establishing communication, the transmitting and receiving front-ends have already aligned information such as frequency. This information is used to determine whether a signal is useful. When the ADC samples a useful signal, if it exceeds the dynamic range, it will be considered an extremely large useful signal. Similarly, signals exceeding the ADC's dynamic range will be considered large signals. Therefore, the front-end proposed in this application can analyze the magnitude of radio frequency signals and determine whether they are useful signals.

[0066] In an optional embodiment, when the radio frequency signal is a dual signal or a multi-signal, and one or more of them are large interference signals and one is a small useful signal, the power difference between the large interference signal and the small useful signal is determined by the transmission baseband of each signal.

[0067] At this point, the interference signal and the useful signal are separated and determined in the baseband after being acquired by the ADC, and the frequency and power of the interference signal and the useful signal are determined, so that the power difference between the interference signal and the useful signal can be determined.

[0068] In an optional embodiment, when the power difference between the useful signal and the useless signal in the dual signals or the multiple signals is within the target power difference range, and the signal-to-noise ratio of the radio frequency signal is less than or within the spurious-free dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal processing path is selected and accessed based on the large interference signal in the dual signals or the multiple signals, and the small signal is simulated based on the selected radio frequency signal processing path.

[0069] When the signal-to-noise ratio of the small signal after simulation processing is greater than or equal to the minimum demodulation threshold of the baseband, it is confirmed that the current RF signal processing path is selected correctly.

[0070] If the signal-to-noise ratio of the small signal after analog processing is less than the minimum demodulation threshold of the baseband, then the radio frequency signal processing path that can suppress large interference signals and amplify small signals without attenuation is reselected for signal processing.

[0071] It is important to note that the baseband's lowest demodulation threshold is the lowest demodulation threshold of the signal that the target analog-to-digital converter (ADC) can process, and the signal processing capability is related to the device selection.

[0072] The above scheme can ensure that the useful signal output in the final processing is a small signal strength, and can also reduce the signal strength of the useful signal being a large or ultra-large signal, thereby ensuring that each useful signal is within the spurious-free dynamic range of the target analog-to-digital converter (ADC).

[0073] In an optional embodiment, when the power difference between the useful signal and the useless signal in a dual or multiple signal configuration meets the target power difference range value, and the signal-to-noise ratio of the radio frequency signal is greater than the spurious-free dynamic range of the target analog-to-digital converter (ADC), a radio frequency signal processing path that can suppress large interference signals and amplify small signals without attenuation is selected for signal processing.

[0074] In the above scheme, the SIN / N ratio can be calculated according to relevant formulas in the prior art, which will not be elaborated here.

[0075] In one alternative embodiment, the plurality of radio frequency signal processing paths include a first radio frequency signal processing path, a second radio frequency signal processing path, a third radio frequency signal processing path, and a fourth radio frequency signal processing path.

[0076] The first RF signal processing path amplifies small signals in the RF signal with low noise; the second RF signal processing path attenuates the RF signal; the third RF signal processing path amplifies and filters the signal according to its power range; and the fourth RF signal processing path suppresses large interference signals and amplifies small signals without attenuation.

[0077] In an optional embodiment, the first radio frequency signal processing path includes a first bandpass filter 10, a first low-noise amplifier 11, a first digitally controlled attenuator 12, and a second low-noise amplifier 13 connected in sequence.

[0078] In this path, the default attenuation of the digitally controlled attenuator is 0. Before the receiving front end performs a complete power detection closed-loop adjustment process, it does not know how much signal is entering the receiving front end. In order to ensure the reception of small signals, the attenuator does not attenuate by default. When a large signal is detected entering the ADC, the attenuator will be adjusted to ensure that the signal enters the effective dynamic range of the ADC.

[0079] In an optional embodiment, the second radio frequency signal processing path includes a second bandpass filter 14 and a first attenuator 15 connected in sequence.

[0080] This path is the default path, which is activated when the signal is resolved to be a useful ultra-large signal. The attenuation value of the first attenuator 15 may need to be adjusted.

[0081] In an optional embodiment, the third radio frequency signal processing path includes a third bandpass filter 16, a second digitally controlled attenuator 17, and a third low-noise amplifier 18 connected in sequence.

[0082] This path activates when a useful large signal is detected. At this point, link calculations are needed to determine the power range of the large signal, and then the digitally controlled attenuator (DCA) is used to control the link gain. The default attenuation of the second DCA in this path is full attenuation. Additionally, during the AGC process of the receiving path, the FPGA judges the magnitude of the data sampled by the ADC. If it exceeds the ADC's dynamic range, the FPGA will issue a command to increase the attenuation of the receiving path. If it is less than the ADC's dynamic range, resulting in demodulation failure, the FPGA will adjust accordingly to decrease the attenuation of the receiving path and increase the receiving path gain. This process is completed through hardware and software cooperation. One closed loop takes approximately 10µs, and typically two closed-loop cycles are required for good convergence.

[0083] In an alternative embodiment, refer to Figure 2 As shown, the fourth radio frequency signal processing path includes a first power divider 29 and a first band-stop filter 19, a fourth low-noise amplifier 20, a third digitally controlled attenuator 21, a first mixer 23, and a fourth band-pass filter 24 connected in sequence. The first power divider 29 is connected to the first mixer 23.

[0084] Specifically, this path is accessed when the signal power difference plus the demodulation signal-to-noise ratio (SINAD) exceeds the spurious-free dynamic range (SFDR). At this point, the ADC's dynamic range is insufficient to meet the link's dynamic requirements, necessitating suppression of large interference signals and amplification of small signals without attenuation. The ADC, after sampling and determining the frequency of the interference signal, configures a phase-locked loop (PLL) to generate a frequency signal matching it. In this case, the PLL only provides the LO (Local Optical Array) for the mixer. The LO is not necessarily related to the phase but directly to the frequency. For example, if the detected interference signal is 1GHz, the PLL generates a 1GHz LO, and the mixer output is the 0GHz and 2GHz intermediate frequency. Then, through the frequency transformation of the mixer, the interference signal changes to zero and far-end frequencies, allowing subsequent filters to extract the useful signal. Further processing of the useful signal completes the sampling process. The four-channel selection network consists of a channel selection input switch 9, a channel selection output switch 25, a first bandpass filter 10, a second bandpass filter 14, a third bandpass filter 16, a fourth bandpass filter 24, a first bandstop filter 19, a first low-noise amplifier 11, a second low-noise amplifier 13, a third low-noise amplifier 18, a fourth low-noise amplifier 20, a first digitally controlled attenuator 12, a second digitally controlled attenuator 17, a third digitally controlled attenuator 21, a first attenuator 15, a first power divider 29, a first mixer 23, and an analog-to-digital converter 26. This network selects different RF channels via RF switches, ensuring low-noise amplification of small signals, attenuation of large signals, and suppression of interference signals.

[0085] In an alternative embodiment, refer to Figure 1 As shown, the ultra-high blocking sensitivity VHF multi-channel parallel receiving RF front-end also includes a first RF switch 2 and a filter amplification module 28. The input terminal of the first RF switch 2 is connected to the antenna 1. The first output terminal of the first RF switch 2 is connected to the filter amplification module 28. The ultra-high blocking sensitivity VHF multi-channel parallel receiving RF front-end also includes a digital-to-analog converter 27, and the filter amplification module 28 constitutes the transmission channel.

[0086] Optionally, the ultra-high blocking sensitivity VHF multi-channel parallel receiver RF front-end also includes a ground branch 4. The ground branch 4 consists of a unidirectional diode and a capacitor.

[0087] In addition, the above embodiments can also distinguish between large and small signals, especially when the interference signal is a large signal, to extract the useful small signal. It also achieves the following objectives:

[0088] 1. Use a band-stop filter to suppress unnecessary interference and improve the link's anti-interference capability;

[0089] 2. Utilize the frequency conversion function of a mixer to simulate radio frequency cancellation in digital signals;

[0090] 3. By utilizing the AC-passing and DC-blocking characteristics of the DC-blocking capacitor, interference signals after mixing are filtered out, reducing the design requirements of the filter before mixing.

[0091] 4. After mixing, interference signals can be filtered out by a fixed filter, eliminating the need for a pre-stage frequency hopping filter and reducing the size of the equipment.

[0092] Reference Figure 2 As shown, to avoid spurious issues caused by mixer self-mixing, the first power divider 29 is optimized as follows: Figure 1 The frequency synthesizer chip 22 is used in this solution. This solution does reduce the spurious problem of self-mixing, but its disadvantage is that the interference frequency needs to be determined in advance before it can work properly.

[0093] In an optional embodiment, the ultra-high blocking sensitivity VHF multi-channel parallel receiving RF front-end further includes a control circuit, a signal power reduction circuit, an amplification and attenuation selection input switch 5, an amplification and attenuation network, and an amplification and attenuation selection output switch 8. The input terminal of the signal power reduction circuit is connected to the antenna 1. The amplification and attenuation selection input switch 5 has a controlled terminal, an input terminal, and multiple output terminals. The controlled terminal of the amplification and attenuation selection input switch 5 is connected to the control circuit, and the input terminal of the amplification and attenuation selection input switch 5 is connected to the output terminal of the signal power reduction circuit. The amplification and attenuation network has multiple amplification and attenuation branches, and the input terminal of each amplification and attenuation branch is connected one-to-one with the multiple output terminals of the amplification and attenuation selection input switch. The amplification and attenuation selection output switch 8 has a controlled terminal, multiple input terminals, and an output terminal. The controlled terminal of the amplification and attenuation selection output switch 8 is connected to the control circuit, and the multiple input terminals of the amplification and attenuation selection output switch 8 are connected one-to-one with the output terminals of the multiple amplification and attenuation branches.

[0094] The control circuit samples the radio frequency (RF) signal and outputs a corresponding RF control signal based on the sampling results. The signal power reduction circuit filters out interference from the RF signal and reduces its power when it is high. The amplification and attenuation selection input switch 5 opens the path between the corresponding output and input terminals according to the RF control signal. The amplification and attenuation network connects to the corresponding amplification and attenuation branch based on the output terminal of the connected amplification and attenuation selection input switch.

[0095] Optionally, the signal power reduction circuit consists of a bandpass filter 3 and a limiter. Its main function is to filter out out-of-band interference, reduce the signal power of ultra-large signals, and prevent high power from burning out subsequent devices.

[0096] The amplification and attenuation network consists of an amplification and attenuation selection input switch 5, an amplification and attenuation selection output switch 8, a high-input dynamic low-noise amplifier 6, and an attenuator 7. Its main function is to amplify useful small signals with low noise and attenuate large signals, ensuring that the signal power is within the dynamic range of the ADC.

[0097] Example 1: As Figure 3 As shown, the optimized block diagram is modeled and simulated. When four signals are input, two are useless 66MHz interference signal 1 and 48MHz interference signal 2, and two are useful signals 62MHz and 55MHz. The power difference between the useful and useless signals is 100dB. The useful and useless signals overlap and cannot be filtered out by the first-stage filter 3. The band-stop filter can suppress the other interference signal, ensuring that only one large interference signal enters the mixer, and the other interference signal is suppressed to within the ADC's SFDR range. Figure 4 After self-mixing, 62MHz was shifted to 2MHz, 55MHz was shifted to 5MHz, and interference signal 1 was shifted to zero frequency. After passing through a DC blocking capacitor, it was attenuated to about -100dBm and could no longer interfere with the main signal. Interference signal 2 was shifted to 12MHz and suppressed to -110dBm by the subsequent filter. Figure 5 After the local oscillator leakage or interference signal is isolated by the mixer and suppressed by the subsequent low-pass filter, the power difference between the useful signal and the useless signal is 77dB, which improves the suppression of interference signal by 23dB, that is, improves the dynamic range by 23dB.

[0098] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. Similarly, for the sake of brevity and to aid in understanding one or more aspects of the invention, in the description of exemplary embodiments of the invention above, various features of the embodiments are sometimes grouped together in a single embodiment, figure, or description thereof. The claims, which follow the detailed description, are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of the invention.

[0099] Those skilled in the art will understand that the modules in the device of the embodiment can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiment can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components, except that at least some of such features and / or processes or units are mutually exclusive.

[0100] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be construed as limiting the order of execution.

Claims

1. A high-blocking-sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end, characterized in that, include Antenna, used to receive radio frequency signals; A signal attenuation circuit, the input of which is connected to the antenna, amplifies or attenuates the radio frequency signal according to a preset amplification and attenuation method, so that the power of the processed radio frequency signal is within the dynamic range of the target analog-to-digital converter (ADC). The target analog-to-digital converter (ADC) is used to acquire the radio frequency signal, analyze the magnitude and type of the radio frequency signal, and output the corresponding first channel selection signal according to the analysis result of the radio frequency signal. The channel selection input switch has a controlled terminal, an input terminal, and multiple output terminals. The input terminal of the channel selection input switch is connected to the output terminal of the signal attenuation circuit, and the corresponding output terminal of the channel selection input switch is turned on according to the first channel selection signal. Multiple radio frequency (RF) signal processing branches are provided, with their input terminals connected one-to-one to the multiple output terminals of the channel selection input switch. The RF signal is then connected to the corresponding RF signal processing branch according to the output terminal of the channel selection input switch to further process the amplified and attenuated RF signal to suppress interference. The channel selection output switch has a controlled terminal, multiple input terminals and an output terminal. The multiple input terminals of the channel selection output switch are connected one-to-one with the output terminals of multiple radio frequency signal processing branches. The input terminal of the corresponding channel selection output switch is turned on according to the first channel selection signal so that the corresponding radio frequency signal processing branch is connected. The target analog-to-digital converter (ADC) has its input terminal connected to the output terminal of the channel selection output switch, and its control signal output terminal connected to both the controlled terminal of the channel selection output switch and the controlled terminal of the channel selection input switch. It is used to convert the radio frequency signal, after amplification / attenuation processing and interference suppression processing, into a digital signal and then output it.

2. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 1, characterized in that, The target analog-to-digital converter (ADC) analyzes the magnitude and type of the radio frequency signal as follows: S1. When the radio frequency signal is analyzed as a single signal and the signal amplitude is lower than the dynamic range of the target analog-to-digital converter (ADC), or when the radio frequency signal cannot be analyzed, the radio frequency signal is confirmed to be a small signal. S2. When the radio frequency signal is analyzed into a single signal and the signal amplitude is within the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful large signal. S3. When the radio frequency signal is analyzed as a single signal and the signal amplitude is higher than the dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal is confirmed to be a useful ultra-large signal. S4. When the radio frequency signal is parsed into dual signals or multiple signals, the number of signals in the radio frequency signal and the type of each signal are determined according to the transmission format, and the classification result of each signal is determined according to S1-S3.

3. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 2, characterized in that, When the radio frequency signal is a dual signal or a multi-signal, and one or more of them are large interference signals and one is a small useful signal, after the ADC acquires the signal, the large interference signal and the small useful signal are separated in the baseband, and the frequency points and power of the large interference signal and the small useful signal are determined.

4. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 3, characterized in that, When the power difference between the useful signal and the useless signal in the dual signals or the multiple signals is within the target power difference range, and the signal-to-noise ratio of the radio frequency signal is less than or within the spurious-free dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal processing path is selected and accessed based on the large interference signal in the dual signals or the multiple signals, and the small signal is simulated and processed according to the selected radio frequency signal processing path. When the signal-to-noise ratio of the small signal after simulation processing is greater than or equal to the minimum demodulation threshold of the baseband, it is confirmed that the current RF signal processing path is selected correctly. If the signal-to-noise ratio of the small signal after analog processing is less than the minimum demodulation threshold of the baseband, then the radio frequency signal processing path that suppresses large interference signals and amplifies small signals without attenuation is reselected for signal processing.

5. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 3, characterized in that, When the power difference between the useful signal and the useless signal in the dual signal or the multiple signals is within the target power difference range, and the signal-to-noise ratio of the radio frequency signal is greater than the spurious-free dynamic range of the target analog-to-digital converter (ADC), the radio frequency signal processing path that suppresses large interference signals and amplifies small signals without attenuation is selected for signal processing.

6. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 1, characterized in that, The plurality of radio frequency signal processing paths include a first radio frequency signal processing path, a second radio frequency signal processing path, a third radio frequency signal processing path, and a fourth radio frequency signal processing path; The first radio frequency signal processing path is used to amplify small signals in the radio frequency signal with low noise. The second radio frequency signal processing path is used to attenuate the radio frequency signal. The third radio frequency signal processing path is used to amplify and filter the signal according to the power range of the radio frequency signal. The fourth radio frequency signal processing path is used to suppress large interference signals in the radio frequency signal and amplify small signals of the radio frequency signal without attenuation.

7. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 6, characterized in that, The first radio frequency signal processing path includes a first bandpass filter, a first low-noise amplifier, a first digitally controlled attenuator, and a second low-noise amplifier connected in sequence.

8. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 6, characterized in that, The second radio frequency signal processing path includes a second bandpass filter and a first attenuator connected in sequence.

9. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 6, characterized in that, The third radio frequency signal processing path includes a third bandpass filter, a second digitally controlled attenuator, and a third low-noise amplifier connected in sequence.

10. The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiving radio frequency front-end as described in claim 6, characterized in that, The fourth radio frequency signal processing path includes a first power divider and a first band-stop filter, a fourth low-noise amplifier, a third digitally controlled attenuator, a first mixer, and a fourth band-pass filter connected in sequence. The first power divider is connected to the first mixer.

11. The ultra-high blocking sensitivity VHF multi-channel parallel receiving radio frequency front-end as described in claim 1, characterized in that, The ultra-high blocking sensitivity ultra-shortwave multi-channel parallel receiver radio frequency front-end also includes: A control circuit is used to sample the radio frequency signal and output a corresponding radio frequency control signal based on the sampling result; A signal power reduction circuit, wherein the input terminal of the signal power reduction circuit is connected to the antenna and is used to filter out interference of the radio frequency signal and reduce its power when the radio frequency signal is at high power; An amplification and attenuation selection input switch has a controlled terminal, an input terminal, and multiple output terminals. The controlled terminal of the amplification and attenuation selection input switch is connected to the control circuit, and the input terminal of the amplification and attenuation selection input switch is connected to the output terminal of the signal power reduction circuit. The switch also conducts the path between the corresponding output terminal and the input terminal according to the radio frequency control signal. The amplification and attenuation network has multiple amplification and attenuation branches. The input terminal of each amplification and attenuation branch is connected one-to-one with multiple output terminals of the amplification and attenuation selection input switch, and the corresponding amplification and attenuation branch is connected according to the output terminal of the connected amplification and attenuation selection input switch. The amplification and attenuation selection output switch has a controlled terminal, multiple input terminals, and an output terminal. The controlled terminal of the amplification and attenuation selection output switch is connected to the control circuit, and the multiple input terminals of the amplification and attenuation selection output switch are connected one-to-one with the output terminals of the multiple amplification and attenuation branches.

Images