Power device and method for assembling a power device

Abstract

According to one embodiment, a power device (100) comprises at least two power semiconductor modules (1) and a carrier (2) having a top side (20) and an opposite bottom side (21). The power semiconductor modules are mounted on the carrier and thermally connected with the carrier. The at least two power semiconductor modules are arranged in an overlapping configuration such that, seen in a plan view of the top side, at least one power semiconductor module mounted on the top side and at least one power semiconductor module mounted on the bottom side at least partially overlap each other.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a power device and a method for assembling a power device. BACKGROUND

[0002] Power devices, such as inverters, are well known. They typically comprise a plurality of power semiconductor modules mounted on one side of a carrier, e.g. for fluid or air cooling. The power semiconductor modules can be arranged in a row on the top side of the carrier, so that a serial cooling can be provided.

[0003] There is a need for an improved power device, e.g. with good thermal performance and a compact design and with reduced area and / or space consumption. Furthermore, there is a need for a method for assembling such a power device. SUMMARY

[0004] Embodiments of the present disclosure relate to an improved power device. Other embodiments of the present disclosure relate to a method for assembling a power device.

[0005] First, a power device is described in detail.

[0006] According to one embodiment, the power device comprises at least two power semiconductor modules and a carrier having a top side and an opposite bottom side. The power semiconductor modules are mounted on the carrier and thermally connected with the carrier. The at least two power semiconductor modules are arranged in an overlapping configuration such that, seen in a plan view of the top side, the at least one power semiconductor module mounted on the top side and the at least one power semiconductor module mounted on the bottom side at least partially overlap each other.

[0007] The present invention is based, inter alia, on the recognition that arranging the semiconductor power modules in a row on one side of the carrier makes the mounting and electrical connection of the power semiconductor modules relatively easy. On the other hand, due to the row being created by the power modules and the corresponding clamping mechanisms, the overall setup becomes rather long. For example, the length of the carrier can exceed the size limits of the desired application, e.g. in the automotive industry where the available space is limited.

[0008] The inventors of the present invention have inter alia thought of arranging the power semiconductor modules on the top side and the bottom side of the carrier in an overlapping configuration in order to save space. For example, the length of the carrier can be reduced by up to 50%.

[0009] All power semiconductor modules of the power device can be of the same type or can be similarly configured. Therefore, all features disclosed herein for one power semiconductor module are also disclosed for the other or all other power semiconductor modules of the power device.

[0010] The power semiconductor modules can each comprise one or more power semiconductor chips. The power semiconductor chips are electrically, thermally, and / or mechanically interconnected within the module, for example. The power semiconductor modules can each comprise a substrate, which can have a top metallization layer and a bottom metallization layer with an insulating layer in between. The one or more power semiconductor chips can be electrically, mechanically, and / or thermally connected to the top metallization layer. For example, the substrate can be a DBC (direct bonded copper) substrate or a DBA (direct bonded aluminum) substrate or an AMB (active metal support) substrate with an insulating ceramic layer or an IMS (insulated metal substrate) with an insulating resin layer. Further, the power semiconductor modules can each comprise terminals, which can be bonded to the top metallization layer.

[0011] The power semiconductor modules can each be adapted to handle currents greater than 10 A. The power semiconductor modules can be low voltage modules adapted to handle voltages below 1 kV or medium voltage modules adapted to handle voltages between 1 kV and 30 kV.

[0012] The power semiconductor chips and / or the substrates and / or the terminals of the power semiconductor modules can be arranged in an enclosure of the respective power semiconductor module. The enclosure can be filled with an encapsulation, which can also be an encapsulation, in which the power semiconductor chips and / or the substrates and / or the terminals are embedded. The encapsulation can be a resin or a dielectric gel. For example, the encapsulation is formed by casting or molding, for example, transfer molding.

[0013] The power semiconductor modules can further comprise a backplane, on which the power semiconductor chips and / or the substrates are mounted. For example, the substrates are mounted on the backplane with the bottom metallization layer facing the backplane. The backplane is configured for dissipating heat from the power semiconductor chips, for example. The backplane is formed of a metal, like Cu or Al, or a composite material, like aluminum silicon carbide or magnesium silicon carbide, for example.

[0014] The carrier can be a cooling carrier. For example, the carrier comprises or consists of a metal, like Cu or Al. The carrier can be monolithically formed or formed of multiple parts, for example, two half-shells.

[0015] The power semiconductor modules arranged in an overlapping configuration can partially or completely overlap each other when viewed in plan view of the top side. In other words, when the semiconductor chips in the overlapping configuration are protruding to the top side of the carrier, the protruding power semiconductor modules partially or completely overlap each other. For example, at least 25% or at least 30% of the area of the semiconductor modules on the top side overlaps with the power semiconductor modules on the bottom side, and / or vice versa. Additionally or alternatively, at most 70% or at most 75% of the area of the power semiconductor modules on the top side can overlap with the power semiconductor modules on the bottom side, and / or vice versa. For example, the plurality or each power semiconductor module of the power device mounted on one side of the carrier is arranged in an overlapping configuration with at least one other power semiconductor module on the other side of the carrier.

[0016] The power semiconductor modules of the power device are electrically connected to each other, for example.

[0017] The power device can comprise a plurality of power semiconductor modules mounted on the top side and / or a plurality of power semiconductor modules mounted on the bottom side. All features disclosed for one power semiconductor module on the top side are also disclosed for all other power semiconductor modules on the top side, and all features disclosed for one power semiconductor module on the bottom side are also disclosed for all other power semiconductor modules on the bottom side.

[0018] Herein, "top" and "bottom" or similar expressions are never to be understood as being limited to directions anti-parallel and parallel to the direction of gravity. They are generally used to indicate, for example, areas or directions opposite to each other.

[0019] According to another embodiment, the power device comprises at least three power semiconductor modules arranged in an overlapping configuration, such that at least two power semiconductor modules mounted on the top side overlap with at least one same power semiconductor module mounted on the bottom side when viewed in plan view of the top side, or at least two power semiconductor modules mounted on the bottom side and at least one same power semiconductor module mounted on the top side overlap when viewed in plan view of the top side. Each power semiconductor module can overlap with at most two power semiconductor modules when viewed in plan view of the top side.

[0020] For example, in plan view of the top side, one power semiconductor module on one side, which overlaps with two power semiconductor modules on the other side, is arranged in a lateral direction between the two power semiconductor modules on the other side, for example, symmetrically between the two power semiconductor modules. The lateral direction is herein a direction parallel to the top side of the carrier and / or parallel to the main extension plane of the carrier.

[0021] The same is disclosed for at least three power semiconductor modules arranged in an overlapping configuration.

[0022] Here and in the following, all features disclosed for at least two power semiconductor modules arranged in an overlapping configuration are also disclosed for all power semiconductor modules arranged in an overlapping configuration.

[0023] The power semiconductor modules of the power device can be arranged in one or more rows, seen in a plan view of the top side. The power semiconductor modules of a row can each be arranged in an overlapping configuration with at least one other power semiconductor module of the same row. For example, at least one row extends in a longitudinal direction, which is a transversal direction. At least one semiconductor module of a row can also overlap with a semiconductor module of another side and a semiconductor module of a different row, seen in a plan view of the top side.

[0024] According to another embodiment, the power semiconductor modules arranged in an overlapping configuration each comprise a plurality of cooling elements at their respective back side. The back side is the side of the power semiconductor module facing the carrier. The cooling elements can protrude from the back side towards the carrier. The back side can be formed by a base plate or substrate and / or a housing. The cooling elements can be formed by the base plate or substrate.

[0025] According to another embodiment, the carrier comprises at least one top opening at the top side. The top opening can be an opening to a cavity in the carrier. Furthermore, the carrier comprises at least one bottom opening at the bottom side. The bottom opening can be an opening to a cavity in the carrier. Each top opening and bottom opening can be assigned to a separate cavity. The individual cavities can be fluidly coupled to each other, e.g. via a channel portion. Alternatively, the top and bottom openings can be openings to the same cavity. For example, the carrier is a hollow body with one or more cavities inside. For example, the one or more cavities each have one of a cuboid shape, a cubic shape, or a cylindrical shape. For example, the one or more cavities do not extend completely through the carrier.

[0026] According to another embodiment, seen in a plan view of the top side of the carrier, the at least one top opening and the at least one bottom opening at most partially overlap each other. For example, seen in a plan view of the top side, the top openings are arranged non-overlapping with the at least one bottom opening. In other words, in a plan view of the top side, the top openings do not overlap with the bottom openings. Alternatively, the top openings and the bottom openings can have a small overlap, e.g. an overlap of at most 25%, or at most 20%, or at most 10% of the area of the top openings or the bottom openings.

[0027] The carrier can comprise a plurality of top openings and / or a plurality of bottom openings. All features disclosed in relation to one top opening or one bottom opening are also disclosed for all other top openings and bottom openings, respectively. For example, all openings are arranged not to overlap or at most partially overlap each other, seen in a plan view of the carrier.

[0028] According to another embodiment, the cooling elements of the power semiconductor modules arranged in the overlapping configuration protrude through the top openings and the bottom openings into the carrier, i.e. into the interior of the carrier, for example into a cavity in the carrier. This means that the cooling elements of the power semiconductor modules on the top side protrude through the top openings, while the cooling elements of the power semiconductor modules on the bottom side protrude through the bottom openings. Each semiconductor module can be assigned to a top opening or a bottom opening one-to-one, and the cooling elements can protrude through the assigned openings.

[0029] Due to the non-overlapping or only small overlapping arrangement of the one or more top openings and the one or more bottom openings, the carrier can be designed relatively thin.

[0030] According to another embodiment, the cooling elements are cooling ribs or cooling fins, for example pin fins. For example, the cooling fins are in the shape of a cylinder, a cone, or a rhombus. The cooling elements can protrude columnar from the back side, i.e. the main extension direction of the cooling elements can extend perpendicular to the main extension plane of the power semiconductor module.

[0031] According to another embodiment, the power semiconductor modules arranged in the overlapping configuration can each comprise a functional region and an auxiliary region. The functional region can be a central region, while the auxiliary region can be a peripheral region laterally surrounding the central region, for example a peripheral region laterally completely surrounding the central region. The functional region and the auxiliary region can be continuous regions without interruptions, respectively. In a plan view of the top side, the area of the auxiliary region can be at least 10% or at least 50% and / or at most 100% or at most 70% of the area of the functional region.

[0032] According to another embodiment, one or more power semiconductor chips are arranged in the functional region of the power semiconductor module. Additionally or alternatively, one or more cooling elements can be arranged in the functional region.

[0033] According to another embodiment, the auxiliary region of the semiconductor module is free of semiconductor chips and / or free of cooling elements.

[0034] Each power semiconductor module can comprise a plurality of functional regions, which are separated in lateral direction by one or more auxiliary regions. All features disclosed in relation to one functional region are also disclosed for all other functional regions of the power semiconductor module. All features disclosed in relation to one auxiliary region are also disclosed for all other auxiliary regions.

[0035] According to another embodiment, the auxiliary regions of the power semiconductor modules in the overlapping configuration at least partially overlap each other in a plan view of the top side. The functional regions of the power semiconductor modules in the overlapping configuration do not overlap each other, for example, in the plan view, i.e. they do not overlap each other in the plan view.

[0036] The functional regions with the assigned power semiconductor chips are, for example, regions that generate the most heat during operation. It is advantageous to arrange the functional regions non-overlapping with each other in order to distribute the heat evenly on the carrier and thus to improve the cooling performance. For example, the serial cooling is improved in this way.

[0037] According to another embodiment, the cooling elements of the power semiconductor modules are arranged within the functional regions and outside the auxiliary regions in each case. That is to say, in a plan view of the top side of the carrier, the cooling elements of the power semiconductor modules overlap only the functional regions and not the auxiliary regions. For example, in the plan view of the top side, the auxiliary regions completely surround the cooling elements and / or the openings assigned to the semiconductor modules laterally. The area occupied by the cooling elements has, for example, at least the dimensions of the periphery of the arrangement of the power semiconductor chips of the power semiconductor modules.

[0038] According to another embodiment, the auxiliary regions are configured for connecting the power semiconductor modules to the carrier. In the auxiliary regions, the back side of the power semiconductor modules can be flat in order to allow mounting of the power semiconductor modules on the carrier. The back side can be formed by a base plate or a bottom plate and / or a housing at least in the auxiliary regions. On the auxiliary regions, the back side can be at least partially in contact with a sealing.

[0039] For example, in the auxiliary regions, the semiconductor modules are fixed to the carrier by means of a fixing device. In the plan view of the top side, the fixing device can overlap only the auxiliary regions. The fixing device can be one or more clamps by means of which the power semiconductor modules are clamped to the carrier and / or one or more screws by means of which the power semiconductor modules are screwed to the carrier. For example, in the auxiliary regions, one or more screw holes are formed through the power semiconductor modules, for example through the package and / or the bottom plate and / or the base plate.

[0040] In the case of a view in the plan view of the top side, the fixing device assigned to a power semiconductor module which is in an overlapping configuration with another power semiconductor module can overlap the other power semiconductor module, for example, overlap its functional region. The fixing device can also be dedicated to two adjacent power semiconductor modules on one of the top side or the bottom side.

[0041] According to another embodiment, the carrier is configured to guide a cooling fluid for cooling the power semiconductor modules. The cooling fluid can be guided through an interior of the carrier, e.g. between the top side and the bottom side. For example, the carrier is configured to guide the cooling fluid within the carrier in a main extension direction of the one or more rows of power semiconductor modules arranged therein, i.e. in a longitudinal direction.

[0042] The carrier can comprise an inlet for guiding the cooling fluid into the carrier and an outlet for guiding the cooling fluid out of the carrier. The cooling fluid can be gaseous or liquid. For example, the cooling fluid is a water-based coolant or oil. The reduction of the carrier length allows a reduction of the length of the cooling fluid flow path. This can improve the cooling efficiency.

[0043] According to another embodiment, the carrier is configured to guide the cooling fluid through a cooling element protruding through the opening. Thus, the cooling fluid can then flow along and through the cooling element, whereby heat from the power semiconductor chips can be absorbed from the cooling element. Thus, the cooling element can also generate a turbulent flow in the cooling fluid, which is advantageous in terms of cooling efficiency.

[0044] According to another embodiment, at least one channel is formed in the carrier for guiding the cooling fluid. The channel can extend from one end of the carrier to the other end of the carrier. The channel can be connected to the inlet and the outlet. For example, the channel extends from one end of a row of power semiconductor modules arranged to the other end of the row. The openings of the top side and the bottom side portion can both be openings or inlets of the channel.

[0045] The one or more cavities in the carrier can be part of the channel or can form the channel. For example, the channel comprises one or more windings. The channel can be of a meandering shape. In a direction perpendicular to the extension direction of the channel, the channel can be completely surrounded by the material of the carrier.

[0046] The carrier can be a pure cooling carrier without electrical functionality. For example, no current flows through the carrier during normal operation of the power device.

[0047] According to another embodiment, at least one power semiconductor module, e.g. a plurality or all of the power semiconductor modules, is bonded to the carrier. For example, the power semiconductor module is soldered or sintered or welded or glued to the carrier. In this case, the back side of the power semiconductor module can be flat.

[0048] According to another embodiment, at least one power semiconductor module, e.g. a plurality or all of the power semiconductor modules, comprises at least one power semiconductor chip which is one of an IGBT, a diode, a MOSFET, a thyristor, a JFET, a HEMT. The power semiconductor module can comprise a plurality of such power semiconductor chips.

[0049] For example, the at least one power semiconductor module comprises a plurality of power semiconductor chips connected in a half-bridge or full-bridge configuration.

[0050] A half-bridge is a kind of circuit comprising two switching elements or two pairs of switching elements, each pair of switching elements consisting of one switching element and one diode connected in series between two DC connection points and providing an AC connection point or output point therebetween. The DC connection points and the AC connection point / output point can be electrically connected to the power terminals of the power module. Each switching element can consist of one or more semiconductor switches electrically connected in parallel. The switching elements are for example realized by the power semiconductor chips described above.

[0051] The power module can be used in an electrical converter or inverter, for example, which can rectify an AC voltage to be provided to a DC link or a battery. The inverter can also generate an AC voltage from a DC voltage to be provided to an electric motor, such as an electric motor of an electric vehicle. The electrical converter can also be a DC-DC converter. The power module can be used in automotive applications, such as electric vehicles, motorcycles, busses, and off-highway vehicles.

[0052] The power device can be an inverter or converter, for example, for renewable energy, for example, wind turbines, solar panels, tidal power plants, and electric vehicles (EV), or traction applications. The power module can be realized in a so-called six-pack configuration, wherein three half-bridge power semiconductor modules represent a three-phase.

[0053] Next, a method for assembling a power device is described in detail. The method can be used to assemble a power device according to any of the embodiments described herein. Therefore, all features disclosed in relation to the power device are also disclosed in relation to the method and vice versa.

[0054] According to one embodiment, the method for assembling a power device comprises mounting at least one power semiconductor module on a top side of a carrier and mounting at least one power semiconductor module on a bottom side of the carrier opposite the top side, such that the at least two power semiconductor modules are arranged in an overlapping configuration, wherein the at least one power semiconductor module on the top side and the at least one power semiconductor module on the bottom side at least partially overlap each other, seen in a plan view of the top side.

[0055] The power semiconductor modules can be mounted on the carrier such that the power semiconductor modules are fixedly connected to the carrier. For example, the power semiconductor modules are screwed, clamped, soldered, glued, welded, or sintered to the carrier. Any combination of these connection methods can also be used.

[0056] According to another embodiment, after mounting the power semiconductor modules on the carrier, the power semiconductor modules are electrically connected to each other and / or to other parts of the power device, such as capacitors or control electronics.

[0057] In the following, the power device and the method for assembling the power device will be explained in more detail based on exemplary embodiments with reference to the accompanying drawings. The drawings are included to provide a further understanding of the present application. In the drawings, elements of the same structure and / or function are denoted by the same reference signs. It is understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale. The description thereof will not be repeated for each of the following figures as far as the elements or components in different figures correspond to each other in function. For the sake of clarity, elements can not appear with the respective reference signs in all figures. BRIEF DESCRIPTION OF DRAWINGS

[0058] Figures 1 to 3 An exemplary embodiment of a power device is shown in different views,

[0059] Figure 4 Another exemplary embodiment of a power device is shown in a cross-sectional view,

[0060] Figure 5 A flow chart of an exemplary embodiment of a method for assembling a power device is shown, and

[0061] Figure 6 Another exemplary embodiment of a power device is shown in a cross-sectional view. DETAILED DESCRIPTION

[0062] Figures 1 to 3 An exemplary embodiment of a power device 100 comprises a carrier 2 having a top side 20 and a bottom side 21. Figure 1 The power device 100 is shown in a plan view of the top side 20 of the carrier 2. Figure 2 A cross-sectional view is shown, wherein the cross-section is taken through Figure 1 line AA’ in Fig. 1.

[0063] On the top side 20 of the carrier 2, two power semiconductor modules 1 are mounted to the carrier 2 and thermally connected to the carrier 2. A third power semiconductor module 1 is mounted on the bottom side 21 of the carrier 2 and thermally connected to the carrier 2.

[0064] Figure 3 The power device 100 is again shown in a plan view of the top side of the carrier 2, but now the power semiconductor modules 1 on the bottom side of the carrier 2 are indicated by dashed lines to illustrate the relative arrangement between all three power semiconductor modules 1.

[0065] In a plan view of Figure 3 it can be seen that the power semiconductor modules 1 are arranged in an overlapping configuration such that both power semiconductor modules 1 of the top side 20 of the carrier 2 partially overlap one power semiconductor module 1 on the bottom side 21 of the carrier 2. Furthermore, the power semiconductor modules 1 are arranged in a row.

[0066] Arranging the power semiconductor modules 1 in an overlapping configuration allows for a reduction of the overall length of the carrier 2, but still allows for an efficient cooling of the power semiconductor modules 1.

[0067] The power semiconductor modules 1 are fixed to the carrier 2 by fixation means 3. The fixation means 3 are, for example, clamping means. The fixation means 3 are mechanically connected to the power semiconductor modules 1 in the peripheral region 13, i.e. the outer region 13, of the power semiconductor modules 1. In each power semiconductor module 1, the peripheral region 13 completely surrounds the functional region 12, i.e. the central region 12, of the power semiconductor module 1 laterally, i.e. in a direction parallel to the top side 20. In Figure 1 and Figure 2 In Figure 3 , the virtual border is indicated as a solid line for the power semiconductor modules on the top side and as a dashed line for the power semiconductor modules on the bottom side.

[0068] The design of each power semiconductor module 1 is as follows: The central region 12 of the power semiconductor module 1 is the region in which the power semiconductor chips 11 are arranged. The peripheral region 13 is free of power semiconductor chips. The power semiconductor chips 11 are, for example, IGBTs or diodes or JFETs or MOSFETs or thyristors. The power semiconductor chips 11 are mounted on a substrate 15 and electrically and thermally connected with the substrate 15. For example, the power semiconductor chips 11 are interconnected in a half-bridge configuration on the substrate 15. The substrate 15 is, for example, a DBC or DBA substrate. The substrate 15 is further mounted on a backplane 16 of the power semiconductor module 1. The backplane 16 forms the back side of the power semiconductor module 1 and comprises a plurality of cooling elements 10 in the form of cooling fins or cooling ribs, which protrude from the back side towards the carrier 2.

[0069] The power semiconductor chips 11 are encapsulated in an encapsulation 13, which can be a resin. For example, the semiconductor chips 11 are molded with the encapsulation 13, for example, by a transfer molding process.

[0070] The cooling elements 10 of the power semiconductor modules 1 are configured for cooling, i.e. for dissipating heat to the carrier 2. To this end, the carrier 2 comprises two top openings 22 at the top side 20 and one bottom opening 23 at the bottom side 21. The cooling elements 10 of the power semiconductor modules 1 on the top side 20 protrude through the top openings 22 into respective cavities 24 of the carrier 2, and the cooling elements 10 of the power semiconductor modules 1 on the bottom side 21 protrude through the bottom opening 23 into a cavity 24 in the carrier 2. As is apparent from Figure 2 , the top openings 22 and the bottom opening 23 are arranged without overlap, i.e. they do not overlap each other when seen in a plan view of the top side 20 of the carrier 2.

[0071] In Figure 2 It is best seen in Figure 2 The flow direction of the cooling fluid is indicated by the arrows in

[0072] Figure 4 Another exemplary embodiment of a power device 100 is shown. In contrast to the exemplary embodiment shown in Figures 1 to 3 The power semiconductor modules 1 do not comprise cooling elements on the back side, but instead they are flat on the back side. The back side is again formed by the base plate 15. The power semiconductor modules 1 are soldered or sintered or glued or screwed or clamped onto the carrier 2, for example, using a thermally conductive grease as a thermal interface material.

[0073] The carrier 2 does not comprise openings on the top side or on the bottom side, but is flat on the top side 20 and on the bottom side 21. However, the cooling channel 25 again runs through the carrier 2. The heat from the power semiconductor modules 1 is transferred to the carrier 2 on the top side 20 and on the bottom side 21, respectively, and is then transferred through the material of the carrier 2 to the channel 25. There, it is absorbed and carried away by the cooling fluid flowing through the channel 25.

[0074] Figure 5 A flow chart of an exemplary embodiment of a method for assembling a power device is shown. For example, Figures 1 to 3 or Figure 4 The power device of In step S1, at least one power semiconductor module is mounted on the top side of the carrier. In step S2, at least one power semiconductor module is mounted on the bottom side of the carrier. Thereby, the at least two power semiconductor modules are arranged in an overlapping configuration, wherein the at least one power semiconductor module on the top side and the at least one power semiconductor module on the bottom side at least partially overlap each other, seen in a plan view of the top side of the carrier.

[0075] In Figure 6 Another exemplary embodiment of a power device 100 is shown in a cross-sectional view. The power device is similar to the power device in Figures 1 to 3 However, instead of a plurality of individual cavities 24 that are uniquely assigned on the top opening 22 or on the bottom opening 23, Figure 6The carrier 2 is a hollow body having a continuous cavity 24. The top opening 22 and the bottom opening 23 are openings or inlets of the cavity 24, respectively. The cavity 24 is fluidically connected to the inlet and the outlet, thereby forming a channel 25 for guiding the cooling fluid through the carrier 2 by the cavity 24.

[0076] As Figures 1 to 6 The embodiments shown represent exemplary embodiments of a power device and a method for assembling a power device. They therefore do not constitute a complete list of all embodiments according to the power device and the method. For example, the actual power device and the method can differ from the embodiments shown in terms of arrangement, devices, and elements.

[0077] Reference signs

[0078] 1 power semiconductor module

[0079] 2 carrier

[0080] 3 fixing means

[0081] 10 cooling element

[0082] 11 power semiconductor chip

[0083] 12 functional / central region

[0084] 13 auxiliary / peripheral region

[0085] 14 package

[0086] 15 substrate

[0087] 16 base plate

[0088] 20 top side

[0089] 21 bottom side

[0090] 22 top opening

[0091] 23 bottom opening

[0092] 24 cavity

[0093] 25 channel

[0094] 100 power device

[0095] S1 to S3 method steps

[0096] A-A' cross section

Claims

1. A power device (100), comprising: - at least two power semiconductor modules (1), - a carrier (2) having a top side (20) and an opposite bottom side (21), wherein - the power semiconductor modules (1) are mounted on the carrier (2) and thermally connected with the carrier (2), - at least two power semiconductor modules (1) are arranged in an overlapping configuration, such that, seen in a plan view of the top side (20), at least one power semiconductor module (1) mounted on the top side (20) and at least one power semiconductor module (1) mounted on the bottom side (21) at least partially overlap each other, wherein - the power semiconductor modules (1) arranged in the overlapping configuration each comprise a functional area (12) and an auxiliary area (13), - one or more power semiconductor chips (11) are arranged in the functional area (12), wherein the auxiliary areas (13) of the power semiconductor modules (1) in the overlapping configuration at least partially overlap each other in a plan view of the top side (20) and the functional areas (12) do not overlap each other in this plan view, wherein - the power semiconductor modules (1) each comprise a plurality of cooling elements (10) at their respective back side, the cooling elements (10) being arranged in the functional area (12), - the carrier (2) comprises at least one top opening (22) at the top side (20) and at least one bottom opening (23) at the bottom side (21), - the at least one top opening (22) and the at least one bottom opening (23) do not overlap each other, seen in a plan view of the top side (20), - the cooling elements (10) of the power semiconductor modules (1) protrude into the carrier (2) through the top openings (22) and the bottom openings (23), - the power semiconductor chips (11) are arranged in a housing of the respective power semiconductor module (1), the housing being formed by a package (14) in which the one or more power semiconductor chips (11) are embedded, - the auxiliary area (13) is free of power semiconductor chips (11), - in the auxiliary area (13), a back side of the power semiconductor module (1) is formed by a substrate or base plate and a front side of the power semiconductor module (1) is formed by the package (14), - in the auxiliary area (13), the power semiconductor module (1) is fixed to the carrier (2) by a fixing means, wherein a screw hole is formed through the package (14).

2. The power device (100) according to claim 1, wherein - the power device (100) comprises at least three power semiconductor modules (1) arranged in an overlapping configuration, such that - At least two power semiconductor modules (1) mounted on one of the top side (20) and the bottom side (21) overlap at least one identical power semiconductor module (1) mounted on the other of the top side (20) and the bottom side (21) as seen in plan view of the top side (20).

3. The power device (100) according to claim 1 or 2, wherein - the cooling elements (10) are cooling ribs or cooling fins.

4. The power device (100) according to claim 1 or 2, wherein - the carrier (2) is configured to guide a cooling fluid for cooling the power semiconductor modules (1).

5. The power device (100) according to claim 3, wherein - the carrier (2) is configured to guide a cooling fluid for cooling the power semiconductor modules (1).

6. The power device (100) according to claim 5, wherein - the carrier (2) is configured to guide the cooling fluid through cooling elements (10) protruding through the openings (22, 23).

7. The power device (100) according to claim 5 or 6, wherein - at least one channel (25) is formed in the carrier (2) for guiding the cooling fluid.

8. The power device (100) according to claim 1 or 2, wherein - the power semiconductor modules (1) each comprise at least one power semiconductor chip (11) which is one of an IGBT, a MOSFET, a diode, a thyristor, a JFET, a HEMT.

9. A method for assembling a power device (100), comprising - mounting at least one power semiconductor module (1) on a top side (20) of a carrier (2), - mounting at least one power semiconductor module (1) on a bottom side (21) of the carrier (2) opposite the top side (20) such that - at least two power semiconductor modules (1) are arranged in an overlapping configuration, wherein at least one power semiconductor module (1) on the top side (20) and at least one power semiconductor module (1) on the bottom side (21) at least partially overlap each other as seen in plan view of the top side (20), wherein - the power semiconductor modules (1) arranged in the overlapping configuration each comprise a functional area (12) and an auxiliary area (13), - one or more power semiconductor chips (11) are arranged in the functional area (12), wherein the auxiliary areas (13) of the power semiconductor modules (1) in the overlapping configuration at least partially overlap each other in plan view of the top side (20) and the functional areas (12) do not overlap each other in this plan view, wherein - the power semiconductor modules (1) each comprise a plurality of cooling elements (10) at their respective back side, the cooling elements (10) being arranged in the functional area (12), - the carrier (2) comprises at least one top opening (22) at the top side (20) and at least one bottom opening (23) at the bottom side (21), - the at least one top opening (22) and the at least one bottom opening (23) do not overlap each other as seen in plan view of the top side (20), - the cooling element (10) of the power semiconductor module (1) protrudes into the carrier (2) through the top opening (22) and the bottom opening (23), - the power semiconductor chips (11) are arranged in a housing of the respective power semiconductor module (1), the housing being formed by a package (14) in which the one or more power semiconductor chips (11) are embedded, - the auxiliary area (13) is free of power semiconductor chips (11), - in the auxiliary area (13), a back side of the power semiconductor module (1) is formed by a substrate or base plate and a front side of the power semiconductor module (1) is formed by the package (14) - in the auxiliary area (13), the power semiconductor module (1) is fixed to the carrier (2) by a fixing device, wherein a screw hole is formed through the package (14).

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