A modulation method and electronic device for critical conduction of a boost circuit

Abstract

This invention discloses a modulation method and electronic device for critical conduction of a Boost circuit. The modulation method for critical conduction of a Boost circuit is applied to a two-stage photovoltaic inverter, which includes a front-stage Boost converter circuit comprising a first boost inductor, a first switching transistor, and a first freewheeling diode. The modulation method for critical conduction of the Boost circuit includes: calculating the carrier period of the first switching transistor based on the reference current of the first boost inductor and the boost duty cycle of the front-stage Boost converter circuit; calculating the carrier value of the first switching transistor based on the carrier period; determining the carrier of the first switching transistor based on the carrier value; and comparing the carrier of the first switching transistor with the boost duty cycle of the front-stage Boost converter circuit to generate a switching signal for the first switching transistor. This invention reduces losses, has a simple circuit structure, does not increase cost, and has high reliability.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic power generation technology, and in particular to a modulation method and electronic device for critical conduction of a Boost circuit. Background Technology

[0002] Boost circuits, due to their simple structure, ease of control, and high reliability, have been widely used in communications, renewable energy systems, automotive electronics, and many other fields. In recent years, thanks to the development and application of wide-bandgap semiconductor devices, the high-frequency development of Boost circuits has accelerated. However, increasing the switching frequency will proportionally increase switching losses, exacerbating the heating of the switching transistors and leading to a decrease in converter efficiency and reliability. Therefore, switching losses are a crucial factor affecting the high-frequency and high-efficiency operation of Boost circuits, and research on soft-switching implementation methods for power switching devices has significant theoretical and practical implications.

[0003] Boost circuits can operate in three different modes: Continuous Conduction Mode (CCM), Boundary Conduction Mode (BCM), and Discontinuous Conduction Mode (DCM). Boundary Conduction Mode refers to a situation where, within one switching cycle, the current flowing through the inductor linearly decreases to zero, the switch turns on again, and the inductor current linearly increases. In Boundary Conduction Mode, the Boost circuit has the following characteristics: the freewheeling diode is turned off with zero current (ZCS). When the current flowing through the freewheeling diode decreases to zero, the diode naturally turns off, and simultaneously the switch turns on with ZCS, thus reducing the conduction losses of the switch. Therefore, power loss is effectively reduced, significantly improving the reliability of the switch and the freewheeling diode. However, the peak inductor current and the peak current flowing through the switch are twice the peak input current, making this method unsuitable for high-power applications.

[0004] For boost circuits operating in CCM (Continuous Current Mode), since the inductor current is continuous and cannot flow in reverse, auxiliary circuitry is required to divert the inductor current to other branches, thus providing the conditions for zero-current switching (ZCS) of the main switch. This method is widely used in high-power applications. However, for low-to-medium power applications, the introduction of auxiliary circuitry increases the cost of the boost circuit and makes the circuit structure more complex, resulting in additional losses and reducing the reliability of the boost circuit. Boost circuits operating in BCM (Browser Current Mode) and DCM (Diverter Current Mode) turn on the main switch when the inductor current is zero, reducing switching losses without the need for auxiliary circuitry.

[0005] Figure 1 This is a Boost circuit for power factor correction, reference Figure 1 , Figure 1 An example is shown where the Boost circuit is a single-phase Boost circuit. Furthermore, interleaved parallel Boost circuits under BCM are also frequently used in Power Factor Correction (PFC) circuits. However, in this application, the effective value of the input voltage and the output voltage are approximately constant. When the conduction time of the switching transistor is constant, the input current is proportional to the input voltage, and the input current naturally exhibits a sinusoidal shape, thus achieving power factor correction. For two-stage photovoltaic inverters, the input voltage on the PV side (photovoltaic module) and the bus voltage on the output side of the front-stage Boost circuit are not constant values. To achieve BCM conduction, the conduction time of the switching transistor and the switching frequency will both change. Therefore, the commonly used modulation method of comparing the carrier wave and the modulating wave cannot be used. Currently, there is a lack of BCM modulation methods based on the front-stage Boost circuit used in two-stage photovoltaic inverters. Summary of the Invention

[0006] This invention provides a modulation method and electronic device for critical conduction of a Boost circuit, which has smaller inductor ripple, reduced inductor current stress, reduced losses, simple circuit structure, no increase in cost, and high reliability.

[0007] According to one aspect of the present invention, a modulation method for critical conduction of a Boost circuit is provided, applied to a two-stage photovoltaic inverter, the two-stage photovoltaic inverter comprising: a front-stage Boost circuit, the front-stage Boost circuit comprising: a first boost inductor, a first switching transistor and a first freewheeling diode, the first switching transistor being connected to a photovoltaic module and a subsequent inverter circuit, the first boost inductor being connected between the photovoltaic module and the first switching transistor, and the first freewheeling diode being connected between the first switching transistor and the subsequent inverter circuit;

[0008] Modulation methods for the critical conduction of Boost circuits include:

[0009] The carrier period of the first switch is calculated based on the reference current of the first boost inductor and the boost duty cycle of the preceding boost circuit.

[0010] The carrier value of the first switch is calculated based on the carrier period of the first switch.

[0011] The carrier of the first switch is determined based on the carrier value of the first switch, and the carrier of the first switch is compared with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switch.

[0012] Optionally, the carrier period of the first switch is calculated using the following formula:

[0013]

[0014] Among them, T b For the carrier period, L b1 As the first boost inductor, I Lbref d is the reference current of the first boost inductor, d is the boost duty cycle of the preceding boost circuit, and V is the reference current of the first boost inductor. pv This is the input voltage for photovoltaics.

[0015] Optionally, calculating the carrier value of the first switch based on its carrier period includes:

[0016] Determine if the carrier flag is equal to 1. If so, accumulate the carrier value of the first switch.

[0017] If not, the carrier value of the first switch is cumulatively reduced.

[0018] Optionally, the step of accumulating the carrier value of the first switch further includes:

[0019] Determine if the accumulated carrier value is greater than or equal to 1. If so, set the carrier value to 1 and the carrier flag to 0.

[0020] If not, then generate the carrier wave for the first switch.

[0021] Optionally, the step of cumulatively subtracting the carrier value of the first switch further includes:

[0022] Determine whether the carrier value after the cumulative reduction is less than or equal to 0. If so, set the carrier value to 0 and the carrier flag bit to 1.

[0023] If not, then generate the carrier wave for the first switch.

[0024] Optionally, the front-end Boost circuit further includes: a second boost inductor, a second switching transistor, and a second freewheeling diode. The second switching transistor is connected to the photovoltaic module and the subsequent inverter circuit. The second boost inductor is connected between the photovoltaic module and the second switching transistor. The second freewheeling diode is connected between the second switching transistor and the subsequent inverter circuit.

[0025] After determining the carrier of the first switch based on its carrier value, the method further includes: establishing a master-slave relationship to generate the carrier of the second switch.

[0026] Optionally, after establishing the master-slave relationship and generating the carrier of the second switch, the method further includes: comparing the carrier of the second switch with the boost duty cycle of the preceding Boost circuit to generate a switching signal for the second switch.

[0027] Optionally, the waveforms of the carrier waves of the first switch and the second switch are triangular waves or sawtooth waves.

[0028] Optionally, the step of comparing the carrier wave of the first switch with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switch includes:

[0029] The carrier wave of the first switch is greater than the boost duty cycle of the preceding Boost circuit, so that the switching signal of the first switch is high.

[0030] The carrier wave of the first switch is less than the boost duty cycle of the preceding Boost circuit, resulting in a low-level switching signal for the first switch.

[0031] According to another aspect of the present invention, an electronic device is also provided, the electronic device comprising:

[0032] One or more processors;

[0033] Memory, used to store one or more programs;

[0034] When the one or more programs are executed by the one or more processors, the one or more processors implement the modulation method for critical conduction of the Boost circuit as described in any embodiment of the present invention.

[0035] The technical solution of this invention proposes a modulation design method for the critical conduction of a Boost circuit or an interleaved parallel Boost circuit in a two-stage photovoltaic inverter. This method calculates each carrier cycle of the first switching transistor in real time based on the boost duty cycle of the preceding Boost circuit, the photovoltaic input voltage, and the reference current of the first boost inductor, generating the carrier wave for the first switching transistor and thus achieving critical conduction. It eliminates the need for counting; the conduction signal of the first switching transistor can be obtained by comparing the boost duty cycle and carrier wave in real time. The critical conduction mode design achieves zero-current soft-switching of the first switching transistor, reducing losses, simplifying the circuit structure, not increasing cost, and increasing reliability. Compared to DCM, it has lower inductor ripple and reduced inductor current stress. In summary, this invention solves the problems of existing technologies that introduce auxiliary circuits, increasing the cost of the Boost circuit and making the circuit structure more complex, resulting in additional losses and reduced reliability. It also addresses the lack of a BCM modulation method for the preceding Boost circuit used in two-stage photovoltaic inverters.

[0036] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 It is a Boost circuit used in power factor correction devices;

[0039] Figure 2 This is a flowchart of a modulation method for critical conduction of a Boost circuit according to an embodiment of the present invention;

[0040] Figure 3 This is a structural diagram of a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0041] Figure 4 This is a closed-loop control block diagram of a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0042] Figure 5 This is a schematic diagram of the conduction state of a Boost circuit in a critical conduction mode according to an embodiment of the present invention;

[0043] Figure 6 This is a schematic diagram of the Boost circuit turn-off state under critical conduction mode according to an embodiment of the present invention;

[0044] Figure 7 This is a waveform diagram of the inductor voltage in a Boost circuit during one switching cycle according to an embodiment of the present invention;

[0045] Figure 8 This is a waveform diagram of the inductor current in a Boost circuit during one switching cycle according to an embodiment of the present invention;

[0046] Figure 9 This is a logic diagram of the BCM modulation strategy design for a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0047] Figure 10 This is a simulation result diagram of the Boost circuit of a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0048] Figure 11 This is a structural diagram of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0049] Figure 12 This is a design logic diagram of the interleaved parallel Boost circuit BCM modulation strategy for a two-stage photovoltaic inverter according to an embodiment of the present invention;

[0050] Figure 13 This is a schematic diagram showing the inductor current simulation results and boost ratio switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention.

[0051] Figure 14 This is a schematic diagram showing the inductor current simulation results and multi-cycle scale under boost ratio switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention.

[0052] Figure 15 This is a schematic diagram showing the inductor current simulation results and output power switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention.

[0053] Figure 16 This is a schematic diagram showing the inductor current simulation results and multi-cycle scale under output power switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention.

[0054] Figure 17 This is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present invention. Detailed Implementation

[0055] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0056] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0057] Figure 2 This is a flowchart of a modulation method for critical conduction of a Boost circuit according to an embodiment of the present invention, referencing... Figure 2 This invention provides a modulation method for the critical conduction of a Boost circuit, applied to a two-stage photovoltaic inverter. The two-stage photovoltaic inverter includes a front-stage Boost circuit, which includes a first boost inductor, a first switching transistor, and a first freewheeling diode. The first switching transistor is connected to the photovoltaic module and the subsequent inverter circuit. The first boost inductor is connected between the photovoltaic module and the first switching transistor, and the first freewheeling diode is connected between the first switching transistor and the subsequent inverter circuit.

[0058] The modulation method for the critical conduction of the Boost circuit includes: S110, calculating the carrier period of the first switch based on the reference current of the first boost inductor and the boost duty cycle of the preceding Boost circuit.

[0059] Specifically, two-stage photovoltaic inverters with boost requirements widely adopt a front-end boost circuit, ensuring stable bus voltage and voltage values ​​that meet the AC output requirements of the downstream DC-AC side.

[0060] Figure 3 This is a structural diagram of a two-stage photovoltaic inverter according to an embodiment of the present invention, with reference to... Figure 3A two-stage photovoltaic inverter includes a front-stage boost converter circuit and a rear-stage inverter circuit. The front-stage boost converter circuit is connected to the rear-stage inverter circuit, and the rear-stage inverter circuit is connected to the grid or a load. The front-stage boost converter circuit includes a first boost inductor L. b1 First switching transistor T b1 Bus capacitor C b The first freewheeling diode D1 and the input capacitor C on the photovoltaic module side in The first terminal of the photovoltaic module is connected to the input capacitor C on the photovoltaic module side. in The first terminal and the first boost inductor L b1 The first terminal is connected to the first boost inductor L. b1 The second terminal is connected to the first switching transistor T b1 The first terminal is connected to the anode of the first freewheeling diode D1, and the cathode of the first freewheeling diode D1 is connected to the bus capacitor C. b The first terminal and the subsequent inverter circuit are connected, and the bus capacitor C b The second terminal is connected to the second terminal of the photovoltaic module, and the input capacitor C on the photovoltaic module side. in The second terminal, the first switching transistor T b1 The second terminal is connected to the subsequent inverter circuit.

[0061] Figure 4 This is a closed-loop control block diagram of a two-stage photovoltaic inverter according to an embodiment of the present invention, with reference to... Figure 4 The two-stage photovoltaic inverter also includes: a boost and photovoltaic voltage control circuit and a subsequent control circuit. The front-stage boost circuit is connected to the subsequent control circuit and the boost and photovoltaic voltage control circuit. The boost and photovoltaic voltage control circuit includes: a maximum power point tracking (MPPT) algorithm module, a first voltage controller, and a current controller. The photovoltaic module is sequentially connected to the MPPT algorithm module, the first voltage controller, the current controller, and the first boost inductor. The subsequent control circuit includes: a second voltage controller and a subsequent control circuit. The bus capacitor is sequentially connected to the second voltage controller and the subsequent control circuit.

[0062] Among them, V pv I is the photovoltaic input voltage. pv For photovoltaic input current, V pvref I is the reference value for photovoltaic input voltage. Lbref I is the reference current of the first boost inductor. Lb1 V is the inductor current, d is the boost duty cycle of the preceding Boost converter, and V is the voltage across the inductor. cb V is the voltage across the bus capacitor. cbrefThis is the reference value for the bus capacitor voltage. It can be seen that the reference current I of the first boost inductor in the preceding Boost circuit is... Lbref The boost duty cycle d of the preceding Boost circuit is given by the outputs of the first voltage controller (outer voltage loop controller) and the current controller (inner current loop controller) of the preceding stage, respectively. In the modulation design, if the carrier frequency is fixed, and assuming that the photovoltaic input voltage V... pv and bus capacitor voltage V cb If the frequency remains constant, a switching signal with a fixed frequency and duty cycle will be generated in steady state.

[0063] When the front-end Boost circuit is in Continuous Conduction Mode (CCM), the first switching transistor T b1 The inverter will be in a hard-switching state, and the large current in the preceding stage will result in non-negligible switching losses, reducing efficiency. Therefore, the feasibility of a Boost circuit for a two-stage photovoltaic inverter operating in critical conduction mode is analyzed.

[0064] Figure 5 This is a schematic diagram of the conduction state of a Boost circuit in a critical conduction mode according to an embodiment of the present invention. Figure 6 This is a schematic diagram of the Boost circuit's off-state in a critical conduction mode according to an embodiment of the present invention. The operating state of the preceding Boost circuit in the critical conduction mode is as follows: Figure 5 and Figure 6 As shown. First switch transistor T b1 Work status can be divided into Figure 5 The conduction state shown and Figure 6 The indicated shutdown state.

[0065] Figure 7 This is a waveform diagram of the inductor voltage in a Boost circuit during one switching cycle according to an embodiment of the present invention. Figure 8 This is a waveform diagram of the inductor current in a Boost circuit during one switching cycle according to an embodiment of the present invention. The waveforms of the inductor voltage and inductor current in two operating states are shown below. Figure 7 and Figure 8 As shown.

[0066] Combination Figure 4 and Figure 5 The first switching transistor T b1 On state: First switch transistor T b1 When the circuit is turned on, the first freewheeling diode D1 is disconnected, and the photovoltaic input voltage V... pv Give the first boost inductor L b1 Charging, inductor current I Lb1 With slope v pv / L b The first switch T increases linearly. b1 After conduction time T on Then reached peak I Lpeak Meanwhile, the bus capacitor C b Energy is released to the subsequent circuitry.

[0067] Combination Figure 4 and Figure 6 The first switching transistor T b1 Off state: First switch transistor T b1 When the diode is turned off, the first freewheeling diode D1 turns on, and the photovoltaic input voltage V... pv and the first boost inductor L b1 Through the first freewheeling diode D1 to the bus capacitor C b Discharges and provides energy to the subsequent circuitry. Since the output voltage is greater than the input voltage, the inductor current I... Lb1 With slope (v) pv -v cb ) / L b Decrease, after shutdown time T off It then drops to 0. When the inductor current I Lb1 When the current drops to 0, the control circuit detects zero current and a pulse signal drives the first switching transistor T. b1 Upon reactivation, the system enters the next switching cycle (carrier cycle), and this cycle repeats continuously. Within one carrier cycle, the inductor current I... Lb1 The expression is:

[0068]

[0069] Inductor current I Lb1 The waveform is triangular in shape, and considering the first switching transistor T b1 During the conduction time T on Internally, the inductor current I Lb1 The current increases from 0 to its peak value, which is twice the average inductor current. Therefore, the expression for the average input current is:

[0070]

[0071] In a photovoltaic inverter system, considering the second harmonic voltage on the bus voltage, the adjustment of the reference value of the downstream bus voltage, and the photovoltaic input voltage v of the photovoltaic module... pv Due to factors such as changes in output power, the boost duty cycle d of the front-end Boost circuit varies. Therefore, the carrier frequency f of the Boost circuit... b On-time T on The reference current I of the first boost inductor LbrefAll of these factors are uncertain. Therefore, the BCM modulation strategy of the Boost circuit in a photovoltaic system needs to take into account the above factors and carry out frequency conversion and conduction time conversion design while ensuring the boost duty cycle d of the front-end Boost circuit.

[0072] In the control loop, the reference value of the inductor current output by the outer voltage loop controller is i. ave ,Right now:

[0073]

[0074] At the start of the Boost circuit carrier cycle, the carrier frequency f for each carrier cycle is calculated. b for:

[0075]

[0076] Optionally, the carrier period of the first switch is calculated using the following formula:

[0077]

[0078] Among them, T b For the carrier period, L b1 As the first boost inductor, I Lbref d is the reference current of the first boost inductor, d is the boost duty cycle of the preceding boost circuit, and V is the reference current of the first boost inductor. pv This is the input voltage for photovoltaics.

[0079] The carrier period of the first switching transistor is the carrier frequency f. b The reciprocal of is calculated using the following formula:

[0080]

[0081] S120. Calculate the carrier value of the first switching transistor based on the carrier period of the first switching transistor.

[0082] Specifically, the carrier value of the first switch can be the frequency value of the carrier. The carrier value of the first switch changes with the carrier period of the first switch. Based on the carrier value of the first switch, a carrier with a suitable range of values ​​can be determined. After obtaining the carrier period of the first switch, the carrier value of the first switch is calculated, and then the carrier generation begins. The carrier can use various types of carriers, such as triangular waves, sawtooth waves with positive and negative slopes, etc. Taking a triangular wave with a value between 0 and 1 as an example, its control period T... s The increase in carrier value is:

[0083]

[0084] Taking a sawtooth wave with a positive slope and values ​​between 0 and 1 as an example, its control cycle T...s The increase in carrier value is:

[0085]

[0086] Figure 9 This is a design logic diagram of the BCM modulation strategy for a two-stage photovoltaic inverter's Boost circuit, provided by an embodiment of the present invention. (Refer to...) Figure 9 Optionally, calculating the carrier value of the first switching transistor based on the carrier period of the first switching transistor includes: determining whether the carrier flag bit is equal to 1; if so, accumulating the carrier value of the first switching transistor; if not, accumulating and subtracting the carrier value of the first switching transistor.

[0087] Continue to refer to Figure 9 Optionally, after accumulating the carrier value of the first switch, the method further includes: determining whether the accumulated carrier value is greater than or equal to 1; if so, setting the carrier value to 1 and the carrier flag bit to 0; if not, generating the carrier of the first switch.

[0088] Continue to refer to Figure 9 Optionally, after subtracting the carrier value of the first switch, the method further includes: determining whether the subtracted carrier value is less than or equal to 0; if so, setting the carrier value to 0 and the carrier flag bit to 1; if not, generating the carrier of the first switch.

[0089] Specifically, the carrier flag is set in the maximum power point tracking algorithm module, controlling the increase and decrease of the carrier frequency. Simultaneously, in each control cycle, it is determined that if the carrier value is greater than 1, the carrier flag (BCM flag) is set to 0, and the carrier value begins to decrease at the same rate of change; if the carrier value is less than 0, the carrier flag is set to 1, and the carrier value begins to increase at the same rate of change. This cycle continues until the carrier frequency f... b The reference current I of the first boost inductor in the calculation formula Lbref Changes (corresponding to changes in inverter output power), changes in the boost duty cycle d of the front-end Boost circuit (corresponding to changes in the boost range), and carrier frequency f b Adjustments were then made to adapt to the new BCM implementation conditions.

[0090] S130. Determine the carrier of the first switching transistor based on the carrier value of the first switching transistor, and compare the carrier of the first switching transistor with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switching transistor.

[0091] Optionally, comparing the carrier wave of the first switching transistor with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switching transistor includes: if the carrier wave of the first switching transistor is greater than the boost duty cycle of the preceding Boost circuit, the switching signal of the first switching transistor is high; if the carrier wave of the first switching transistor is less than the boost duty cycle of the preceding Boost circuit, the switching signal of the first switching transistor is low.

[0092] Specifically, the carrier wave of the first switching transistor is determined based on its carrier wave value. The carrier wave itself has a numerical value, for example, it can be between 0 and 1. Finally, the switching signal of the first switching transistor is obtained by comparing it with the boost duty cycle d of the preceding Boost circuit. If the carrier wave value of the first switching transistor is larger than the boost duty cycle d of the preceding Boost circuit, the switching signal of the first switching transistor is high; otherwise, it is low. This achieves the design of frequency conversion and variable conduction time.

[0093] The Boost circuit of a two-stage photovoltaic inverter is a single-phase Boost circuit, while the interleaved parallel Boost circuit of a two-stage photovoltaic inverter is a two-phase interleaved parallel Boost circuit.

[0094] Figure 10 This is a simulation result diagram of the Boost circuit of a two-stage photovoltaic inverter according to an embodiment of the present invention, for reference. Figure 10 In practical implementation, the output power P in PSIM simulation o For 360W, the first boost inductor L b1 The photovoltaic input voltage is 32uH. pv The voltage is 48V, and the bus capacitor voltage is V. cb The voltage is 60V. At this point, the boost duty cycle d of the preceding Boost circuit is 0.2. The reference current I of the first boost inductor... Lbref The peak inductor current I in a single-phase Boost circuit and a two-phase interleaved parallel Boost circuit can be estimated to be 7.5A. Lpeak The current ratings are 15A and 7.5A, respectively. Taking a triangular wave as an example, the circuit design and modulation strategy described above are simulated and verified in PSIM.

[0095] Steady-state test of single-phase Boost circuit: The above control strategy was simulated and verified in PSIM. The simulation results of the single-phase Boost circuit using the proposed modulation strategy were analyzed: (1) The carrier flag bit controls the increase or decrease of the triangular carrier. (2) The boost duty cycle d of the front-end Boost circuit and the photovoltaic input voltage V were obtained. pv The reference current I of the first boost inductor Lbref Afterwards, BCM and stable desired boost can be accurately achieved.

[0096] Taking a triangular wave with a value between 0 and 1 as an example, its control cycle T s The increase in carrier value is

[0097]

[0098] Simultaneously, in each control cycle, a judgment is made: if the carrier value is greater than 1, the carrier flag is set to 0, and the carrier value begins to decrease at the same rate of change; if the carrier value is less than 0, the carrier flag is set to 1, and the carrier value begins to increase at the same rate of change. This cycle continues until the carrier frequency f... b The reference current I of the first boost inductor in the calculation formula Lbref Changes (corresponding to changes in inverter output power), changes in the boost duty cycle d of the front-end Boost circuit (corresponding to changes in the boost range), and carrier frequency f b Adjustments were then made to adapt to the new BCM operating conditions. Finally, by comparing the boost duty cycle d of the preceding Boost circuit, the switching signal of the first switch was obtained. If the carrier value of the first switch is larger than the boost duty cycle d of the preceding Boost circuit, the switching signal of the first switch is high; otherwise, it is low. This achieves the design of frequency conversion and variable conduction time.

[0099] The technical solution of this invention proposes a modulation design method for the critical conduction of a Boost circuit or an interleaved parallel Boost circuit in a two-stage photovoltaic inverter. This method calculates each carrier cycle of the first switching transistor in real time based on the boost duty cycle of the preceding Boost circuit, the photovoltaic input voltage, and the reference current of the first boost inductor, generating the carrier wave for the first switching transistor and thus achieving critical conduction. It eliminates the need for counting; the conduction signal of the first switching transistor can be obtained by comparing the boost duty cycle and carrier wave in real time. The critical conduction mode design achieves zero-current soft-switching of the first switching transistor, reducing losses, simplifying the circuit structure, not increasing cost, and increasing reliability. Compared to DCM, it has lower inductor ripple and reduced inductor current stress. In summary, this invention solves the problems of existing technologies that introduce auxiliary circuits, increasing the cost of the Boost circuit and making the circuit structure more complex, resulting in additional losses and reduced reliability. It also addresses the lack of a BCM modulation method for the preceding Boost circuit used in two-stage photovoltaic inverters.

[0100] Optionally, the front-end Boost circuit further includes: a second boost inductor, a second switching transistor, and a second freewheeling diode. The second switching transistor is connected to the photovoltaic module and the subsequent inverter circuit. The second boost inductor is connected between the photovoltaic module and the second switching transistor. The second freewheeling diode is connected between the second switching transistor and the subsequent inverter circuit. After determining the carrier of the first switching transistor based on its carrier value, the circuit further includes: establishing a principal cluster relationship to generate the carrier of the second switching transistor.

[0101] Optionally, after establishing the master-slave relationship to generate the carrier of the second switch, the method further includes: comparing the carrier of the second switch with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the second switch.

[0102] Specifically, as the output power of photovoltaic modules increases, power devices and inductors must withstand greater voltage and current stress. In the aforementioned BCM, the ripple amplitude of the first boost inductor is equivalent to twice the reference current I of the first boost inductor. Lbref In Boost circuits, the above problems can be solved by using interleaved parallel connection technology. This embodiment uses an interleaved parallel Boost circuit of a two-stage photovoltaic inverter as an example to illustrate the design method of BCM.

[0103] Structurally, the interleaved parallel Boost circuit of a two-stage photovoltaic inverter consists of two basic converter units connected in parallel, with each unit handling a portion of the power. During interleaved parallel operation, the switching frequencies of each branch are consistent, and the switches in each branch conduct alternately, meaning the turn-on time of each branch lags behind by 1 / n switching cycles. In steady-state operation, the current flowing through each branch also exhibits an orderly interleaved state. Employing interleaved parallel control can reduce input current ripple, weaken electromagnetic interference, reduce the size of the EMI filter, reduce output capacitor ripple current, reduce the size of the Boost inductor, extend system lifespan, and increase the circuit's power rating.

[0104] Figure 11 This is a structural diagram of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention, with reference to... Figure 11 The two-stage photovoltaic inverter also includes: a front-stage interleaved parallel Boost circuit, which is connected to the rear-stage inverter circuit, and the rear-stage inverter circuit is connected to the grid or load.

[0105] The pre-amplifier interleaved parallel boost circuit includes: a first boost inductor L b1 Second boost inductor L b2 First switching transistor T b1 Second switching transistor T b2 Bus capacitor C bThe first freewheeling diode D1, the second freewheeling diode D2, and the input capacitor C on the photovoltaic module side. in ;

[0106] The first terminal of the photovoltaic module and the input capacitor C on the photovoltaic module side in The first terminal, the first boost inductor L b1 The first terminal and the second boost inductor L b2 The first terminal is connected to the first boost inductor L. b1 The second terminal is connected to the first switching transistor T b1 The first terminal and the anode of the first freewheeling diode D1 are connected, and the second boost inductor L b2 The second terminal and the second switch T b2 The first terminal of the first freewheeling diode D1 is connected to the anode of the second freewheeling diode D2, and the cathode of the first freewheeling diode D1 is connected to the bus capacitor C. b The first terminal is connected to the subsequent inverter circuit, and the cathode of the second freewheeling diode D2 is connected to the bus capacitor C. b The first terminal and the subsequent inverter circuit are connected, and the bus capacitor C b The second terminal is connected to the second terminal of the photovoltaic module, and the input capacitor C on the photovoltaic module side. in The second terminal, the first switching transistor T b1 The second terminal, the second switching transistor T b2 The second terminal is connected to the subsequent inverter circuit.

[0107] like Figure 11 The diagram shows an interleaved parallel circuit constructed using two basic Boost circuit topologies connected in parallel. It contains two boost inductors, two power switches, and two freewheeling diodes. The working process of the interleaved parallel circuit is analyzed to facilitate the understanding and explanation of the working principle of the circuit topology. Therefore, the following assumptions are made about the circuit: (1) The circuit operates in an ideal state, and the first switch T b1 With the second switching transistor T b2 (1) Interleaved conduction, with a 180° phase difference between the driving pulses, and the circuit elements are considered ideal devices; (2) Each Boost unit operates in BCM state; (3) The circuit parameters of the two Boost units are identical, such as L b1 =L b2 (4) The output voltage is stable. At this time, each branch carries half of the current, and the peak and average current values ​​are I. Lbref and 0.5I LbrefTherefore, the same design logic can be used when designing modulation strategies. A master-slave mode is used to control the switching transistors of other branches; that is, after obtaining the carrier of the first switching transistor, the carrier of the second switching transistor is then derived. Since the carrier c1 of the first switching transistor has already been obtained, a master-slave relationship can be established to obtain the carrier c2 of the second switching transistor. For example, c2 = 1 - c1 can be used to obtain the carrier c2 of the second switching transistor, which is half a switching cycle apart.

[0108] Optionally, the carrier waves of the first and second switches can be triangular or sawtooth waves. Various carrier waves, such as triangular waves, sawtooth waves with positive and negative slopes, can be used, and corresponding modulation strategies can be designed. For example, when the carrier wave of the first switch is a sawtooth wave, the carrier wave of the second switch is c2 = c1 + 0.5, and normalized. Finally, the switching signal of the switch is obtained by comparing it with the boost duty cycle d of the preceding Boost circuit. Therefore, the carrier wave can be calculated in various ways, and the modulation design can be categorized. Figure 12 This is a design logic diagram of the BCM modulation strategy for an interleaved parallel Boost circuit in a two-stage photovoltaic inverter, provided by an embodiment of the present invention. The diagram also includes the carrier period download waveform generation principle and modulation logic of the interleaved parallel Boost circuit in the two-stage photovoltaic inverter. Figure 12 As shown.

[0109] Step test of boost ratio in interleaved parallel Boost circuit of two-stage photovoltaic inverter: In the two-phase interleaved parallel Boost circuit, at 0.1s, the photovoltaic input voltage V... pv The voltage drops from 48V to 36V, and the bus capacitor voltage V cb The voltage is 60V. Under the influence of the outer voltage loop and the inner current loop, the boost duty cycle d of the preceding Boost circuit increases from 0.2 to 0.4, and the output power P... o The reference current I of the first boost inductor remains unchanged at 360W. Lbref The dynamic performance of the proposed modulation strategy was observed by increasing the amplitude from 7.5A to 10A.

[0110] Simulation results of the boost step change of the two-phase interleaved parallel Boost circuit using the proposed modulation strategy are analyzed. Figure 13 This is a schematic diagram showing the inductor current simulation results and boost ratio switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention. Figure 14 This is a schematic diagram showing the inductor current simulation results and multi-cycle scale under boost ratio switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention. (Refer to...) Figure 13 and Figure 14From this, we can conclude that: (1) In practice, the photovoltaic input voltage changes slowly, but even with a step change, it still has the expected boost capability and BCM steady-state conduction capability. Moreover, the current adjustment to the BCM dynamic process only needs to last for less than 1 millisecond. (2) Each phase current only needs to bear half of the current stress and ripple magnitude of a single-phase Boost circuit. (3) When the carrier flag is 0, the carrier starts to rise; when the carrier flag is 1, the carrier starts to fall.

[0111] Output power step test of the two-phase interleaved parallel Boost circuit: To compare the dynamic performance of this modulation method at different power levels, the output power P was measured at 0.1s. o When switching from 360W to 180W, the corresponding reference current I of the first boost inductor... Lbref It will also be reduced to half, photovoltaic input voltage V pv The voltage was increased from 48V to 60V.

[0112] Figure 15 This is a schematic diagram showing the inductor current simulation results and output power switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention. Figure 16 This is a schematic diagram showing the inductor current simulation results and multi-cycle scale under output power switching of an interleaved parallel Boost circuit for a two-stage photovoltaic inverter according to an embodiment of the present invention. (Refer to...) Figure 15 and Figure 16 The simulation results of the proposed two-phase interleaved parallel Boost circuit are analyzed: (1) Before and after switching, the BCM and stable boost ratio can still be accurately achieved. The current adjustment to the BCM dynamic process only takes less than 1 millisecond. (2) At the moment of switching, the carrier period is immediately recalculated in real time, and the corresponding duty cycle changes accordingly.

[0113] The simulation results of the boost step change of the two-phase interleaved parallel Boost circuit using the proposed modulation strategy are analyzed. It can be concluded that when the load changes step, it also has the expected boost capability and BCM steady-state conduction capability, and the current adjustment to the BCM dynamic process only takes less than 1 millisecond.

[0114] This invention employs a two-phase interleaved parallel Boost circuit, which reduces current ripple and peak current under critical conduction conditions. The master-slave design concept of the two-phase interleaved parallel Boost circuit can be extended to multi-phase interleaved parallel circuits, thereby further reducing the inductance value.

[0115] Figure 17A schematic diagram of an electronic device 1, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0116] like Figure 17 As shown, the electronic device 1 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded into the RAM 13 from storage unit 18. The RAM 13 can also store various programs and data required for the operation of the electronic device 1. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0117] Multiple components in electronic device 1 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of monitors, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 1 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0118] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the modulation method of critical conduction of a Boost circuit.

[0119] In some embodiments, the modulation method for critically turning on the Boost circuit can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or mounted on the electronic device 1 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the modulation method for critically turning on the Boost circuit described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform the modulation method for critically turning on the Boost circuit by any other suitable means (e.g., by means of firmware).

[0120] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0121] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0122] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0123] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0124] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0125] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0126] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0127] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A modulation method for the critical conduction of a Boost circuit, applied to a two-stage photovoltaic inverter, characterized in that, The two-stage photovoltaic inverter includes: a front-stage Boost circuit, which includes: a first boost inductor, a first switching transistor, and a first freewheeling diode. The first switching transistor is connected to the photovoltaic module and the subsequent inverter circuit. The first boost inductor is connected between the photovoltaic module and the first switching transistor, and the first freewheeling diode is connected between the first switching transistor and the subsequent inverter circuit. The modulation method for the critical conduction of the Boost circuit includes: The carrier period of the first switch is calculated based on the reference current of the first boost inductor and the boost duty cycle of the preceding boost circuit. The carrier value of the first switch is calculated based on the carrier period of the first switch. The carrier of the first switch is determined based on the carrier value of the first switch, and the carrier of the first switch is compared with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switch.

2. The method according to claim 1, characterized in that, The formula for calculating the carrier period of the first switch is as follows: Among them, T b For the carrier period, L b1 As the first boost inductor, I Lbref d is the reference current of the first boost inductor, d is the boost duty cycle of the preceding boost circuit, and V is the reference current of the first boost inductor. pv This is the photovoltaic input voltage.

3. The method according to claim 1, characterized in that, The calculation of the carrier value of the first switch based on the carrier period of the first switch includes: Determine if the carrier flag is equal to 1. If so, accumulate the carrier value of the first switch. If not, the carrier value of the first switch is cumulatively reduced.

4. The method according to claim 3, characterized in that, The process of accumulating the carrier value of the first switch also includes: Determine if the accumulated carrier value is greater than or equal to 1. If so, set the carrier value to 1 and the carrier flag to 0. If not, then generate the carrier wave for the first switch.

5. The method according to claim 3, characterized in that, The step of cumulatively subtracting the carrier value of the first switch also includes: Determine whether the carrier value after the cumulative reduction is less than or equal to 0. If so, set the carrier value to 0 and the carrier flag bit to 1. If not, then generate the carrier wave for the first switch.

6. The method according to claim 1, characterized in that, The front-end Boost circuit further includes: a second boost inductor, a second switching transistor, and a second freewheeling diode. The second switching transistor is connected to the photovoltaic module and the subsequent inverter circuit. The second boost inductor is connected between the photovoltaic module and the second switching transistor. The second freewheeling diode is connected between the second switching transistor and the subsequent inverter circuit. After determining the carrier of the first switch based on its carrier value, the method further includes: establishing a master-slave relationship to generate the carrier of the second switch.

7. The method according to claim 6, characterized in that, After establishing the master-slave relationship and generating the carrier of the second switch, the method further includes: comparing the carrier of the second switch with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the second switch.

8. The method according to claim 6, characterized in that, The waveforms of the carrier waves of the first switch and the second switch are triangular waves or sawtooth waves.

9. The method according to claim 1, characterized in that, The step of comparing the carrier wave of the first switch with the boost duty cycle of the preceding Boost circuit to generate the switching signal of the first switch includes: The carrier wave of the first switch is greater than the boost duty cycle of the preceding Boost circuit, so that the switching signal of the first switch is high. The carrier wave of the first switch is less than the boost duty cycle of the preceding Boost circuit, resulting in a low-level switching signal for the first switch.

10. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the modulation method for critical conduction of the Boost circuit as described in any one of claims 1-9.

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