Port interaction method, switching chip, device, medium and product

Abstract

The present disclosure provides a port interaction method, a switching chip, a device, a medium and a product. The method is applied to a switching chip, including: the upstream port forwards the configuration message to the centralized configuration module; the centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read-write request; the centralized configuration module sends the read-write request to the on-chip network module; the on-chip network module sends the read-write request to the downstream port or global register corresponding to the read-write request. In this way, after the encapsulation processing of the centralized configuration module, the configuration message can be smoothly forwarded to the downstream port or global register in a different domain from the upstream port, thereby realizing the upstream port's access to the full chip configuration space, significantly improving the flexibility of chip use.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of communication technology, and in particular to a port interaction method, a switching chip, a device, a medium, and a product. Background Art

[0002] PCI-Express (Peripheral Component Interconnect Express, PCIe), as a high-speed serial computer expansion bus standard, is designed to significantly improve the data throughput of the computer system bus and the device communication speed. The PCIe architecture is mainly composed of PCIe devices such as the root component RC (Root Complex), the switch (Switch) and the terminal device EP (Endpoint), which together realize its powerful expansion and communication functions.

[0003] PCIe Switch is a PCIe to PCIe bridge with expansion and aggregation functions, which enables more devices to be connected to a single PCIe port. This device has multiple upstream ports (UP, upstream port) and downstream ports (DP, downstream port) built in. The upstream port is responsible for receiving configuration messages, determining the route based on the message content, and then sending the message to the corresponding downstream port for processing.

[0004] However, a traditional PCIe Switch can only access the DP configuration space within its domain through UP, but cannot access register information outside the domain. Summary of the invention

[0005] The embodiments of the present disclosure provide a port interaction method, a switching chip, an electronic device, a storage medium, and a computer program product.

[0006] In a first aspect, an embodiment of the present disclosure provides a port interaction method, which is applied to a switching chip, wherein the switching chip includes an upstream port, a centralized configuration module, an on-chip network module, a downstream port and / or a global register, including:

[0007] The upstream port forwards the configuration message to the centralized configuration module;

[0008] The centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read and write request;

[0009] The centralized configuration module sends the read and write request to the on-chip network module;

[0010] The on-chip network module sends the read / write request to the downstream port or global register corresponding to the read / write request.

[0011] In some optional implementations, the configuration message includes a memory read / write message, and the centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read / write request, including:

[0012] The centralized configuration module modifies the base address of the memory read / write message using the preset offset address to obtain a read / write request.

[0013] In some optional implementations, the upstream port forwards the configuration message to the centralized configuration module, including:

[0014] The upstream port analyzes the configuration message to obtain a source port and a destination port;

[0015] The upstream port adds the source port and the destination port to the configuration message, and forwards the configuration message to the centralized configuration module.

[0016] In some optional implementations, the on-chip network module sends the read / write request to the downstream port or global register corresponding to the read / write request, including:

[0017] The on-chip network module analyzes the read and write requests to obtain the destination port;

[0018] The on-chip network module sends the read and write request to the destination port.

[0019] In some optional implementations, after the on-chip network module sends the read / write request to the downstream port or global register corresponding to the read / write request, the method further includes:

[0020] The above-mentioned on-chip network module receives the read and write results fed back by the downstream port or the global register;

[0021] The on-chip network module sends the read and write results to the centralized configuration module;

[0022] The centralized configuration module encapsulates the read and write results into a message format corresponding to the upstream port, obtains an interaction result, and forwards the interaction result to the upstream port;

[0023] The upstream port analyzes the interaction result to obtain the source port, and forwards the interaction result to the source port.

[0024] In some optional implementations, the switching chip further includes a switching module, and

[0025] The upstream port forwards the configuration message to the centralized configuration module, including:

[0026] The upstream port sends the configuration message to the switching module;

[0027] The switching module sends the configuration message to the centralized configuration module; and

[0028] The above forwarding the above interaction results to the above upstream port includes:

[0029] The centralized configuration module sends the interaction result to the switching module;

[0030] The switching module sends the interaction result to the upstream port.

[0031] In a second aspect, an embodiment of the present disclosure provides a switching chip, including an upstream port, a centralized configuration module, an on-chip network module, a downstream port and / or a global register;

[0032] The upstream port is used to forward the configuration message to the centralized configuration module;

[0033] The centralized configuration module is used to encapsulate the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read / write request; and send the read / write request to the on-chip network module;

[0034] The above-mentioned on-chip network module is used to send the above-mentioned read and write requests to the downstream port or global register corresponding to the above-mentioned read and write requests.

[0035] In a third aspect, an embodiment of the present disclosure provides an electronic device, comprising: one or more processors; a storage device on which one or more programs are stored, and when the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any implementation manner in the first aspect.

[0036] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by one or more processors, implements the method described in any implementation manner in the first aspect.

[0037] In a fifth aspect, an embodiment of the present disclosure provides a computer program product, including a computer program / instructions, which, when executed by a processor, implements the method described in any implementation manner in the first aspect.

[0038] In order to enable the upstream port to access register information outside the domain, the embodiments of the present disclosure provide a port interaction method, a switching chip, an electronic device, a storage medium and a computer program product. The above method is applied to the switching chip, and the upstream port first forwards the configuration message to the centralized configuration module; then, the centralized configuration module encapsulates the configuration message into the interactive bus format corresponding to the on-chip network module to obtain a read / write request; the centralized configuration module then sends the read / write request to the on-chip network module; finally, the on-chip network module sends the read / write request to the downstream port or global register corresponding to the read / write request.

[0039] In this way, after the encapsulation processing of the centralized configuration module, the configuration message can be forwarded to the downstream port or global register in a different domain from the upstream port. This design enables the upstream port to easily access the full chip configuration space, thereby significantly improving the flexibility of the chip during use. Centralized configuration processing not only simplifies the implementation process of the configuration path, but also significantly saves system resources. With this design, the downstream port (DP) configuration space of the entire chip can be accessed through any upstream port (UP), further enhancing the flexibility of chip use. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Other features, objects and advantages of the present disclosure will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings. The drawings are only for the purpose of illustrating specific embodiments and are not to be considered as limiting the present disclosure. In the drawings:

[0041] Figure 1 is a schematic structural diagram of an embodiment of a switching chip according to the present disclosure;

[0042] Figure 2 is a timing diagram of an embodiment of a port interaction method according to the present disclosure;

[0043] Figure 3 It is a structural diagram of a computer system of an electronic device suitable for implementing an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The present disclosure is further described in detail below in conjunction with the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0045] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0046] See also Figure 1, Figure 1 The switch chip 100 to which the port interaction method of the present disclosure is applied is shown, for example, a PCIe switch chip. The switch chip can be specifically applied in various electronic devices.

[0047] The switching chip includes an upstream port (UP), a centralized configuration process (CFP), a network-on-chip (NOC), a downstream port (DP) and / or a global register. As a possible implementation method, the switching chip may also include a switch module (SW).

[0048] The upstream port is the interface that connects the switching chip to external devices or networks. It is responsible for receiving data streams from the outside and transmitting them to the switching chip for processing. The centralized configuration module is the core part of the switching chip. It is responsible for managing and configuring the working status of the entire switching chip and configuring and scheduling each module inside the switching chip. The on-chip network module uses a network-like structure to connect the various modules inside the switching chip to form an efficient communication network. The downstream port is the interface that the switching chip outputs processed data to external devices or networks. The global register is used to store and manage key data such as the configuration information and status information of the switching chip. It can be accessed and modified by each module to achieve control and management of the entire switching chip. The switching module is used to transmit messages between the upstream port and the centralized configuration module.

[0049] In the port interaction method, the upstream port is used to forward the configuration message to the centralized configuration module;

[0050] The centralized configuration module is used to encapsulate the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read / write request; and send the read / write request to the on-chip network module;

[0051] The above-mentioned on-chip network module is used to send the above-mentioned read and write requests to the downstream port or global register corresponding to the above-mentioned read and write requests.

[0052] As a possible implementation, the configuration message includes a memory read / write message, and the centralized configuration module is specifically configured to modify the base address of the memory read / write message using a preset offset address to obtain a read / write request.

[0053] As a possible implementation mode, the upstream port is specifically used to analyze the configuration message to obtain a source port and a destination port;

[0054] The upstream port is specifically used to add the source port and the destination port to the configuration message, and forward the configuration message to the centralized configuration module.

[0055] As a possible implementation mode, the network-on-chip module is specifically used to analyze the read and write requests to obtain the destination port;

[0056] The above-mentioned on-chip network module is specifically used to send the above-mentioned read and write requests to the above-mentioned destination port.

[0057] As a possible implementation mode, the above-mentioned on-chip network module is further used to receive the read and write results fed back by the downstream port or the global register; and send the above-mentioned read and write results to the above-mentioned centralized configuration module;

[0058] The centralized configuration module is further used to encapsulate the read and write results into a message format corresponding to the upstream port, obtain an interaction result, and forward the interaction result to the upstream port;

[0059] The upstream port is further used to analyze the interaction result, obtain the source port, and forward the interaction result to the source port.

[0060] As a possible implementation mode, the upstream port is specifically used to send the configuration message to the switching module;

[0061] The switching module is specifically used to send the configuration message to the centralized configuration module;

[0062] The centralized configuration module is specifically used to send the interaction result to the switching module;

[0063] The above-mentioned switching module is specifically used to send the above-mentioned interaction result to the above-mentioned upstream port.

[0064] In addition, the implementation details and technical effects of each module in the switching chip can be referred to the description of the subsequent embodiments in this disclosure, and will not be repeated here.

[0065] Figure 2 A timing diagram 200 is shown of an embodiment of a port interaction method according to the present disclosure, the port interaction method comprising the following steps:

[0066] Step 201: The upstream port forwards the configuration message to the centralized configuration module.

[0067] When the upstream port receives configuration messages from the outside or inside the system, it will forward these messages to the centralized configuration module according to the preset rules and protocols. The centralized configuration module is the core component of the entire configuration process and is responsible for processing and managing all configuration requests.

[0068] Optionally, before step 201, after receiving the configuration message, the upstream port may first parse the configuration message to determine whether the configuration message accesses the upstream port itself, and if not, then execute step 201.

[0069] In addition, the upstream port can analyze the configuration message to obtain the source port and the destination port; and after the source port and the destination port are attached to the configuration message, the configuration message is forwarded to the centralized configuration module so that the subsequent modules forward or process the configuration message according to the source port and the destination port.

[0070] As a possible implementation, the switching chip may further include a switching module. When forwarding the configuration message to the centralized configuration module, the switching module may be used for forwarding, that is, the upstream port first sends the configuration message to the switching module, and then the switching module sends the configuration message to the centralized configuration module.

[0071] Step 202: The centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read and write request.

[0072] After receiving the configuration message, the centralized configuration module will parse and process it. Since different on-chip network modules may use different interactive bus formats, the centralized configuration module needs to convert the configuration message into a format that the on-chip network module can understand and execute. This usually involves converting and encapsulating the address, structure, field, and parameters of the message to comply with the interface specification of the on-chip network module. Through this step, the centralized configuration module converts the original configuration message into a format that the on-chip network module can accurately perform the corresponding operation.

[0073] Specifically, configuration messages include memory read and write messages, which are TLP messages that need to access the port configuration space. TLP messages can be divided into two categories: configuration read and write messages and memory read and write messages. The memory read and write messages add a base address combined with an offset address access mechanism to ensure that the upstream port can effectively access the full chip register.

[0074] Therefore, when the configuration message is a memory read / write message, the centralized configuration module can adjust the base address of the memory read / write message according to the preset offset address in step 202, and then generate a corresponding read / write request. This process is similar to the implementation of the bar access mechanism. The centralized configuration module realizes flexible access to the entire configuration bus by combining the access mechanism of the base address and the offset address. In this way, the upstream port can realize effective information exchange and communication with the downstream port outside the domain.

[0075] Step 203: The centralized configuration module sends the read / write request to the on-chip network module.

[0076] The centralized configuration module will send it to the target on-chip network module. The on-chip network module is a communication network module that connects downstream ports, registers and other components in different domains of the entire chip, and can achieve low-latency, high-bandwidth data transmission. Through the on-chip network module, the centralized configuration module can quickly and accurately pass read and write requests to downstream ports or global registers.

[0077] Step 204: the on-chip network module sends a read or write request to a downstream port or a global register corresponding to the read or write request.

[0078] When the on-chip network module receives a read or write request from the centralized configuration module, it forwards the request to the corresponding downstream port or global register according to the target address and operation type in the request. Specifically, the on-chip network module can first analyze the read or write request to obtain the destination port, and then send the read or write request to the destination port.

[0079] As a possible implementation, after step 204, the method may further include:

[0080] Step 205: the on-chip network module receives the read and write results fed back by the downstream port or the global register.

[0081] The downstream port or global register will perform the corresponding read and write operations according to the read and write requests, and return the results to the on-chip network module. As a communication bridge, the on-chip network module is responsible for receiving and forwarding these results to ensure that they can be correctly returned to the centralized configuration module.

[0082] Step 206: The on-chip network module sends the read and write results to the centralized configuration module.

[0083] Once the read and write results are received, the on-chip network module will send them to the centralized configuration module. As the core of the entire configuration process, the centralized configuration module needs to further process and analyze these results to complete the entire configuration process.

[0084] Step 207: The centralized configuration module encapsulates the read and write results into a message format corresponding to the upstream port, obtains an interaction result, and forwards the interaction result to the upstream port.

[0085] The centralized configuration module will encapsulate the read and write results into the corresponding message format according to the message format requirements of the upstream port to form the interaction results. In this way, the upstream port can understand and process these results, thereby completing the entire configuration process. After the encapsulation is completed, the centralized configuration module will send the interaction results back to the upstream port. As a possible implementation method, when the centralized configuration module forwards the interaction results to the upstream port, the interaction results can be sent to the switching module first; and then the switching module sends the above interaction results to the upstream port.

[0086] Step 208: The upstream port analyzes the interaction result, obtains the source port, and forwards the interaction result to the source port.

[0087] After receiving the interaction result, the upstream port will parse and analyze it to determine the source port. Then, the upstream port will forward the interaction result to the source port, thus completing the entire port interaction process. In this way, the source port can obtain the final result of the configuration operation and perform corresponding processing or response as needed.

[0088] The port interaction method provided by the above-mentioned embodiment of the present disclosure can realize the effective configuration and management between the upstream port and the downstream port in the switching chip. Through the collaboration of the centralized configuration module and the on-chip network module, the effective access and configuration of the whole chip register can be realized, and the flexibility and scalability of the switching chip are improved. At the same time, the port interaction method of the present disclosure is also characterized by high efficiency, reliability and low latency, and can meet the needs of high-speed and large-capacity data exchange in modern communication systems.

[0089] At the same time, this method can be used not only for PCIe configuration path design, but also for configuration path design of other protocols; not only for chip design, but also for other technologies such as FPGA design, etc., without limitation here.

[0090] Reference below Figure 3 , which shows a schematic diagram of the structure of a computer system 300 suitable for implementing the electronic device of the present disclosure. Figure 3 The computer system 300 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0091] like Figure 3 As shown, the computer system 300 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 301, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 302 or a program loaded from a storage device 308 to a random access memory (RAM) 303. In the RAM 303, various programs and data required for the operation of the computer system 300 are also stored. The processing device 301, the ROM 302, and the RAM 303 are connected to each other via a bus 304. An input / output (I / O) interface 305 is also connected to the bus 304.

[0092] Typically, the following devices may be connected to the I / O interface 305: input devices 306 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, etc.; output devices 307 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; storage devices 308 including, for example, a magnetic tape, a hard disk, etc.; and communication devices 309. The communication devices 309 may allow the computer system 300 to communicate with other devices wirelessly or by wire to exchange data. Although Figure 3 The computer system 300 of the electronic device having various devices is shown, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead.

[0093] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication device 309, or installed from the storage device 308, or installed from the ROM 302. When the computer program is executed by the processing device 301, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0094] It should be noted that the computer-readable medium mentioned above in the present disclosure may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. Computer readable signal media may also be any computer readable medium other than computer readable storage media, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0095] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0096] The computer readable medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device implements the following Figure 2 The illustrated embodiment and its optional implementations illustrate a port interaction method.

[0097] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0098] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0099] The units or modules involved in the embodiments described in the present disclosure may be implemented by software or hardware. The name of a unit or module does not limit the unit itself in some cases. For example, a centralized configuration module may also be described as "used to send the above read and write request to the downstream port or global register corresponding to the above read and write request".

[0100] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other to form a technical solution.

Claims

1. A port interaction method, characterized in that: Applied to a switching chip, the switching chip includes an upstream port, a centralized configuration module, an on-chip network module, a downstream port and / or a global register, including: The upstream port forwards the configuration message to the centralized configuration module; The centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read and write request; The centralized configuration module sends the read and write request to the on-chip network module; The on-chip network module sends the read / write request to the downstream port or global register corresponding to the read / write request; The on-chip network module receives the read and write results fed back by the downstream port or the global register; The on-chip network module sends the read and write results to the centralized configuration module; The centralized configuration module encapsulates the read and write results into a message format corresponding to the upstream port, obtains an interaction result, and forwards the interaction result to the upstream port.

2. The method according to claim 1, characterized in that: The configuration message includes a memory read and write message, and the centralized configuration module encapsulates the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read and write request, including: The centralized configuration module modifies the base address of the memory read / write message using a preset offset address to obtain a read / write request.

3. The method according to claim 1, characterized in that: The upstream port forwards the configuration message to the centralized configuration module, including: The upstream port analyzes the configuration message to obtain a source port and a destination port; The upstream port appends the source port and the destination port to the configuration message, and forwards the configuration message to a centralized configuration module.

4. The method according to claim 3, characterized in that The on-chip network module sends the read / write request to a downstream port or a global register corresponding to the read / write request, including: The on-chip network module analyzes the read and write requests to obtain the destination port; The on-chip network module sends the read / write request to the destination port.

5. The method according to claim 3, characterized in that: After the centralized configuration module encapsulates the read and write results into a message format corresponding to the upstream port, obtains an interaction result, and forwards the interaction result to the upstream port, the method further includes: The upstream port analyzes the interaction result to obtain the source port, and forwards the interaction result to the source port.

6. The method according to claim 5, characterized in that The switching chip also includes a switching module, and The upstream port forwards the configuration message to the centralized configuration module, including: The upstream port sends the configuration message to the switching module; The switching module sends the configuration message to the centralized configuration module; and The step of forwarding the interaction result to the upstream port includes: The centralized configuration module sends the interaction result to the switching module; The switching module sends the interaction result to the upstream port.

7. A switching chip, characterized in that: including an upstream port, a centralized configuration module, an on-chip network module, a downstream port, and / or a global register; The upstream port is used to forward the configuration message to the centralized configuration module; The centralized configuration module is used to encapsulate the configuration message into an interactive bus format corresponding to the on-chip network module to obtain a read / write request; and send the read / write request to the on-chip network module; The on-chip network module is used to send the read / write request to the downstream port or global register corresponding to the read / write request; receive the read / write result fed back by the downstream port or global register; and send the read / write result to the centralized configuration module; The centralized configuration module is further used to encapsulate the read and write results into a message format corresponding to the upstream port, obtain an interaction result, and forward the interaction result to the upstream port.

8. An electronic device, characterized in that: include: one or more processors; a storage device having one or more programs stored thereon, When the one or more programs are executed by the one or more processors, the one or more processors are enabled to implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: A computer program is stored thereon, wherein when the computer program is executed by one or more processors, the method according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that The method comprises a computer program / instruction, which implements the method according to any one of claims 1 to 6 when executed by a processor.

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