Light emitting diode and method for manufacturing light emitting diode
By designing specific electrode structures and via arrangements in light-emitting diodes, the problem of current concentration was solved, resulting in better current spreading and a longer lifespan.
Patent Information
- Application Number
- CN202410807869.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-21
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2044-06-21
AI Technical Summary
The current spreading effect of existing light-emitting diodes is not ideal, causing the current to concentrate in a certain area, which affects the lifespan of the chip.
In a light-emitting diode, a first electrode is designed with a first extension and a second extension, a second electrode has a second extension and a third extension, and multiple through holes arranged in a triangular interval are provided between the fourth extension and the fifth extension of the current blocking layer to promote current expansion.
This improves the current spreading effect, avoids current concentration, and extends the lifespan of the LED.
Smart Images
Figure CN118899376B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for manufacturing a light-emitting diode. Background Technology
[0002] Light-emitting diodes (LEDs) are small semiconductor devices that emit light and are widely used in displays, lighting, and other fields.
[0003] The related technology provides a light-emitting diode, including: a first semiconductor layer, an active layer and a second semiconductor layer, a current blocking layer, a current spreading layer, a passivation layer, a first electrode and a second electrode.
[0004] However, the current spreading effect of the LEDs provided by the related technologies is still not ideal. 80% of the current is concentrated in one area, which makes that area prone to aging and affects the lifespan of the LED chip. Summary of the Invention
[0005] This disclosure provides a light-emitting diode (LED) and a method for manufacturing an LED, which can improve the current spreading effect of the LED and extend the lifespan of the LED chip. The technical solution is as follows:
[0006] On one hand, a light-emitting diode is provided, the light-emitting diode comprising: a first semiconductor layer, an active layer, a second semiconductor layer, a current blocking layer, a current spreading layer, a passivation layer, a first electrode, and a second electrode;
[0007] The first semiconductor layer, the active layer, and the second semiconductor layer are stacked sequentially; the current spreading layer covers the second semiconductor layer, and the passivation layer covers the current spreading layer, the first electrode, and the second electrode;
[0008] The first electrode is connected to the first semiconductor layer, and the second electrode is connected to the current spreading layer. The first electrode includes a connected first electrode body and a first extension, and the second electrode includes a connected second electrode body, a second extension, and a third extension. The projection of the first extension on the first semiconductor layer is located between the projections of the second extension and the third extension on the first semiconductor layer.
[0009] The current blocking layer is located between the current spreading layer and the second semiconductor layer. The current blocking layer includes a fourth extension, a fifth extension, and a main body located between the fourth extension and the fifth extension. The fourth extension is arranged correspondingly to the second extension, and the fifth extension is arranged correspondingly to the third extension. The main body has a plurality of through holes. The current spreading layer is connected to the second semiconductor layer through the plurality of through holes, and the plurality of through holes are arranged in a triangular interval.
[0010] Optionally, the plurality of through holes are arranged in an equilateral triangle pattern.
[0011] Optionally, the side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension and the fifth extension.
[0012] Optionally, the through hole is a circular hole with a diameter of 4 to 20 μm.
[0013] Optionally, the first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure, with the stepped surface of the stepped structure located on the first semiconductor layer. The stepped surface includes a main stepped surface and a slit stepped surface connected to the main stepped surface; the first electrode body is located on the main stepped surface, and the first extension is located within the slit stepped surface.
[0014] On the other hand, a method for manufacturing a light-emitting diode is provided, the method comprising:
[0015] Fabricate a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially;
[0016] A current blocking layer is formed on the surface of the second semiconductor layer. The current blocking layer includes a fourth extension, a fifth extension, and a main body located between the fourth extension and the fifth extension. The main body has a plurality of through holes, which are arranged in a triangular interval.
[0017] A current spreading layer is formed on the surfaces of the current blocking layer and the second semiconductor layer, and the current spreading layer is connected to the second semiconductor layer through the plurality of vias;
[0018] A first electrode and a second electrode are fabricated. The first electrode is connected to the first semiconductor layer, and the second electrode is connected to the current spreading layer. The first electrode includes a connected first electrode body and a first extension. The second electrode includes a connected second electrode body, a second extension, and a third extension. The projection of the first extension onto the first semiconductor layer is located between the projections of the second extension and the third extension onto the first semiconductor layer. A fourth extension is arranged corresponding to the second extension, and a fifth extension is arranged corresponding to the third extension.
[0019] A passivation layer is fabricated, which covers the current spreading layer, the first electrode, and the second electrode.
[0020] Optionally, the plurality of through holes are arranged in an equilateral triangle pattern.
[0021] Optionally, the side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension and the fifth extension.
[0022] Optionally, the through hole is a circular hole with a diameter of 4 to 20 μm.
[0023] Optionally, the first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure, with the stepped surface of the stepped structure located on the first semiconductor layer. The stepped surface includes a main stepped surface and a slit stepped surface connected to the main stepped surface; the first electrode body is located on the main stepped surface, and the first extension is located within the slit stepped surface.
[0024] The beneficial effects of the technical solutions provided in this disclosure are:
[0025] In this embodiment, the first electrode has a first extension, and the second electrode has a second extension and a third extension, with the first extension located between the second and third extensions, enabling the current transmitted through the electrode to radiate over a larger area. Furthermore, a fourth and fifth extension, corresponding to the second and third extensions, are provided in the current-blocking layer, and through-holes are formed in the main body between the fourth and fifth extensions to promote current expansion in the region between them. The multiple through-holes in the main body are arranged in a triangular interval, further improving the current expansion effect, preventing current concentration in a certain area, and increasing the lifespan of the light-emitting diode. Attached Figure Description
[0026] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0027] Figure 1 This is a cross-sectional view of a light-emitting diode provided in an embodiment of this disclosure;
[0028] Figure 2 This is a top view of a light-emitting diode provided in an embodiment of this disclosure;
[0029] Figure 3 This is a schematic diagram of current expansion provided in an embodiment of this disclosure;
[0030] Figure 4 This is a flowchart illustrating a method for manufacturing a light-emitting diode according to an embodiment of the present disclosure;
[0031] Figure 5 This is a flowchart of another method for manufacturing a light-emitting diode provided in this embodiment of the present disclosure;
[0032] Figure 6 This is a schematic diagram of the current distribution of a light-emitting diode provided in an embodiment of this disclosure;
[0033] Figure 7 This is a schematic diagram comparing the current aging test results of the light-emitting diodes provided in this disclosure and light-emitting diodes of related technologies.
[0034] The attached figures are labeled as follows:
[0035] 100: Substrate; 101: First semiconductor layer; 102: Active layer; 103: Second semiconductor layer; 104: Current blocking layer; 105: Current spreading layer; 106: Passivation layer; 107: First electrode; 108: Second electrode;
[0036] 201: First electrode body; 202: First extension; 203: Second electrode body; 204: Second extension; 205: Third extension; 206: Fourth extension; 207: Fifth extension; 208: Body; 281: Through hole; 209: Annular structure. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0038] Figure 1 A cross-sectional view of a light-emitting diode provided in an embodiment of this disclosure. See also... Figure 1The light-emitting diode includes: a first semiconductor layer 101, an active layer 102, a second semiconductor layer 103, a current blocking layer 104, a current spreading layer 105, a passivation layer 106, a first electrode 107, and a second electrode 108.
[0039] The first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 are stacked sequentially; the current spreading layer 105 covers the second semiconductor layer 103, and the passivation layer 106 covers the current spreading layer 105, the first electrode 107, and the second electrode 108. The first electrode 107 is connected to the first semiconductor layer 101, and the second electrode 108 is connected to the current spreading layer 105. The current blocking layer 104 is located between the current spreading layer 105 and the second semiconductor layer 103.
[0040] Figure 2 This is a top view of a light-emitting diode provided in an embodiment of the present disclosure. Figure 1 for Figure 2 Cross-sectional view at the dashed lines A1-A2. See also Figure 2 The first electrode 107 includes a first electrode body 201 and a first extension 202 connected together. The second electrode 108 includes a second electrode body 203, a second extension 204 and a third extension 205 connected together. The projection of the first extension 202 onto the first semiconductor layer 101 is located between the projections of the second extension 204 and the third extension 205 onto the first semiconductor layer 101. The current blocking layer 104 includes a fourth extension 206, a fifth extension 207 and a main body 208 located between the fourth extension 206 and the fifth extension 207. The fourth extension 206 is arranged correspondingly to the second extension 204, and the fifth extension 207 is arranged correspondingly to the third extension 205. The main body 208 has a plurality of through holes 281. The current spreading layer 105 is connected to the second semiconductor layer 103 through the plurality of through holes 281. The plurality of through holes 281 are arranged in a triangular interval.
[0041] In this embodiment, the first electrode has a first extension, and the second electrode has a second extension and a third extension, with the first extension located between the second and third extensions, enabling the current transmitted through the electrode to radiate over a larger area. Furthermore, a fourth and fifth extension, corresponding to the second and third extensions, are provided in the current-blocking layer, and through-holes are formed in the main body between the fourth and fifth extensions to promote current expansion in the region between them. The multiple through-holes in the main body are arranged in a triangular interval, further improving the current expansion effect, preventing current concentration in a certain area, and increasing the lifespan of the light-emitting diode.
[0042] Figure 3 This is a schematic diagram of current expansion provided in an embodiment of this disclosure. See also... Figure 3 The left side is a schematic diagram of the current expansion of the structure provided in the embodiment of this disclosure, and the right side is a schematic diagram of the current expansion of the structure provided in related technologies. Figure 3 The circular holes represent current-blocking vias, and the arrows indicate current flow. It can be seen that the embodiments of this disclosure use triangularly spaced vias, which allows for more diverse current flow directions between the vias, resulting in better current expansion.
[0043] like Figure 2 As shown, multiple through holes arranged in a triangular interval means that any one through hole forms a triangle with at least two adjacent through holes.
[0044] In one example of an embodiment of this disclosure, the plurality of through holes 281 are arranged in an equilateral triangle at intervals.
[0045] In this implementation, the multiple vias 281 are distributed in an equilateral triangle. The equilateral triangle makes the vias more evenly distributed, thereby improving the current spreading effect.
[0046] In other examples, the multiple through holes 281 may also be distributed in other triangular shapes, such as right triangles.
[0047] When multiple through holes 281 are arranged in an equilateral triangle, the side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension 206 and the fifth extension 207.
[0048] For example, the side length of the equilateral triangle is 1 / 4 of the interval between the fourth extension 206 and the fifth extension 207.
[0049] The side length of the equilateral triangle can be the distance between the centers of any two of the three through holes corresponding to the equilateral triangle.
[0050] In this implementation, the above dimensions are used as the side length of the equilateral triangle, so that the number and spacing of the through holes between the fourth extension 206 and the fifth extension 207 are moderate, which is conducive to current expansion.
[0051] In this embodiment of the disclosure, the through hole 281 is a circular hole with a diameter of 4 to 20 μm.
[0052] For example, the diameter of the through hole 281 is 4 μm.
[0053] Using round holes facilitates the design and fabrication of through holes. A diameter of 1–3 μm is used for the round holes to avoid the problem of reduced current spreading effect caused by round holes that are too large or too small.
[0054] In other embodiments, the through hole 281 may also be other shapes, such as rectangles, etc., and this disclosure does not limit this.
[0055] like Figure 1 As shown, the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103 have a stepped structure, and the step surface 123 of the stepped structure is located in the first semiconductor layer 101.
[0056] like Figure 2 As shown, the stepped surface 123 includes a main stepped surface 1231 and a slit stepped surface 1232 connected to the main stepped surface 1231; the first electrode body 201 is located on the main stepped surface 1231, and the first extension 202 is located within the slit stepped surface 1232.
[0057] In this embodiment of the disclosure, the first electrode located in the first semiconductor layer 101 is provided with a first extension 202 through the slit step surface 1232, so that the radiation range of the first electrode is larger, which is beneficial to the current expansion of the large-size light-emitting diode.
[0058] See you again Figure 2 The fourth extension 206 and the fifth extension 207 have gaps between themselves and the main body 208. The current spreading layer can be connected to the second semiconductor layer through the gaps and multiple through holes in the current blocking layer, thereby enabling the current supplied by the electrodes to be uniformly transmitted to the entire surface of the second semiconductor layer.
[0059] like Figure 2 As shown, the fourth extension 206 and the fifth extension 207 are connected by an annular structure 209, which is correspondingly disposed with the second electrode body 203, so that the second electrode body 203 is connected to the second semiconductor layer through the current spreading layer at the annular structure 209.
[0060] like Figure 1 As shown, the light-emitting diode also includes a substrate 100, and the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103 are sequentially stacked on the surface of the substrate 100.
[0061] In this embodiment of the disclosure, the substrate 100 can be any one of a sapphire substrate, a Si substrate, a SiC substrate, etc., and this embodiment of the disclosure does not limit it.
[0062] For example, substrate 100 is a sapphire substrate.
[0063] The thickness of the substrate 100 can be 3 to 200 μm, for example, 200 μm.
[0064] In this embodiment of the disclosure, the first semiconductor layer 101 can be an N-type semiconductor layer, the active layer 102 is a multi-quantum well layer, and the second semiconductor layer 103 can be a P-type semiconductor layer.
[0065] For example, the first semiconductor layer 101 is an N-type GaN layer, the active layer is an InGaN / GaN layer, and the second semiconductor layer 103 is a P-type GaN layer.
[0066] In other examples, the first semiconductor layer 101 is a P-type semiconductor layer, the active layer 102 is a multi-quantum-well layer, and the second semiconductor layer 103 is an N-type semiconductor layer.
[0067] In this embodiment, the current blocking layer 104 can be SiO2. x Layers where x is greater than 0, for example, current blocking layer 104 is a SiO2 layer.
[0068] The thickness of the current blocking layer 104 can be 0.01 to 6 μm, for example, 2 μm.
[0069] In this embodiment of the disclosure, the current spreading layer 105 may be an indium tin oxide (ITO) layer.
[0070] The thickness of the current spreading layer 105 can be 0.01 to 100 μm, for example, 10 μm.
[0071] In this embodiment, the passivation layer 106 can be one or a combination of two of SiO2 and Si3N4.
[0072] The thickness of the passivation layer 106 can be 0.01 to 1000 μm, for example, 100 μm.
[0073] In this embodiment of the disclosure, the first electrode 107 and the second electrode 108 can be one or more stacks of Cr, Al, Ti, Ni, Pt, and Au.
[0074] For example, the first electrode 107 and the second electrode 108 are Cr / Al / Ti / Ni / Pt / Au stacked electrodes.
[0075] The thicknesses of each sublayer in Cr / Al / Ti / Ni / Pt / Au can be, in order:
[0076] 30nm / 1000nm / 40nm / 1000nm / 1000nm / 10000nm.
[0077] Of course, the above film structure is only an example, and in other embodiments, the light-emitting diode may include more or fewer film layers. Furthermore, the above film material is only an example; the materials of each film layer can be selectively set, and this disclosure does not limit this.
[0078] Figure 4 This is a flowchart illustrating a method for manufacturing a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 4 The method includes the following steps:
[0079] S21. Fabricate a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked sequentially.
[0080] S22. A current blocking layer is formed on the surface of the second semiconductor layer.
[0081] The current blocking layer includes a fourth extension, a fifth extension, and a main body located between the fourth extension and the fifth extension. The main body has multiple through holes arranged in a triangular interval.
[0082] S23. A current spreading layer is formed on the surface of the current blocking layer and the second semiconductor layer.
[0083] The current spreading layer is connected to the second semiconductor layer through the plurality of vias.
[0084] S24. Fabricate the first and second electrodes.
[0085] The first electrode is connected to the first semiconductor layer, and the second electrode is connected to the current spreading layer. The first electrode includes a connected first electrode body and a first extension, and the second electrode includes a connected second electrode body, a second extension, and a third extension. The projection of the first extension on the first semiconductor layer is located between the projections of the second extension and the third extension on the first semiconductor layer. The fourth extension is arranged corresponding to the second extension, and the fifth extension is arranged corresponding to the third extension.
[0086] S25. Create a passivation layer.
[0087] The passivation layer covers the current spreading layer, the first electrode, and the second electrode.
[0088] In this embodiment, the first electrode has a first extension, and the second electrode has a second extension and a third extension, with the first extension located between the second and third extensions, enabling the current transmitted through the electrode to radiate over a larger area. Furthermore, a fourth and fifth extension, corresponding to the second and third extensions, are provided in the current-blocking layer, and through-holes are formed in the main body between the fourth and fifth extensions to promote current expansion in the region between them. The multiple through-holes in the main body are arranged in a triangular interval, further improving the current expansion effect, preventing current concentration in a certain area, and increasing the lifespan of the light-emitting diode.
[0089] Figure 5 A flowchart illustrating another method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 5 The method includes the following steps:
[0090] S31. A first semiconductor layer, an active layer, and a second semiconductor layer are sequentially stacked on a substrate.
[0091] In this embodiment of the disclosure, the substrate can be any one of sapphire substrate, Si substrate, SiC substrate, etc., and this embodiment of the disclosure does not limit it.
[0092] For example, the substrate is a sapphire substrate.
[0093] The thickness of the substrate can be 3 to 200 μm, for example, 200 μm.
[0094] In one example, step S31 includes:
[0095] The first step is to grow the first semiconductor layer.
[0096] The first semiconductor layer is an N-type GaN layer.
[0097] An N-type GaN layer was grown on the substrate surface using a metal-organic chemical vapor deposition (MOCVD) system.
[0098] In the embodiments disclosed herein, the above-mentioned semiconductor layer can be grown using a Veeco K465i or C4 or RB MOCVD equipment or an AIXTRON metal-organic chemical vapor deposition equipment. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.
[0099] The second step is to grow the active layer.
[0100] For example, an InGaN / GaN layer is grown on the surface of an N-type GaN layer using an MOCVD device.
[0101] The third step is to grow a second semiconductor layer.
[0102] For example, an MOCVD device is used to grow a P-type GaN layer on the surface of an InGaN / GaN layer.
[0103] S32. The first semiconductor layer, the active layer and the second semiconductor layer stacked in sequence are patterned to form a stepped structure.
[0104] In one example, step S32 includes:
[0105] An etching technique is used to pattern the first semiconductor layer and the active layer to form a stepped structure, with the stepped surface of the stepped structure located in the first semiconductor layer.
[0106] Among them, the etching technology can be inductively coupled plasma (ICP) etching technology.
[0107] In this embodiment of the disclosure, the step surface includes a main step surface and a slit step surface connected to the main step surface.
[0108] It is worth noting that, in the embodiments disclosed herein, not only can a stepped structure be formed, but also an isolation trench extending to the substrate can be formed.
[0109] S33. A current blocking layer is formed on the surface of the second semiconductor layer.
[0110] The current blocking layer includes a fourth extension, a fifth extension, and a main body located between the fourth extension and the fifth extension. The main body has multiple through holes arranged in a triangular interval.
[0111] In one example, step S33 includes:
[0112] SiO2 was deposited using an electron beam evaporation device. x Thin film, x > 0; for SiO x The thin film is patterned to obtain the current blocking layer.
[0113] The growth temperature during vapor deposition is 100℃~500℃.
[0114] For example, the current blocking layer is a SiO2 layer.
[0115] The thickness of the current blocking layer can be 0.01 to 6 μm, for example, 2 μm.
[0116] like Figure 2 As shown, multiple through holes arranged in a triangular interval means that any one through hole forms a triangle with at least two adjacent through holes.
[0117] In one example of an embodiment of this disclosure, the plurality of through holes 281 are arranged in an equilateral triangle at intervals.
[0118] In this implementation, the multiple vias 281 are distributed in an equilateral triangle. The equilateral triangle makes the vias more evenly distributed, thereby improving the current spreading effect.
[0119] In other examples, the multiple through holes 281 may also be distributed in other triangular shapes, such as right triangles.
[0120] When multiple through holes 281 are arranged in an equilateral triangle, the side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension 206 and the fifth extension 207.
[0121] For example, the side length of the equilateral triangle is 1 / 4 of the interval between the fourth extension 206 and the fifth extension 207.
[0122] The side length of the equilateral triangle can be the distance between the centers of any two of the three through holes corresponding to the equilateral triangle.
[0123] In this implementation, the above dimensions are used as the side length of the equilateral triangle, so that the number and spacing of the through holes between the fourth extension 206 and the fifth extension 207 are moderate, which is conducive to current expansion.
[0124] In this embodiment of the disclosure, the through hole 281 is a circular hole with a diameter of 4 to 20 μm.
[0125] Using round holes facilitates the design and fabrication of through holes. A diameter of 1–3 μm is used for the round holes to avoid the problem of reduced current spreading effect caused by round holes that are too large or too small.
[0126] In other embodiments, the through hole 281 may also be other shapes, such as rectangles, etc., and this disclosure does not limit this.
[0127] like Figure 1 As shown, the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103 have a stepped structure, and the step surface 123 of the stepped structure is located in the first semiconductor layer 101.
[0128] like Figure 2 As shown, the stepped surface 123 includes a main stepped surface 1231 and a slit stepped surface 1232 connected to the main stepped surface 1231; the first electrode body 201 is located on the main stepped surface 1231, and the first extension 202 is located within the slit stepped surface 1232.
[0129] In this embodiment of the disclosure, the first electrode located in the first semiconductor layer 101 is provided with a first extension 202 through the slit step surface 1232, so that the radiation range of the first electrode is larger, which is beneficial to the current expansion of the large-size light-emitting diode.
[0130] See you again Figure 2 The fourth extension 206 and the fifth extension 207 have gaps between themselves and the main body 208. The current spreading layer can be connected to the second semiconductor layer through the gaps and multiple through holes in the current blocking layer, thereby enabling the current supplied by the electrodes to be uniformly transmitted to the entire surface of the second semiconductor layer.
[0131] like Figure 2 As shown, the fourth extension 206 and the fifth extension 207 are connected by an annular structure 209, which is correspondingly disposed with the second electrode body 203, so that the second electrode body 203 is connected to the second semiconductor layer through the current spreading layer at the annular structure 209.
[0132] S34. A current spreading layer is formed on the surface of the current blocking layer and the second semiconductor layer.
[0133] The current spreading layer is connected to the second semiconductor layer through the plurality of vias.
[0134] In one example, step S34 includes:
[0135] A current-spreading thin film is deposited using an electron beam evaporation apparatus; the current-spreading thin film is then patterned to obtain the current-spreading layer.
[0136] In this embodiment of the disclosure, the current spreading layer is an indium tin oxide (ITO) layer.
[0137] The thickness of the current spreading layer can be 0.01 to 100 μm, for example, 10 μm.
[0138] S35, Fabricate the first and second electrodes.
[0139] The first electrode is connected to the first semiconductor layer, and the second electrode is connected to the current spreading layer. The first electrode includes a connected first electrode body and a first extension, and the second electrode includes a connected second electrode body, a second extension, and a third extension. The projection of the first extension on the first semiconductor layer is located between the projections of the second extension and the third extension on the first semiconductor layer. The fourth extension is arranged corresponding to the second extension, and the fifth extension is arranged corresponding to the third extension.
[0140] In one example, step S35 includes:
[0141] The first electrode is fabricated on the stepped surface of the stepped structure using magnetron sputtering or electron beam evaporation, and the second electrode is fabricated on the surface of the current spreading layer.
[0142] The temperature for manufacturing the electrodes can be from 100℃ to 400℃, and annealing is performed after the electrodes are manufactured.
[0143] In this embodiment of the disclosure, the first electrode and the second electrode can be one or more stacks of Cr, Al, Ti, Ni, Pt, and Au.
[0144] For example, the first electrode and the second electrode are Cr / Al / Ti / Ni / Pt / Au stacked electrodes.
[0145] The thicknesses of each sublayer in Cr / Al / Ti / Ni / Pt / Au can be, in order:
[0146] 30nm / 1000nm / 40nm / 1000nm / 1000nm / 10000nm.
[0147] S36. Create a passivation layer.
[0148] The passivation layer covers the current spreading layer, the first electrode, and the second electrode.
[0149] In one example, step S36 includes:
[0150] A passivation layer film is fabricated using plasma-enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD) techniques; the passivation layer film is patterned to form vias corresponding to the first electrode and the second electrode, respectively.
[0151] For example, an etching technique is used to etch the passivation layer film to form vias corresponding to the first electrode and the second electrode, respectively.
[0152] In this embodiment of the disclosure, the passivation layer may be one or a combination of two of SiO2 and Si3N4.
[0153] The thickness of the passivation layer can be 0.01 to 1000 μm, for example, 100 μm.
[0154] Optionally, the method may further include grinding, polishing, and dicing the light-emitting diode wafer to obtain a light-emitting diode chip.
[0155] Figure 6 This is a schematic diagram of the current distribution of a light-emitting diode provided in an embodiment of this disclosure. See also... Figure 6 The small circle I represents the current distribution. It can be seen that the current distribution is uniform when using the scheme of this embodiment.
[0156] Figure 7 This is a schematic diagram comparing the current aging test results of the light-emitting diode (LED) provided in this disclosure embodiment and LEDs of related technologies. See also... Figure 7 The x-axis represents usage time (in hours (hrs, h)), and the y-axis represents light decay. The light-emitting diode (LED) provided in this embodiment of the present disclosure, after 3000 hours of laboratory aging, exhibits an average light decay of 7.5%, while the average light decay of related LEDs (conventional LED designs) is 20%. It is evident that the aging performance of the LED provided in this embodiment is far superior to that of related LEDs. If the LED is scrapped at 8% light decay, and the test usage time is converted to normal usage time at a ratio of 1:10, the lifespan of the LED provided in this embodiment can be extended by 15000 hours, significantly improving the LED's service life.
[0157] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A light-emitting diode, characterized in that, The light-emitting diode includes: a first semiconductor layer (101), an active layer (102), a second semiconductor layer (103), a current blocking layer (104), a current spreading layer (105), a passivation layer (106), a first electrode (107), and a second electrode (108); The first semiconductor layer (101), the active layer (102), and the second semiconductor layer (103) are stacked sequentially; the current spreading layer (105) covers the second semiconductor layer (103), and the passivation layer (106) covers the current spreading layer (105), the first electrode (107), and the second electrode (108); The first electrode (107) is connected to the first semiconductor layer (101), and the second electrode (108) is connected to the current spreading layer (105). The first electrode (107) includes a first electrode body (201) and a first extension (202) connected together. The second electrode (108) includes a second electrode body (203), a second extension (204), and a third extension (205) connected together. The projection of the first extension (202) onto the first semiconductor layer (101) is located between the projections of the second extension (204) and the third extension (205) onto the first semiconductor layer (101). The current blocking layer (104) is located between the current spreading layer (105) and the second semiconductor layer (103). The current blocking layer (104) includes a fourth extension (206), a fifth extension (207), and a main body (208) located between the fourth extension (206) and the fifth extension (207). The fourth extension (206) is arranged correspondingly to the second extension (204), and the fifth extension (207) is arranged correspondingly to the third extension (205). The main body (208) has a plurality of through holes (281). The current spreading layer (105) is connected to the second semiconductor layer (103) through the plurality of through holes (281). The plurality of through holes (281) are arranged in a triangular interval.
2. The light-emitting diode according to claim 1, characterized in that, The plurality of through holes (281) are arranged in an equilateral triangle at intervals.
3. The light-emitting diode according to claim 2, characterized in that, The side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension (206) and the fifth extension (207).
4. The light-emitting diode according to claim 1, characterized in that, The through hole (281) is a circular hole with a diameter of 4 to 20 μm.
5. The light-emitting diode according to any one of claims 1 to 4, characterized in that, The first semiconductor layer (101), the active layer (102), and the second semiconductor layer (103) have a stepped structure. The stepped surface (123) of the stepped structure is located on the first semiconductor layer (101). The stepped surface (123) includes a main stepped surface (1231) and a slit stepped surface (1232) connected to the main stepped surface (1231). The first electrode body (201) is located on the main stepped surface (1231), and the first extension (202) is located within the slit stepped surface (1232).
6. A method for manufacturing a light-emitting diode, characterized in that, The method includes Fabricate a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially; A current blocking layer is formed on the surface of the second semiconductor layer. The current blocking layer includes a fourth extension, a fifth extension, and a main body located between the fourth extension and the fifth extension. The main body has a plurality of through holes, which are arranged in a triangular interval. A current spreading layer is formed on the surfaces of the current blocking layer and the second semiconductor layer, and the current spreading layer is connected to the second semiconductor layer through the plurality of vias; A first electrode and a second electrode are fabricated. The first electrode is connected to the first semiconductor layer, and the second electrode is connected to the current spreading layer. The first electrode includes a connected first electrode body and a first extension. The second electrode includes a connected second electrode body, a second extension, and a third extension. The projection of the first extension on the first semiconductor layer is located between the projections of the second extension and the third extension on the first semiconductor layer. The fourth extension is arranged correspondingly to the second extension, and the fifth extension is arranged correspondingly to the third extension; A passivation layer is fabricated, which covers the current spreading layer, the first electrode, and the second electrode.
7. The method according to claim 6, characterized in that, The multiple through holes are arranged in an equilateral triangle pattern.
8. The method according to claim 7, characterized in that, The side length of the equilateral triangle is 1 / 8 to 1 / 4 of the interval between the fourth extension and the fifth extension.
9. The method according to claim 6, characterized in that, The through hole is a circular hole with a diameter of 4–20 μm.
10. The method according to any one of claims 6 to 9, characterized in that, The first semiconductor layer, the active layer, and the second semiconductor layer have a stepped structure. The stepped surface of the stepped structure is located on the first semiconductor layer. The stepped surface includes a main stepped surface and a slit stepped surface connected to the main stepped surface. The first electrode body is located on the main stepped surface, and the first extension is located within the slit stepped surface.
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