Micro LED structure and full-color micro LED panel
By vertically stacking micro-LED structures and using SiO2-SiO2 or ITO-ITO bonding, the problems of light crosstalk and insufficient resolution in micro-LED panels are solved, achieving efficient light illumination and intensity optimization, and improving the thickness and strength of the bonding layer.
Patent Information
- Application Number
- CN202280092910.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-23
- Publication Date
- 2025-12-19
- Estimated Expiration
- 2042-12-23
AI Technical Summary
In existing micro-LED technologies, light crosstalk and light scattering between adjacent LEDs lead to low efficiency, reduced brightness, insufficient resolution and bonding strength, and the large thickness of the metal bonding layer is not conducive to size optimization.
A vertically stacked micro-LED structure is adopted, and the metal-metal bonding is replaced by SiO2-SiO2 or ITO-ITO bonding. The reflective layer is combined to improve the light illumination efficiency, reduce optical crosstalk, and enhance the bonding strength.
It improves the light illumination efficiency of individual pixel areas, enhances the resolution and bonding strength of micro-LED panels, while reducing optical crosstalk and optimizing the bonding layer thickness.
Smart Images

Figure CN118901134B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates generally to micro light emitting diode (LED) technology, and more particularly to micro LED structures and full-color micro LED panels using the micro LED structures. BACKGROUND
[0002] Inorganic micro light emitting diodes are also known as "micro LEDs." They are increasingly important due to their use in various applications, including, for example, self-emissive micro displays, visible light communication, and optogenetics. Micro LEDs have greater output performance than conventional LEDs due to better strain relaxation, improved light extraction efficiency, uniform current spreading, etc. In addition, micro LEDs have improved thermal effects, improved operation at higher current density, better response rate, greater operating temperature range, higher resolution, higher color gamut, higher contrast, lower power consumption, etc. compared to conventional LEDs.
[0003] Full-color micro LED panels are manufactured by integrating thousands or even millions of micro LED arrays with a driving circuitry backplane. Each pixel of a micro LED panel is formed by one or more micro LEDs. A micro LED panel can be a single-color or a multi-color panel. In particular, for a full-color LED panel, each pixel can further include multiple sub-pixels formed respectively by multiple micro LEDs, each micro LED corresponding to a different color. For example, three micro LEDs respectively corresponding to red, green, and blue colors can be stacked to form one pixel. Different colors can be mixed to produce a wide range of colors.
[0004] However, existing micro LED technology faces several challenges. For example, one challenge is how to improve the effective illumination area within each pixel when the distance between adjacent LEDs is determined. In addition, when the single LED illumination area is determined, it can be a difficult task to further improve the overall resolution of the micro LED panel because micro LEDs with different colors must occupy their designated areas within a single pixel.
[0005] In addition, the light emitted by the LED dies is generated by spontaneous emission and thus is not directional, resulting in a large divergence angle. The large divergence angle can cause various problems in the micro LED panel. On one hand, due to the large divergence angle, only a small portion of the light emitted by the micro LED can be utilized. This can significantly reduce the efficiency and brightness of the micro LED display system. On the other hand, due to the large divergence angle, the light emitted by one micro LED pixel can illuminate its neighboring pixels, resulting in light cross-talk between pixels, loss of clarity, and loss of contrast.
[0006] Furthermore, conventional metal-to-metal bonding has a relatively large thickness and a low bonding strength. The large thickness can distort the emitted light and pose challenges to further size optimization of the LED panel. It is thus desirable to further reduce the thickness of the bonding layer and increase the bonding strength. SUMMARY
[0007] The present disclosure provides a micro-LED structure that addresses problems in the prior art, such as the problems described above. In particular, the disclosed micro-LED structure integrates two or more vertically stacked micro-LEDs by placing them in different layers of the micro-LED structure and electrically connecting them to an integrated circuit (IC) backplane. The micro-LED structure effectively enhances the light illumination efficiency within a single pixel area while increasing the resolution of the micro-LED panel.
[0008] Furthermore, the disclosed micro-LED structure further increases the light illumination efficiency by including a reflective layer that not only effectively increases the amount of light emitted by each vertically stacked micro-LED but also reduces optical cross-talk between the vertically stacked micro-LEDs.
[0009] Consistent with the disclosed embodiments, SiO2-SiO2 or ITO-ITO bonding is used in place of metal-metal bonding. The SiO2-SiO2 or ITO-ITO bonding can further reduce the thickness of the bonding layer while achieving a higher bonding strength. According to some embodiments, the ITO-ITO bonding can eliminate the need for an ITO connection layer (ITO-C).
[0010] Consistent with the disclosed embodiments, a plurality of the disclosed micro-LED structures can be arranged in a micro-LED array to form a micro-LED panel. Each of the plurality of micro-LED structures corresponds to one pixel in the disclosed micro-LED structure, and the plurality of vertically stacked micro-LEDs in the pixel correspondingly to a plurality of sub-pixels.
[0011] In some embodiments, the disclosed micro-LED structure includes an IC backplane, at least three mesa structures stacked along a vertical axis, and a top contact formed over the at least three mesa structures.
[0012] In some embodiments, the at least three mesa structures include a first mesa structure formed on the IC backplane, a second mesa structure formed on the first mesa structure, and a third mesa structure formed on the second mesa structure.
[0013] In some embodiments, the second mesa structure includes a first connecting layer, a first reflective layer formed on the first connecting layer, a first light emitting layer formed on the first reflective layer, and a second connecting layer formed on the first light emitting layer, the first light emitting layer including a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer.
[0014] In some embodiments, the third mesa structure includes a first bonding layer formed on the second connecting layer, a second reflective layer formed on the first bonding layer, a second light emitting layer formed on the second reflective layer, and a third connecting layer formed on the second light emitting layer, the second light emitting layer including a third semiconductor layer and a fourth semiconductor layer formed on the third semiconductor layer.
[0015] In some embodiments, the first connecting layer and the third connecting layer are electrically connected with the IC backplane.
[0016] In some embodiments, the second connecting layer is connected with the top contact.
[0017] In some embodiments, the first semiconductor layer and the fourth semiconductor layer have a first conductivity type, and the second semiconductor layer and the third semiconductor layer have a second conductivity type.
[0018] In some embodiments, each of the light emitting layers includes a P-type semiconductor layer, an N-type semiconductor layer, and a quantum well layer between the P-type semiconductor layer and the N-type semiconductor layer. For example, each of the light emitting layers can include a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top, thereby forming a P-N junction; or alternatively, each of the light emitting layers can include an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top, thereby forming an N-P junction. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1A is a cross-sectional view of a micro-LED structure according to some embodiments of the present disclosure;
[0020] Figure 1B is a cross-sectional view of another micro-LED structure according to some embodiments of the present disclosure;
[0021] Figure 1C is a top view illustration of an N-type contact according to some embodiments of the present disclosure;
[0022] Figure 2A is a top view of an exemplary micro-LED structure according to some embodiments of the present disclosure;
[0023] Figure 2B is a top view of another exemplary micro-LED structure according to some embodiments of the present disclosure;
[0024] Figure 3 is a top view of an exemplary micro-LED panel according to some embodiments of the present disclosure;
[0025] Figure 4 is a top view of another exemplary micro-LED panel according to some embodiments of the present disclosure. DETAILED DESCRIPTION
[0026] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings, in order to provide a further understanding of the present disclosure. The
[0027] Figure 1A is a cross-sectional view of a micro-LED structure 10 according to some embodiments of the present disclosure. As shown, the micro-LED structure 10 includes an IC backplane and three mesa structures stacked along a vertical axis. Specifically, among the three mesa structures, a first mesa structure includes, from bottom to top, a conductive bonding layer 103, a light-emitting layer 100 (e.g., a layer emitting red light), an N-type contact 102, and a top connection layer 101. As shown, in a plan view, the N-type contact 102 refers to a point-like contact pad. The N-type contact 102 is formed on a surface of an N-type semiconductor epitaxial layer (i.e., an “N-type epitaxial layer”). The N-type contact 102 includes a conductive material such as metal and forms an ohmic contact on the N-type epitaxial layer. Referring back to Figure 1A , the top connection layer 101 is electrically connected to a top of the light-emitting layer 100 via the N-type contact 102, and the conductive bonding layer 103 bonds a bottom of the light-emitting layer 100 to the IC backplane. A second mesa structure of the micro-LED structure 10 includes, from bottom to top, a bottom connection layer 202, a reflective layer 204, a light-emitting layer 200 (e.g., a layer emitting green light), and an interconnection layer 201. In some embodiments, the first and second mesa structures (e.g., the top connection layer 101 and the bottom connection layer 202) can be bonded by a dielectric (i.e., electrically insulating) bonding layer 203. The interconnection layer 201 is electrically connected to a top of the light-emitting layer 200, and the bottom connection layer 202 electrically connects a bottom of the reflective layer 204 to the IC backplane. A third mesa structure of the micro-LED structure 10 includes, from bottom to top, a dielectric (i.e., electrically insulating) bonding layer 303, a reflective layer 304, a light-emitting layer 300 (e.g., a layer emitting blue light), and a top connection layer 301. The dielectric bonding layer 303 bonds the reflective layer 304 and the interconnection layer 201. The three mesa structures are stacked on the IC backplane, with the second mesa structure formed above the first mesa structure, and the third mesa structure formed above the second mesa structure. Figure 1C Figure 1A
[0028] In some embodiments, sidewall connection structures 305 are formed on the interconnect layer 201 and can surround sidewalls of the reflective layer 304 and the dielectric bonding layer 303. The sidewall connection structures 305 can provide electrical contact from the sides of the reflective layer 304 to the reflective layer.
[0029] In some embodiments, an insulating layer 206 (e.g., ALD, SiN, or Si02) can be attached around the sidewalls of the mesa structure. In some embodiments, the ALD layer 206 can be attached around the sidewalls of the light emitting layer 200 and the reflective layer 204. In some embodiments, the ALD layer can include AI2O3. The insulating layer 206 can provide sidewall passivation to minimize edge effects and losses through non-radiative recombination.
[0030] With continued reference to Figure 1A In some embodiments, a dielectric material can be filled around the mesa structure. In some embodiments, the dielectric material can be filled in the gaps of the micro-LED structure 10, thereby isolating the light emitting layers (e.g., light emitting layers 100, 200, 300) from being electrically connected to each other.
[0031] In some embodiments, the light emitting layers 100, 200, 300 can emit different colors of light or light images. In some example embodiments, the light emitting layer 100 is selected as a red light emitting layer, the light emitting layer 200 is selected as a green light emitting layer, and the light emitting layer 300 is selected as a blue light emitting layer. The above color assignment is for illustrative purposes only. Other combinations of light colors can be assigned to the light emitting layers in accordance with the disclosed embodiments to achieve any desired results.
[0032] In some embodiments, each of the light emitting layers 100, 200, 300 can include two semiconductor layers of different conductive types (e.g., P-type and N-type), and a quantum well layer between the two semiconductor layers of different types. In some embodiments, the light emitting layers 100 and 200 can each have a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top, and the light emitting layer 300 can have an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top. In some other embodiments, the light emitting layers 100 and 200 can each have an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top, and the light emitting layer 300 can have a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top.
[0033] When the mesa structure of the micro LED structure 10 is vertically projected onto a horizontal plane, each of the mesa structures forms a projection area on the horizontal plane. Each projection area on the horizontal plane has a contour, which is referred to herein as a projection contour in a plan view (i.e., a top view). In some embodiments, the disclosed micro LED structure is configured such that the projection contour of the upper light emitting layer in the plan view is located within the projection shape of the lower light emitting layer in the plan view, thereby forming multiple mesa structures with different widths. Specifically, Figure 2A is Figure 1A a top view of the micro LED structure 10. As Figure 2A indicated, R, G, B respectively represent the areas of the light emitting layers 100, 200, 300 formed in the top view. In this exemplary embodiment, the projection contour of the light emitting layer 300 is located within the projection contour of the light emitting layer 200; and the projection contour of the light emitting layer 200 is located within the contour of the light emitting layer 100.
[0034] In some embodiments, the conductive bonding layer 103 can be transparent or opaque. In some embodiments, the material of the conductive bonding layer 103 is selected from one of a metal, a composite metal, or a transparent conductive material. In some embodiments, the transparent conductive material can be made of a transparent plastic (resin) or silicon dioxide (Si02), such as spin-on glass (SOG), adhesive Micro Resist BCL-1200, etc. The metal can be selected from copper (Cu), gold (Au), etc. In some embodiments, the thickness of the conductive bonding layer 103 can be in a range from about 0.1 microns to about 5 microns. In some embodiments, the metal composition for the bonding layer can include Au-Au bonding, Au-Sn bonding, Au-In bonding, Ti-Ti bonding, Cu-Cu bonding, or a combination thereof. For example, when Au-Au bonding is needed, each of the two Au layers needs a chromium (Cr) coating as an adhesion layer, and a platinum (Pt) coating is needed between the gold layer and the chromium coating as a diffusion barrier layer. The Cr layer and the Pt layer can be formed on the two Au layers to be bonded. In some embodiments, when the thickness of the two Au layers to be bonded is approximately the same, the mutual diffusion of Au on the two Au layers under high pressure and high temperature can bond the two layers together. Example bonding techniques can include eutectic bonding, thermal compression bonding, and transient liquid phase (TLP).
[0035] In some embodiments, the dielectric bonding layer (e.g., 203, 303) can be Si02-Si02 bonding. The Si02-Si02 bonding can further reduce the thickness of the bonding layer while achieving a higher bonding strength.
[0036] In some embodiments, the material of the interconnect layers (e.g., 101, 201, 202, 301) may be selected from transparent conductive materials. In some embodiments, the transparent conductive material may be indium tin oxide (ITO). In some embodiments, the thickness of the ITO layer may range from about 0.01 micrometers to about 1 micrometer.
[0037] In some embodiments, the second and third mezzanine structures are combined to form a dielectric bonding layer 303. In some embodiments, the light-emitting layer 200 may have its entire area covered by the bonding layer 201, and thus its entire area may be utilized.
[0038] In some embodiments, the cathode connection layer via 400 filled with conductive metal can be formed adjacent to the light-emitting layers 100, 200, and 300 and stacked adjacent to the mesa structure. In some exemplary embodiments, such as Figure 1A As shown, the cathode connection layer via 400 is electrically connected to the light-emitting layers 100, 200, and 300 via the connection layer 101 or the interconnect layer 201. In some embodiments, a top contact pad 401 may be formed on top of the cathode connection layer via 400. The top contact pad 401 may be electrically connected to a circuit system outside the microLED structure 10.
[0039] In some embodiments, at least one of the anode interconnect vias (e.g., 500, 600) may be formed adjacent to the stacked mesa structure of the microLED structure 10. The anode interconnect vias 500 and 600 are formed at locations separate from the cathode interconnect via 400. For example, the anode interconnect vias 500 and 600 may be located on a different side of the mesa structure than the cathode interconnect via 400. The vias 400, 500, and 600 are not electrically connected to each other.
[0040] In one exemplary implementation, such as Figure 1A As shown, the anode interconnect 500 connects the light-emitting layer 200 to the IC backplane via the bottom interconnect 202. The anode interconnect 600 connects the light-emitting layer 300 to the IC backplane via the top interconnect 301. In this exemplary embodiment, the light-emitting layer 100 is electrically connected to the IC backplane via the conductive bonding layer 103, and therefore, interconnect vias are not required to connect the light-emitting layer 100 to the IC backplane.
[0041] In some embodiments, the reflective layer 204 can be sandwiched between the bottom connecting layer 202 and the light emitting layer 200; the reflective layer 304 can be sandwiched between the dielectric bonding layer 303 and the light emitting layer 300. The sidewalls of the reflective layer 204, 304 are aligned with the sidewalls of the light emitting layer 200 and the dielectric bonding layer 303 in mesa structures, respectively. For example, in a middle mesa structure, the reflective layer 204 is formed at the bottom surface of the light emitting layer 200, and the sidewalls of the light emitting layer 200 are aligned with the sidewalls of the reflective layer 204; and in a top mesa structure, the reflective layer 304 is formed at the bottom surface of the light emitting layer 300, and the sidewalls of the dielectric bonding layer 303 are aligned with the sidewalls of the reflective layer 304. In some embodiments, each of the reflective layers in the micro LED structure 10 includes a stacked metal ODR layer or a high reflectivity metal.
[0042] In some example embodiments, the light emitting layer 100 in the micro LED structure 10 ( Figure 1A ) is designed to emit red light. Examples of red light emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the films within the red light emitting layer can include layers of P-type (Al)(In)(Ga)P, (Al)INGaP light emitting layer, N-type (Al)(In)(Ga)P, or N-type GaAs. In some embodiments, the P-type can be Mg-doped or C-doped, and the N-type can be Si-doped. In some embodiments, the thickness of the light emitting layer 100 can range from about 0.3 microns to about 5 microns.
[0043] In some embodiments, the light emitting layer 200 in the micro LED structure 10 ( Figure 1A ) is designed to emit green light. Examples of green light emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the films within the green light emitting layer 200 can include layers of P-type GaN / InGaN light emitting layer / N-type GaN. In some embodiments, the P-type can be Mg-doped, and the N-type can be Si-doped. In some embodiments, the thickness of the light emitting layer 200 can range from about 0.3 microns to about 5 microns.
[0044] In some embodiments, the light emitting layer 300 in the micro LED structure 10 ( Figure 1AThe emitting layer 300 in the [structure / structure] is designed to emit blue light. Examples of blue emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the film within the blue emitting layer 300 may comprise a layer of p-type GaN, InGaN, or N-type GaN. In some embodiments, the p-type may be Mg-doped, and the N-type may be Si-doped. In some embodiments, the thickness of the blue emitting layer 300 may range from about 0.3 micrometers to about 5 micrometers.
[0045] In some implementations, in the micro-LED structure 10 ( Figure 1A In this embodiment, a top bonding layer (e.g., top bonding layer 301) is attached to the light-emitting layer 300 at the very top of the micro-LED structure. In some embodiments, the thickness of the top bonding layer 301 (ITO layer) can range from about 0.01 micrometers to about 1 micrometer.
[0046] In some implementations, the microlens 800 can be formed in the micro-LED structure (e.g., as shown in the image). Figure 1A On top of the micro-LED structure shown.
[0047] Figure 1B This is a cross-sectional view of a microLED structure according to some exemplary embodiments. The microLED structure is microLED structure 10 ( Figure 1A A variant of ). Figure 1A and Figure 1B The same numbers in the text refer to the same structure, and their details will not be repeated here. The following only explains... Figure 1A and Figure 1B The differences between them. For example Figure 1B As shown, instead of using transparent and electrically insulating materials (e.g., SiO2-SiO2) Figure 1A ), combined with layer 303 (such as Figure 1A The bottom bonding layer 201 can be made of a transparent and conductive bonding layer (e.g., an ITO-ITO bonding layer). The bottom bonding layer 201 is directly bonded to the bottom of the reflective layer 304.
[0048] Figure 2B This schematically illustrates a different exemplary implementation. Figure 1B A top view of the micro-LED structure 10. (See attached image.) Figure 2B As shown, the anode connection layer through holes 500 and 600 are formed in a direction parallel to the adjacent edges of the mesa structure. Figure 2A and Figure 2B The implementation scheme shown is for illustrative purposes only. Common connection layer vias and anode connection layer vias can be formed anywhere within the micro-LED region.
[0049] Figure 3is a top view of a micro-LED panel 11 according to an example embodiment. As shown, the micro-LED panel 11 includes an array of micro-LED structures 10. Figure 3 As shown, the top contact pads 401 of the multiple micro-LED structures 10 in each row are connected together to form a continuous line. The shared contact pad 402 connects the top contact pads 401 of all rows together. In this example embodiment, the distribution direction of the anode connection layer via holes 500, 600 is perpendicular to the distribution direction of the top contact pads 401. Figure 3
[0050] is a top view of a micro-LED panel 11 according to another example embodiment. As shown, the micro-LEDs of adjacent rows share one top contact pad 401. This arrangement further increases the integration of the micro-LED panel. Figure 4 Figure 4
[0051] The micro-LEDs described in the disclosed embodiments have very small dimensions in volume. The micro-LEDs can be organic or inorganic LEDs. In some embodiments, the micro-LEDs can be applied in a micro-LED array panel. The light emitting area of the micro-LED array panel can be very small, e.g., 1 mm x 1 mm, 3 mm x 5 mm, etc. In some embodiments, the light emitting area can be the area of a micro-LED array in the micro-LED array panel. The micro-LED array panel can include one or more micro-LED arrays forming a pixel array, e.g., a 1600 x 1200, 680 x 480, or 1920 x 1080 pixel array, where the micro-LEDs are the pixels. The diameter of the micro-LEDs can be in the range of about 200 nm to 2 μιη. In some embodiments, an IC backplane can be formed at the back surface of the micro-LED array and electrically connected to the micro-LED array. In some embodiments, the IC backplane can obtain signals such as image data from outside via signal lines to control the on / off (e.g., emit light or not) of the corresponding micro-LEDs.
[0052] Thus, different types of display panels can be manufactured. For example, in some embodiments, the resolution of the display panel can be in the range of 8x8 to 3840x2160. Common display resolutions include QVGA with a resolution of 320x240 and an aspect ratio of 4:3, XGA with a resolution of 1024x768 and an aspect ratio of 4:3, D with a resolution of 1280x720 and an aspect ratio of 16:9, FHD with a resolution of 1920x1080 and an aspect ratio of 16:9, UHD with a resolution of 3840x2160 and an aspect ratio of 16:9, and 4K with a resolution of 4096x2160 and an aspect ratio of 1.9. A wide variety of pixel sizes can also exist, ranging from sub-microns and below to 10 mm and above. The size of the entire display area can also vary widely, ranging from a few tens of microns or less in diagonal to hundreds of inches or more.
[0053] Those skilled in the art understand that the micro-LED display panel is not limited by the above structure, and can include more or fewer components than those illustrated, or can combine some components, or can use different components.
[0054] It should be noted that the relational terms herein, such as “first” and “second”, are merely used to distinguish one entity or operation from another entity or operation, without requiring or implying any actual relationship or order between these entities or operations. In addition, the words “comprise”, “have”, “contain” and “include” and other similar forms are intended to be equivalent in meaning and are open-ended, as one or more items following any of these words are not meant to be an exhaustive list of such item or items, or are meant to be limited to only the listed item or items.
[0055] As used herein, the term “or” covers all possible combinations, unless otherwise explicitly stated, unless not feasible. For example, if it is stated that a database can include A or B, then unless otherwise explicitly stated or not feasible, the database can include A, or B, or A and B. As a second example, if it is stated that a database can include A, B, or C, then unless otherwise explicitly stated or not feasible, the database can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.
[0056] Those skilled in the art understand that all or part of the steps for implementing the foregoing embodiments can be implemented by hardware, or can be implemented by a program instructing the relevant hardware. The program can be stored in the foregoing flash memory, in the foregoing conventional computer device, in the foregoing central processing module, in the foregoing adjustment module, etc.
[0057] The above description is merely that of embodiments of the present disclosure, and the present disclosure is not limited thereto. Modifications, equivalent replacements, and improvements made to the present disclosure without departing from the spirit and principles of the present disclosure shall fall within the scope of the present disclosure.
Claims
1. A micro-LED structure comprising: an IC backplane; at least three mesa structures stacked along a vertical axis, the at least three mesa structures comprising: a first mesa structure formed on the IC backplane; a second mesa structure formed on the first mesa structure; and a third mesa structure formed on the second mesa structure; and a top contact formed in the first mesa structure; wherein the second mesa structure comprises: a first connection layer; a first reflective layer formed on the first connection layer; a first light emitting layer formed on the first reflective layer, the first light emitting layer comprising a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer; and a second connection layer formed on the first light emitting layer; wherein the third mesa structure comprises: a first bonding layer formed on the second connection layer; a second reflective layer formed on the first bonding layer; a second light emitting layer formed on the second reflective layer, the second light emitting layer comprising a third semiconductor layer and a fourth semiconductor layer formed on the third semiconductor layer; and a third connection layer formed on the second light emitting layer; the first mesa structure comprising: a second bonding layer formed on the IC backplane and electrically connected to the IC backplane; a third light emitting layer formed on the second bonding layer; and a fourth connection layer formed on the third light emitting layer and electrically connected to the top contact; and wherein the micro-LED structure further comprises a third bonding layer formed between the first connection layer and the fourth connection layer, wherein the first connection layer and the third connection layer are electrically connected to the IC backplane; wherein the second connection layer is connected to the top contact; and wherein the first semiconductor layer and the fourth semiconductor layer have a first conductivity type, and the second semiconductor layer and the third semiconductor layer have a second conductivity type, in a plan view, a projected outline of the second light emitting layer lies within a projected outline of the first light emitting layer, a projected outline of the first light emitting layer lies within a projected outline of the third light emitting layer, and a projected outline of the second reflective layer lies within a projected outline of the first reflective layer.
2. The micro-LED structure of claim 1, wherein, the first bonding layer comprises a transparent and electrically insulating material.
3. The micro-LED structure of claim 2, wherein, the transparent and electrically insulating material is silicon dioxide (SiO2).
4. The micro-LED structure of claim 1, wherein, the first bonding layer comprises a transparent and electrically conductive material.
5. The micro-LED structure of claim 4, wherein, the transparent and electrically conductive material is indium tin oxide (ITO).
6. The micro-LED structure of claim 1, wherein, the first mesa structure, the second mesa structure, and the third mesa structure form a first outline, a second outline, and a third outline, respectively, in a plan view, the third outline is disposed within the second outline, and the second outline is disposed within the first outline.
7. The micro-LED structure of claim 1, wherein, the third light emitting layer comprises a fifth semiconductor layer and a sixth semiconductor layer formed on the fifth semiconductor layer, the fifth semiconductor layer has the first conductivity type, and the sixth semiconductor layer has the second conductivity type.
8. The micro-LED structure of claim 7, further comprising a first via formed proximate to one or more of the first mesa structure, the second mesa structure, and the third mesa structure, the first via electrically connected to the second connection layer and the fourth connection layer.
9. The micro-LED structure of claim 8, further comprising a second via and a third via formed proximate to one or more of the first mesa structure, the second mesa structure, and the third mesa structure, wherein, The second via connects the first connection layer to the IC backplane, and the third via connects the third connection layer to the IC backplane.
10. The micro-LED structure of claim 7, wherein, The third bonding layer comprises a transparent and electrically insulating material.
11. The micro-LED structure of claim 10, wherein, The third bonding layer comprises silicon dioxide (SiO2).
12. The micro-LED structure of claim 1, wherein, Each of the first connection layer, the second connection layer, and the third connection layer comprises a transparent and electrically conductive material.
13. The micro-LED structure of claim 12, wherein, The transparent and electrically conductive material is indium tin oxide (ITO).
14. The micro-LED structure of claim 1, wherein, The sidewall of the second reflective layer is aligned with the sidewall of the first bonding layer.
15. The micro-LED structure of claim 1, wherein, Each of the first reflective layer and the second reflective layer comprises: a stack of transparent layers; a metal omnidirectional reflective (ODR) layer; or a high reflectivity metal.
16. The micro-LED structure of claim 1, wherein, Each of the first reflective layer and the second reflective layer is electrically conductive.
17. The micro-LED structure of claim 1, wherein, Each of the first connection layer, the second connection layer, and the third connection layer comprises a transparent and electrically conductive material.
18. The micro-LED structure of claim 1, wherein, The first conductivity type and the second conductivity type are respectively P-type and N-type; or the first conductivity type and the second conductivity type are respectively N-type and P-type.
19. The micro-LED structure of claim 1, further comprising a sidewall connection structure, wherein: The sidewall connection structure is formed on the second connection layer and surrounds the sidewall of the first bonding layer and the second reflective layer.
20. The micro-LED structure of claim 19, wherein, The sidewall connection structure comprises a transparent and electrically conductive material.
21. The micro-LED structure of claim 20, wherein, The transparent and electrically conductive material is indium tin oxide (ITO).
22. A full color micro-LED panel comprising an array of micro-LEDs; wherein, The micro-LED array comprises the micro-LED structure of any one of claims 1 to 21.
Citation Information
Patent Citations
Light emitting diode for display and display apparatus having same
CN110603639A
Systems and methods for multi-color LED pixel cells
CN114766065A