A method for preparing SiC photonic crystal with adjustable PN type

Abstract

The present invention relates to the field of optoelectronic device technology, and specifically discloses a method for preparing SiC photonic crystals with adjustable PN type, comprising the following steps: substrate preparation and mask layer growth, glue coating, exposure and development, electron beam etching (ICP) and subsequent processing, high-temperature ion implantation and activation, removal of the SiO2 mask layer, growth of a new SiO2 mask layer, photolithography to define the etching area, and electron beam etching to form the photonic crystal. The present invention explores the purpose of preparing SiC photonic crystals of different PN types through ion implantation bias simulation to achieve the goal of preparing SiC photonic crystals with adjustable PN type. The present invention can quickly and in large quantities prepare photonic crystals, and can laser cut the photonic crystals to the required size according to different size requirements. In addition, during the preparation of electronic devices, the PN type and substrate concentration of the photonic crystal can be freely adjusted to a large extent according to requirements, which is reliable and convenient.

Description

Technical Field

[0001] The invention belongs to the technical field of optoelectronic devices, and in particular relates to a method for preparing an adjustable PN-type SiC photonic crystal. Background Art

[0002] Research on SiC photonic crystals is aimed at meeting the current demand for high-performance optoelectronic devices, especially in applications under high voltage and high frequency environments. At the same time, considering the low efficiency and high cost of traditional preparation methods, the demand for SiC photonic crystals has become more urgent.

[0003] First, the preparation of SiC photonic crystals needs to be highly efficient and low-cost. Current preparation methods, such as metal organic chemical vapor deposition (MOCVD) and ion implantation, can achieve the preparation of SiC devices, but they suffer from slow deposition rates and low efficiency, and require regular equipment cleaning and maintenance, increasing process costs. Therefore, future preparation methods need to improve preparation efficiency and reduce costs while ensuring device quality, thereby promoting the development of SiC photonic crystal technology.

[0004] Secondly, SiC photonic crystals must possess excellent optical properties. The periodic structure of photonic crystals can regulate the propagation and scattering of light. Therefore, SiC photonic crystals must possess features such as a tunable optical band gap and a high refractive index to achieve efficient control and modulation of light. These properties will provide greater flexibility and performance advantages for the design and application of optoelectronic devices.

[0005] In summary, research on SiC photonic crystals needs to balance multiple requirements, including fabrication efficiency, optical performance, and scalability. Only by achieving progress in these areas can we advance the development of SiC photonic crystal technology and provide better solutions for optoelectronic device applications.

[0006] SiC photonic crystals have some significant advantages over Si photonic crystals, which are of great significance in the field of optoelectronic devices. Since SiC has a larger band gap, SiC photonic crystals can achieve a wider photonic band gap, which makes them more flexible and controllable in optical modulation and photon transmission. This means that SiC photonic crystals can realize a wider range of optical functions, including optical waveguides, optical switches, and optical modulators. Secondly, SiC photonic crystals have higher thermal stability and radiation resistance. SiC material has excellent thermal conductivity and chemical stability, and can maintain stability in high temperature and high radiation environments. In contrast, Si photonic crystals may undergo thermal attenuation or optical performance degradation in high temperature or high radiation environments, limiting their application in some special environments.

[0007] In the current preparation process of photonic crystal materials, they generally only exist in metal oxides such as ZnO, SnO2, etc., or most of them are made by chemical etching or high-temperature sintering, which limits the large-scale, rapid and reproducible preparation of photonic crystals. Summary of the Invention

[0008] The object of the present invention is to provide a method for preparing a PN-type SiC photonic crystal to solve the problems raised in the above background technology.

[0009] To achieve the above object, the present invention provides the following technical solutions:

[0010] A method for preparing a SiC photonic crystal with adjustable PN type,

[0011] The following steps are involved:

[0012] S1. Substrate preparation and mask layer growth:

[0013] Choose an N-type Si substrate: ensure the substrate surface is clean and free of impurities;

[0014] Vertical LPCVD growth of SiO2 mask layer:

[0015] Control the growth conditions to ensure that the thickness of the SiO2 layer is 2 μm and covers the Si substrate;

[0016] S2. Gluing, exposure and development:

[0017] Glue coating: evenly coat a layer of photoresist on the SiO2 mask layer to ensure there are no bubbles or impurities;

[0018] Exposure: Use a photolithography machine to perform exposure and transfer the pattern of the area to be etched to the photoresist;

[0019] Development: The exposed photoresist is removed by a developer, leaving the pattern of the area to be etched;

[0020] S3. Electron beam etching (ICP) and subsequent processing;

[0021] ICP etching:

[0022] The selective etching characteristics of electron beam etching are used to remove the SiO2 portion not blocked by the photoresist;

[0023] During the electron beam etching process, the etching machine parameters are as follows:

[0024] Pressure: 3mTorr

[0025] Helium Pressure: 4Torr

[0026] PN2 (nitrogen flow): 200sccm

[0027] CHF3 (trifluoromethane flow): 50sccm

[0028] Duration: 2300s

[0029] Control etching conditions to ensure etching depth and uniformity;

[0030] Acid pickling to remove photoresist:

[0031] Use piranha solution and acid wash to remove residual photoresist on the surface.

[0032] The solution ratio is H2SO4:H2O2=3:1, and the pickling time is 15 minutes to avoid damage to the SiO2 layer;

[0033] Leave the injection window:

[0034] After removing the photoresist and etching the SiO2 layer, a clear injection window pattern is formed;

[0035] Check the integrity and accuracy of the pattern to ensure it meets the requirements of subsequent processes;

[0036] S4. High temperature ion implantation and activation:

[0037] Aluminum (Al) ions are implanted into an N-type silicon (Si) substrate at high temperature using an implanter;

[0038] The implanted Al ions will change the conductivity type of the original N-type Si, causing its local area to become P-type, thus achieving PN-type conversion;

[0039] Through the high-temperature activation process, it is ensured that the injected ions can be effectively doped into the silicon crystal and become effective carriers;

[0040] The PN type conversion is achieved through a pre-set process recipe:

[0041] Step 1: Dose: 3.8e13 cm²; Energy: 370 keV; Tilt: 0°; Rotation: 0°; Temperature: 500°C. Heating helps reduce implant damage.

[0042] Step 2: Increase the dose to 1.3e14 cm^-2, reduce the energy to 250keV, and control the implant depth; keep the tilt and rotation angles unchanged at 0° and 0°, respectively; and maintain the temperature at 500°C.

[0043] Step 3: Dose: adjusted to 3.6e13 cm^-2; energy: further reduced to 100 keV; tilt and rotation angles: still 0° and 0°; temperature: 500°C, the same as the previous step;

[0044] S5. Removal of SiO2 mask layer:

[0045] Remove the SiO2 mask by dry etching and BOE wet soaking;

[0046] S6. Growth of a new SiO2 mask layer:

[0047] After removing the old SiO2 layer, a new 1 micron thick SiO2 mask layer is grown on the N-type Si substrate using vertical low pressure chemical vapor deposition (LPCVD).

[0048] The SiO2 layer grown this time is to prepare for the next photonic crystal etching step;

[0049] S7. Photolithography defines the etched area:

[0050] Photoresist is coated on the SiO2 mask layer, and then the area to be etched is defined by exposure and development.

[0051] S8. Electron beam etching to form photonic crystals:

[0052] Use inductively coupled plasma (ICP) etching technology and electron beam etching to selectively remove the SiO2 mask layer. In this process, the SiO2 area not protected by the photoresist will be etched away, while the Si material will be retained;

[0053] The final result is a Si photonic crystal structure with a specific pattern.

[0054] Compared with the prior art, the present invention has the following beneficial effects:

[0055] This invention proposes the use of electron beam etching to prepare regularly periodic photonic crystals, which can be prepared on a large scale and used for laser cutting. This method has been verified on Si wafers, paving the way for the subsequent preparation of SiC photonic crystals. Furthermore, ion implantation polarization simulations are used to explore the purpose of preparing SiC photonic crystals of different PN types, with the goal of preparing a SiC photonic crystal with adjustable PN type. This method can rapidly and massively prepare photonic crystals, and can be laser-cut to the desired size according to different size requirements. Furthermore, during the preparation of electronic devices, the PN type and substrate concentration of this photonic crystal can be freely adjusted to a large extent according to requirements, making it reliable and convenient. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 This is a schematic diagram of the electron beam etching process of the Si substrate of the present invention;

[0057] Figure 2 Schematic diagram of the change of doping concentration with position and the process of N-type silicon to P-type silicon in the present invention;

[0058] Figure 3 This is a schematic diagram of the Si substrate after forming a mask layer and applying the glue, exposing and developing the glue;

[0059] Figure 4 This is a schematic diagram of the photonic crystal of the present invention. DETAILED DESCRIPTION

[0060] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0061] Example:

[0062] A method for preparing an adjustable PN-type SiC photonic crystal comprises the following steps:

[0063] S1. Substrate preparation and mask layer growth:

[0064] Choose N-type Si substrate: make sure the substrate surface is clean and free of impurities;

[0065] Vertical LPCVD growth of SiO2 mask layer:

[0066] Control the growth conditions to ensure that the thickness of the SiO2 layer is 2 μm and covers the Si substrate;

[0067] S2. Gluing, exposure and development:

[0068] Glue coating: evenly coat a layer of photoresist on the SiO2 mask layer to ensure there are no bubbles or impurities;

[0069] Exposure: Use a photolithography machine to perform exposure and transfer the pattern of the area to be etched to the photoresist;

[0070] Development: The exposed photoresist is removed by a developer, leaving the pattern of the area to be etched;

[0071] S3. Electron beam etching (ICP) and subsequent processing;

[0072] I CP etching:

[0073] The selective etching characteristics of electron beam etching are used to remove the SiO2 portion not blocked by the photoresist;

[0074] During the electron beam etching process, the etching machine parameters are as follows:

[0075] Pressure: 3mTorr; Helium Pressure: 4Torr

[0076] PN2 (nitrogen flow): 200 sccm; CHF3 (trifluoromethane flow): 50 sccm; duration: 2300 s. Control etching conditions to ensure etching depth and uniformity.

[0077] Acid pickling to remove photoresist: Use piranha solution for acid pickling to remove residual photoresist on the surface.

[0078] The solution ratio is H2SO4:H2O2=3:1, and the pickling time is 15 minutes to avoid damaging the SiO2 layer. A clear injection window pattern is formed on the SiO2 layer after removing the photoresist and etching. The integrity and accuracy of the pattern are checked to ensure that it meets the requirements of subsequent processes.

[0079] S4. High temperature ion implantation and activation:

[0080] Aluminum (Al) ions are implanted into an N-type silicon (Si) substrate at high temperature using an implanter;

[0081] The implanted Al ions will change the conductivity type of the original N-type Si, causing its local area to become P-type, thus achieving PN-type conversion;

[0082] Through the high-temperature activation process, it is ensured that the injected ions can be effectively doped into the silicon crystal and become effective carriers;

[0083] The PN type conversion is achieved through a pre-set process recipe:

[0084] Step 1: Dose: 3.8e13 cm²; Energy: 370 keV; Tilt: 0°; Rotation: 0°; Temperature: 500°C. Heating helps reduce implant damage.

[0085] Step 2: Increase the dose to 1.3e14 cm^-2, reduce the energy to 250keV, and control the implant depth; keep the tilt and rotation angles unchanged at 0° and 0°, respectively; and maintain the temperature at 500°C.

[0086] Step 3: Dose: adjusted to 3.6e13 cm^-2; energy: further reduced to 100 keV; tilt and rotation angles: still 0° and 0°; temperature: 500°C, the same as the previous step;

[0087] S5. Removal of SiO2 mask layer:

[0088] Remove the SiO2 mask by dry etching and BOE wet soaking;

[0089] S6. Growth of a new SiO2 mask layer:

[0090] After removing the old SiO2 layer, a new 1 micron thick SiO2 mask layer is grown on the N-type Si substrate using vertical low pressure chemical vapor deposition (LPCVD).

[0091] The SiO2 layer grown this time is to prepare for the next photonic crystal etching step;

[0092] S7. Photolithography defines the etched area:

[0093] Photoresist is coated on the SiO2 mask layer, and then the area to be etched is defined by exposure and development.

[0094] S8. Electron beam etching to form photonic crystals:

[0095] Use inductively coupled plasma (ICP) etching technology and electron beam etching to selectively remove the SiO2 mask layer. In this process, the SiO2 area not protected by the photoresist will be etched away, while the Si material will be retained;

[0096] The final result is a Si photonic crystal structure with a specific pattern.

[0097] Electron beam etching (EBE) in the present invention is a high-precision technology commonly used in nano-processing and microelectronics manufacturing. The working principle of electron beam etching is mainly to use a high-speed electron beam to process the surface of the target object. The specific process is as follows: Generation and control of the electron beam: First, high-energy electrons are emitted by an electron gun. After these electrons are accelerated by an accelerator, they obtain sufficient energy. Then, the electron flow is precisely focused by an electron mirror system, and finally an electron beam with a smaller diameter is formed. Interaction with the target material: When the high-energy electron beam bombards the surface of the target material, it transfers energy and causes ionization or excitation of the target material, thereby achieving local material removal.

[0098] Piranha solution, also known as Piranha solution, is a strong oxidizing agent made from a mixture of concentrated sulfuric acid and hydrogen peroxide.

[0099] Dry etching primarily utilizes plasma to carry out the etching process. The chemical activity of gases in plasma is much stronger than under normal conditions. Depending on the material being etched, the appropriate gas can be selected to react more quickly with the material, achieving the desired removal. BOE (Buffered Oxide Etch) is a commonly used wet etching solution primarily composed of hydrofluoric acid (HF) and a buffer (such as NH4F). HF reacts with SiO2 to produce soluble hexafluorosilicic acid (H2SiF6) and water, thereby removing the SiO2.

[0100] Inductively coupled plasma (ICP) etching technology is a high-precision, high-efficiency dry etching technology that is widely used in microelectronics manufacturing, nano-processing and other fields.

[0101] Inductively coupled plasma (ICP) etching technology uses a high-energy ion beam generated by a high-frequency power supply to etch materials. The basic principle is to use magnetic fields and radio frequency electric fields to generate plasma in a vacuum chamber. The plasma beam is focused onto the surface of the material to be etched through inductive coupling, thereby achieving precise etching of the material.

[0102] By combining the present invention with existing equipment, photonic crystals can be prepared quickly and in large quantities, and the photonic crystals can be laser cut into the required sizes according to different size requirements. In addition, during the preparation of electronic devices, the PN type and substrate concentration of the photonic crystals can be freely adjusted according to the requirements to a large extent, which is reliable and convenient.

[0103] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. A method for preparing a PN-type SiC photonic crystal, characterized in that: The following steps are involved: S1. Substrate preparation and mask layer growth: Choose an N-type Si substrate: ensure the substrate surface is clean and free of impurities; Vertical LPCVD growth of SiO2 mask layer: Control the growth conditions to ensure that the thickness of the SiO2 layer is 2 μm and covers the Si substrate; S2. Gluing, exposure and development: Glue coating: evenly coat a layer of photoresist on the SiO2 mask layer to ensure there are no bubbles or impurities; Exposure: Use a photolithography machine to perform exposure and transfer the pattern of the area to be etched to the photoresist; Development: The exposed photoresist is removed by a developer, leaving the pattern of the area to be etched; S3. Electron beam etching (ICP) and subsequent processing; ICP etching: The selective etching characteristics of electron beam etching are used to remove the SiO2 portion not blocked by the photoresist; During the electron beam etching process, the etching machine parameters are as follows: Pressure: 3 mTorr Helium pressure: 4 Torr Nitrogen flow rate: 200 sccm Trifluoromethane flow rate: 50 sccm Duration: 2300s Control etching conditions to ensure etching depth and uniformity; Acid pickling to remove photoresist: Use piranha solution to perform acid washing to remove residual photoresist on the surface; The solution ratio is H2SO4:H2O2=3:1, and the pickling time is 15 minutes to avoid damage to the SiO2 layer; Leave the injection window: After removing the photoresist and etching the SiO2 layer, a clear injection window pattern is formed; Check the integrity and accuracy of the pattern to ensure it meets the requirements of subsequent processes; S4. High-temperature ion implantation and activation: Aluminum ions are implanted into an N-type silicon substrate at high temperature using an implanter; The implanted Al ions will change the conductivity type of the original N-type Si, causing its local area to become P-type, thus achieving PN-type conversion; Through the high-temperature activation process, it is ensured that the injected ions can be effectively doped into the silicon crystal and become effective carriers; Through the pre-set process plan, the PN type conversion is realized: first step: Dose: 3.8e13 cm^-2; Energy: 370 keV; Tilt angle: 0°; Rotation angle: 0°; Temperature: 500°C; heating helps reduce implant damage; Step 2: The dose was increased to 1.3e14 cm^-2, the energy was reduced to 250 keV, and the implant depth was controlled; the tilt and rotation angles were kept constant at 0° and 0°, respectively; and the temperature was maintained at 500°C. Step 3: Dose: adjusted to 3.6e13 cm^-2; Energy: further reduced to 100 keV; Tilt and rotation angles: still 0° and 0°; temperature: 500°C, the same as the previous steps; S5. Removal of SiO2 mask layer: Remove the SiO2 mask by dry etching and BOE wet soaking; S6. Growing a new SiO2 mask layer: After removing the old SiO2 layer, a new 1 μm thick SiO2 mask layer was grown on the N-type Si substrate using vertical low-pressure chemical vapor deposition again; The SiO2 layer grown this time is to prepare for the next photonic crystal etching step; S7. Photolithography defines the etched area: Coat photoresist on the SiO2 mask layer, and then define the area to be etched by exposure and development; S8. Electron beam etching to form photonic crystals: Use inductively coupled plasma etching technology and electron beam etching to selectively remove the SiO2 mask layer. In this process, the SiO2 area not protected by the photoresist will be etched away, while the Si material will be retained; The final result is a Si photonic crystal structure with a specific pattern.

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