Solar cell manufacturing method and solar cell

Abstract

The present invention relates to the field of photovoltaic power generation technology, and discloses a method for preparing a solar cell and a solar cell. The method comprises: providing a silicon substrate; preparing a passivation anti-reflection layer on the front side of the silicon substrate and a passivation layer on the back side of the silicon substrate; grooves the passivation layer; preparing a passivation transmission structure within the grooves, wherein the thickness of the passivation transmission structure is less than the depth of the grooves; screen-printing a first electrode on the passivation transmission structure and screen-printing a second electrode on the opposite side of the silicon substrate to the first electrode; and sintering to produce a solar cell. By first preparing the passivation anti-reflection layer and the passivation layer, and then grooves the passivation layer, a height difference is formed by the grooves, thereby protecting the passivation transmission structure within the grooves, ensuring that the passivation transmission structure within the grooves will not be damaged when etching the passivation transmission structure outside the grooves, and reducing the defective rate of solar cell production.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic power generation, and in particular to a method for preparing a solar cell and a solar cell. Background Art

[0002] The main principle of photovoltaic power generation is the photoelectric effect of semiconductors. The photoelectric effect is a crucial and fascinating phenomenon in physics. When exposed to electromagnetic waves above a certain frequency, electrons within certain substances absorb energy and release it, generating an electric current. This is known as photoelectricity. A solar cell, also known as a "solar chip" or "photocell," is a thin, photovoltaic semiconductor wafer that uses sunlight to generate electricity directly. As long as the illumination meets certain conditions, it can instantly output voltage and, in the presence of a circuit, generate current.

[0003] The existing preparation process for solar cells with local passivation contacts usually involves first preparing a dielectric layer and a conductive transmission layer on the back of a silicon substrate, then coating a corrosion-resistant slurry at a preset position on the conductive transmission layer, and covering the P+ doped layer on the front of the silicon substrate with a borosilicate glass layer. The exposed dielectric layer and conductive transmission layer on the back of the silicon substrate are then removed by etching. After the etching is completed, the corrosion-resistant slurry and borosilicate glass layer are removed, and finally a passivation anti-reflection layer is prepared on the front and a passivation layer is prepared on the back, and electrodes are screen-printed.

[0004] In existing processes for fabricating solar cells with locally passivated contacts, the corrosion-resistant slurry only protects the outer surface of the conductive transport layer, and the degree of etching during the etching process is difficult to control. Consequently, over-etching often occurs, resulting in etching around the dielectric layer and conductive transport layer in areas covered by the corrosion-resistant slurry, which in turn reduces power generation efficiency. Under-etching can also easily occur, resulting in incomplete removal of the dielectric layer and conductive transport layer not covered by the corrosion-resistant slurry. This results in a high defect rate for the manufactured solar cells. Summary of the Invention

[0005] The technical problems to be solved by the present invention are:

[0006] The degree of etching is difficult to control, resulting in a high defect rate in solar cell production.

[0007] In order to solve the above technical problems, the present invention provides a method for preparing a solar cell, comprising:

[0008] Providing a silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other;

[0009] A passivation anti-reflection layer is formed on the front surface of the silicon substrate, and a passivation layer is formed on the back surface of the silicon substrate;

[0010] Grooving the passivation layer, wherein the groove depth reaches the silicon substrate;

[0011] preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove;

[0012] Screen printing a first electrode on the passivation transmission structure, and screen printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located;

[0013] Sintering to produce a solar cell.

[0014] In one embodiment, the step of preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove, comprises:

[0015] A dielectric layer is formed on the side of the silicon substrate where the groove is formed, and a conductive transmission layer is formed on the side of the dielectric layer away from the silicon substrate;

[0016] covering the conductive transmission layer in the groove with a mask;

[0017] removing the conductive transmission layer outside the groove, or removing the conductive transmission layer and the dielectric layer outside the groove;

[0018] The mask in the groove is removed.

[0019] In one embodiment, the dielectric layer and the conductive transmission layer are prepared by plasma enhanced chemical vapor deposition.

[0020] In one embodiment, the dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon.

[0021] In one embodiment, the mask is an alkali-resistant mask.

[0022] In one embodiment, in the step of grooving the passivation layer to a depth extending to the silicon substrate:

[0023] The grooves are prepared by photolithography or etching.

[0024] In one embodiment, the step of providing a silicon substrate having a front side and a back side opposite to each other comprises:

[0025] A silicon wafer is provided, and the silicon wafer is subjected to texturing, diffusion, cleaning and plating processes to obtain the silicon substrate.

[0026] In one embodiment, performing diffusion processing on a silicon wafer includes:

[0027] Put the textured silicon wafer into the diffusion furnace;

[0028] A doping source is introduced into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer;

[0029] The doping atoms in the high-concentration doping layer are diffused from the high-concentration area on the surface to the low-concentration area in the depth.

[0030] In one embodiment, the passivation anti-reflection layer is provided with multiple layers, and each layer of the passivation anti-reflection layer is sequentially stacked on the front surface of the silicon substrate.

[0031] A solar cell is manufactured using the above-mentioned solar cell manufacturing method.

[0032] Compared with the prior art, the above solar cell manufacturing method has the following advantages:

[0033] The passivation anti-reflection layer and the passivation layer are first prepared, and then grooves are formed in the passivation layer, and the passivation transmission structure is prepared in the grooves. The grooves form a height difference, and the groove structure is then used to protect the passivation transmission structure in the grooves. This ensures that the passivation transmission structure outside the grooves will not be damaged when etching the passivation transmission structure inside the grooves, preventing the dielectric layer and conductive transmission layer in the grooves from being etched and reduced, which would reduce the battery power generation efficiency and avoid leakage, thereby reducing the defective rate of solar cell production.

[0034] Furthermore, by preparing a passivation layer in advance, the passivation layer can protect the silicon substrate during the etching process, thereby preventing damage to the back side of the silicon substrate due to excessive etching.

[0035] Because the passivation layer in the etched area is separated from the dielectric layer and the silicon substrate, and the dielectric layer in the etched area is separated from the dielectric layer in the groove, and the dielectric layer material is silicon oxide, the etching process can only remove the conductive transmission layer, leaving the dielectric layer on the side of the passivation layer away from the silicon substrate. This improves the passivation effect on the back of the solar cell and avoids the cost of removing the dielectric layer. Moreover, since only the conductive transmission layer needs to be etched, the etching time is effectively shortened, improving the production efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A process flow chart of a method for preparing a solar cell according to one embodiment of the present invention;

[0037] Figure 2 Schematic diagram of the structure of a solar cell according to one embodiment of the present invention;

[0038] Figure 3 for Figure 2 Schematic diagram of the structure of the solar cell in the preparation process, after step S42 but not after step S43.

[0039] The meanings of the numbers in the accompanying drawings are:

[0040] 100. Solar cells;

[0041] 10. Silicon substrate;

[0042] 20. Passivation anti-reflection layer;

[0043] 30. a second electrode;

[0044] 40. Passivation layer; 45. Grooving;

[0045] 50. Dielectric layer;

[0046] 60. Conductive transmission layer;

[0047] 70. a first electrode;

[0048] 80. Mask. DETAILED DESCRIPTION

[0049] To make the above-mentioned objects, features, and advantages of the present invention more readily apparent, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following description sets forth numerous specific details to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways than those described herein, and those skilled in the art may make similar modifications without departing from the scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0050] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0051] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0052] In the present invention, unless otherwise specified or limited, the terms "installed," "connected," "connect," "fixed," etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0053] In the present invention, unless otherwise expressly specified or limited, when a first feature is "above" or "below" a second feature, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediary. Furthermore, when a first feature is "above," "above," or "above" a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is "below," "below," or "below" a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0054] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only implementation methods.

[0055] See also Figure 1 , a method for preparing a solar cell according to an embodiment of the present invention, comprising:

[0056] S1: providing a silicon substrate, wherein the silicon substrate has a front surface and a back surface opposite to each other;

[0057] S2: preparing a passivation anti-reflection layer on the front surface of the silicon substrate, and preparing a passivation layer on the back surface of the silicon substrate;

[0058] S3: Grooving the passivation layer, wherein the groove depth reaches the silicon substrate;

[0059] S4: preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove;

[0060] S5: screen-printing a first electrode on the passivation transmission structure, and screen-printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located;

[0061] S6: Sintering to produce a solar cell.

[0062] By first preparing a passivation anti-reflection layer on the front of the silicon substrate, preparing a passivation layer on the back of the silicon substrate, and then preparing the passivation transmission structure, the passivation transmission structure needs to be processed through an etching process during the preparation process. Since the direct preparation of the passivation transmission structure cannot ensure the connection between the electrode and the silicon substrate, in order to overcome the above technical difficulties, it is necessary to prepare the passivation layer and the passivation anti-reflection layer, then groove them, and then prepare the passivation transmission structure in the groove. The groove is formed by the height difference, and then the groove structure and the mask are used to protect the passivation transmission structure in the groove, ensuring that the passivation transmission structure inside the groove will not be damaged when etching the passivation transmission structure outside the groove, thereby reducing the defective rate of solar cell production.

[0063] Furthermore, step S1 includes providing a silicon wafer, and performing texturing, diffusion, cleaning, and plating on the silicon wafer to obtain a silicon substrate. Step S1 includes processing the silicon wafer to obtain the desired silicon substrate. It should be noted that the silicon wafer can be either an N-type silicon wafer or a P-type silicon wafer.

[0064] Furthermore, after the silicon wafer is textured in step S1, a diffusion process is performed, and the diffusion process specifically includes:

[0065] S11: placing the textured silicon wafer into a diffusion furnace;

[0066] S12: introducing a doping source into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer;

[0067] S13: Diffuse the doping atoms of the high-concentration doping layer from the high-concentration area on the surface to the low-concentration area in the depth.

[0068] In step S12, the doping source is POCl3 or BBr3. POCl3 is commonly used for N-type silicon substrates, while BBr3 is commonly used for P-type silicon substrates. POCl3 reacts with oxygen to produce P2O5, while BBr3 reacts with oxygen to produce B2O3. The resulting P2O5 or B2O3 is structurally similar to SiO2, making it easier to dissolve in SiO2, thereby forming a highly doped layer. In step S13, the doping atoms in the highly doped layer are pushed from high-concentration areas to low-concentration areas at high temperatures, reducing the doping atom concentration on the silicon wafer surface and diffusing into the interior of the silicon wafer. This creates a new distribution of doping atoms, forming a PN junction within the silicon wafer and ensuring photovoltaic power generation.

[0069] Furthermore, after the diffusion process of the silicon wafer in step S1, wrap-around plating will occur, so the back and side wrap-around plating processes need to be cleaned. The back wrap-around plating cleaning process is to etch the back and side of the silicon wafer after diffusion with a mixed solution of HNO3 and HF to remove the side wrap-around plating, so that the front and back of the silicon wafer are insulated from each other.

[0070] It should be noted that the doping source in the above step S12 may also be other dopants, and there is no limitation on the specific doping source components, and the diffusion method may also be various.

[0071] Furthermore, the passivation layer in step S2 is provided in multiple layers, each of which is sequentially superimposed on the back surface of the silicon substrate. The passivation anti-reflection layer is provided in multiple layers, each of which is sequentially superimposed on the front surface of the silicon substrate. It is understood that the specific number of passivation layers and passivation anti-reflection layers can be set according to actual use requirements, and can be provided in one or multiple layers. The specific number of passivation layers and passivation anti-reflection layers provided is not limited here.

[0072] Furthermore, in step S3, the preparation method of the groove is photolithography or etching. Photolithography refers to the use of laser to make grooves at the preset groove positions, and the groove positions correspond to the predetermined installation positions of the electrodes. Etching refers to covering the non-grooved area with corrosion-resistant slurry so that the preset groove positions are exposed, and then placing the workpiece in the etching solution to react and consume the exposed preset groove positions. After the etching is completed, the covered corrosion-resistant slurry is removed to achieve the groove processing of the preset positions. It can be understood that according to actual use needs, the grooves can be prepared by photolithography or etching. The specific processing method of the grooves is not limited here, and it is sufficient to ensure that the preset positions can be grooved.

[0073] Furthermore, step S4 includes:

[0074] S41: preparing a dielectric layer on the side of the silicon substrate where the groove is formed, and preparing a conductive transmission layer on the side of the dielectric layer away from the silicon substrate;

[0075] S42: Covering the conductive transmission layer in the groove with a mask;

[0076] S43: removing the conductive transmission layer outside the slot, or removing the conductive transmission layer and the dielectric layer outside the slot;

[0077] S44: removing the mask in the groove.

[0078] A dielectric layer is grown on the side of the silicon substrate where the grooves are formed by vapor deposition. Figure 3Since it is impossible to control the growth of the dielectric layer only within the grooves during the vapor deposition process, after vapor deposition, taking the grooves formed on the passivation layer as an example, after vapor deposition, the dielectric layer will adhere to the grooves within the electrode area, and the dielectric layer will also adhere to the passivation layer outside the electrode area. After the dielectric layer is prepared, the conductive transmission layer will be deposited. During the deposition process, the conductive transmission layer cannot be controlled to be prepared only within the grooves, so the conductive transmission layer is distributed on the outside of the dielectric layer within the grooves and on the outside of the dielectric layer outside the grooves. In this embodiment, the preparation method of the dielectric layer and the conductive transmission layer is both plasma enhanced chemical vapor deposition (PECVD) process, so that the dielectric layer and the conductive transmission layer can be prepared in the same equipment, thereby improving processing efficiency.

[0079] Furthermore, it is necessary to remove the conductive transmission layer outside the groove, so after preparing the dielectric layer and the wire transmission layer in step S42, the conductive transmission layer inside the groove is first covered with a mask. At this time, the dielectric layer and the conductive transmission layer inside the groove are covered and protected by the mask, while the conductive transmission layer outside the groove is exposed. In step S43, the exposed conductive transmission layer is removed by etching, and the dielectric layer and the conductive transmission layer inside the groove are covered by the mask. Moreover, due to the height difference of the groove manufacturing, even if the etching is excessive, the conductive transmission layer and the dielectric layer inside the groove will not be exposed, so there is no need to worry about the conductive transmission layer and the dielectric layer inside the groove being etched, thereby avoiding the conductive transmission layer inside the groove from being etched, thereby reducing the battery power generation efficiency and avoiding leakage, thereby reducing the defective rate of solar cell production. In this embodiment, the mask is covered on the conductive transmission layer inside the groove by printing or coating. The mask is an alkali-resistant mask, which is convenient for corroding the conductive transmission layer outside the groove by alkali solution. Furthermore, in step S44, the mask is removed by the liquid that reacts only with the mask.

[0080] Furthermore, the dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon. Since the dielectric layer is made of silicon oxide, in step S43, only the conductive transmission layer outside the groove can be removed to keep the dielectric layer outside the passivation layer, so as to improve the passivation effect on the back of the solar cell and avoid the cost of removing the dielectric layer. Of course, the conductive transmission layer and the dielectric layer outside the groove can also be removed together, so as to obtain the following: Figure 2 The battery structure.

[0081] Furthermore, since the mask protects the dielectric layer and the conductive transmission layer in the groove and the passivation layer protects the silicon substrate outside the groove during the etching process in step S43, there is no need to worry about the silicon substrate being exposed and damaged due to excessive etching, thereby further improving the processing yield.

[0082] Furthermore, in steps S5 and S6, electrodes are printed on the conductive transmission layer within the grooves, and electrodes are printed on the side of the silicon substrate away from the grooves. The silicon substrate after printing the electrodes is then sintered in a sintering furnace to prepare the first electrode and the second electrode, completing the production of the solar cell. In this embodiment, the passivation layer has a first polarity region, and the passivation anti-reflection layer has a second polarity region; the first polarity region and the second polarity region correspond to the preset electrode positions, and the first polarity region and the second polarity region are symmetrically arranged on both sides of the silicon substrate. Please refer to Figure 2 The groove is set on the passivation layer, the first pole region is the position of the preset first electrode, the second pole region is the position of the preset second electrode, and the groove is correspondingly opened in the first pole region.

[0083] See also Figure 2 The present invention also discloses a solar cell 100, comprising a silicon substrate 10, a passivation anti-reflection layer 20, a second electrode 30, a passivation layer 40, a dielectric layer 50, a conductive transmission layer 60, and a first electrode 70. The silicon substrate 10 has a front side and a back side on opposite sides. The passivation anti-reflection layer 20 is disposed on the front side of the silicon substrate 10; the second electrode 30 is disposed on the passivation anti-reflection layer 20. The passivation layer 40 is disposed on the back side of the silicon substrate 10; grooves 45 are disposed on the side of the passivation layer 40 away from the silicon substrate 10. The grooves 45 are spaced apart along the passivation layer 40 and extend to the depth of the silicon substrate 10. The dielectric layer 50 is disposed within the grooves 45 and connected to the silicon substrate 10; the conductive transmission layer 60 is disposed within the grooves 45 and on the side of the dielectric layer 50 away from the silicon substrate 10. One end of the first electrode 70 is located within the grooves 45 and connected to the conductive transmission layer 60. In the depth direction of the groove 45 , the depth of the groove 45 is H, the thickness of the dielectric layer 50 is B1, and the thickness of the conductive transmission layer 60 is B2; therefore, H>B1+B2. By having H>B1+B2, the dielectric layer 50 and the conductive transmission layer 60 are ensured to be embedded within the groove 45. Furthermore, during the etching process, the mask 80 and the passivation layer 40 on both sides of the groove 45 can protect the dielectric layer 50 and the conductive transmission layer 60 within the groove 45, thereby preventing damage to the dielectric layer 50 and the conductive transmission layer 60 within the groove 45 when etching the conductive transmission layer 60 outside the groove. This prevents the dielectric layer 50 and the conductive transmission layer 60 within the groove from being etched away, thereby reducing the power generation efficiency of the cell and the leakage phenomenon, thereby reducing the production defect rate of the solar cell 100.

[0084] In summary, the embodiments of the present invention provide a method for manufacturing a solar cell 100 and a solar cell 100, which have the following beneficial effects:

[0085] The passivation anti-reflection layer 20 and the passivation layer 40 are first prepared, and then grooves 45 are formed in the passivation layer 40. The passivation transmission structure is then prepared within the grooves 45. The grooves 45 form a height difference, and the grooves 45 structure and the mask 80 are used to protect the passivation transmission structure within the grooves 45. This ensures that the passivation transmission structure outside the grooves is not damaged when etching the passivation transmission structure inside the grooves 45. This prevents the dielectric layer 50 and the conductive transmission layer 60 within the grooves from being etched, thereby reducing the power generation efficiency of the cell and the leakage phenomenon, thereby reducing the production defect rate of the solar cell 100.

[0086] Furthermore, by preparing the passivation layer 40 in advance, the passivation layer 40 can protect the silicon substrate 10 during the etching process, thereby preventing damage to the back surface of the silicon substrate 10 caused by excessive etching.

[0087] Because the passivation layer 40 in the etched area is separated from the dielectric layer 50 and the silicon substrate 10, and the dielectric layer 50 in the etched area is separated from the dielectric layer 50 in the groove 45, and the dielectric layer 50 is made of silicon oxide, only the conductive transmission layer 60 can be removed during the etching process, and the dielectric layer 50 can be retained on the side of the passivation layer 40 away from the silicon substrate 10. This improves the passivation effect on the back of the solar cell 100 and avoids the cost of removing the dielectric layer 50. Moreover, since only the conductive transmission layer 60 needs to be etched, the etching time is effectively shortened, thereby improving the production efficiency of the solar cell 100.

[0088] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0089] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A method for preparing a solar cell, characterized in that: include: Providing a silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other; A passivation anti-reflection layer is formed on the front surface of the silicon substrate, and a passivation layer is formed on the back surface of the silicon substrate; Grooving the passivation layer, wherein the groove depth reaches the silicon substrate; preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove; Screen printing a first electrode on the passivation transmission structure, and screen printing a second electrode on the other side of the silicon substrate opposite to the side where the first electrode is located; Sintering to produce a solar cell; The step of preparing a passivation transmission structure in the groove, wherein the thickness of the passivation transmission structure is less than the depth of the groove, comprises: A dielectric layer is formed on the side of the silicon substrate where the groove is formed, and a conductive transmission layer is formed on the side of the dielectric layer away from the silicon substrate; covering the conductive transmission layer in the groove with a mask; removing the conductive transmission layer outside the groove, or removing the conductive transmission layer and the dielectric layer outside the groove; removing the mask in the groove; The height difference is formed by the grooves, and the groove structure and the mask are used to protect the passivation transmission structure in the grooves, so as to ensure that the passivation transmission structure in the grooves will not be damaged when the passivation transmission structure outside the grooves is etched.

2. The method for preparing a solar cell according to claim 1, wherein: The dielectric layer and the conductive transmission layer are prepared by plasma enhanced chemical vapor deposition.

3. The method for preparing a solar cell according to claim 1, wherein: The dielectric layer material is silicon oxide, and the conductive transmission layer material is doped polysilicon.

4. The method for preparing a solar cell according to claim 1, wherein: The mask is an alkali-resistant mask.

5. The method for preparing a solar cell according to claim 1, wherein: In the step of grooving the passivation layer, wherein the grooving depth reaches the silicon substrate: The grooves are prepared by photolithography or etching.

6. The method for preparing a solar cell according to claim 1, wherein: The step of providing a silicon substrate having a front surface and a back surface opposite to each other comprises: A silicon wafer is provided, and the silicon wafer is subjected to texturing, diffusion, cleaning and plating processes to obtain the silicon substrate.

7. The method for preparing a solar cell according to claim 6, wherein: Diffusion processing of silicon wafers includes: Put the textured silicon wafer into the diffusion furnace; A doping source is introduced into the diffusion furnace to form a high-concentration doping layer on the surface of the silicon wafer; The doping atoms in the high-concentration doping layer are diffused from the high-concentration area on the surface to the low-concentration area in the depth.

8. The method for preparing a solar cell according to claim 1, wherein: The passivation anti-reflection layer is provided with multiple layers, and each layer of the passivation anti-reflection layer is sequentially stacked on the front surface of the silicon substrate.

9. A solar cell, characterized in that: The solar cell is manufactured using the solar cell manufacturing method according to any one of claims 1 to 8.

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