A multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit and method

Abstract

A multi-channel mutual spectrum bidirectional resistor low-frequency noise test circuit and method, belonging to the field of aerospace technology, the present invention is to solve the problem that the resistor low-frequency noise cannot reach 0.1mHz and the measurement stability is poor in the prior art. The scheme of the present invention: the main control chip sends an instruction to the relay, and then controls the low-noise voltage reference source to switch the Wheatstone bridge to load the forward / reverse voltage, and the differential voltage output end of the Wheatstone bridge is simultaneously connected to the two input ends of the resistor noise dual-channel mutual spectrum acquisition circuit; the CH1 area GND and the CH2 area GND are respectively connected to the two input ends of the background noise dual-channel mutual spectrum acquisition circuit; the two output ends of the resistor noise dual-channel mutual spectrum acquisition circuit and the two output ends of the background noise dual-channel mutual spectrum acquisition circuit are respectively connected to the four input ends of the ADC signal acquisition circuit, and the output end of the ADC signal acquisition circuit is connected to the input end of the main control chip, and the main control chip obtains the noise spectrum density of the measured resistor through the mutual spectrum algorithm.

Description

Technical Field

[0001] The invention relates to a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit and method used for precise temperature measurement of spacecraft, belonging to the field of aerospace technology. Background Art

[0002] High-precision spacecraft core temperature measurement is the premise for achieving accurate and stable control of the spacecraft's internal temperature and thus ensuring the stability of the satellite's state and performance. Especially in the space gravitational wave detection mission, the high-precision laser interferometer measurement system and inertial measurement sensor have extremely high requirements for environmental stability, and temperature stability has an important impact on their performance. In order to ensure that the space gravitational wave satellite detector can detect gravitational wave signals with a frequency of 0.1mHz to 1Hz, the temperature noise spectrum density of the satellite optical platform must be less than 0.1mK / Hz1 / 2, and the temperature noise spectrum density of the inertial sensor system must be less than 5μK / Hz1 / 2, which requires the temperature measurement system to have a temperature measurement resolution of the order of μ and a power spectrum density of the order of μ / Hz1 / 2. At present, in the frequency band of 0.1mHz to 1Hz, the low-frequency noise of the high-precision temperature measurement board is serious, which in turn affects the temperature measurement results of the system. Therefore, it is necessary to study the ultra-low frequency noise test method for this. The key components of the temperature measurement circuit include low-temperature drift precision resistors, operational amplifiers, ADC converters, etc. Among them, the low-frequency noise contribution of the precision resistors is not yet clear, and the noise measurement of low-temperature drift precision resistors is extremely challenging. It is necessary to propose a measurement method that can achieve an equivalent temperature noise spectral density of μeffective / Hz1 / 2 in the range of 0.1mHz to 1Hz.

[0003] The resistance low-frequency noise test method can be divided into direct measurement method and cross-spectrum measurement method in principle. The direct measurement method is more widely used, which uses a spectrum analyzer or signal acquisition card to directly collect noise signals. At present, the products on the market that can test low-frequency electronic noise below 1Hz are mainly Stanford Research Systems' SR760 and SR770 spectrum analyzers, with a frequency measurement range of 476μHz to 100kHz. However, the instrument's usual spectrum analysis range is 0.1Hz to 100kHz, and it is difficult to ensure the analyzer's own noise interference level at 0.1mHz. Therefore, there may be limitations in using SR770 for 0.1mHz ultra-low frequency noise analysis.

[0004] Another method, the cross-spectrum measurement method, uses the properties of the cross-correlation function to eliminate non-correlated terms; this method can reduce the accuracy requirements for op amp selection, but it requires an additional set of measuring devices, which increases costs. In 2022, scholar Beev measured the excess noise in 1mHz to 10Hz of precision thin film and metal foil resistor networks. The experimental circuit used a bipolar DC source to excite the full-bridge circuit and combined it with the fast sampling cross-correlation operation of the eight-and-a-half-digit multimeter, that is, the average operation of two samples of the bipolar sampling circuit. In addition, the field programmable gate array (FPGA) is used to synchronize and control the new power supply, amplifier input, programmable amplifier, and multimeter switches. However, although the paper gives the voltage and current noise of the manual of the instrument amplifier of the op amp device, it does not measure the low-frequency noise spectral density of the actual circuit, and the eight-and-a-half-digit digital multimeter required for the measurement is expensive, and the overall cost of the experiment is relatively high. In 2023, scholar Daniela Walter analyzed the measurement method of resistor thermal noise, and also sampled the Wheatstone full-bridge circuit design. For the signal acquisition scheme, two different settings were used. One used an eight-and-a-half-digit voltmeter for extremely low noise measurements as low as 20μ0Ω, and the other used a nanovoltmeter to achieve a bandwidth of up to 100kHz, which is a noise measurement by frequency band using different methods; in addition, Daniela proposed an improved noise spectrum density diagram comparison scheme. Since the noise spectrum density diagram depends on the bias voltage of the resistor, the measurement results can be normalized to the bias voltage of the resistor. However, this study has the same problem. The measured samples did not cover high-precision low-temperature drift resistors, and due to the noise of the frequency band measurement, the measurement results fluctuated significantly at 1Hz, so it was impossible to accurately analyze the noise situation at the 1Hz frequency point. In 2023, Sun Kaiyue from Harbin Engineering University used four-probe technology and cross-spectrum measurement method to conduct research on low-frequency noise testing of nickel-chromium thin film resistors and perovskite thin film resistors. The noise power spectral density test frequency band is between 1Hz and 1kHz, and there is a lack of ultra-low frequency noise testing below 1Hz. Summary of the invention

[0005] In view of the problem that the resistance low-frequency noise in the prior art cannot reach 0.1mHz and the measurement stability is poor, the present invention provides a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit and method to meet the power spectrum density requirements of ultra-low frequency noise detection of satellite platforms such as gravitational wave detection devices.

[0006] In one aspect, the present invention provides a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit, including a low-noise voltage reference source 1, a relay 2, a Wheatstone bridge 3, a multi-channel low-noise amplifier circuit, an ADC signal acquisition circuit 8 and a main control chip 9;

[0007] The multi-channel low-noise amplifier circuit includes a resistor noise dual-channel cross-spectrum acquisition circuit and a background noise dual-channel cross-spectrum acquisition circuit; the chip is divided into a CH1 area and a CH2 area, and two channel circuits of the resistor noise dual-channel cross-spectrum acquisition circuit are respectively arranged on the CH1 area and the CH2 area, and two channel circuits of the background noise dual-channel cross-spectrum acquisition circuit are respectively arranged on the CH1 area and the CH2 area;

[0008] The main control chip 9 sends a command to the relay 2, thereby controlling the low-noise voltage reference source 1 to switch the forward / reverse voltage to the Wheatstone bridge 3, and the differential voltage output end of the Wheatstone bridge 3 is simultaneously connected to the two input ends of the resistance noise dual-channel cross-spectrum acquisition circuit;

[0009] The GND of CH1 region and the GND of CH2 region are respectively connected to the two input terminals of the background noise dual-channel cross-spectrum acquisition circuit;

[0010] The two output ends of the resistor noise dual-channel cross-spectrum acquisition circuit and the two output ends of the background noise dual-channel cross-spectrum acquisition circuit are respectively connected to the four input ends of the ADC signal acquisition circuit 8. The output end of the ADC signal acquisition circuit 8 is connected to the input end of the main control chip 9. The main control chip 9 obtains the noise spectrum density of the measured resistor through the cross-spectrum algorithm.

[0011] Preferably, the resistance noise dual-channel cross-spectrum acquisition circuit includes a CH1 resistance noise two-stage amplifier circuit 5 and a CH2 resistance noise two-stage amplifier circuit 7, and the background noise dual-channel cross-spectrum acquisition circuit includes a CH1 background noise two-stage amplifier circuit 4 and a CH2 background noise two-stage amplifier circuit 6, and the four-way signal is collected by an ADC signal acquisition circuit 8 and sent to a main control chip 9;

[0012] The CH1 background noise two-stage amplifier circuit 4 includes a low-noise instrumentation amplifier A1' and a low-noise precision operational amplifier A2'. The non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A1' are connected to the CH1 region GND, the output terminal of the low-noise instrumentation amplifier A1' is connected to the inverting input terminal of the low-noise precision operational amplifier A2', the non-inverting input terminal of the low-noise precision operational amplifier A2' is grounded through a resistor, a resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A2', and the output terminal of the low-noise precision operational amplifier A2' serves as the output terminal of the CH1 background noise two-stage amplifier circuit 4;

[0013] The CH2 background noise two-stage amplifier circuit 6 includes a low-noise instrumentation amplifier A3' and a low-noise precision operational amplifier A4'. The non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A3' are connected to the CH2 region GND, the output terminal of the low-noise instrumentation amplifier A3' is connected to the inverting input terminal of the low-noise precision operational amplifier A4', the non-inverting input terminal of the low-noise precision operational amplifier A4' is grounded through a resistor, a resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A4', and the output terminal of the low-noise precision operational amplifier A4' serves as the output terminal of the CH2 background noise two-stage amplifier circuit 6;

[0014] The CH1 resistance noise two-stage amplifier circuit 5 includes a low-noise instrumentation amplifier A1 and a low-noise precision operational amplifier A2. The positive-phase and negative-phase input terminals of the low-noise instrumentation amplifier A1 are connected to the differential voltage output terminal of the Wheatstone bridge 3. The output terminal of the low-noise instrumentation amplifier A1 is connected to the negative-phase input terminal of the low-noise precision operational amplifier A2. The positive-phase input terminal of the low-noise precision operational amplifier A2 is grounded through a resistor. A resistor is connected across the negative-phase input terminal and the output terminal of the low-noise precision operational amplifier A2. The output terminal of the low-noise precision operational amplifier A2 serves as the output terminal of the CH1 resistance noise two-stage amplifier circuit 5.

[0015] The CH2 resistor noise two-stage amplifier circuit 7 includes a low-noise instrumentation amplifier A3 and a low-noise precision operational amplifier A4. The positive and negative input terminals of the low-noise instrumentation amplifier A3 are connected to the differential voltage output terminal of the Wheatstone bridge 3. The output terminal of the low-noise instrumentation amplifier A3 is connected to the negative input terminal of the low-noise precision operational amplifier A4. The positive input terminal of the low-noise precision operational amplifier A4 is grounded through a resistor. A resistor is connected across the negative input terminal and the output terminal of the low-noise precision operational amplifier A4. The output terminal of the low-noise precision operational amplifier A4 serves as the output terminal of the CH2 resistor noise two-stage amplifier circuit 7.

[0016] Preferably, the relay 2 has two built-in switches, one of which includes a fixed contact O1, a normally closed static contact A and a normally open static contact B, and the other includes a fixed contact O2, a normally open static contact C and a normally closed static contact D, and the actions of the two switches are guided by receiving instructions through the selection terminal S;

[0017] The positive pole of the low-noise voltage reference source 1 is connected to the normally closed static contact A and the normally closed static contact D at the same time, the negative pole of the low-noise voltage reference source 1 is connected to the normally open static contact B and the normally open static contact C at the same time, the fixed contact O1 and the fixed contact O2 are connected to the two input ends of the Wheatstone bridge 3, and the selection end S is connected to the control end of the main control chip 9.

[0018] Preferably, the Wheatstone bridge 3 is constructed of resistors R1 to R4 to form a full-bridge structure, resistors R1 and R4 are diagonal, resistors R2 and R3 are diagonal, and the changes of the four resistors satisfy the relationship:

[0019] R1=R4=R0-ΔR

[0020] R2=R3=R0+ΔR

[0021] Where R0 is the nominal value of the four resistors, and ΔR is the change in resistance.

[0022] Preferably, the ADC signal acquisition circuit 8 includes an analog-to-digital converter ADC and four second-order low-pass filter units, each of which includes a resistor R f1 , capacitor C f1 , resistor R f2 and capacitor C f2 ,

[0023] The CH1 background noise two-stage amplifier circuit 4 is connected to the pin CH1-G of the analog-to-digital converter ADC through a second-order low-pass filter unit, the CH1 resistance noise two-stage amplifier circuit 5 is connected to the pin CH1-S of the analog-to-digital converter ADC through a second-order low-pass filter unit, the CH2 resistance noise two-stage amplifier circuit 7 is connected to the pin CH2-S of the analog-to-digital converter ADC through a second-order low-pass filter unit, and the CH2 background noise two-stage amplifier circuit 6 is connected to the pin CH2-G of the analog-to-digital converter ADC through a second-order low-pass filter unit.

[0024] Preferably, it also includes a No. 1 isolation unit 10 and a No. 2 isolation unit 11, the output end of the analog-to-digital converter ADC is connected to the input end of the main control chip 9 through the No. 2 isolation unit 11, and the control end of the main control chip 9 is connected to the selection end S of the relay 2 through the No. 1 isolation unit 10.

[0025] Preferably, a CH1 voltage regulator chip 13 and a CH2 voltage regulator chip 14 are also included. The first power output end of the low-noise voltage reference source 1 provides independent partition power for the chips in the CH1 area through the CH1 voltage regulator chip 13, and the second power output end of the low-noise voltage reference source 1 provides independent power for the chips in the CH2 area through the CH2 voltage regulator chip 14.

[0026] The second aspect of the present invention provides a multi-channel cross-spectrum bidirectional resistance low-frequency noise testing method, the method comprising the following steps:

[0027] S1. Get the differential voltage ΔU output by Wheatstone bridge 3:

[0028]

[0029] Where U p is the output voltage of Wheatstone bridge 3 when the power supply is in the forward direction, U n is the output voltage of Wheatstone bridge 3 when the power supply is reversed, V Eis the voltage value borne by each resistor, R0 is the nominal value of the four resistors, and ΔR is the change in resistance;

[0030] S2. Get the noise spectrum density S of the measured resistor 1 / 2 (f):

[0031]

[0032] In the formula, S CH-S (f) is the primary resistor noise spectral density, S CH-G (f) is the background noise spectral density,

[0033] G1 is the gain of low noise instrumentation amplifiers A1, A1', A3, A3', G2 is the gain of low noise precision operational amplifiers A2, A2', A4, A4';

[0034] Primary resistor noise spectral density S CH-S The acquisition process of (f) is as follows: two paths are parallel, one of which is the differential voltage ΔU output by the Wheatstone bridge 3, which is amplified by the low-noise instrumentation amplifier A1 and the low-noise precision operational amplifier A2, and a single-point DFT operation is performed; the other path is the differential voltage ΔU output by the Wheatstone bridge 3, which is amplified by the low-noise instrumentation amplifier A3 and the low-noise precision operational amplifier A4, and a single-point DFT operation is performed. The two-path operation results are conjugate multiplied to obtain the noise spectral density S CH-S (f);

[0035] The spectral density of the noise floor S CH-G The acquisition process of (f) is: two paths are parallel, one of which is the background noise signal n GND (t) is amplified by low-noise instrumentation amplifier A1' and low-noise precision operational amplifier A2' to perform single-point DFT calculation; the other path is the background noise signal n GND (t) After being amplified by low-noise instrumentation amplifier A3' and low-noise precision operational amplifier A4', a single-point DFT operation is performed. The two-way operation results are conjugate multiplied to obtain the background noise spectrum density S CH-G (f).

[0036] According to a third aspect of the present invention, there is provided an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method when executing the computer program.

[0037] A fourth aspect of the present invention provides a computer-readable storage medium for storing computer instructions, wherein the computer instructions implement the steps of the method when executed by a processor.

[0038] Beneficial effects of the invention: The invention proposes a multi-channel cross-spectrum bidirectional resistance low-frequency noise measurement method, which combines a resistance noise dual-channel cross-spectrum acquisition circuit with a background noise dual-channel cross-spectrum acquisition circuit to form a multi-channel low-noise amplifier circuit. On the basis of analyzing and comparing the advantages and disadvantages of traditional test methods, a multi-channel cross-spectrum bidirectional resistance low-frequency noise test scheme is proposed, and combined with the LCPSD cross-spectrum algorithm, a multi-channel cross-spectrum analysis theoretical model is established.

[0039] 1. The present invention is based on the theoretical foundation of the low-frequency noise mechanism and model of electronic components. On this basis, the low-frequency noise characteristics and basic research methods of the reference resistor are clarified;

[0040] 2. The present invention proposes a multi-channel cross-spectrum bidirectional resistance low-frequency noise test scheme, and establishes a multi-channel cross-spectrum analysis theoretical model in combination with the cross-spectrum algorithm. This system targets low-frequency noise below 1Hz, sets the sampling frequency to 2Hz according to the Nyquist sampling theorem, and collects more than 10,000s each time to achieve effective measurement of 0.1mHz-1Hz ultra-low frequency noise. The background noise of this system is extremely low at 0.11μV / Hz 1 / 2 , which can distinguish low-temperature drift resistor noise with high precision. Based on the cross-spectrum method, the measurement lower limit of resistor noise spectral density is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a principle block diagram of a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit according to the present invention;

[0042] Figure 2 It is a specific circuit diagram of a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit described in the present invention;

[0043] Figure 3 This is the principle block diagram of resistor noise dual-channel cross-spectrum calculation;

[0044] Figure 4 This is the principle block diagram of the background noise dual-channel cross-spectrum calculation;

[0045] Figure 5 The method of the present invention is used to test the time domain test results of VISHAY Z0110kΩ resistor;

[0046] Figure 6 The noise spectrum density diagram of the VISHAY Z01 10kΩ resistor tested by the method of the present invention is shown in FIG. DETAILED DESCRIPTION

[0047] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0049] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0050] Specific implementation method 1: The following is combined Figures 1 to 6 The present embodiment is described. The present embodiment describes a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit, comprising a low-noise voltage reference source 1, a relay 2, a Wheatstone bridge 3, a multi-channel low-noise amplifier circuit, an ADC signal acquisition circuit 8 and a main control chip 9;

[0051] The multi-channel low-noise amplifier circuit includes a resistor noise dual-channel cross-spectrum acquisition circuit and a background noise dual-channel cross-spectrum acquisition circuit; the chip is divided into a CH1 area and a CH2 area, and two channel circuits of the resistor noise dual-channel cross-spectrum acquisition circuit are respectively arranged on the CH1 area and the CH2 area, and two channel circuits of the background noise dual-channel cross-spectrum acquisition circuit are respectively arranged on the CH1 area and the CH2 area;

[0052] The main control chip 9 sends a command to the relay 2, thereby controlling the low-noise voltage reference source 1 to switch the forward / reverse voltage to the Wheatstone bridge 3, and the differential voltage output end of the Wheatstone bridge 3 is simultaneously connected to the two input ends of the resistance noise dual-channel cross-spectrum acquisition circuit;

[0053] The GND of CH1 region and the GND of CH2 region are respectively connected to the two input terminals of the background noise dual-channel cross-spectrum acquisition circuit;

[0054] The two output ends of the resistor noise dual-channel cross-spectrum acquisition circuit and the two output ends of the background noise dual-channel cross-spectrum acquisition circuit are respectively connected to the four input ends of the ADC signal acquisition circuit 8. The output end of the ADC signal acquisition circuit 8 is connected to the input end of the main control chip 9. The main control chip 9 obtains the noise spectrum density of the measured resistor through the cross-spectrum algorithm.

[0055] See also Figure 1, the constant voltage source provides a constant voltage excitation for the measured resistor; the relay 2 is controlled by the main control chip to switch the voltage excitation direction; the four amplification channels, CH1-G and CH2-G, amplify the background noise, and CH1-S and CH2-S amplify the bridge output noise; the ADC converts the amplified analog voltage signal into a digital signal and sends it to the main control chip 9; the main control chip 9 transmits the voltage information to the host computer 12 through the serial port, and finally the cross-spectrum algorithm measures the resistor noise.

[0056] Regarding power supply, this embodiment provides two types of power supply: analog power supply and digital power supply. The digital power supply is used to power the main control chip 9, and the analog power supply adopts a low-noise voltage reference source. The low-noise voltage reference source 1 is divided into three paths, one of which provides multiple groups of constant voltage sources for the relay 2, the second path provides independent partition power supply for the CH1 area through the CH1 voltage regulator chip 13, and the third path provides independent partition power supply for the CH2 area through the CH2 voltage regulator chip 14.

[0057] In order to make the inherent noise introduced by the dual channels uncorrelated, it is necessary to divide the ground plane of this part of the circuit into two parts, CH1 area and CH2 area, and the overall structure is symmetrically distributed.

[0058] See also Figure 1 The resistance noise dual-channel cross-spectrum acquisition circuit includes a CH1 resistance noise two-stage amplifier circuit 5 and a CH2 resistance noise two-stage amplifier circuit 7, and the background noise dual-channel cross-spectrum acquisition circuit includes a CH1 background noise two-stage amplifier circuit 4 and a CH2 background noise two-stage amplifier circuit 6. The four-way signal is collected by an ADC signal acquisition circuit 8 and sent to a main control chip 9;

[0059] See also Figure 2 , the CH1 background noise two-stage amplifier circuit 4 includes a low-noise instrumentation amplifier A1' and a low-noise precision operational amplifier A2', the non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A1' are connected to the CH1 region GND, the output terminal of the low-noise instrumentation amplifier A1' is connected to the inverting input terminal of the low-noise precision operational amplifier A2', the non-inverting input terminal of the low-noise precision operational amplifier A2' is grounded through a resistor, a resistor is connected between the inverting input terminal and the output terminal of the low-noise precision operational amplifier A2', and the output terminal of the low-noise precision operational amplifier A2' serves as the output terminal of the CH1 background noise two-stage amplifier circuit 4; the low-noise instrumentation amplifier A1' and the low-noise precision operational amplifier A2' form a reverse amplifier circuit for measuring background noise;

[0060] The CH2 background noise two-stage amplifier circuit 6 includes a low-noise instrumentation amplifier A3' and a low-noise precision operational amplifier A4'. The non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A3' are connected to the CH2 region GND, the output terminal of the low-noise instrumentation amplifier A3' is connected to the inverting input terminal of the low-noise precision operational amplifier A4', the non-inverting input terminal of the low-noise precision operational amplifier A4' is grounded through a resistor, a resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A4', and the output terminal of the low-noise precision operational amplifier A4' serves as the output terminal of the CH2 background noise two-stage amplifier circuit 6; the low-noise instrumentation amplifier A3' and the low-noise precision operational amplifier A4' form a reverse amplifier circuit for measuring background noise;

[0061] The CH1 resistor noise two-stage amplifier circuit 5 includes a low-noise instrumentation amplifier A1 and a low-noise precision operational amplifier A2. The positive and negative input terminals of the low-noise instrumentation amplifier A1 are connected to the differential voltage output terminal of the Wheatstone bridge 3. The output terminal of the low-noise instrumentation amplifier A1 is connected to the negative input terminal of the low-noise precision operational amplifier A2. The positive input terminal of the low-noise precision operational amplifier A2 is grounded through a resistor. A resistor is connected across the negative input terminal and the output terminal of the low-noise precision operational amplifier A2. The output terminal of the low-noise precision operational amplifier A2 serves as the output terminal of the CH1 resistor noise two-stage amplifier circuit 5. The low-noise instrumentation amplifier A1 and the low-noise precision operational amplifier A2 form a reverse amplifier circuit for measuring resistor noise.

[0062] The CH2 resistor noise two-stage amplifier circuit 7 includes a low-noise instrumentation amplifier A3 and a low-noise precision operational amplifier A4. The non-phase and inverting input terminals of the low-noise instrumentation amplifier A3 are connected to the differential voltage output terminal of the Wheatstone bridge 3. The output terminal of the low-noise instrumentation amplifier A3 is connected to the inverting input terminal of the low-noise precision operational amplifier A4. The non-phase input terminal of the low-noise precision operational amplifier A4 is grounded through a resistor. A resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A4. The output terminal of the low-noise precision operational amplifier A4 serves as the output terminal of the CH2 resistor noise two-stage amplifier circuit 7. The low-noise instrumentation amplifier A3 and the low-noise precision operational amplifier A4 form an inverting amplifier circuit for measuring resistor noise.

[0063] See also Figure 2 , Relay 2 has two built-in switches, one of which includes a fixed contact O1, a normally closed static contact A and a normally open static contact B, and the other includes a fixed contact O2, a normally open static contact C and a normally closed static contact D. The actions of the two switches are guided by receiving instructions through the selection terminal S;

[0064] The positive pole of the low-noise voltage reference source 1 is connected to the normally closed static contact A and the normally closed static contact D at the same time, the negative pole of the low-noise voltage reference source 1 is connected to the normally open static contact B and the normally open static contact C at the same time, the fixed contact O1 and the fixed contact O2 are connected to the two input ends of the Wheatstone bridge 3, and the selection end S is connected to the control end of the main control chip 9.

[0065] See also Figure 2 ADC signal acquisition circuit 8 includes an analog-to-digital converter ADC and four second-order low-pass filter units, each of which includes a resistor R f1 , capacitor C f1 , resistor R f2 and capacitor C f2 , perform digital filtering;

[0066] The CH1 background noise two-stage amplifier circuit 4 is connected to the pin CH1-G of the analog-to-digital converter ADC through a second-order low-pass filter unit, the CH1 resistance noise two-stage amplifier circuit 5 is connected to the pin CH1-S of the analog-to-digital converter ADC through a second-order low-pass filter unit, the CH2 resistance noise two-stage amplifier circuit 7 is connected to the pin CH2-S of the analog-to-digital converter ADC through a second-order low-pass filter unit, and the CH2 background noise two-stage amplifier circuit 6 is connected to the pin CH2-G of the analog-to-digital converter ADC through a second-order low-pass filter unit.

[0067] The analog-to-digital converter ADC converts the four-channel data after two-stage amplification and filtering from analog voltage signals into digital signals, and outputs them to the main control chip 9 .

[0068] See also Figure 2 , further comprising a first isolation unit 10 and a second isolation unit 11, the output end of the analog-to-digital converter ADC is connected to the input end of the main control chip 9 through the second isolation unit 11, and the control end of the main control chip 9 is connected to the selection end S of the relay 2 through the first isolation unit 10. 1 or 0 is sent to S to control the switching state of the two switches in the relay 2, thereby controlling the power supply to be loaded on the Wheatstone bridge 3 in the forward and reverse states, switching alternately, and outputting a differential voltage.

[0069] See also Figure 2 , Wheatstone bridge 3 is constructed by resistors R1 to R4 to form a full bridge structure, resistors R1 and R4 are diagonal, resistors R2 and R3 are diagonal, and the changes of the four resistors satisfy the relationship:

[0070] R1=R4=R0-ΔR

[0071] R2=R3=R0+ΔR

[0072] Where R0 is the nominal value of the four resistors, and ΔR is the change in resistance.

[0073] The differential voltage ΔU is divided into two paths and simultaneously sent to the CH1 resistance noise two-stage amplifier circuit 5 and the CH2 resistance noise two-stage amplifier circuit 7 for measuring resistance noise.

[0074] The background noise is divided into two paths and simultaneously sent to the CH1 background noise two-stage amplifier circuit 4 and the CH2 background noise two-stage amplifier circuit 6 for measuring the background noise.

[0075] Finally, the cross-spectrum calculation is performed in the host computer 12 to obtain the noise spectrum density of the measured resistor.

[0076] Specific implementation method 2: The following is combined Figures 1 to 6 This embodiment is described. A multi-channel cross-spectrum bidirectional resistance low-frequency noise test method described in this embodiment is implemented based on a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit described in embodiment 1. The method includes the following steps:

[0077] S1. Get the differential voltage ΔU output by Wheatstone bridge 3:

[0078]

[0079] Where U p is the output voltage of Wheatstone bridge 3 when the power supply is in the forward direction, U n is the output voltage of Wheatstone bridge 3 when the power supply is reversed, V E is the voltage value borne by each resistor, R0 is the nominal value of the four resistors, and ΔR is the change in resistance;

[0080] The main control chip 9 controls the relay 2 to select the terminal S to close the relay contact, the current is positive, and the positive voltage is connected to the diagonal direction of the bridge. When the power supply is positive, the output voltage U of the Wheatstone bridge 3 p The following relationship exists:

[0081]

[0082] In the formula, E θ is the wire thermoelectric potential, and the four resistance changes are:

[0083] R1=R4=R0-ΔR

[0084] R2=R3=R0+ΔR

[0085] It can be seen that there is a relationship: ΔR1 = -ΔR0, ΔR2 = ΔR0, ΔR3 = ΔR0, ΔR4 = -ΔR0;

[0086] Switching command, the main control chip 9 controls the relay 2 to select the terminal S to disconnect the relay contact, the current is reversed, and the reverse voltage is connected to the diagonal direction of the bridge. When the power supply is reversed, the output voltage U of the Wheatstone bridge 3 n The following relationship exists:

[0087]

[0088] The differential voltage is Substituting the above relationship into the equation:

[0089] S2. Get the noise spectrum density S of the measured resistance 1 / 2 (f):

[0090]

[0091] In the formula, S CH-S (f) is the primary resistor noise spectral density, S CH-G (f) is the background noise spectral density,

[0092] G1 is the gain of low noise instrumentation amplifiers A1, A1', A3, A3', G2 is the gain of low noise precision operational amplifiers A2, A2', A4, A4'; the noise introduced by the amplifier circuit is white noise and is unrelated.

[0093] See also Figure 3 , primary resistor noise spectral density S CH-S The acquisition process of (f) is as follows: two paths are parallel, one of which is the differential voltage ΔU (represented by S(t) in the figure) output by the Wheatstone bridge 3, which is amplified by a low-noise instrumentation amplifier A1 and a low-noise precision operational amplifier A2, and a single-point DFT operation is performed; the other path is the differential voltage ΔU output by the Wheatstone bridge 3, which is amplified by a low-noise instrumentation amplifier A3 and a low-noise precision operational amplifier A4, and a single-point DFT operation is performed. The two paths are conjugate multiplied to obtain the noise spectrum density S CH-S (f);

[0094] The spectral density of the noise floor S CH-G The acquisition process of (f) is: two paths are parallel, one of which is the background noise signal n GND (t) is amplified by low-noise instrumentation amplifier A1' and low-noise precision operational amplifier A2' to perform single-point DFT calculation; the other path is the background noise signal n GND (t) After being amplified by low-noise instrumentation amplifier A3' and low-noise precision operational amplifier A4', a single-point DFT operation is performed. The two-way operation results are conjugate multiplied to obtain the background noise spectrum density S CH-G (f).

[0095] The specific implementation examples of the present invention are as follows:

[0096] The full-bridge circuit of the present invention is composed of four 10kΩ resistors of the VISHAY Z01 series. A ±10V low-noise constant voltage source supplies power to the full-bridge circuit. The main control chip controls the relay SW1 to change the current direction. The difference operation of the two changes in direction obtains ΔU. The measured background noise channel voltage and the bridge output ΔU are transmitted to the host computer and displayed as follows: Figure 4 shown.

[0097] The obtained data were used to perform cross-spectral calculations on the background noise channel and the bridge output signal. The experimental verification showed that the background noise reached 0.11μV / Hz. 1 / 2 @0.1mHz, the measured resistance noise includes the background noise, which is removed in the frequency domain to obtain the noise spectrum density of the measured resistance. The noise spectrum density is as follows: Figure 5 As shown, the maximum noise spectral density is 1.83μV / Hz 1 / 2 .

[0098] Specific implementation method three: An electronic device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in implementation method two when executing the computer program.

[0099] Specific implementation method four: A computer-readable storage medium for storing computer instructions, which implement the steps of the method described in implementation method two when executed by a processor. The memory in the embodiment of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct rambus RAM (DRRAM). It should be noted that the memory of the method described in the present invention is intended to include, but is not limited to, these and any other suitable types of memory.

[0100] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a high-density digital video disc (DVD)), or a semiconductor medium (eg, a solid state disc (SSD)).

[0101] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0102] It should be noted that the processor in the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or an instruction in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor can be combined and performed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0103] The above is a detailed introduction to a differential proportional temperature measurement circuit and method based on bidirectional constant voltage drive proposed in the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technicians in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit, characterized in that: It comprises a low-noise voltage reference source (1), a relay (2), a Wheatstone bridge (3), a multi-channel low-noise amplifier circuit, an ADC signal acquisition circuit (8) and a main control chip (9); The multi-channel low-noise amplifier circuit includes a resistance noise dual-channel cross-spectrum acquisition circuit and a background noise dual-channel cross-spectrum acquisition circuit; The chip is divided into CH1 area and CH2 area, the two channel circuits of the resistance noise dual-channel cross-spectrum acquisition circuit are respectively set on the CH1 area and the CH2 area, and the two channel circuits of the background noise dual-channel cross-spectrum acquisition circuit are respectively set on the CH1 area and the CH2 area; The main control chip (9) sends a command to the relay (2), thereby controlling the low-noise voltage reference source (1) to switch the forward / reverse voltage to the Wheatstone bridge (3), and the differential voltage output end of the Wheatstone bridge (3) is simultaneously connected to the two input ends of the resistance noise dual-channel cross-spectrum acquisition circuit; The GND of CH1 region and the GND of CH2 region are respectively connected to the two input terminals of the background noise dual-channel cross-spectrum acquisition circuit; Two output ends of the resistor noise dual-channel cross-spectrum acquisition circuit and two output ends of the background noise dual-channel cross-spectrum acquisition circuit are respectively connected to four input ends of an ADC signal acquisition circuit (8); the output end of the ADC signal acquisition circuit (8) is connected to the input end of a main control chip (9); and the main control chip (9) obtains the noise spectrum density of the measured resistor through a cross-spectrum algorithm.

2. According to the multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit of claim 1, it is characterized in that: The resistance noise dual-channel cross-spectrum acquisition circuit comprises a CH1 resistance noise two-stage amplifier circuit (5) and a CH2 resistance noise two-stage amplifier circuit (7), and the background noise dual-channel cross-spectrum acquisition circuit comprises a CH1 background noise two-stage amplifier circuit (4) and a CH2 background noise two-stage amplifier circuit (6), and the four-channel signals are acquired by an ADC signal acquisition circuit (8) and sent to a main control chip (9); The CH1 background noise two-stage amplifier circuit (4) comprises a low-noise instrumentation amplifier A1' and a low-noise precision operational amplifier A2', wherein the non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A1' are connected to the CH1 region GND, the output terminal of the low-noise instrumentation amplifier A1' is connected to the inverting input terminal of the low-noise precision operational amplifier A2', the non-inverting input terminal of the low-noise precision operational amplifier A2' is grounded via a resistor, a resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A2', and the output terminal of the low-noise precision operational amplifier A2' serves as the output terminal of the CH1 background noise two-stage amplifier circuit (4); The CH2 background noise two-stage amplifier circuit (6) comprises a low-noise instrumentation amplifier A3' and a low-noise precision operational amplifier A4', wherein the non-inverting input terminal and the inverting input terminal of the low-noise instrumentation amplifier A3' are connected to the CH2 region GND, the output terminal of the low-noise instrumentation amplifier A3' is connected to the inverting input terminal of the low-noise precision operational amplifier A4', the non-inverting input terminal of the low-noise precision operational amplifier A4' is grounded via a resistor, a resistor is connected across the inverting input terminal and the output terminal of the low-noise precision operational amplifier A4', and the output terminal of the low-noise precision operational amplifier A4' serves as the output terminal of the CH2 background noise two-stage amplifier circuit (6); The CH1 resistance noise two-stage amplifier circuit (5) comprises a low-noise instrumentation amplifier A1 and a low-noise precision operational amplifier A2, wherein the positive-phase and negative-phase input terminals of the low-noise instrumentation amplifier A1 are connected to the differential voltage output terminal of the Wheatstone bridge (3), the output terminal of the low-noise instrumentation amplifier A1 is connected to the negative-phase input terminal of the low-noise precision operational amplifier A2, the positive-phase input terminal of the low-noise precision operational amplifier A2 is grounded via a resistor, a resistor is connected across the negative-phase input terminal and the output terminal of the low-noise precision operational amplifier A2, and the output terminal of the low-noise precision operational amplifier A2 serves as the output terminal of the CH1 resistance noise two-stage amplifier circuit (5); The CH2 resistance noise two-stage amplifier circuit (7) comprises a low-noise instrumentation amplifier A3 and a low-noise precision operational amplifier A4. The positive-phase and negative-phase input terminals of the low-noise instrumentation amplifier A3 are connected to the differential voltage output terminal of the Wheatstone bridge (3). The output terminal of the low-noise instrumentation amplifier A3 is connected to the negative-phase input terminal of the low-noise precision operational amplifier A4. The positive-phase input terminal of the low-noise precision operational amplifier A4 is grounded via a resistor. A resistor is connected across the negative-phase input terminal and the output terminal of the low-noise precision operational amplifier A4. The output terminal of the low-noise precision operational amplifier A4 serves as the output terminal of the CH2 resistance noise two-stage amplifier circuit (7).

3. According to the multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit of claim 1, it is characterized in that: The relay (2) has two built-in switches, one of which includes a fixed contact O1, a normally closed static contact A and a normally open static contact B, and the other includes a fixed contact O2, a normally open static contact C and a normally closed static contact D. The operation of the two switches is guided by receiving instructions through a selection terminal S; The positive electrode of the low-noise voltage reference source (1) is connected to the normally closed static contact A and the normally closed static contact D at the same time, the negative electrode of the low-noise voltage reference source (1) is connected to the normally open static contact B and the normally open static contact C at the same time, the fixed contact O1 and the fixed contact O2 are connected to the two input ends of the Wheatstone bridge (3), and the selection end S is connected to the control end of the main control chip (9).

4. According to the multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit of claim 1, it is characterized in that: The Wheatstone bridge (3) is constructed by resistors R1 to R4 to form a full bridge structure. Resistors R1 and R4 are diagonal, and resistors R2 and R3 are diagonal. The changes of the four resistors satisfy the relationship: R1=R4=R0-ΔR R2=R3=R0+ΔR Where R0 is the nominal value of the four resistors, and ΔR is the change in resistance.

5. According to claim 2, a multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit is characterized in that: The ADC signal acquisition circuit (8) comprises an analog-to-digital converter ADC and four second-order low-pass filter units, each of which comprises a resistor R f1 , capacitor C f1 , resistor R f2 and capacitor C f2 , The CH1 background noise two-stage amplifier circuit (4) is connected to the pin CH1-G of the analog-to-digital converter ADC via a second-order low-pass filter unit, the CH1 resistance noise two-stage amplifier circuit (5) is connected to the pin CH1-S of the analog-to-digital converter ADC via a second-order low-pass filter unit, the CH2 resistance noise two-stage amplifier circuit (7) is connected to the pin CH2-S of the analog-to-digital converter ADC via a second-order low-pass filter unit, and the CH2 background noise two-stage amplifier circuit (6) is connected to the pin CH2-G of the analog-to-digital converter ADC via a second-order low-pass filter unit.

6. A multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit according to claim 5, characterized in that: It also includes a first isolation unit (10) and a second isolation unit (11), wherein the output end of the analog-to-digital converter ADC is connected to the input end of the main control chip (9) through the second isolation unit (11), and the control end of the main control chip (9) is connected to the selection end S of the relay (2) through the first isolation unit (10).

7. A multi-channel cross-spectrum bidirectional resistance low-frequency noise test circuit according to claim 2, characterized in that: It also comprises a CH1 voltage stabilizing chip (13) and a CH2 voltage stabilizing chip (14); the first power supply output end of the low-noise voltage reference source (1) provides independent partitioned power supply for chips in the CH1 area through the CH1 voltage stabilizing chip (13); and the second power supply output end of the low-noise voltage reference source (1) provides independent power supply for chips in the CH2 area through the CH2 voltage stabilizing chip (14).

8. A multi-channel cross-spectrum bidirectional resistance low-frequency noise test method, the method is implemented based on the circuit described in any one of claims 1 to 7, characterized in that: The method comprises the following steps: S1. Obtain the differential voltage ΔU output by the Wheatstone bridge (3): Where U p is the output voltage of the Wheatstone bridge (3) when the power supply is in the forward direction, U n is the output voltage of the Wheatstone bridge (3) when the power supply is reversed, V E is the voltage value borne by each resistor, R0 is the nominal value of the four resistors, and ΔR is the change in resistance; S2. Get the noise spectrum density S of the measured resistance 1 / 2 (f): In the formula, S CH-S (f) is the primary resistor noise spectral density, S CH-G (f) is the background noise spectral density, G1 is the gain of low noise instrumentation amplifiers A1, A1', A3, A3', G2 is the gain of low noise precision operational amplifiers A2, A2', A4, A4'; Primary resistor noise spectral density S CH-S The acquisition process of (f) is as follows: two paths are parallel, one of which is the differential voltage ΔU output by the Wheatstone bridge (3) and is amplified by a low-noise instrumentation amplifier A1 and a low-noise precision operational amplifier A2, and a single-point DFT operation is performed; the other path is the differential voltage ΔU output by the Wheatstone bridge (3) and is amplified by a low-noise instrumentation amplifier A3 and a low-noise precision operational amplifier A4, and a single-point DFT operation is performed. The two paths are conjugate multiplied to obtain a noise spectral density S CH-S (f); The spectral density of the noise floor S CH-G The acquisition process of (f) is: two paths are parallel, one of which is the background noise signal n GND (t) is amplified by low-noise instrumentation amplifier A1' and low-noise precision operational amplifier A2' to perform single-point DFT calculation; the other path is the background noise signal n GND (t) After being amplified by low-noise instrumentation amplifier A3' and low-noise precision operational amplifier A4', a single-point DFT operation is performed. The two-way operation results are conjugate multiplied to obtain the background noise spectrum density S CH-G (f).

9. An electronic device, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method according to claim 8 when executing the computer program.

10. A computer-readable storage medium, characterized in that: Used to store computer instructions, which implement the steps of the method according to claim 8 when executed by a processor.

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