A fast extraction method of parasitic parameters of planar schottky barrier diode

Abstract

The application discloses a kind of plane schottky barrier diode parasitic parameter's quick extraction method, belong to terahertz solid device technical field, specifically: in finite element electromagnetic simulation software, the three-dimensional electromagnetic model of plane schottky barrier diode including coplanar waveguide is constructed, and the three-dimensional electromagnetic model of short-circuiting schottky junction and open-circuiting schottky junction without air bridge;In circuit simulation software, the corresponding equivalent circuit of short-circuiting schottky junction and open-circuiting schottky junction without air bridge is respectively constructed;In the range of working frequency band, the equivalent circuit of short-circuiting schottky junction and open-circuiting schottky junction without air bridge is sequentially simulated, and by adjusting parasitic parameter, it is consistent with the electromagnetic simulation S11 and S21 of corresponding three-dimensional electromagnetic model, and then the parasitic parameter of plane schottky barrier diode is determined;The application can obtain parasitic parameter without tedious mathematical calculation and long time physical processing test, can be used for quickly optimizing design high-performance plane schottky barrier diode, especially suitable for terahertz frequency band circuit design.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of terahertz solid-state devices, and particularly relates to a fast extraction method of parasitic parameters of a planar Schottky barrier diode. BACKGROUND

[0002] With the increasingly tense spectrum resources, terahertz waves become a research hotspot in the field of next-generation mobile communications due to their wider bandwidth, better directivity and stronger penetration. Among them, the nonlinear capability of the planar Schottky barrier diode, as a core solid-state device for generating terahertz waves, plays a crucial role in the performance of the entire terahertz system. The factors affecting the nonlinear capability of the planar Schottky barrier diode are mainly divided into capacitance and resistance, both of which are composed of intrinsic parameters and parasitic parameters, and are limited by the constraints of device processing technology. Since the intrinsic parameters are often difficult to change, the parasitic parameters become the main factors affecting the performance of the device. Especially as the frequency increases to terahertz, the microstructure size of the device gradually approaches the wavelength, and the parasitic effect generated thereby cannot be ignored, directly restricting the generation of higher frequency terahertz waves.

[0003] The parasitic parameters of the planar Schottky barrier diode are closely related to its own physical structure, and the extraction process is very complex, especially in the terahertz frequency band, which will cause special physical effects such as skin effect, self-heating effect and velocity saturation effect, which will increase the difficulty of parasitic parameter extraction. The current parasitic parameter extraction method generally solves each parasitic parameter by making complex theoretical calculations and conditional assumptions such as low-frequency electric field equivalence, which is often tedious and has large errors. Or make a large number of physical samples for testing to select the optimal structure, which requires a lot of time cost. Therefore, a simple and convenient fast extraction method of parasitic parameters is crucial. SUMMARY

[0004] In view of the problems of complex and large error in the existing extraction process of parasitic parameters of the planar Schottky barrier diode, the application provides a fast extraction method of parasitic parameters of the planar Schottky barrier diode, which is especially suitable for the terahertz frequency band.

[0005] The technical scheme adopted by the application is as follows:

[0006] A fast extraction method of parasitic parameters of a planar Schottky barrier diode, comprising the following steps:

[0007] Step 1, constructing a three-dimensional electromagnetic model of a planar Schottky barrier diode containing a coplanar waveguide in a finite element electromagnetic simulation software, and on this basis, constructing a three-dimensional electromagnetic model without an air bridge, a three-dimensional electromagnetic model with a short-circuit Schottky junction, and a three-dimensional electromagnetic model with an open-circuit Schottky junction;

[0008] Step 2: Construct the equivalent circuits corresponding to the three-dimensional electromagnetic model without air bridges, the three-dimensional electromagnetic model with Schottky junction short circuit, and the three-dimensional electromagnetic model with Schottky junction open circuit in the circuit simulation software.

[0009] Step 3: Extract the parasitic parameters of the planar Schottky barrier diode within the operating frequency band, including the parasitic inductance L generated by the air bridge. f and parasitic resistance R f Schottky junction edge parasitic capacitance C f And the parasitic capacitance C between the cathode pad and the anode pad. pp The specific process is as follows:

[0010] Step 3.1: In the 3D electromagnetic model without air bridges, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the 3D electromagnetic model without air bridges, adjust the parasitic capacitance C... pp This makes the reflection coefficient S11' in the circuit simulation consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and the transmission coefficient S21' in the circuit simulation consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. At this time, the parasitic capacitance C pp C pp Extracted value;

[0011] Step 3.2: In the three-dimensional electromagnetic model of the Schottky junction short-circuited, the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation are extracted through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of the Schottky junction short-circuited, the parasitic capacitance C is... pp Set as C obtained in step 3.1 pp Extracted value, by adjusting parasitic inductance L f and parasitic resistance R f This makes the reflection coefficient S11' in the circuit simulation consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and the transmission coefficient S21' in the circuit simulation consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. At this time, the parasitic inductance L f and parasitic resistance R f L respectively f Extracted values ​​and R f Extracted value;

[0012] Step 3.3: In the three-dimensional electromagnetic model of the open-circuit Schottky junction, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of the open-circuit Schottky junction, the parasitic capacitance C... pp Set as C obtained in step 3.1 pp Extracted value, parasitic inductance L f and parasitic resistance Rf L is set to the value obtained in step 3.2 f extracted value and R f extracted value, by adjusting the Schottky junction edge parasitic capacitance C fp , so that the reflection coefficient S11' of the circuit simulation and the reflection coefficient S11 of the corresponding electromagnetic simulation are consistent, and the transmission coefficient S21' of the circuit simulation and the transmission coefficient S21 of the corresponding electromagnetic simulation are consistent, at this time the Schottky junction edge parasitic capacitance C fp is C fp extracted value.

[0013] Further, after extracting the parasitic parameters in step 3, a reverse optimization step is also included, the specific process is:

[0014] Based on the three-dimensional electromagnetic model of the planar Schottky barrier diode, the planar Schottky barrier diode is manufactured, and the forward current-voltage test is carried out to obtain the current-voltage test result; based on the C pp extracted value in step 3, L f extracted value, R f extracted value and C fp extracted value, the three-dimensional electromagnetic model of the planar Schottky barrier diode corresponding to the equivalent circuit is constructed in the circuit simulation software, and the current-voltage simulation result is obtained through direct current simulation; by comparing the current-voltage simulation result with the current-voltage test result, the C pp extracted value in step 3 is reversely optimized, L f extracted value, R f extracted value and C fp extracted value, when the current-voltage simulation result and the current-voltage test result are consistent, the C pp final extracted value, L f final extracted value, R f final extracted value and C fp final extracted value.

[0015] Further, the three-dimensional electromagnetic model of the planar Schottky barrier diode containing the coplanar waveguide includes a substrate, and a coplanar waveguide signal line, a cathode pad, an anode pad, a planar Schottky barrier diode and two ground wires above the substrate;

[0016] The coplanar waveguide signal line is located between the two ground wires and is not connected with the ground wires; the coplanar waveguide signal line is broken in the middle, and the cathode pad and the anode pad are respectively arranged at the two ends of the break and are connected through the planar Schottky barrier diode.

[0017] Further, the planar Schottky barrier diode includes a heavily doped layer, an epitaxial layer, a Schottky junction and an air bridge;

[0018] The heavy doped layer, the epitaxial layer and the Schottky junction are stacked in sequence from bottom to top; the lower end of the Schottky junction is connected to the epitaxial layer through the cathode pad, and a gap is left between the bottom surface of the upper end of the Schottky junction and the upper surface of the cathode pad; the upper end of the Schottky junction is connected to the anode pad through the air bridge.

[0019] Further, the heavy doped layer is arranged on the substrate through the buffer support layer.

[0020] Further, the three-dimensional electromagnetic model without the air bridge is obtained by removing the air bridge of the three-dimensional electromagnetic model of the planar Schottky barrier diode.

[0021] Further, the three-dimensional electromagnetic model of the short-circuited Schottky junction is obtained by connecting the lower end of the Schottky junction in the three-dimensional electromagnetic model of the planar Schottky barrier diode directly to the heavy doped layer through the epitaxial layer.

[0022] Further, the three-dimensional electromagnetic model of the open-circuited Schottky junction is obtained by hollowing out the region corresponding to the bottom of the Schottky junction in the epitaxial layer of the three-dimensional electromagnetic model of the planar Schottky barrier diode.

[0023] Further, the port impedance of the coplanar waveguide signal line is 50Ω.

[0024] Further, the material of the substrate is gallium arsenide, silicon carbide or quartz, and the thickness is 30-50μm.

[0025] Further, the thickness of the cathode pad and the anode pad is 2-4μm.

[0026] Further, when performing electromagnetic simulation in the finite element electromagnetic simulation software, the port of the coplanar waveguide signal line needs to be de-embedded.

[0027] The present application has the following beneficial effects:

[0028] 1. The present application provides a method for quickly extracting the parasitic parameters of a planar Schottky barrier diode, which is based on the three-dimensional electromagnetic model of the planar Schottky barrier diode containing a coplanar waveguide, and constructs three-dimensional electromagnetic models without air bridges, short-circuited Schottky junctions and open-circuited Schottky junctions in sequence, and then performs circuit simulation on the equivalent circuits of the three-dimensional electromagnetic models, adjusts the parasitic parameters to make them consistent with the reflection coefficient S11 and the transmission coefficient S21 of the electromagnetic simulation of the corresponding three-dimensional electromagnetic model, and then determines the parasitic parameters; the present application can obtain the parasitic parameters of different planar Schottky barrier diode structures without complicated mathematical calculations and long physical processing tests, and can be used for quickly optimizing the design of high-performance planar Schottky barrier diodes, especially for the circuit design in the terahertz band.

[0029] 2. In the traditional three-dimensional electromagnetic model of short-circuit Schottky junction, the short-circuit structure is generally formed by directly connecting the Schottky junction with the cathode pad, which will increase the length of the air bridge, resulting in the extracted parasitic inductance and ohmic loss being too large; preferably, the Schottky junction is penetrated through the epitaxial layer and connected with the heavily doped layer to form a short-circuit structure, compared with the traditional short-circuit structure, the air bridge parasitic inductance and ohmic loss extracted by the application are more in line with the actual working condition of the diode, and the extracted parasitic parameters are more accurate;

[0030] 3. In the traditional three-dimensional electromagnetic model of open-circuit Schottky junction, the lower end of the Schottky junction is generally intercepted, and then the epitaxial layer is not connected to realize the open-circuit of the Schottky junction, which will cause the extracted edge parasitic capacitance to be too large, and the performance of the entire Schottky barrier diode will be deteriorated; preferably, the open-circuit structure obtained by hollowing out the region of the epitaxial layer corresponding to the bottom of the Schottky junction can more accurately obtain the edge parasitic capacitance C generated by the brim of the Schottky junction. fp . BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 A three-dimensional structure schematic diagram of a three-dimensional electromagnetic model of a planar Schottky barrier diode containing a coplanar waveguide is provided for Embodiment 1 of the application;

[0032] Figure 2 A cross-sectional structure in the AA' plane and an equivalent circuit schematic diagram of the three-dimensional electromagnetic model of the planar Schottky barrier diode containing a coplanar waveguide in Embodiment 1 of the application are provided;

[0033] Figure 3 A cross-sectional structure in the AA' plane and an equivalent circuit schematic diagram of the three-dimensional electromagnetic model without an air bridge in Embodiment 1 of the application are provided;

[0034] Figure 4 A cross-sectional structure in the AA' plane and an equivalent circuit schematic diagram of the three-dimensional electromagnetic model of short-circuit Schottky junction in Embodiment 1 of the application are provided;

[0035] Figure 5 A cross-sectional structure in the AA' plane and an equivalent circuit schematic diagram of the three-dimensional electromagnetic model of open-circuit Schottky junction in Embodiment 1 of the application are provided;

[0036] Figure 6 A comparison of S parameters of circuit simulation and electromagnetic simulation and a comparison of current-voltage data of each parasitic parameter in Embodiment 1 of the application are provided; wherein (a) is the S parameter comparison of the air bridge; (b) is the S parameter comparison of the short-circuit Schottky junction; (c) is the S parameter comparison of the open-circuit Schottky junction; (d) is the data comparison of the current-voltage simulation results and the current-voltage test results;

[0037] The explanation of each mark in the drawings is as follows:

[0038] 1: Substrate; 2: Grounding wire; 3: Coplanar waveguide signal line; 31: Cathode pad; 32: Anode pad; 4: Heavily doped layer; 5: Buffer support layer; 6: Schottky junction; 7: Epitaxial layer; 8: Air bridge; 9: Air. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Although limited embodiments are described below, the components of the embodiments of the present invention described and illustrated in the accompanying drawings can be arranged and designed in various different configurations.

[0040] Example 1

[0041] This embodiment provides a rapid method for extracting parasitic parameters of a planar Schottky barrier diode, including the following steps:

[0042] Step 1: Construct a three-dimensional electromagnetic model of a planar Schottky barrier diode containing a coplanar waveguide in finite element electromagnetic simulation software (HFSS (High Frequency Structure Simulation) or CST (Three-Dimensional Electromagnetic Field Simulation)). Its three-dimensional structure is as follows: Figure 1 As shown, the system includes a substrate 1, and a coplanar waveguide signal line 3, a cathode pad 31, an anode pad 32, a planar Schottky barrier diode, and two ground wires 2 located above the substrate 1. The coplanar waveguide signal line 3 is located between the two ground wires 2 but is not connected to them. The coplanar waveguide signal line 3 is broken in the middle, with the cathode pad 31 and anode pad 32 located at opposite ends of the break and connected via the planar Schottky barrier diode. The port impedance of the coplanar waveguide signal line 3 is 50Ω. The port of the coplanar waveguide signal line 3 is de-embedded.

[0043] like Figure 2 The cross-sectional structure of the AA' plane shown is described. The planar Schottky barrier diode includes a heavily doped layer 4, an epitaxial layer 7, a Schottky junction 6, and an air bridge 8. The heavily doped layer 4, the epitaxial layer 7, and the Schottky junction 6 are stacked sequentially from bottom to top. The heavily doped layer 4 is disposed on the substrate 1 through a buffer support layer 5. The lower end of the Schottky junction 6 passes through the cathode pad 31 and is connected to the epitaxial layer 7, and a gap is left between the bottom surface of the upper end of the Schottky junction 6 and the upper surface of the cathode pad 31. The upper end of the Schottky junction 6 is connected to the anode pad 32 through the air bridge 8.

[0044] In this embodiment, the substrate 1 is made of silicon carbide with a thickness of 50 μm; the buffer support layer 5 is made of gallium nitride with a thickness of 0.2 μm; the heavily doped layer 4 is made of heavily doped gallium nitride with a thickness of 2 μm; the epitaxial layer 7 is made of lightly doped gallium nitride with a thickness of 0.2 μm; the cathode pad 31 and the air bridge 8 are both made of good conductor metal with a thickness of 2 μm; the anode pad 32 is made of good conductor metal; the Schottky junction 6 is made of nickel-gold composite metal conductor;

[0045] Step 2, on the basis of the three-dimensional electromagnetic model of the planar Schottky barrier diode containing the coplanar waveguide, a three-dimensional electromagnetic model without air bridge, a three-dimensional electromagnetic model with Schottky junction short-circuit, and a three-dimensional electromagnetic model with Schottky junction open-circuit are respectively constructed;

[0046] The three-dimensional electromagnetic model without air bridge has a cross-sectional structure in the AA' plane as shown in Figure 3 , which is obtained by removing the air bridge 8 of the three-dimensional electromagnetic model of the planar Schottky barrier diode;

[0047] The three-dimensional electromagnetic model with Schottky junction short-circuit has a cross-sectional structure in the AA' plane as shown in Figure 4 , which is obtained by connecting the lower end of the Schottky junction 6 in the three-dimensional electromagnetic model of the planar Schottky barrier diode directly to the heavily doped layer 4 through the epitaxial layer 7; the extracted air bridge parasitic inductance and ohmic loss of the three-dimensional electromagnetic model with Schottky junction short-circuit are more consistent with the actual working condition of the diode, and the extracted parasitic parameters are more accurate;

[0048] The three-dimensional electromagnetic model with Schottky junction open-circuit has a cross-sectional structure in the AA' plane as shown in Figure 5 , which is obtained by hollowing out the region of the epitaxial layer 7 corresponding to the bottom of the Schottky junction 6 in the three-dimensional electromagnetic model of the planar Schottky barrier diode, and setting the hollowed-out region as air 9; the three-dimensional electromagnetic model with Schottky junction open-circuit can more accurately obtain the edge parasitic capacitance C fp ;

[0049] Step 3, the equivalent circuit corresponding to the three-dimensional electromagnetic model without air bridge, the equivalent circuit corresponding to the three-dimensional electromagnetic model with Schottky junction short-circuit, and the equivalent circuit corresponding to the three-dimensional electromagnetic model with Schottky junction open-circuit are respectively constructed in the circuit simulation software (ADS (Advanced Design System));

[0050] The equivalent circuit corresponding to the three-dimensional electromagnetic model without air bridge is as shown in Figure 3 , which can be equivalent to the parasitic capacitance C pp between the cathode pad 31 and the anode pad 32;

[0051] The equivalent circuit corresponding to the three-dimensional electromagnetic model with Schottky junction short-circuit is as shown in Figure 4As shown, this can be equivalent to the parasitic capacitance C between the cathode pad 31 and the anode pad 32. pp and parasitic capacitance C pp The parasitic inductance L generated by the parallel air bridge 8 f and parasitic resistance R f ;

[0052] The equivalent circuit corresponding to the three-dimensional electromagnetic model of the open-circuit Schottky junction is as follows: Figure 5 As shown, this can be equivalent to the parasitic capacitance C between the cathode pad 31 and the anode pad 32. pp and parasitic capacitance C pp Parallel Schottky junction edge parasitic capacitance C f Parasitic inductance L generated by air bridge 8 f and parasitic resistance R f ;

[0053] Step 4: Extract various parasitic parameters of the planar Schottky barrier diode within the operating frequency range of 1–400 GHz, including the parasitic inductance L generated by the air bridge 8. f and parasitic resistance R f Schottky junction edge parasitic capacitance C f And the parasitic capacitance C between cathode pad 31 and anode pad 32. pp , to obtain Figure 6 The circuit simulation and electromagnetic simulation of various parasitic parameters are compared, along with the S-parameters and current-voltage data.

[0054] The specific process for extracting various parasitic parameters is as follows:

[0055] Step 4.1: In the 3D electromagnetic model without air bridges, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the 3D electromagnetic model without air bridges, adjust the parasitic capacitance C... pp This ensures that the reflection coefficient S11' in the circuit simulation is consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and that the transmission coefficient S21' in the circuit simulation is consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. Figure 6 As shown in (a), the parasitic capacitance C at this time pp C pp Extracted value: 2.3fF;

[0056] Step 4.2: In the three-dimensional electromagnetic model of a short-circuited Schottky junction, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of a short-circuited Schottky junction, the parasitic capacitance C... pp Set as C obtained in step 4.1 ppThe extracted value is 2.3fF, which is achieved by adjusting the parasitic inductance L. f and parasitic resistance R f This ensures that the reflection coefficient S11' in the circuit simulation is consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and that the transmission coefficient S21' in the circuit simulation is consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. Figure 6 As shown in (b), the parasitic inductance L at this time f and parasitic resistance R f L respectively f Extraction values ​​2.5 pH and R f Extraction value 4Ω;

[0057] Step 4.3: In the three-dimensional electromagnetic model of the open-circuit Schottky junction, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of the open-circuit Schottky junction, the parasitic capacitance C... pp Set as C obtained in step 4.1 pp Extracted value 2.3fF, parasitic inductance L f and parasitic resistance R f Set them respectively to the L obtained in step 4.2 f Extraction values ​​2.5 pH and R f The extracted value is 4Ω, achieved by adjusting the parasitic capacitance C at the edge of the Schottky junction. fp This ensures that the reflection coefficient S11' in the circuit simulation is consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and that the transmission coefficient S21' in the circuit simulation is consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. Figure 6 As shown in (c), the parasitic capacitance C at the edge of the Schottky junction at this time fp C fp Extracted value: 1.4fF;

[0058] To verify the accuracy of the extracted parasitic parameters, a physical planar Schottky barrier diode was fabricated based on a three-dimensional electromagnetic model of the diode. Forward current-voltage tests were then performed on the diode to obtain the current-voltage test results. Based on the C obtained in step 4... pp Extracted values ​​2.3fF, L f Extraction value 2.5 pH, R f Extraction values ​​4Ω and C fp Extracting a value of 1.4fF, the equivalent circuit corresponding to the three-dimensional electromagnetic model of the planar Schottky barrier diode is constructed in circuit simulation software, such as... Figure 2 As shown, the current-voltage simulation results were obtained through DC simulation; as... Figure 6 As shown in (d), by comparing the current-voltage simulation results and the current-voltage test results, it can be seen that the two are highly consistent, indicating that the parasitic parameters of the planar Schottky barrier diode extracted in this embodiment are relatively accurate.

[0059] If the current-voltage simulation result deviates from the current-voltage test result, the C in step 3 can be optimized reversely pp extracted value, L f extracted value, R f extracted value and C fp extracted value, when the current-voltage simulation result and the current-voltage test result tend to be consistent, C pp final extracted value, L f final extracted value, R f final extracted value and C fp final extracted value.

[0060] As can be seen from the above, the fast extraction method proposed in the embodiment can obtain the parasitic parameters of different planar Schottky barrier diode structures without complicated mathematical calculation and long-time physical processing test, can realize fast and accurate extraction of the parasitic parameters of the planar Schottky barrier diode, and can be used for fast optimization design of high-performance planar Schottky barrier diodes, and is especially suitable for circuit design in the terahertz band.

[0061] The above embodiments only illustrate the principles and advantages of the present application, and are not used to limit the present application, and the protection scope of the present application is not limited to the above configurations and embodiments, and those skilled in the art can make other various specific modifications and combinations without departing from the essence of the present application according to the disclosed technology, which are still within the protection scope of the present application.

Claims

1. A rapid method for extracting parasitic parameters of a planar Schottky barrier diode, characterized in that, Includes the following steps: Step 1: Construct a three-dimensional electromagnetic model of a planar Schottky barrier diode containing a coplanar waveguide in the finite element electromagnetic simulation software. Based on this, construct a three-dimensional electromagnetic model without an air bridge, a three-dimensional electromagnetic model with a short-circuited Schottky junction, and a three-dimensional electromagnetic model with an open-circuited Schottky junction. Step 2: Construct the equivalent circuits corresponding to the three-dimensional electromagnetic model without air bridges, the three-dimensional electromagnetic model with Schottky junction short circuit, and the three-dimensional electromagnetic model with Schottky junction open circuit in the circuit simulation software. Step 3: Extract the parasitic parameters of the planar Schottky barrier diode within the operating frequency band, including the parasitic inductance L generated by the air bridge. f and parasitic resistance R f Schottky junction edge parasitic capacitance C f And the parasitic capacitance C between the cathode pad and the anode pad. pp The specific process is as follows: Step 3.1: In the 3D electromagnetic model without air bridges, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the 3D electromagnetic model without air bridges, adjust C... pp This makes the reflection coefficient S11' in the circuit simulation consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and the transmission coefficient S21' in the circuit simulation consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. At this time, C pp C pp Extracted value; Step 3.2: In the three-dimensional electromagnetic model of a short-circuited Schottky junction, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of a short-circuited Schottky junction, C... pp Set as C obtained in step 3.1 pp Extract value, adjust L f and R f This makes the reflection coefficient S11' in the circuit simulation consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and the transmission coefficient S21' in the circuit simulation consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. At this time, L f and R f L respectively f Extracted values ​​and R f Extracted value; Step 3.3: In the three-dimensional electromagnetic model of the open-circuit Schottky junction, extract the reflection coefficient S11 and transmission coefficient S21 of its electromagnetic simulation through coplanar waveguide excitation; in the equivalent circuit corresponding to the three-dimensional electromagnetic model of the open-circuit Schottky junction, C... pp Set as C obtained in step 3.1 pp Extracted value, L f and R f Set them respectively to L obtained in step 3.2 f Extracted values ​​and R f Extract values, adjust C fp This makes the reflection coefficient S11' in the circuit simulation consistent with the reflection coefficient S11 in the corresponding electromagnetic simulation, and the transmission coefficient S21' in the circuit simulation consistent with the transmission coefficient S21 in the corresponding electromagnetic simulation. At this time, C fp C fp Extracted value.

2. The rapid extraction method for parasitic parameters of a planar Schottky barrier diode according to claim 1, characterized in that, After extracting parasitic parameters in step 3, a reverse optimization step is also included, the specific process of which is as follows: Based on the three-dimensional electromagnetic model of a planar Schottky barrier diode, a physical planar Schottky barrier diode was fabricated, and current-voltage test results were obtained. Based on the C obtained in step 3... pp Extraction value, L f Extracted value, R f Extracted value and C fp The extracted values ​​were used to construct the equivalent circuit corresponding to the three-dimensional electromagnetic model of the planar Schottky barrier diode in the circuit simulation software. The current-voltage simulation results were obtained through DC simulation. By comparing the current-voltage simulation results with the current-voltage test results, C in step 3 is optimized in reverse. pp Extraction value, L f Extracted value, R f Extracted value and C fp Extract the value; when the current-voltage simulation results and the current-voltage test results tend to be consistent, obtain C. pp Final extracted value, L f Final extracted value, R f Final extracted value and C fp Final extracted value.

3. The rapid extraction method for parasitic parameters of a planar Schottky barrier diode according to claim 1, characterized in that, The three-dimensional electromagnetic model of the planar Schottky barrier diode containing a coplanar waveguide includes a substrate, as well as a coplanar waveguide signal line, a cathode pad, an anode pad, a planar Schottky barrier diode, and two ground wires located above the substrate. The coplanar waveguide signal line is located between the two grounding wires and is not connected to the grounding wires. The coplanar waveguide signal line is broken in the middle, and the cathode pad and anode pad are respectively located at the two ends of the break and connected by a planar Schottky barrier diode.

4. The method for rapid extraction of parasitic parameters of a planar Schottky barrier diode according to claim 3, characterized in that, The planar Schottky barrier diode includes a heavily doped layer, an epitaxial layer, a Schottky junction, and an air bridge; The heavily doped layer, epitaxial layer, and Schottky junction are stacked sequentially from bottom to top. The lower end of the Schottky junction passes through the cathode pad and connects to the epitaxial layer, and a gap is left between the bottom surface of the upper end of the Schottky junction and the upper surface of the cathode pad. The upper end of the Schottky junction is connected to the anode pad through an air bridge.

5. The rapid extraction method for parasitic parameters of a planar Schottky barrier diode according to claim 4, characterized in that, The heavily doped layer is disposed on the substrate through a buffer support layer.

6. The method for rapid extraction of parasitic parameters of a planar Schottky barrier diode according to claim 5, characterized in that, The three-dimensional electromagnetic model without air bridges is obtained by removing the air bridges from the three-dimensional electromagnetic model of the planar Schottky barrier diode.

7. The method for rapid extraction of parasitic parameters of a planar Schottky barrier diode according to claim 5, characterized in that, The three-dimensional electromagnetic model of the short-circuited Schottky junction is obtained by passing the lower end of the Schottky junction in the three-dimensional electromagnetic model of the planar Schottky barrier diode through the epitaxial layer and directly connecting it to the heavily doped layer.

8. The method for rapid extraction of parasitic parameters of a planar Schottky barrier diode according to claim 5, characterized in that, The three-dimensional electromagnetic model of the open-circuit Schottky junction is obtained by hollowing out the region of the epitaxial layer corresponding to the bottom of the Schottky junction in the three-dimensional electromagnetic model of the planar Schottky barrier diode.

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