Fourier transform in-memory computing system and computing method thereof

Abstract

The application belongs to the technical field of in-memory computing, and specifically discloses a Fourier transform in-memory operation system and an operation method thereof. The system comprises: a preprocessing module, which is used for splitting N-dimensional input data into a plurality of one-dimensional data groups according to the split dimension corresponding to the N-dimensional input data in the current iteration operation, and outputting corresponding voltage pulse signals according to each one-dimensional data group; an operation module, which is used for outputting the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group by using a discrete Fourier transform operator; and a post-processing module, which is used for converting each current pulse signal into a corresponding one-dimensional conversion data group, and recombining each one-dimensional conversion data group according to the split dimension to obtain N-dimensional recombination data of the current iteration operation. Through the application, the operation speed and operation efficiency of the in-memory operation system in realizing the Fourier transform can be effectively improved while maintaining low power consumption.

Description

Technical Field

[0001] This application belongs to the field of in-memory computing technology, and more specifically, relates to an in-memory Fourier transform computing system and its computing method. Background Technology

[0002] The Fourier transform, as a digital signal analysis method, has been widely used in signal analysis, image processing, pattern recognition, and other fields. Mathematically, the Fourier transform is a transformation that converts a signal in the time domain into a signal in the frequency domain. The Discrete Fourier Transform (DFT), on the other hand, is used to process discrete signals, converting discrete signals in the time domain into discrete signals in the frequency domain. The Fourier transform can be used not only to process one-dimensional and two-dimensional sequences, but also to process higher-dimensional data, such as three-dimensional image data and three-dimensional time series (four-dimensional).

[0003] In the traditional von Neumann computing architecture, the computing module and the storage module are separate. During the Fourier transform operation, data is constantly transferred between the computing module and the storage module. As the dimension of the data to be processed increases, the amount of data to be processed also increases. The computation of large amounts of data will consume a lot of power and cause system data access delay problems.

[0004] In existing technologies, in-memory computing systems employing non-volatile memory leverage its ability to both store information and perform calculations to achieve in-memory computing integration, which can alleviate the problems of high power consumption and data access latency in traditional data computation to some extent. However, as the dimensionality of the data being processed increases, such as to three dimensions or even higher, the rapid increase in the amount of data computation leads to a significant decrease in the computational speed of existing in-memory computing systems performing Fourier transforms, resulting in low computational efficiency. Summary of the Invention

[0005] In view of the shortcomings of the existing technology, the purpose of this application is to efficiently realize Fourier transforms of different data dimensions, and to solve the problems of slow operation speed, low operation efficiency and incompatibility with different data dimensions in the existing in-memory computing system for Fourier transform operations.

[0006] To achieve the above objectives, in a first aspect, this application provides a Fourier transform in-memory arithmetic system, comprising:

[0007] The preprocessing module is used to split the N-dimensional input data into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data in the current iteration operation, and output a corresponding voltage pulse signal according to each one-dimensional data group; the N-dimensional input data includes the original N-dimensional data input in the first iteration operation, or the N-dimensional recombined data output by the post-processing module in the first N-1 iteration operations;

[0008] The arithmetic module is used to output the current pulse signal corresponding to each of the one-dimensional data groups based on the voltage pulse signal corresponding to each of the one-dimensional data groups using the discrete Fourier transform operator.

[0009] The post-processing module is used to convert each group of current pulse signals into a corresponding one-dimensional transformed data group, and to reassemble each one-dimensional transformed data group according to the split dimension to obtain the N-dimensional reassembled data of the current iteration operation; the N-dimensional reassembled data obtained when the current iteration operation is the Nth iteration operation is used as the N-dimensional Fourier transform result of the original N-dimensional data, and the N-dimensional Fourier transform result is output.

[0010] Optionally, the arithmetic module includes a signal output unit, a real part data output unit for the current pulse signal, and an imaginary part data output unit;

[0011] The real part data output unit is used to output the real part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group.

[0012] The imaginary part data output unit is used to output the imaginary part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group.

[0013] The signal output unit is used to output the current pulse signal corresponding to each one-dimensional data group based on the real part and imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0014] Optionally, both the real part data output unit and the imaginary part data output unit include a first discrete Fourier transform matrix subunit and a second discrete Fourier transform matrix subunit; both the first discrete Fourier transform matrix subunit and the second discrete Fourier transform matrix subunit are constructed based on a memristor array, and the conductance value of the memristor array is determined based on the discrete Fourier transform operator;

[0015] The first discrete Fourier transform matrix subunit is used to map the real part of the discrete Fourier transform operator; the second discrete Fourier transform matrix subunit is used to map the imaginary part of the discrete Fourier transform operator.

[0016] Optionally, the real data output unit is specifically used for:

[0017] The real part of the voltage pulse signal corresponding to each one-dimensional data group is input into the first discrete Fourier transform matrix sub-unit, and the first real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0018] The negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group is input into the second discrete Fourier transform matrix sub-unit, and the second real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0019] The first real part data and the second real part data of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part data of the current pulse signal corresponding to each one-dimensional data group.

[0020] Optionally, the imaginary part data output unit is specifically used for:

[0021] The real part of the voltage pulse signal corresponding to each of the one-dimensional data groups is input into the second discrete Fourier transform matrix sub-unit, and the first imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output.

[0022] The imaginary part of the voltage pulse signal corresponding to each of the one-dimensional data groups is input into the first discrete Fourier transform matrix sub-unit, and the second imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output.

[0023] The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0024] Optionally, for any one of the first and second discrete Fourier transform matrix sub-units, the discrete Fourier transform matrix sub-unit is used for:

[0025] The partial data of the voltage pulse signal corresponding to each one-dimensional data group and the negative value of the partial data of each voltage pulse signal are input to the memristor array, so that the partial data of each voltage pulse signal and the negative value of the partial data of each voltage pulse signal are weighted and summed with the conductance value of the corresponding memristor in the memristor array to obtain the partial data of the current pulse signal corresponding to each one-dimensional data group output by the memristor array; the partial data includes real data or imaginary data.

[0026] Secondly, this application provides a computation method applied to any of the aforementioned Fourier transform in-memory computation systems, comprising:

[0027] In the current iterative operation, the N-dimensional input data is divided into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data, and a corresponding voltage pulse signal is output according to each one-dimensional data group; the N-dimensional input data is the original N-dimensional data input in the first iterative operation, or the N-dimensional recombined data output by the post-processing module in the first N-1 iterative operations.

[0028] Using the discrete Fourier transform operator, based on the voltage pulse signal corresponding to each of the one-dimensional data groups, the current pulse signal corresponding to each of the one-dimensional data groups is output;

[0029] Each group of current pulse signals is converted into a corresponding one-dimensional transformed data group, and each one-dimensional transformed data group is recombined according to the split dimension to obtain the N-dimensional recombined data of the current iteration operation; the N-dimensional recombined data obtained when the current iteration operation is the Nth iteration operation is used as the N-dimensional Fourier transform result of the original N-dimensional data, and the N-dimensional Fourier transform result is output.

[0030] Optionally, the step of using the discrete Fourier transform operator to output a current pulse signal corresponding to each of the one-dimensional data groups based on the voltage pulse signal corresponding to each one-dimensional data group includes:

[0031] Based on the voltage pulse signal corresponding to each of the one-dimensional data groups, output the real part data of the current pulse signal corresponding to each of the one-dimensional data groups;

[0032] Based on the voltage pulse signal corresponding to each of the one-dimensional data groups, output the imaginary part data of the current pulse signal corresponding to each of the one-dimensional data groups;

[0033] Based on the real and imaginary parts of the current pulse signal corresponding to each one-dimensional data group, the current pulse signal corresponding to each one-dimensional data group is output.

[0034] Optionally, the step of outputting the real part of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group includes:

[0035] Based on the real part data of the voltage pulse signal corresponding to each of the one-dimensional data groups, output the first real part data of the current pulse signal corresponding to each of the one-dimensional data groups;

[0036] Based on the negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, the second real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0037] The first real part data and the second real part data of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part data of the current pulse signal corresponding to each one-dimensional data group.

[0038] Optionally, the step of outputting the imaginary part of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group includes:

[0039] Based on the real part of the voltage pulse signal corresponding to each of the one-dimensional data groups, the first imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output.

[0040] Based on the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, the second imaginary part of the current pulse signal corresponding to each one-dimensional data group is output.

[0041] The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0042] Overall, the technical solutions conceived in this application have the following beneficial effects compared with the prior art:

[0043] This application provides a Fourier transform in-memory computation system and method. The computation system includes a preprocessing module, a computation module, and a post-processing module. In each iteration, the preprocessing module splits the N-dimensional input data into multiple one-dimensional data groups according to the corresponding splitting dimension. The N-dimensional input data includes the initial original N-dimensional data or the intermediate reconstructed data output by the post-processing module in the first N-1 iterations. A corresponding voltage pulse signal is output for each one-dimensional data group. The computation module further utilizes the discrete Fourier transform operator to process the voltage pulse signal corresponding to each one-dimensional data group. The first step is to output the corresponding current pulse signal. The second step is to convert each group of current pulse signals into a corresponding one-dimensional transformed data group and reassemble each one-dimensional transformed data group to obtain N-dimensional reassembled data. This process is repeated until the Nth iteration, at which point the N-dimensional Fourier transform result of the original N-dimensional data is output. By splitting the N-dimensional discrete Fourier transform into multiple one-dimensional discrete Fourier transforms, the computational complexity is greatly reduced. This can effectively improve the computational speed and efficiency of the in-memory computing system to implement Fourier transform while maintaining low power consumption. It can also efficiently implement Fourier transform operations for different data dimensions. Attached Figure Description

[0044] Figure 1 This is one of the structural schematic diagrams of the Fourier transform in-memory computing system provided in the embodiments of this application;

[0045] Figure 2 This is one of the schematic diagrams of the preprocessing module in the Fourier transform in-memory computing system provided in the embodiments of this application;

[0046] Figure 3 This is a schematic diagram of the structure of the arithmetic module in the Fourier transform in-memory arithmetic system provided in the embodiments of this application;

[0047] Figure 4 This is a schematic diagram of the structure of the real part data output unit of the current pulse signal in the arithmetic module provided in the embodiment of this application;

[0048] Figure 5 This is a schematic diagram of the structure of the DFT matrix sub-unit in the computing module provided in the embodiments of this application;

[0049] Figure 6 This is a schematic diagram of the structure of the imaginary part data output unit of the current pulse signal in the arithmetic module provided in the embodiment of this application;

[0050] Figure 7 This is the second schematic diagram of the Fourier transform in-memory computing system provided in the embodiments of this application;

[0051] Figure 8 This is the second schematic diagram of the processing flow of the preprocessing module in the Fourier transform in-memory computing system provided in the embodiments of this application;

[0052] Figure 9 This is a schematic diagram of the processing flow of the post-processing module in the Fourier transform in-memory computing system provided in the embodiments of this application;

[0053] Figure 10 This is a flowchart illustrating the operation method of the Fourier transform in-memory operation system provided in the embodiments of this application. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0055] The terms "first" and "second," etc., used in the specification and claims herein are used to distinguish different objects, not to describe a specific order of objects. For example, "first discrete Fourier transform matrix subunit" and "second discrete Fourier transform matrix subunit," etc., are used to distinguish different discrete Fourier transform matrix subunits, not to describe a specific order of discrete Fourier transform matrix subunits.

[0056] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0057] The embodiments of this application are described below with reference to the accompanying drawings.

[0058] Figure 1 This is one of the structural schematic diagrams of the Fourier transform in-memory computing system provided in the embodiments of this application, such as... Figure 1 As shown, the system specifically includes: a preprocessing module 110, a calculation module 120, and a postprocessing module 130.

[0059] The preprocessing module 110 is used to split the N-dimensional input data into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data in the current iteration operation, and output the corresponding voltage pulse signal according to each one-dimensional data group; the N-dimensional input data includes the original N-dimensional data input in the first iteration operation, or the N-dimensional recombined data output by the postprocessing module 130 in the first N-1 iteration operations.

[0060] The calculation module 120 is used to output the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group output by the preprocessing module 110 using the Discrete Fourier Transform (DFT) operator.

[0061] The post-processing module 130 is used to convert each current pulse signal output by the arithmetic module 120 into a corresponding one-dimensional transformation data group, and to reassemble each one-dimensional transformation data group according to the split dimension to obtain the N-dimensional reassembled data of the current iteration operation; the N-dimensional reassembled data obtained when the current iteration operation is the Nth iteration operation is used as the N-dimensional Fourier transform result of the original N-dimensional data, and the N-dimensional Fourier transform result is output.

[0062] Specifically, the original N-dimensional data described in the embodiments of this application refers to the N-dimensional data to be subjected to Fourier transform processing. For example, in the case of three-dimensional data, the original N-dimensional data can be the original three-dimensional image data. It should be noted that N is a positive integer.

[0063] The N-dimensional reconstructed data described in this application refers to N-dimensional data obtained by reconstructing the input data through a post-processing module after one iterative operation.

[0064] The N-dimensional input data described in the embodiments of this application includes the original N-dimensional data input in the first iteration operation, or the N-dimensional reconstructed data output by the post-processing module in the first N-1 iteration operations.

[0065] In other words, in the first iteration, the preprocessing module receives the original N-dimensional data as input; in the second iteration, it receives the reconstructed N-dimensional data output by the post-processing module from the first iteration; in the third iteration, it receives the reconstructed N-dimensional data output by the post-processing module from the second iteration; and so on, until the Nth iteration receives the reconstructed N-dimensional data output by the post-processing module from the (N-1)th iteration.

[0066] It should be noted that the input data undergoes one iteration of processing by sequentially passing through the preprocessing module, the calculation module, and the postprocessing module.

[0067] The splitting dimension described in this application refers to the dimension in the splitting direction when the preprocessing module splits N-dimensional input data. For example, for three-dimensional data, it can be divided into three dimensions in the x-axis, y-axis, and z-axis directions. Therefore, when splitting the three-dimensional data, it is possible to choose to split from the x-axis, y-axis, or z-axis direction.

[0068] The one-dimensional conversion data group described in this application embodiment is a one-dimensional data group obtained by the post-processing module through numerical mapping of each group of current pulse signals according to the mapping relationship between the input data signal and the voltage pulse signal.

[0069] In the embodiments of this application, after the original N-dimensional data is input into the system, in the first iteration calculation, the preprocessing module first receives and processes the original N-dimensional data. The preprocessing module splits the N-dimensional input data into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data.

[0070] like Figure 2 As shown, when the original N-dimensional data is a three-dimensional data of size 5×5×5, in the first iteration, the preprocessing module can first split the three-dimensional data from the x-axis direction, thereby obtaining 25 corresponding one-dimensional data groups of size 1*5.

[0071] Furthermore, the preprocessing module uses linear transformation to map the values ​​in each one-dimensional data set to a corresponding set of voltage pulse signals, and outputs the voltage pulse signal for each one-dimensional data set. These voltage pulses maintain a consistent pulse width, but their voltage magnitudes are linearly related to the input data values. Therefore, these voltage pulse signals are input in 25 time sequences. It can be understood that each voltage pulse signal in each set corresponds one-to-one with a value in each one-dimensional data set.

[0072] In the embodiments of this application, the computation module is pre-built with a non-volatile memory and mapped with a DFT operator. Thus, the computation module can perform DFT operation on the voltage pulse signal corresponding to each one-dimensional data group output by the preprocessing module. Combining the conductivity characteristics of the non-volatile memory, the voltage pulse signal corresponding to each one-dimensional data group can be converted into a corresponding current pulse signal, and the current pulse signal corresponding to each one-dimensional data group can be output to the post-processing module.

[0073] It should be noted that the length of each one-dimensional data group after the original N-dimensional input data is expanded is consistent with the length of each row of the DFT operator used, which makes it applicable to processing input data of various sizes and also helps to improve computational efficiency.

[0074] Furthermore, in the embodiments of this application, the post-processing module converts each group of current pulse signals into a corresponding one-dimensional conversion data group according to the aforementioned mapping relationship between the N-dimensional input data and the voltage pulse signal, and reassembles each one-dimensional conversion data group according to the aforementioned split dimension to obtain the N-dimensional reassembled data of the first iteration operation.

[0075] Next, in the embodiments of this application, the second iteration operation is performed, where the preprocessing module receives and processes the N-dimensional reconstructed data. The preprocessing module splits the N-dimensional reconstructed data into multiple one-dimensional data groups according to the splitting dimension corresponding to the input data. (Continue to refer to...) Figure 2 When the original N-dimensional data is a three-dimensional data of size 5×5×5, the preprocessing module can continue to split the N-dimensional recombined data from the dimension in the y-axis direction, thereby obtaining 25 corresponding one-dimensional data groups of size 1*5.

[0076] Furthermore, in the embodiments of this application, the preprocessing module, the calculation module, and the postprocessing module are processed according to the aforementioned first iterative calculation method, which will not be repeated here. Finally, the N-dimensional reconstructed data from the second iterative calculation can be obtained.

[0077] Next, in the embodiments of this application, the third iteration operation is performed. The preprocessing module receives and processes the N-dimensional reconstructed data output from the second iteration operation. The preprocessing module splits the N-dimensional reconstructed data into multiple one-dimensional data groups according to the splitting dimension corresponding to the input data. (Continue to refer to...) Figure 2 When the original N-dimensional data is a three-dimensional data of size 5×5×5, the preprocessing module can continue to split the N-dimensional recombined data from the z-axis direction, thus obtaining 25 corresponding one-dimensional data groups of size 1*5.

[0078] Furthermore, in the embodiments of this application, the preprocessing module, the calculation module, and the postprocessing module are processed according to the aforementioned first iterative calculation method, which will not be repeated here. Finally, the N-dimensional reconstructed data of the third iterative calculation can be obtained. If the original N-dimensional data is three-dimensional data, the N-dimensional reconstructed data output by the third iterative calculation is the Fourier transform result of the original three-dimensional data.

[0079] If the original N-dimensional data is higher-dimensional data, the system will continue to calculate in the above iterative operation method until the final Nth iteration operation is performed to obtain the N-dimensional recombined data of the Nth iteration operation. The N-dimensional recombined data will be used as the N-dimensional Fourier transform result of the original N-dimensional data and the N-dimensional Fourier transform result will be output.

[0080] The Fourier Transform in-memory computation system of this application includes a preprocessing module, a computation module, and a post-processing module. In each iteration, the preprocessing module splits the N-dimensional input data into multiple one-dimensional data groups according to the corresponding splitting dimension. The N-dimensional input data includes the initial original N-dimensional data or the intermediate reconstructed data output by the post-processing module in the first N-1 iterations. A corresponding voltage pulse signal is output for each one-dimensional data group. The computation module further utilizes the DFT operator to perform signal processing on the voltage pulse signal corresponding to each one-dimensional data group. The system outputs the corresponding current pulse signal. The post-processing module converts each group of current pulse signals into a corresponding one-dimensional transformed data group and reassembles each one-dimensional transformed data group to obtain N-dimensional reassembled data. This process continues until the final Nth iteration, outputting the N-dimensional Fourier transform result of the original N-dimensional data. By splitting the N-dimensional DFT into multiple one-dimensional DFTs, the computational complexity is greatly reduced. While maintaining low power consumption, the system can effectively improve the computational speed and efficiency of the Fourier transform in the in-memory computing system. It can also efficiently perform Fourier transform operations on different data dimensions.

[0081] Figure 3 This is a schematic diagram of the structure of the arithmetic module in the Fourier transform in-memory arithmetic system provided in the embodiments of this application, as shown below. Figure 3As shown, the arithmetic module 120 includes a signal output unit 1201, a real part data output unit 1202 for current pulse signals, and an imaginary part data output unit 1203;

[0082] The real part data output unit 1202 is used to output the real part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group.

[0083] The imaginary data output unit 1203 is used to output the imaginary part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group.

[0084] The signal output unit 1201 is used to output the current pulse signal corresponding to each one-dimensional data group based on the real part data and the imaginary part data of the current pulse signal corresponding to each one-dimensional data group.

[0085] Specifically, in the embodiments of this application, the arithmetic module includes a signal output unit, a real part data output unit and an imaginary part data output unit for the current pulse signal. After the arithmetic module performs the arithmetic, the real part data output unit and the imaginary part data output unit for the current pulse signal will output the real part data and the imaginary part data respectively. The current corresponding to the same output result will be added separately to finally obtain the current pulse signal corresponding to each one-dimensional data group.

[0086] Based on the above embodiments, as an optional embodiment, both the real part data output unit and the imaginary part data output unit of the current pulse signal include a first DFT matrix subunit and a second DFT matrix subunit; both the first DFT matrix subunit and the second DFT matrix subunit are constructed based on a memristor array, and the conductance value of the memristor array is determined based on the DFT operator.

[0087] The first DFT matrix sub-unit is used to map the real part of the DFT operator; the second DFT matrix sub-unit is used to map the imaginary part of the DFT operator.

[0088] Specifically, the first DFT matrix sub-unit described in the embodiments of this application includes a DFT matrix composed of a memristor array, used to map the real part terms of the DFT operator.

[0089] The second DFT matrix subunit described in the embodiments of this application also includes a DFT matrix composed of a memristor array, used to map the imaginary part terms of the DFT operator.

[0090] In the embodiments of this application, a memristor is introduced during the N-dimensional DFT operation. Memristors possess advantages such as small area, low power consumption, high speed, and compatibility with CMOS processes, making them a leading candidate for improving computational performance. Furthermore, memristors exhibit multi-order conductance characteristics, allowing the storage of frequently used fundamental data matrices using their conductance values. This facilitates matrix multiplication calculations using Ohm's law and Kirchhoff's laws, converting the output voltage pulse signal into output current data.

[0091] It should be noted that the DFT operator contains real and imaginary terms. Since a memristor device can only represent one value at a time, and a memristor array can only map one numerical matrix, the real and imaginary DFT operators need to be mapped to different DFT matrices respectively.

[0092] It should also be noted that, in the embodiments of this application, the memristor array can adopt a 1T1R memristor array structure or a 1S1R memristor array structure.

[0093] In the embodiments of this application, both the real part data output unit and the imaginary part data output unit of the current pulse signal include a first DFT matrix subunit and a second DFT matrix subunit. Specifically, the first DFT matrix subunit and the second DFT matrix subunit are constructed by splitting the DFT operator into real part terms and imaginary part terms, and then mapping them respectively in a memristor array. The input voltage pulses of the real part and the imaginary part are respectively sent to the DFT matrix subunits mapped to the real part and the imaginary part of the DFT operator.

[0094] In one specific embodiment of this application, the original N-dimensional data is three-dimensional data of size 5*5*5, and the size of the memristor array is 10*5, that is, the size of the DFT matrix set in the DFT matrix sub-unit is 10*5.

[0095] The computing system of this application uses memristors to construct computing modules, performs parallel processing by using multiple memristor arrays, and implements current addition using a simple module structure, reducing the multiple data transmission processes in the traditional N-dimensional Fourier transform. This approach achieves low-power, low-latency N-dimensional Fourier transform operations.

[0096] In the embodiments of this application, the DFT operator is split into a real part and a complex part, which are then mapped onto memristor arrays respectively. The real and imaginary parts of the input voltage pulse signal are respectively fed into DFT matrix sub-units, which map the DFT matrices of the real and imaginary parts of the DFT operator. Each DFT matrix consists of a memristor array. Since the calculation of the real and imaginary parts of the voltage pulse signal requires the first and second DFT matrix sub-units respectively, a total of four memristor arrays are required.

[0097] Since multiplying two real numbers results in a positive real number, multiplying a real number by an imaginary number results in a positive imaginary number, and multiplying two imaginary numbers results in a negative real number, the current corresponding to the output representing positive and negative real numbers is added, and the current corresponding to different positive imaginary numbers is added, resulting in the complex input voltage pulse signal being transformed by the complex DFT operator.

[0098] Furthermore, in the embodiments of this application, the real part data output unit of the current pulse signal is used to perform calculations and conversions based on the real part of the voltage pulse signal corresponding to each one-dimensional data group, and finally output the real part data of the current pulse signal corresponding to each one-dimensional data group.

[0099] Figure 4 This is a schematic diagram of the structure of the real part data output unit of the current pulse signal in the arithmetic module provided in the embodiments of this application, as shown below. Figure 4 As shown, the real part data output unit 1202 includes a first DFT matrix subunit 1204 and a second DFT matrix subunit 1205. The real part data output unit 1202 is specifically used for:

[0100] The real part of the voltage pulse signal corresponding to each one-dimensional data group is input into the first DFT matrix sub-unit 1204, and the first real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0101] The negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group is input into the second DFT matrix sub-unit 1205, and the second real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0102] The first and second real parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part of the current pulse signal corresponding to each one-dimensional data group.

[0103] Specifically, the first real data described in the embodiments of this application refers to the real data item of the current pulse signal obtained after the real data of the voltage pulse signal corresponding to each one-dimensional data group is input into the first DFT matrix sub-unit and processed by the memristor array in the DFT matrix sub-unit.

[0104] The second real data described in the embodiments of this application refers to the negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, which is input to the second DFT matrix sub-unit and processed by the memristor array in the DFT matrix sub-unit to obtain a partial real data item of the current pulse signal.

[0105] Based on the above embodiments, as an optional embodiment, for any one of the first and second DFT matrix sub-units, the DFT matrix sub-unit is used for:

[0106] The partial data of the voltage pulse signal corresponding to each one-dimensional data group and the negative value of the partial data of each voltage pulse signal are input to the memristor array. The partial data of each voltage pulse signal and the negative value of the partial data of each voltage pulse signal are weighted and summed with the conductance value of the corresponding memristor in the memristor array to obtain the partial data of the current pulse signal corresponding to each one-dimensional data group output by the memristor array. The partial data includes real data or imaginary data.

[0107] Specifically, the partial data described in the embodiments of this application refers to the data items in the mathematical expression of the voltage pulse signal corresponding to the one-dimensional data group, which may specifically include the real part data V of the voltage pulse signal. real or imaginary part data V imag .

[0108] It should be noted that, in the embodiments of this application, the size of the memristor array is equal to twice the size of the DFT operator used, with half of the DFT matrix inputting positive voltage pulse signals and the other half inputting negative voltage pulse signals. The conductance value of the memristor array is set according to the size of the DFT operator, and there is a linear mapping relationship between the two. It can be set according to actual application requirements, and this application does not impose specific limitations on it.

[0109] In addition, the conductance values ​​of each memristor device in half of the input negative voltage pulse matrix are set to the midpoint between the maximum and minimum conductance values, thereby realizing the mapping of Fourier operators that include both positive and negative numbers.

[0110] In the embodiments of this application, after obtaining the voltage pulse signal corresponding to each one-dimensional data group, the partial data of the voltage pulse signal corresponding to each one-dimensional data group and the negative value of the partial data of each voltage pulse signal are input into the memristor array. By weighted summing the conductance value G of each memristor in the memristor array based on the DFT operator mapping, the partial data of each voltage pulse signal and the negative value of the partial data of each voltage pulse signal, and the conductance value of the corresponding memristor in the memristor array, the partial data of the current pulse signal corresponding to each one-dimensional data group can be obtained.

[0111] For example, the real part of the voltage pulse signal corresponding to each one-dimensional data group and the negative number of the real part of each voltage pulse signal are input into the memristor array, i.e., the first DFT matrix sub-unit, which has a mapping relationship with the real part of the DFT operator. Then, the real part of each voltage pulse signal and the negative number of the real part of each voltage pulse signal are weighted and summed with the conductance value of the corresponding memristor in the memristor array to obtain the first real part of the corresponding current pulse signal.

[0112] Figure 5 This is a schematic diagram of the structure of the DFT matrix sub-unit in the computing module provided in the embodiments of this application, as shown below. Figure 5 As shown in the embodiment of this application, the size of the DFT matrix set in the DFT matrix sub-unit is 10*5, that is, the size of the memristor array in the DFT matrix is ​​also 10*5. Each time, five positive voltage pulses and five corresponding negative voltage pulses are input simultaneously, corresponding to the ten rows of the memristor array respectively. After the voltage passes through the memristor array, five columns of current are generated, which correspond to the output result of the matrix multiplication of the one-dimensional data group vector.

[0113] Specifically, assuming the conductance values ​​of each memristor are G 11 G 12 ... G 55 G′ 11 G′ 12 ..., G′ 55 The partial data V of the voltage pulse signal corresponding to the one-dimensional data set. i (where i = 1, 2, ..., 5) and the corresponding negative signals -V i The data are input into the DFT matrix and weighted and summed with the conductance values ​​of the corresponding memristors in its internal memristor array to obtain the distributed data I of the five columns of corresponding current pulse signals. m ,Right now:

[0114]

[0115] Where m = 1, 2, ..., 5.

[0116] The computing system of this application embodiment constructs DFT matrix sub-units by introducing a memristor array structure. By using newly added memristor devices with smaller areas, it is designed that half of the memristor array processes positive voltage pulse signals and the other half processes negative voltage pulse signals, thereby realizing the processing of negative values ​​of the DFT operator and ensuring the effectiveness and reliability of DFT in-memory operations.

[0117] Furthermore, in an embodiment of this application, the real data output unit inputs the real data of the voltage pulse signal corresponding to each one-dimensional data group to the first DFT matrix subunit. After the above-mentioned processing by the memristor array in the first DFT matrix subunit, the real data V of the voltage pulse signal corresponding to each one-dimensional data group is obtained. real and its corresponding negative signal -V real It can be compared with the conductance value G of the corresponding memristor. real Perform a weighted summation and output the first real part I of the current pulse signal corresponding to each one-dimensional data group. real1 .

[0118] Similarly, this real data output unit outputs the negative value -V of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group. imag Input to the second DFT matrix sub-cell, the negative value of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, -V imag and its corresponding negative signal V imag With respect to the conductance G of the memristor imag By performing a weighted summation, the second real part of the current pulse signal corresponding to each one-dimensional data group can be output as -I. real2 Furthermore, for each one-dimensional data set, the first real part of the current pulse signal I... real1 Second real part data - I real2 The data is superimposed to output the real part I of the current pulse signal corresponding to each one-dimensional data group. real =I real1 -I real2 .

[0119] The computing system of this application embodiment utilizes two different DFT matrix sub-units to process the real and imaginary data of the voltage pulse signal corresponding to each one-dimensional data group, respectively. This block-based implementation of real matrix multiplication in DFT operations reduces the complexity of the computing circuit and improves the parallelism of the operation, further enhancing the effectiveness and reliability of DFT in-memory operations.

[0120] Furthermore, in the embodiments of this application, the imaginary part data output unit performs calculations and conversions based on the voltage pulse signal corresponding to each one-dimensional data group, and finally outputs the imaginary part data of the current pulse signal corresponding to each one-dimensional data group.

[0121] Figure 6 This is a schematic diagram of the structure of the imaginary part data output unit of the current pulse signal in the arithmetic module provided in the embodiments of this application, as shown below. Figure 6 As shown, the imaginary data output unit 1203 includes a first DFT matrix subunit 1204 and a second DFT matrix subunit 1205. The imaginary data output unit 1203 is specifically used for:

[0122] The real part of the voltage pulse signal corresponding to each one-dimensional data group is input into the second DFT matrix sub-unit 1205, and the first imaginary part of the current pulse signal corresponding to each one-dimensional data group is output.

[0123] The imaginary part of the voltage pulse signal corresponding to each one-dimensional data group is input into the first DFT matrix sub-unit 1204, and the second imaginary part of the current pulse signal corresponding to each one-dimensional data group is output.

[0124] The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0125] Specifically, the first imaginary data described in the embodiments of this application refers to the imaginary data of the voltage pulse signal corresponding to each one-dimensional data group, which is input to the second DFT matrix sub-unit and processed by the memristor array in the DFT matrix sub-unit to obtain a partial imaginary data item of the current pulse signal.

[0126] The second imaginary data described in this application embodiment refers to the imaginary data of the voltage pulse signal corresponding to each one-dimensional data group, which is input to the first DFT matrix sub-unit and processed by the memristor array in the DFT matrix sub-unit to obtain a partial imaginary data item of the current pulse signal.

[0127] In the embodiments of this application, based on the processing principle of the memristor array in the aforementioned DFT matrix subunit, the imaginary data output unit inputs the real part data of the voltage pulse signal corresponding to each one-dimensional data group to the second DFT matrix subunit. After processing by the memristor array therein, the real part data V of the voltage pulse signal corresponding to each one-dimensional data group is obtained. real and its corresponding negative signal -V real It can be compared with the conductance value G of the corresponding memristor. imag Perform a weighted summation and output the first imaginary part I of the current pulse signal corresponding to each one-dimensional data group. imag1 .

[0128] Similarly, the imaginary data output unit also inputs the imaginary data of the voltage pulse signal corresponding to each one-dimensional data group to the first DFT matrix subunit. After processing by the memristor array therein, the imaginary data V of the voltage pulse signal corresponding to each one-dimensional data group is obtained. imag and its corresponding negative signal -V imag It can be compared with the conductance value G of the corresponding memristor. real Perform a weighted summation and output the second imaginary part I of the current pulse signal corresponding to each one-dimensional data group. imag2Furthermore, the first imaginary part I of the current pulse signal corresponding to each one-dimensional data group is... imag1 Second imaginary part data I imag2 The data is superimposed to output the imaginary part I of the current pulse signal corresponding to each one-dimensional data group. imag =I imag1 +I imag2 .

[0129] The computing system of this application embodiment utilizes two different DFT matrix sub-units to process the real and imaginary data of the voltage pulse signal corresponding to each one-dimensional data group, respectively. This block-based implementation of the imaginary matrix multiplication operation in DFT operation reduces the complexity of the computing circuit and improves the parallelism of the operation, further enhancing the effectiveness and reliability of DFT in-memory operation.

[0130] Furthermore, in the embodiments of this application, after obtaining the real part data and imaginary part data of the current pulse signal corresponding to each one-dimensional data group, the signal output unit will generate the corresponding current pulse signal based on the real part data and imaginary part data of the current pulse signal corresponding to each one-dimensional data group, and output the current pulse signal corresponding to each one-dimensional data group.

[0131] The computing system of this application splits the N-dimensional DFT operation into two parts: a real part and a descriptive part. The output data after processing by the computing module includes a real part and an imaginary part. Current pulse signals corresponding to the same output result will be added separately. The DFT matrix multiplication operation of complex pulse signal data is realized in blocks, which improves the parallelism and computing efficiency of DFT in-memory operation.

[0132] Figure 7 This is the second schematic diagram of the Fourier transform in-memory computing system provided in the embodiments of this application, as shown below. Figure 7As shown in the embodiments of this application, taking the DFT operation of three-dimensional data as an example, it includes three preprocessing processes, three DFT operation processes, and three post-processing processes. The input is a raw 5×5×5 dimensional data set, which is processed by the preprocessing module to obtain 25 5×1 dimensional one-dimensional data groups. Each one-dimensional data group constitutes a vector, thus forming a one-dimensional vector group. These vectors are then mapped to voltage pulse signals of corresponding sizes and used as input to the operation module. The operation module includes a DFT matrix sub-unit containing four 10×5 dimensional DFT matrices. After these input voltage pulse signals pass through the DFT matrix sub-units constructed from memristor arrays in the operation module, corresponding current pulse signals are output. The output current pulse signals are then input to the post-processing module for post-processing. Based on the mapping relationship between the input signal and the input voltage pulses, the output current pulse signals are converted into the corresponding one-dimensional vectors and then restored to a 5×5×5 dimensional reconstructed data set.

[0133] The first two outputs of 3D reconstructed data are intermediate data matrices, which need to be input again into the preprocessing module for preprocessing. The third output of 3D reconstructed data is the frequency domain 3D output data corresponding to the original 3D data in the time domain, which is the 3D DFT result.

[0134] In this embodiment, the N-dimensional DFT is split into multiple one-dimensional DFTs, which greatly reduces the computational complexity. At the same time, the proposed splitting and mapping method is applicable to DFT operations of different dimensions and has universality.

[0135] Figure 8 This is the second schematic diagram of the preprocessing module in the Fourier transform in-memory computing system provided in this application embodiment, as shown below. Figure 8As shown in the embodiment of this application, the preprocessing module splits the input 5×5×5 original three-dimensional data into 25 5×1 one-dimensional data groups. The corresponding labels of each one-dimensional data group are {[(1,1),(1,2),(1,3),(1,4),(1,5)],[(2,1),(2,2),(2,3),(2,4),(2,5)],…,[(25,1),(25,2),(25,3),(25,4),(25,5)]}. Then, through linear transformation, the values ​​in each one-dimensional data group are mapped to voltage pulse signals of corresponding sizes to obtain 25 sets of voltage pulse signals. Each set of voltage pulse signals consists of 5 voltage pulse signals, and these 25 sets of voltage pulse signals are output to the arithmetic module for processing. Here, the labels corresponding to the 25 groups of voltage pulse signals are {[Vin(1,1),Vin(1,2),Vin(1,3),Vin(1,4),Vin(1,5)],…,[Vin(25,1),Vin(25,2),Vin(25,3),Vin(25,4),Vin(25,5)]}, where Vin(1,1),Vin(1,2),Vin(1,3),Vin(1,4),Vin(1,5) represent the 5 voltage pulse signals in the first group of voltage pulse signals.

[0136] Figure 9 This is a schematic diagram of the processing flow of the post-processing module in the Fourier transform in-memory computing system provided in the embodiments of this application, as shown below. Figure 9 As shown in the embodiment of this application, the post-processing module processes 25 groups of current pulse signals output by the arithmetic module, wherein the labels corresponding to the 25 groups of current pulse signals are {[Iout(1,1),Iout(1,2),Iout(1,3),Iout(1,4),Iout(1,5)],…,[Iout(25,1),Iout(25,2),Iout(25,3),Iout(25,4),Iout(25,5)]}; through linear... The 25 sets of current pulse signals are then converted into one-dimensional data sets of corresponding sizes, with corresponding labels {[(1,1),(1,2),(1,3),(1,4),(1,5)],[(2,1),(2,2),(2,3),(2,4),(2,5)],…,[(25,1),(25,2),(25,3),(25,4),(25,5)]}. These data are then reverse-recombined according to the split dimensions to output a 5×5×5 three-dimensional recombined data set.

[0137] The following describes the operation method of the Fourier transform in-memory arithmetic system provided by the present invention. The operation method of the Fourier transform in-memory arithmetic system described below can be referred to in correspondence with the Fourier transform in-memory arithmetic system described above.

[0138] Figure 10 This is a flowchart illustrating the operation method of the Fourier transform in-memory arithmetic system provided in this application embodiment. This method can be applied to any of the aforementioned Fourier transform in-memory arithmetic systems, such as... Figure 10 As shown, the method includes steps 1010, 1020 and 1030.

[0139] In step 1010, in the current iteration, the N-dimensional input data is divided into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data, and a corresponding voltage pulse signal is output according to each one-dimensional data group; wherein, the N-dimensional input data in the first iteration is the original N-dimensional data to be processed; in other iterations besides the first iteration, the N-dimensional input data is the N-dimensional reconstructed data output by the post-processing module;

[0140] Step 1020: Using the DFT operator, output the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group.

[0141] Step 1030: Convert each group of current pulse signals into a corresponding one-dimensional transformation data group, and reassemble each one-dimensional transformation data group according to the split dimension to obtain the N-dimensional reassembled data of the current iteration operation; take the N-dimensional reassembled data obtained when the current iteration operation is the Nth iteration operation as the N-dimensional Fourier transform result of the original N-dimensional data, and output the N-dimensional Fourier transform result.

[0142] It should be understood that the method in the above embodiments is applied to the aforementioned Fourier transform in-memory operation system, and its implementation principle and technical effect are similar to those described in the above system. The detailed process of this method can be referred to the corresponding description process in the above system, and will not be repeated here.

[0143] The computation method of the Fourier transform in-memory computation system in this application embodiment involves a preprocessing module that, in each iteration, splits the N-dimensional input data into multiple one-dimensional data groups according to the corresponding splitting dimension. The N-dimensional input data includes the initial original N-dimensional data or the intermediate reconstructed data output by the post-processing module in the first N-1 iterations. A corresponding voltage pulse signal is output for each one-dimensional data group. The computation module further utilizes the DFT operator to process the voltage pulse signal corresponding to each one-dimensional data group, outputting a corresponding current pulse signal. The post-processing module converts each current pulse signal into a corresponding one-dimensional transformed data group and reconstructs each one-dimensional transformed data group to obtain N-dimensional reconstructed data. This process continues until the final Nth iteration, outputting the N-dimensional Fourier transform result of the original N-dimensional data. By splitting the N-dimensional DFT into multiple one-dimensional DFTs, the computational complexity is greatly reduced. While maintaining low power consumption, the computational speed and efficiency of the in-memory computation system for Fourier transform are effectively improved. Furthermore, it can efficiently perform Fourier transform operations on different data dimensions.

[0144] Based on the above embodiments, as an optional embodiment, step 1020, using the DFT operator, outputs a current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group, including:

[0145] Based on the voltage pulse signal corresponding to each one-dimensional data group, output the real part of the current pulse signal corresponding to each one-dimensional data group;

[0146] Based on the voltage pulse signal corresponding to each one-dimensional data group, output the imaginary part data of the current pulse signal corresponding to each one-dimensional data group;

[0147] Based on the real and imaginary parts of the current pulse signal corresponding to each one-dimensional data group, the current pulse signal corresponding to each one-dimensional data group is output.

[0148] Based on the above embodiments, as an optional embodiment, based on the voltage pulse signal corresponding to each one-dimensional data group, the real part data of the current pulse signal corresponding to each one-dimensional data group is output, including:

[0149] Based on the real part of the voltage pulse signal corresponding to each one-dimensional data group, output the first real part of the current pulse signal corresponding to each one-dimensional data group.

[0150] Based on the negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, the second real part of the current pulse signal corresponding to each one-dimensional data group is output.

[0151] The first and second real parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part of the current pulse signal corresponding to each one-dimensional data group.

[0152] Based on the above embodiments, as an optional embodiment, based on the voltage pulse signal corresponding to each one-dimensional data group, the imaginary part data of the current pulse signal corresponding to each one-dimensional data group is output, including:

[0153] Based on the real part of the voltage pulse signal corresponding to each one-dimensional data group, output the first imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0154] Based on the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, output the second imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0155] The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

[0156] It should be understood that expressions such as “comprising” and “may include” used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as “comprising” and / or “having” are to be interpreted as indicating a particular characteristic, number, operation, constituent element, component, or combination thereof, but not to exclude the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0157] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A Fourier transform in-memory arithmetic system, characterized in that, include: The preprocessing module is used to split the N-dimensional input data into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data in the current iteration operation, and output a corresponding voltage pulse signal according to each one-dimensional data group; the N-dimensional input data includes the original N-dimensional data input in the first iteration operation, or the N-dimensional recombined data output by the post-processing module in the first N-1 iteration operations; The arithmetic module is used to output the current pulse signal corresponding to each of the one-dimensional data groups based on the voltage pulse signal corresponding to each of the one-dimensional data groups using the discrete Fourier transform operator. The post-processing module is used to convert each group of current pulse signals into a corresponding one-dimensional transformed data group, and to reassemble each one-dimensional transformed data group according to the split dimension to obtain the N-dimensional reassembled data of the current iteration operation; the N-dimensional reassembled data obtained when the current iteration operation is the Nth iteration operation is used as the N-dimensional Fourier transform result of the original N-dimensional data, and the N-dimensional Fourier transform result is output. The computing module includes a signal output unit, a real part data output unit for the current pulse signal, and an imaginary part data output unit. The real part data output unit is used to output the real part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group. The imaginary part data output unit is used to output the imaginary part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group. The signal output unit is used to output the current pulse signal corresponding to each one-dimensional data group based on the real part data and the imaginary part data of the current pulse signal corresponding to each one-dimensional data group. Both the real part data output unit and the imaginary part data output unit include a first discrete Fourier transform matrix subunit and a second discrete Fourier transform matrix subunit; both the first discrete Fourier transform matrix subunit and the second discrete Fourier transform matrix subunit are constructed based on a memristor array, and the conductance value of the memristor array is determined based on the discrete Fourier transform operator. The first discrete Fourier transform matrix subunit is used to map the real part of the discrete Fourier transform operator; the second discrete Fourier transform matrix subunit is used to map the imaginary part of the discrete Fourier transform operator.

2. The Fourier transform in-memory arithmetic system according to claim 1, characterized in that, The real data output unit is specifically used for: The real part of the voltage pulse signal corresponding to each one-dimensional data group is input into the first discrete Fourier transform matrix sub-unit, and the first real part of the current pulse signal corresponding to each one-dimensional data group is output. The negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group is input into the second discrete Fourier transform matrix sub-unit, and the second real part of the current pulse signal corresponding to each one-dimensional data group is output. The first real part data and the second real part data of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part data of the current pulse signal corresponding to each one-dimensional data group.

3. The Fourier transform in-memory arithmetic system according to claim 1, characterized in that, The imaginary part data output unit is specifically used for: The real part of the voltage pulse signal corresponding to each of the one-dimensional data groups is input into the second discrete Fourier transform matrix sub-unit, and the first imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output. The imaginary part of the voltage pulse signal corresponding to each of the one-dimensional data groups is input into the first discrete Fourier transform matrix sub-unit, and the second imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output. The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

4. The Fourier transform in-memory arithmetic system according to any one of claims 1-3, characterized in that, For any one of the first and second discrete Fourier transform matrix sub-units, the discrete Fourier transform matrix sub-unit is used for: The partial data of the voltage pulse signal corresponding to each one-dimensional data group and the negative value of the partial data of each voltage pulse signal are input to the memristor array, so that the partial data of each voltage pulse signal and the negative value of the partial data of each voltage pulse signal are weighted and summed with the conductance value of the corresponding memristor in the memristor array to obtain the partial data of the current pulse signal corresponding to each one-dimensional data group output by the memristor array; the partial data includes real data or imaginary data.

5. A computational method applied to the Fourier transform in-memory computation system as described in any one of claims 1-4, characterized in that, include: In the current iterative operation, the N-dimensional input data is divided into multiple one-dimensional data groups according to the splitting dimension corresponding to the N-dimensional input data, and a corresponding voltage pulse signal is output according to each one-dimensional data group; the N-dimensional input data is the original N-dimensional data input in the first iterative operation, or the N-dimensional recombined data output by the post-processing module in the first N-1 iterative operations. Using the discrete Fourier transform operator, based on the voltage pulse signal corresponding to each of the one-dimensional data groups, the current pulse signal corresponding to each of the one-dimensional data groups is output; Each group of current pulse signals is converted into a corresponding one-dimensional transformed data group, and each one-dimensional transformed data group is recombined according to the split dimension to obtain the N-dimensional recombined data of the current iteration operation; the N-dimensional recombined data obtained when the current iteration operation is the Nth iteration operation is used as the N-dimensional Fourier transform result of the original N-dimensional data, and the N-dimensional Fourier transform result is output. The computation module includes a signal output unit, a real part data output unit for the current pulse signal, and an imaginary part data output unit; the step of using the discrete Fourier transform operator to output the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group includes: The real part data output unit outputs the real part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group. The imaginary part data output unit outputs the imaginary part data of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group. The signal output unit outputs the current pulse signal corresponding to each one-dimensional data group based on the real part and imaginary part of the current pulse signal corresponding to each one-dimensional data group. The real part data output unit and the imaginary part data output unit each include a first discrete Fourier transform matrix subunit and a second discrete Fourier transform matrix subunit; the first discrete Fourier transform matrix subunit and the second discrete Fourier transform matrix subunit are both constructed based on a memristor array, and the conductance value of the memristor array is determined based on the discrete Fourier transform operator. The first discrete Fourier transform matrix subunit is used to map the real part of the discrete Fourier transform operator; the second discrete Fourier transform matrix subunit is used to map the imaginary part of the discrete Fourier transform operator.

6. The computation method of the Fourier transform in-memory computation system according to claim 5, characterized in that, The step of outputting the real part of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group includes: Based on the real part data of the voltage pulse signal corresponding to each of the one-dimensional data groups, output the first real part data of the current pulse signal corresponding to each of the one-dimensional data groups; Based on the negative number of the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, the second real part of the current pulse signal corresponding to each one-dimensional data group is output. The first real part data and the second real part data of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the real part data of the current pulse signal corresponding to each one-dimensional data group.

7. The computational method of the Fourier transform in-memory computation system according to claim 6, characterized in that, The step of outputting the imaginary part of the current pulse signal corresponding to each one-dimensional data group based on the voltage pulse signal corresponding to each one-dimensional data group includes: Based on the real part of the voltage pulse signal corresponding to each of the one-dimensional data groups, the first imaginary part of the current pulse signal corresponding to each of the one-dimensional data groups is output. Based on the imaginary part of the voltage pulse signal corresponding to each one-dimensional data group, the second imaginary part of the current pulse signal corresponding to each one-dimensional data group is output. The first and second imaginary parts of the current pulse signal corresponding to each one-dimensional data group are superimposed to output the imaginary part of the current pulse signal corresponding to each one-dimensional data group.

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