A real-time calibration method, device and system for time-interleaved sampling circuit

Abstract

The present application discloses a real-time calibration method, device and system for a time-interleaved sampling circuit. By judging whether an initial temperature value exceeds a first preset threshold value, a DC offset error value, a gain error value and a phase error value of each analog-to-digital converter are obtained, and then respectively judging whether the DC offset error value, the gain error value and the phase error value of each analog-to-digital converter are greater than a second preset threshold value; a first DC offset error control word, a first gain error control word and a first phase error control word of each analog-to-digital converter are determined, and a calibrated time-interleaved sampling circuit is obtained based on the first DC offset error control word, the first gain error control word and the first phase error control word of each analog-to-digital converter, so as to solve the problem of parameter changes introduced by process deviation and temperature deviation between devices, and ensure that the sampling circuit can maintain a high performance level within the full temperature operating range, and at the same time solve the problem of poor performance consistency of the sampling circuit after mass production.

Description

Technical Field

[0001] The present application relates to the field of integrated circuits, and in particular to a method, device and system for real-time calibration of a time-interleaved sampling circuit. Background Art

[0002] High-speed oscilloscopes are typical high-bandwidth signal acquisition and reception devices. Because the acquisition signal bandwidth is so large, a single acquisition chip or module is insufficient. Multiple signal acquisition modules are required to employ time-interleaved sampling technology to increase the sampling rate and analog signal bandwidth. This allows for acquisition of high-bandwidth signals. Using multiple signal acquisition modules requires synchronized sampling clocks and high analog input signal consistency.

[0003] The main causes of analog input signal consistency and clock phase deviation in time-interleaved sampling systems are: 1. Due to process limitations, performance parameters of different components vary after processing, leading to differences in gain, attenuation, phase, DC bias, and other characteristics of ADCs and analog components, as well as differences in resistor values. 2. Device performance parameters drift with temperature, and the amount of drift cannot be accurately predicted for all components. Therefore, the hardware of time-interleaved sampling systems has inherent defects in parameter variation, leading to significant performance differences between different products, or even within the same product under different temperature environments. Summary of the Invention

[0004] The main purpose of this application is to provide a real-time calibration method, device and system for a time-interleaved sampling circuit, aiming to solve the technical problem that the performance of the time-interleaved sampling system circuit varies greatly due to the inherent defect of parameter changes between different products or the same product under different temperature environments.

[0005] To achieve the above-mentioned objectives, the present application provides a real-time calibration method for a time-interleaved sampling circuit, comprising: obtaining an initial temperature value of a current environment of the time-interleaved sampling circuit and each time domain waveform of each analog-to-digital converter; determining whether the initial temperature value exceeds a first preset threshold; if it exceeds the first preset threshold, obtaining a DC offset error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time domain waveform of each analog-to-digital converter; respectively determining whether the DC offset error value, the gain error value, and the phase error value of each analog-to-digital converter are greater than a second preset threshold; if they are greater than the second preset threshold, updating a first DC offset error control word, a first gain error control word, and a first phase error control word obtained by each analog-to-digital converter based on the DC offset error value, the gain error value, and the phase error value, wherein the first DC offset error control word, the first gain error control word, and the first phase error control word are pre-stored in the initial calibration file; and adjusting each analog-to-digital converter based on the updated first DC offset error control word, the first gain error control word, and the first phase error control word of each analog-to-digital converter to obtain the calibrated time-interleaved sampling circuit.

[0006] Optionally, before obtaining the initial DC offset error control word, the initial gain error control word and the initial phase error control word, the time-interleaved sampling circuit real-time calibration method further includes: performing initial calibration on the time-interleaved sampling circuit to obtain an initial calibration file.

[0007] Optionally, the DC bias error value, gain error value and phase error value of each analog-to-digital converter are obtained based on each time domain waveform of each analog-to-digital converter, including: obtaining a first DC bias value, a first gain value and a first phase value based on the time domain waveform of one of the analog-to-digital converters; and obtaining a corresponding second DC bias value, a second gain value and a second phase value based on each time domain waveform of the other analog-to-digital converters; and determining the DC bias error value, gain error value and phase error value of each analog-to-digital converter based on the second DC bias value, the second gain value and the second phase value and the corresponding first DC bias value, the first gain value and the first phase value.

[0008] Optionally, the obtaining of a first DC bias value, a first gain value, and a first phase value based on the time domain waveform of one of the analog-to-digital converters; and obtaining a corresponding second DC bias value, a second gain value, and a second phase value based on the time domain waveforms of the other analog-to-digital converters, includes: using a three-parameter sine fitting algorithm to process the time domain waveform of one of the analog-to-digital converters to obtain the first DC bias value, the first gain value, and the first phase value; and using a three-parameter sine fitting algorithm to process the time domain waveforms of the other analog-to-digital converters to obtain the corresponding second DC bias value, the second gain value, and the second phase value.

[0009] Optionally, the updating of the first DC offset error control word, the first gain error control word, and the first phase error control word obtained by each analog-to-digital converter according to the DC offset error value, the gain error value, and the phase error value includes: obtaining an initial DC offset error control word, an initial gain error control word, and an initial phase error control word; and adjusting the offset error step value, the first gain error control word, and the corresponding gain error step value, and the first phase error control word and the corresponding phase step value, corresponding to each of the first DC offset error control words that are preset in descending order. The DC bias, gain, and phase of the converter are calculated to obtain an intermediate bias error value, an intermediate gain error value, and an intermediate phase error value; if the intermediate bias error value, the intermediate gain error value, and the intermediate phase error value are all less than the corresponding second preset threshold, the corresponding first DC bias error control word, the first gain error control word, and the first phase error control word are determined; and the initial DC bias error control word, the initial gain error control word, and the initial phase error control word are updated using the first DC bias error control word, the first gain error control word, and the first phase error control word.

[0010] Furthermore, to achieve the above-mentioned objectives, the present application further provides a real-time calibration device for a time-interleaved sampling circuit, comprising: a data acquisition module for acquiring an initial temperature value of a current environment of the time-interleaved sampling circuit and each time-domain waveform of each analog-to-digital converter; a first judgment module for determining whether the initial temperature value exceeds a first preset threshold; a first processing module for, if the value exceeds the first preset threshold, obtaining a DC offset error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time-domain waveform of each analog-to-digital converter; a second judgment module for respectively determining whether the DC offset error value, the gain error value, and the phase error value of each analog-to-digital converter are greater than a second preset threshold; a second processing module for, if the value exceeds the second preset threshold, determining a first DC offset error control word, a first gain error control word, and a first phase error control word for each analog-to-digital converter based on the DC offset error value, the gain error value, and the phase error value; and an output module for adjusting each analog-to-digital converter based on the first DC offset error control word, the first gain error control word, and the first phase error control word of each analog-to-digital converter to obtain the calibrated time-interleaved sampling circuit.

[0011] Optionally, the real-time calibration device for the time-interleaved sampling circuit further includes: a time-domain waveform display module, configured to display the time-domain waveforms collected from each of the digital-to-analog converters.

[0012] Optionally, the real-time calibration device for the time-interleaved sampling circuit further includes: a spectrum display module, configured to display the frequency domain waveform of each of the analog-to-digital converters.

[0013] In addition, to achieve the above-mentioned purpose, the present application also provides a real-time calibration system for a time-interleaved sampling circuit, which is characterized in that it includes: a calibration signal generating circuit, used to process a single-tone signal to obtain a calibration signal of the time-interleaved sampling circuit; a calibration circuit, connected to the time-interleaved sampling circuit, and the calibration circuit is used to execute a real-time calibration method for the time-interleaved sampling circuit.

[0014] Optionally, the real-time calibration system for the time-interleaved sampling circuit also includes a time-interleaved sampling circuit, which includes: a power distribution circuit connected to the calibration signal generating circuit, the power distribution circuit is used to process the calibration signal and output each first input signal of the same power; a plurality of conditioning circuits connected to the power distribution circuit, each conditioning circuit is used to collect the first input signal and output an analog signal; a plurality of analog-to-digital converters, correspondingly connected to each conditioning circuit, each analog-to-digital converter is used to convert the analog signal into a digital signal, thereby outputting a time-interleaved sampling signal; a plurality of sampling clock generators, respectively connected to each analog-to-digital converter, each sampling clock generator is used to provide a sampling clock to the corresponding analog-to-digital converter.

[0015] The embodiments of the present application propose a real-time calibration method, device and system for a time-interleaved sampling circuit, which obtains the initial temperature value of the current environment of the time-interleaved sampling circuit and the time domain waveforms of each analog-to-digital converter; determines whether the initial temperature value exceeds a first preset threshold; if it exceeds the first preset threshold, obtains the DC bias error value, gain error value and phase error value of each analog-to-digital converter based on the time domain waveforms of each analog-to-digital converter; determines whether the DC bias error value, gain error value and phase error value of each analog-to-digital converter are greater than a second preset threshold; if they are greater than the second preset threshold, determines the first DC bias error control word, first gain error value and phase error value of each analog-to-digital converter according to the DC bias error value, gain error value and phase error value. Control word and the first phase error control word and update the initial DC bias error control word, initial gain error control word and initial phase error control word; based on the first DC bias error control word, the first gain error control word and the first phase error control word of each analog-to-digital converter, the DC bias error value, gain error value and phase error value of each analog-to-digital converter are respectively adjusted to obtain a calibrated time-interleaved sampling circuit, which solves the problem of parameter changes introduced by process deviation and temperature deviation between devices, and can ensure that the time-interleaved sampling circuit can maintain a high performance level within the full temperature working range. At the same time, it solves the problem of poor performance consistency of the time-interleaved sampling circuit after mass production, reduces the consistency requirements for the chip, and improves the performance indicators of the time-interleaved sampling circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a schematic diagram of a time-interleaved sampling circuit according to an embodiment of the present application;

[0017] Figure 2 A schematic diagram of spurious generation caused by gain deviation according to an embodiment of the present application;

[0018] Figure 3 A schematic diagram of spurious generation caused by a DC offset error according to an embodiment of the present application;

[0019] Figure 4 A schematic diagram of spurious generation by phase deviation according to an embodiment of the present application;

[0020] Figure 5 This is a flow chart of a real-time calibration method for a time-interleaved sampling circuit according to an embodiment of the present application;

[0021] Figure 6 This is a structural block diagram of a real-time calibration device for a time-interleaved sampling circuit according to an embodiment of the present application;

[0022] Figure 7 This is a structural block diagram of a real-time calibration system for a time-interleaved sampling circuit according to an embodiment of the present application.

[0023] The realization of the objectives, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0024] It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0025] The principle block diagram of the time interleaved sampling system is as follows: Figure 1 As shown, the system has multiple ADC sampling chips, which are mainly different from single ADC sampling in two aspects: first, the same analog input signal is input into multiple ADC sampling chips respectively, and second, multiple sampling chips require corresponding sampling clocks. Because of this, compared with single ADC sampling, its sampling performance is greatly affected by the consistency of each ADC input analog signal and the phase stability of the sampling clock. Among them, the consistency of analog signals mainly includes gain consistency, zero bias consistency and phase consistency. Taking two ADCs as an example, if the gain deviation of the analog input signal between ADCs leads to a decrease in spurious performance, such as Figure 2 As shown in the figure, the spurious signal frequency is fs / 2-fin. If the zero bias is inconsistent, the spurious performance will also be degraded, such as Figure 3 As shown, the spurious signal frequency is fs / 2. The clock phase between ADCs is designed to be a fixed phase value of 360° / N, where N is the number of time-interleaved ADCs. If the phase difference deviates from the designed value, or the phase of the analog signals between ADCs is inconsistent, the spurious performance will also be degraded, such as Figure 4 As shown, the spurious signal frequency is fs / 2-fin.

[0026] In order to solve the above technical problems, the present application provides a real-time calibration method for a time-interleaved sampling circuit. Figure 5 This is a flowchart of a real-time calibration method for a time-interleaved sampling circuit according to an embodiment of the present application. The real-time calibration method for a time-interleaved sampling circuit can be executed by real-time calibration software in a time-interleaved sampling device to solve the technical problem in the prior art that the time-interleaved sampling system circuit has inherent defects such as parameter variations between different products or the same product under different temperature environments, resulting in large performance differences in the time-interleaved sampling system circuit. Figure 5 , a real-time calibration method for a time-interleaved sampling circuit includes:

[0027] Step S10: obtaining an initial temperature value of the current environment of the time-interleaved sampling circuit and each time domain waveform of each analog-to-digital converter, wherein the initial temperature value is saved in a pre-established initial calibration file;

[0028] Time-interleaved sampling is a technique used to increase sampling rates in high-speed data acquisition systems. In such systems, multiple analog-to-digital converters (ADCs) operate at specific time intervals, achieving a higher sampling rate than a single ADC. The initial temperature value of the current environment can be the real-time temperature of the circuit board of the time-interleaved sampling circuit, which can be obtained using a temperature sensor. The time-domain waveforms of the ADCs can be observed and recorded using an oscilloscope or data acquisition software.

[0029] Exemplarily, during real-time calibration, the time-interleaved sampling device first starts the real-time calibration software, the real-time calibration software obtains the time domain waveform of each analog-to-digital converter, reads the initial calibration file pre-stored in each ADC, and obtains the initial DC bias error control word, initial phase error control word, initial gain error control word, and initial temperature value from the initial calibration file. Then, the real-time calibration software sends the initial DC bias error control word, initial gain error control word, initial temperature value, and initial phase error control word in the ADC to the real-time calibration software and caches them.

[0030] In an embodiment of the present application, before step S10, the time-interleaved sampling circuit real-time calibration method further includes the following specific implementation steps:

[0031] S71, collecting each time domain waveform of each analog-to-digital converter and the temperature value of the current environment;

[0032] It should be noted that before initial calibration and real-time calibration, the current ambient temperature value needs to be obtained and recorded.

[0033] S72, reset the DC offset error control register, the gain error control register, and the phase error control register;

[0034] S73, calculating the corresponding DC offset error value, gain error value, and phase error value based on each time domain waveform;

[0035] S74, respectively determining whether the DC offset error value, the gain error value, and the phase error value are greater than a second preset threshold;

[0036] The initial calibration software uses a user interface to set second preset thresholds for DC offset error, gain error, and phase error. During calibration, if the error is less than or equal to the second preset threshold, the system is considered qualified. A second preset threshold of no more than 0.2 is ideal, resulting in excellent performance for the calibrated time-interleaved sampling system. However, if the second preset threshold is set too low, random jitter during calibration can affect the automatic judgment of the program.

[0037] S75: If the value is greater than the second preset threshold, determining a corresponding second DC offset error control word, a second gain error control word, and a second phase error control word according to the DC offset error value, the gain error value, and the phase error value;

[0038] S76, adjusting each analog-to-digital converter based on the second DC offset error control word, the second gain error control word, and the second phase error control word of each analog-to-digital converter until all are less than a second preset threshold;

[0039] S77. Save the second DC bias error control word, the second gain error control word, the second phase error control word and the temperature value of the second preset threshold in the initial calibration file, and obtain the first DC bias error control word, the first gain error control word, the first phase error control word and the initial temperature value accordingly.

[0040] It should be noted that the DC offset error control word is a set of specific values ​​or codes that can be used to calibrate the ADC's DC offset error. The DC offset error control word is determined during the ADC calibration process and stored in the ADC's DC offset register. The gain error control word is similar to the DC offset error control word and can be used to calibrate the ADC's gain error. The phase error control word can be used to calibrate the phase difference between different ADC channels.

[0041] By executing steps S71 to S77, the software calibration module can perform initial calibration on the time-interleaved sampling circuit. The difference between the initial calibration and the real-time calibration is that the initial calibration requires resetting the DC bias error control register, the gain error control register, and the phase error control register.

[0042] For example, the control word range of the DC offset error control register is 0 to 4096 and is initialized to 0 by default; the gain control word range of the gain error control register is 8192 to 65535 and is initialized to 8192 by default; and the time control word range of the phase error control register is 0 to 65535 and is initialized to 0 by default. The biggest difference between the real-time calibration software performing initial calibration and real-time calibration is that the real-time calibration occurs after the initial calibration and uses the initial DC offset error control word, initial gain error control word, and initial phase error control word of the initial calibration. Because the error caused by temperature differences during real-time calibration is not too large, the number of recursions of the real-time calibration software during real-time calibration is very small, which is much faster than the initial calibration and quickly achieves the calibration purpose.

[0043] For example, the real-time calibration software may read the temperature values ​​of the circuit board of the time-interleaved sampling circuit near the current time, and then calculate and record the average value.

[0044] In an embodiment of the present application, the error control word data file storage format may be as follows:

[0045] <? xml version='1.0'encoding='utf-8'? >

[0046] <TIADC Temperature="46.3">

[0047] <AcqBoard Id="0">

[0048] <ADC Id="0"Offset="28091"Gain="26111"Phase="5400" / >

[0049] <ADC Id="1"Offset="28091"Gain="25000"Phase="7000" / >

[0050]

[0051] <AcqBoard Id="1">

[0052] <ADC Id="0"Offset="27091"Gain="25111"Phase="7000" / >

[0053] <ADC Id="1"Offset="26091"Gain="25300"Phase="6500" / >

[0054]

[0055]

[0056] The fields are described as follows:

[0057] Temperature: The initial calibration temperature in degrees Celsius.

[0058] AcqBoard Id is the board number of the time-interleaved sampling circuit. In the ADC, this Id is the ADC number.

[0059] Offset: The current ADC offset control word.

[0060] Gain: The current ADC gain control word.

[0061] Phase: The current ADC phase control word.

[0062] S20, determining whether the initial temperature value exceeds a first preset threshold;

[0063] The first preset threshold value may be obtained through experimental statistics. For example, the first preset threshold value may be 5 degrees Celsius. If the temperature exceeds this threshold value, the performance of the time-interleaved sampling circuit will be significantly reduced.

[0064] S30: If the error exceeds the first preset threshold, obtaining a DC offset error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time domain waveform of each analog-to-digital converter;

[0065] In this embodiment, the specific implementation steps of step S30 may include:

[0066] S31, obtaining a first DC offset value, a first gain value, and a first phase value based on a time domain waveform of any one of the analog-to-digital converters; and obtaining corresponding second DC offset value, second gain value, and second phase value based on each time domain waveform of the other analog-to-digital converters;

[0067] Specifically, the real-time calibration software first determines a reference ADC and obtains a first DC offset value, a first gain value, and a first phase value of the reference ADC. The real-time calibration software can then obtain a second DC offset value, a second gain value, and a second phase value of other ADCs.

[0068] S32. Determine a DC offset error value, a gain error value, and a phase error value of each analog-to-digital converter based on the second DC offset value, the second gain value, and the second phase value and the corresponding first DC offset value, the first gain value, and the first phase value.

[0069] Specifically, the real-time calibration software can obtain the DC offset error value, gain error value, and phase error value of each analog-to-digital converter based on the difference between the first DC offset value, first gain value, and first phase value of the reference ADC and the second DC offset value, second gain value, and second phase value of the other ADCs. After obtaining the DC offset error value, gain error value, and phase error value, the real-time calibration software loops through steps S31-S32 to obtain five sets of DC offset error values, gain error values, and phase error values. Finally, the real-time calibration software averages the five sets of DC offset error values, gain error values, and phase error values ​​to obtain the final average value of the DC offset error value, gain error value, and phase error value.

[0070] In this embodiment, the specific implementation steps of step S31 may include:

[0071] S311. Processing a time domain waveform of any analog-to-digital converter among the analog-to-digital converters using a three-parameter sine fitting algorithm to obtain a first DC offset value, a first gain value, and a first phase value;

[0072] S312 : Process the time domain waveforms of other analog-to-digital converters using a three-parameter sine fitting algorithm to obtain corresponding second DC offset values, second gain values, and second phase values.

[0073] The three-parameter sine fitting algorithm is commonly used to extract the parameters of a sine wave from noisy data. These parameters include the DC offset (DC component), gain (amplitude), and phase. The three-parameter sine fitting algorithm estimates these parameters by minimizing the error between the fitted sine wave and the actual data points.

[0074] A sine wave can usually be represented as:

[0075] y(t)=A·sin(2πft+φ)+offsety(t)

[0076] Where A represents the gain value, f represents the frequency, t represents the time, φ represents the phase, and offset represents the DC offset value. The DC offset value offset can be estimated by the average value of the data; the gain value A can be estimated by the peak-to-valley value or standard deviation of the data; and the phase value φ can be estimated by the phase difference of the data. In this embodiment, the real-time calibration software can use nonlinear least squares or other optimization algorithms to fit the DC offset value, gain value, and phase value.

[0077] S40, respectively determining whether a DC offset error value, a gain error value, and a phase error value of each analog-to-digital converter are greater than a second preset threshold;

[0078] S50: If the value is greater than a second preset threshold, updating the first DC offset error control word, the first gain error control word, and the first phase error control word obtained by each analog-to-digital converter according to the DC offset error value, the gain error value, and the phase error value, respectively, wherein the first DC offset error control word, the first gain error control word, and the first phase error control word are pre-stored in the initial calibration file;

[0079] In this embodiment, the specific implementation steps of step S50 may include:

[0080] S51, obtaining an initial DC offset error control word, an initial gain error control word, and an initial phase error control word;

[0081] S52, using the offset error step values ​​corresponding to the first DC offset error control words, the first gain error control words and the corresponding gain error step values, and the first phase error control words and the corresponding phase step values, which are preset in descending order, to adjust the DC offset, gain, and phase of each analog-to-digital converter to obtain an intermediate offset error value, an intermediate gain error value, and an intermediate phase error value;

[0082] S53: If the intermediate offset error value, the intermediate gain error value, and the intermediate phase error value are all less than corresponding second preset thresholds, determining corresponding DC offset error control words, gain error control words, and phase error control words;

[0083] Specifically, the real-time calibration software determines whether the DC bias error value is greater than a set second preset threshold value. If it is greater than the second preset threshold value, it is determined that the DC bias error value belongs to the corresponding DC bias error range in Table 1, and the DC bias error step value is determined according to the corresponding DC bias error range, thereby determining the DC bias error control word. The real-time calibration software then saves the DC bias error control word. After a certain period of time, for example, 5 minutes, it continues to determine whether the current ambient temperature value exceeds the first preset threshold value. If it does not exceed, no processing is performed. If it exceeds, it continues to determine whether the DC bias error value is greater than the set second preset threshold value. If so, it continues to determine the DC bias error step value and determines the DC bias error control word according to the DC bias error step value until the DC bias error value is less than the second preset threshold value, and the last DC bias error control word is saved as the first DC bias error control word. When adjusting the DC offset error control word, the real-time calibration software uses larger DC offset error step values ​​for larger DC offset error values ​​and smaller DC offset error step values ​​for smaller DC offset error values, effectively and quickly reaching a stable state. Table 1 shows the DC offset error step values ​​for each preset DC offset error value, in descending order.

[0084] Table 1

[0085] DC offset error DC offset error step value >10 200 <7 150 <5 100 <3 80 <2 50 <1 20 <0.5 10

[0086] The steps for gain error calibration are the same as those for DC offset error calibration and are not described here in detail.

[0087] The settings of the gain error step values ​​corresponding to the gain errors preset in order from large to small are shown in Table 2.

[0088] Table 2

[0089]

[0090]

[0091] The settings of the phase error step values ​​corresponding to the phase errors preset in order from large to small are shown in Table 3.

[0092] Table 3

[0093] Phase error Phase error step value >100 2000 <100 1500 <50 1000 <40 1000 <30 1000 <20 1000 <10 500 <5 200 <2 50 <1 20 <0.8 10 <0.5 5 <0.3 2

[0094] After determining the DC bias error control word, gain error control word and phase error control word, the DC bias error control word, gain error control word and phase error control word can also be used to update the initial DC bias error control word, initial gain error control word and initial phase error control word, that is, the first DC bias error control word, first gain error control word and first phase error control word saved in the initial calibration file.

[0095] S60 , adjusting each analog-to-digital converter based on the updated first DC offset error control word, first gain error control word, and first phase error control word of each analog-to-digital converter to obtain a calibrated time-interleaved sampling circuit.

[0096] Specifically, after the real-time calibration software is adjusted, a time-interleaved sampling circuit that meets the requirements at the temperature can be obtained. The comparison of various parameters before and after calibration is shown in Table 4.

[0097] Table 4

[0098] Signal-to-noise ratio Xinnabi Spurious Free Dynamic Range Valid bits DC offset error Gain error Phase error Before calibration 28.8285 28.78 28.98 4.48 -0.7 -0.57 11.28 After calibration 42.9463 41.58 48.1392 6.61 0.247 -0.54 0.2

[0099] Based on the above embodiments, the present application further provides a real-time calibration device 100 for a time-interleaved sampling circuit. Figure 6 This is a block diagram of the structure of a real-time calibration device for a time-interleaved sampling circuit according to an embodiment of the present application. The real-time calibration device for a time-interleaved sampling circuit is used to solve the technical problem that the time-interleaved sampling system circuit in the prior art has inherent defects in that parameters vary between different products or the same product under different temperature environments, resulting in large differences in the performance of the time-interleaved sampling system circuit. Figure 6The real-time calibration device for a time-interleaved sampling circuit may include a data acquisition module 101, a first judgment module 102, a first processing module 103, a second judgment module 104, a second processing module 105, and an output module 106, wherein the data acquisition module 101 may be used to obtain an initial temperature value of a current environment of the time-interleaved sampling circuit and each time domain waveform of each analog-to-digital converter, wherein the initial temperature value is stored in a pre-established initial calibration file; the first judgment module 102 may be used to determine whether the initial temperature value exceeds a first preset threshold; the first processing module 103 may be used to obtain a DC bias error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time domain waveform of each analog-to-digital converter if the first preset threshold is exceeded; the second judgment module 104 may be used to obtain a DC bias error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time domain waveform of each analog-to-digital converter if the first preset threshold is exceeded; and the second judgment module 105 may be used to obtain a DC bias error value, a gain error value, and a phase error value of each analog-to-digital converter based on each time domain waveform of each analog-to-digital converter if the first preset threshold is exceeded. 04 can be used to respectively determine whether the DC offset error value, gain error value, and phase error value of each analog-to-digital converter are greater than a second preset threshold value; the second processing module 105 can be used to respectively update the first DC offset error control word, first gain error control word, and first phase error control word obtained by each analog-to-digital converter according to the DC offset error value, gain error value, and phase error value if it is greater than the second preset threshold value, wherein the first DC offset error control word, the first gain error control word, and the first phase error control word are pre-stored in the initial calibration file; the output module 106 can be used to respectively adjust each analog-to-digital converter based on the first DC offset error control word, the first gain error control word, and the first phase error control word of each analog-to-digital converter to obtain a calibrated time-interleaved sampling circuit.

[0100] In an embodiment of the present application, the real-time calibration device for a time-interleaved sampling circuit may further include a time-domain waveform display module 107 . The time-domain waveform display module 107 may be used to display the time-domain waveforms collected from each digital-to-analog converter.

[0101] In an embodiment of the present application, the real-time calibration device for a time-interleaved sampling circuit may further include a spectrum display module 108 , which is configured to display a frequency domain waveform of each analog-to-digital converter.

[0102] In an embodiment of the present application, the real-time calibration device for a time-interleaved sampling circuit may further include an initial calibration module 109, which may be configured to collect time domain waveforms of each analog-to-digital converter and a temperature value of a current environment; reset a DC offset error control register, a gain error control register, and a phase error control register; calculate corresponding DC offset error values, gain error values, and phase error values ​​based on each time domain waveform; respectively determine whether the DC offset error value, the gain error value, and the phase error value are greater than a second preset threshold; if they are greater than the second preset threshold, determine a corresponding second DC offset error control word, a second gain error control word, and a second phase error control word based on the DC offset error value, the gain error value, and the phase error value; adjust each analog-to-digital converter based on the second DC offset error control word, the second gain error control word, and the second phase error control word of each analog-to-digital converter until all values ​​are less than the second preset threshold; save the second DC offset error control word, the second gain error control word, the second phase error control word, and the temperature value of the second preset threshold, and correspondingly obtain an initial DC offset error control word, an initial gain error control word, an initial phase error control word, and an initial temperature value.

[0103] In the embodiment of the present application, the first processing module 103 may be specifically configured to perform initial calibration on the time-interleaved sampling circuit to obtain an initial calibration file.

[0104] In an embodiment of the present application, the first processing module 103 can also be specifically used to use a three-parameter sine fitting algorithm to process the time domain waveform of any one of the analog-to-digital converters to obtain a first DC bias value, a first gain value, and a first phase value; and use a three-parameter sine fitting algorithm to process the time domain waveforms of other analog-to-digital converters to obtain corresponding second DC bias value, second gain value, and second phase value.

[0105] In an embodiment of the present application, the second processing module 105 can be specifically used to obtain an initial DC offset error value, an initial gain error value, and an initial phase error value; use the offset error step values ​​corresponding to each first DC offset error control word, the first gain error control word and the corresponding gain error step value, and the first phase error control word and the corresponding phase step value, which are preset in order from large to small, to adjust the DC offset, gain, and phase of each analog-to-digital converter to obtain an intermediate offset error value, an intermediate gain error value, and an intermediate phase error value; if the intermediate offset error value, the intermediate gain error value, and the intermediate phase error value are all less than the corresponding second preset threshold value, then determine the corresponding first DC offset error control word, the first gain error control word, and the first phase error control word; use the first DC offset error control word, the first gain error control word, and the first phase error control word to update the initial DC offset error control word, the initial gain error control word, and the initial phase error control word.

[0106] Based on the above embodiments, the present application further provides a time-interleaved sampling circuit real-time calibration system 200. Figure 7 This is a block diagram of the structure of a real-time calibration system for a time-interleaved sampling circuit according to an embodiment of the present application. The real-time calibration system for a time-interleaved sampling circuit is used to solve the inherent defect of the time-interleaved sampling system circuit in the prior art, which has parameters that vary between different products or the same product under different temperature environments, resulting in large differences in the performance of the time-interleaved sampling system circuit. Figure 7 The real-time calibration system for a time-interleaved sampling circuit may include a calibration signal generating circuit 201 and a calibration circuit 206, wherein the calibration signal generating circuit 201 may be used to process a single-tone signal to obtain a calibration signal for the time-interleaved sampling circuit; the calibration circuit 206 is connected to the time-interleaved sampling circuit, and the calibration circuit 206 may be used to execute a real-time calibration method for a time-interleaved sampling circuit.

[0107] In a specific embodiment of the present application, the time-interleaved sampling circuit real-time calibration system 200 may further include a power distribution circuit 202, a conditioning circuit 203, a sampling clock generator 204 and an analog-to-digital converter 205, wherein the power distribution circuit 202 is connected to the calibration signal generating circuit, and the power distribution circuit 202 can be used to process the calibration signal and output each first input signal of the same power; multiple conditioning circuits 203 are connected to the power distribution circuit 202, and each conditioning circuit 203 can be used to collect the first input signal and output an analog signal; multiple analog-to-digital converters 205 are correspondingly connected to each conditioning circuit 203, and each analog-to-digital converter 205 can be used to convert the analog signal into a digital signal, thereby outputting a time-interleaved sampling signal; multiple sampling clock generators 204 are respectively connected to each analog-to-digital converter, and each sampling clock generator 204 can be used to provide a sampling clock to the corresponding analog-to-digital converter.

[0108] Specifically, the time-interleaved sampling circuit real-time calibration system 200 has a calibration signal generating circuit 201, which is mainly used to generate an in-band single-tone signal. The single-tone signal required for calibration is generated through a PLL chip (not shown in the figure) and a frequency controller (not shown in the figure). The single-tone signal is suppressed by a low-pass filter (not shown in the figure) to suppress its harmonics, so that its own harmonics and spurious signals are better than the signals generated by the time-interleaved sampling circuit real-time calibration system itself, thereby obtaining a calibration signal that can be used for the time-interleaved sampling system. A calibration signal is input from the front end of the analog link to calibrate the deviation of the entire link. The signal to be processed is connected to the power distribution circuit 202 through the signal input port and the calibration signal via a switch. The power distribution circuit 202 outputs first input signals of the same power. Each first input signal is input into the corresponding conditioning circuit 203 and analog-to-digital converter 205. After the analog-to-digital converter 205 collects the same input signal, the calibration circuit 206 performs online analysis and calculation on the collected signal data to obtain consistency deviation parameters. The calibration circuit 206 then adjusts the relevant parameters of the analog-to-digital converter 205 and the sampling clock generator 204. The sampling clock generator 204 is used to adjust the phase error.

[0109] Furthermore, although the operations of the method of the present application are described in a particular order in the accompanying drawings, this does not require or imply that the operations must be performed in this particular order, or that all illustrated operations must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps.

Claims

1. A real-time calibration method for a time-interleaved sampling circuit, characterized in that: include: Acquire an initial temperature value of a current environment of a time-interleaved sampling circuit and each time domain waveform diagram of each analog-to-digital converter, wherein the initial temperature value is stored in a pre-established initial calibration file; Determining whether the initial temperature value exceeds a first preset threshold; If the first preset threshold is exceeded, a DC offset error value, a gain error value and a phase error value of each of the analog-to-digital converters are obtained based on each time domain waveform diagram of each of the analog-to-digital converters; Respectively determine whether a DC offset error value, a gain error value, and a phase error value of each of the analog-to-digital converters are greater than a second preset threshold; If it is greater than the second preset threshold, then the first DC offset error control word, the first gain error control word and the first phase error control word acquired by each of the analog-to-digital converters are respectively updated according to the DC offset error value, the gain error value and the phase error value, wherein the first DC offset error control word, the first gain error control word and the first phase error control word are pre-stored in the initial calibration file; Based on the first DC offset error control word, the first gain error control word and the first phase error control word updated by each analog-to-digital converter, each analog-to-digital converter is adjusted to obtain the calibrated time-interleaved sampling circuit; The updating of the first DC offset error control word, the first gain error control word and the first phase error control word acquired by each analog-to-digital converter according to the DC offset error value, the gain error value and the phase error value respectively comprises: Obtaining an initial DC offset error control word, an initial gain error control word, and an initial phase error control word; Using the offset error step values ​​corresponding to the first DC offset error control words, the first gain error control words and the corresponding gain error step values, and the first phase error control words and the corresponding phase step values, which are preset in order from large to small, to adjust the DC offset, gain, and phase of each of the analog-to-digital converters to obtain an intermediate offset error value, an intermediate gain error value, and an intermediate phase error value; If the intermediate offset error value, the intermediate gain error value, and the intermediate phase error value are all smaller than the corresponding second preset threshold value, then determining the corresponding first DC offset error control word, the first gain error control word, and the first phase error control word; The initial DC offset error control word, the initial gain error control word, and the initial phase error control word are updated using the first DC offset error control word, the first gain error control word, and the first phase error control word.

2. The real-time calibration method for a time-interleaved sampling circuit according to claim 1, characterized in that: Before acquiring the initial temperature value of the current environment of the time-interleaved sampling circuit, the time-interleaved sampling circuit real-time calibration method further includes: Performing an initial calibration on the time interleaved sampling circuit to obtain the initial calibration file.

3. The real-time calibration method for a time-interleaved sampling circuit according to claim 1, characterized in that: The DC offset error value, gain error value and phase error value of each analog-to-digital converter are obtained based on each time domain waveform diagram of each analog-to-digital converter, including: Obtaining a first DC bias value, a first gain value, and a first phase value based on a time domain waveform diagram of any of the analog-to-digital converters, and obtaining a corresponding second DC bias value, a second gain value, and a second phase value based on each of the time domain waveform diagrams of the other analog-to-digital converters; Based on the second DC offset value, the second gain value and the second phase value and the corresponding first DC offset value, the first gain value and the first phase value, the DC offset error value, the gain error value and the phase error value of each of the analog-to-digital converters are determined.

4. The real-time calibration method for a time-interleaved sampling circuit as claimed in claim 3, characterized in that: The step of obtaining a first DC bias value, a first gain value, and a first phase value based on a time domain waveform of any of the analog-to-digital converters, and obtaining a corresponding second DC bias value, a second gain value, and a second phase value based on each of the time domain waveforms of the other analog-to-digital converters, comprises: Processing a time domain waveform diagram of any one of the analog-to-digital converters using a three-parameter sine fitting algorithm to obtain the first DC offset value, the first gain value, and the first phase value; The time domain waveforms of the other analog-to-digital converters are processed using a three-parameter sine fitting algorithm to obtain corresponding second DC offset values, second gain values, and second phase values.

5. A real-time calibration device for a time-interleaved sampling circuit, characterized in that: include: A data acquisition module, used to acquire an initial temperature value of the current environment of the time-interleaved sampling circuit and each time domain waveform of each analog-to-digital converter, wherein the initial temperature value is stored in a pre-established initial calibration file; A first judgment module, used to judge whether the initial temperature value exceeds a first preset threshold; A first processing module, configured to obtain a DC offset error value, a gain error value, and a phase error value of each of the analog-to-digital converters based on each time domain waveform diagram of each of the analog-to-digital converters if the first preset threshold is exceeded; A second judgment module, used to respectively judge whether a DC offset error value, a gain error value, and a phase error value of each of the analog-to-digital converters are greater than a second preset threshold; A second processing module, configured to update the first DC offset error control word, the first gain error control word and the first phase error control word acquired by each of the analog-to-digital converters according to the DC offset error value, the gain error value and the phase error value, respectively, if the DC offset error value is greater than the second preset threshold, wherein the first DC offset error control word, the first gain error control word and the first phase error control word are pre-stored in the initial calibration file; An output module, used for adjusting each of the analog-to-digital converters based on the first DC offset error control word, the first gain error control word and the first phase error control word updated by each of the analog-to-digital converters to obtain the calibrated time-interleaved sampling circuit; The second processing module is also used to obtain an initial DC offset error control word, an initial gain error control word, and an initial phase error control word; use the offset error step values ​​corresponding to each of the first DC offset error control words, the first gain error control word and the corresponding gain error step value, and the first phase error control word and the corresponding phase step value, which are preset in order from large to small, to adjust the DC offset, gain, and phase of each of the analog-to-digital converters to obtain an intermediate offset error value, an intermediate gain error value, and an intermediate phase error value; if the intermediate offset error value, the intermediate gain error value, and the intermediate phase error value are all less than the corresponding second preset threshold value, then determine the corresponding first DC offset error control word, the first gain error control word, and the first phase error control word; use the first DC offset error control word, the first gain error control word, and the first phase error control word to update the initial DC offset error control word, the initial gain error control word, and the initial phase error control word.

6. The real-time calibration device for a time-interleaved sampling circuit as claimed in claim 5, characterized in that: The time interleaved sampling circuit real-time calibration device also includes: The time domain waveform display module is used to display the time domain waveforms collected from each digital-to-analog converter of the time interleaved sampling circuit.

7. The real-time calibration device for a time-interleaved sampling circuit as claimed in claim 5, characterized in that: The time interleaved sampling circuit real-time calibration device also includes: The spectrum display module is used to display the frequency domain waveform of each analog-to-digital converter of the time-interleaved sampling circuit.

8. A real-time calibration system for a time-interleaved sampling circuit, characterized in that: include: A calibration signal generating circuit, used for processing a single tone signal to obtain a calibration signal for a time interleaved sampling circuit; The calibration circuit is connected to the time-interleaved sampling circuit, and the calibration circuit is used to execute the real-time calibration method for the time-interleaved sampling circuit as described in any one of claims 1-4.

9. The real-time calibration system for time-interleaved sampling circuit according to claim 8, characterized in that: The time interleaved sampling circuit real-time calibration system further comprises a time interleaved sampling circuit, and the time interleaved sampling circuit comprises: A power distribution circuit connected to the calibration signal generating circuit, the power distribution circuit is used to process the calibration signal and output each first input signal with the same power; A plurality of conditioning circuits connected to the power distribution circuit, each conditioning circuit being used to collect a first input signal and output an analog signal; A plurality of analog-to-digital converters, connected to the conditioning circuits accordingly, each of the analog-to-digital converters being used to convert the analog signal into a digital signal, thereby outputting a time-interleaved sampling signal; A plurality of sampling clock generators are respectively connected to the analog-to-digital converters, and each sampling clock generator is used to provide a sampling clock to the corresponding analog-to-digital converter.

Images