Processor fault detection method, device, equipment, medium and product

Abstract

The embodiment of the present application provides a processor fault detection method, device, equipment, medium and product, which relates to the field of fault detection. The method is applied to the basic input and output system of the server, including: in the power-on self-test stage of the basic input and output system, the processor type and the processor microcode are read, and when the processor type is inconsistent with the preset type, or when the processor microcode is not read, or when the processor microcode fails to load, it is determined that the processor has a fault, and the error information corresponding to the above problem is reported to the baseboard management controller of the server, and the error information result is displayed on the screen, or the baseboard management controller of the server parses the result. Through this method, when a processor fault occurs, the processor fault problem can be detected efficiently and quickly, and the detection result is displayed to the user, which not only improves work efficiency, but also improves the user experience.

Description

Technical Field

[0001] The present application relates to the field of fault detection, and in particular to a processor fault detection method, device, equipment, medium and product. Background Art

[0002] BIOS (Basic Input Output System) is an important part of the server, responsible for starting the computer and initializing the hardware devices. When the server starts, BIOS will run first, detect the hardware devices and initialize them, and then hand over control to the operating system. BIOS plays a vital role in the server, and its stability and reliability have a great impact on the operation of the entire system.

[0003] The POST (Power On Self Test) phase of the BIOS is an important step in the server boot process. When the server power button is pressed, the POST process begins, which is responsible for checking and initializing the main hardware components of the server to ensure that they are working properly. If the CPU (Central Processing Unit) boot process fails during the BIOS POST phase, it means that the server cannot correctly identify or initialize the CPU. This situation may cause the server to fail to boot completely. Without a working CPU, the server cannot perform basic operating instructions; or it may cause the server to repeatedly try to boot but always stay in the same position, forming a reboot loop, or suddenly freeze during the boot process; it may also cause the CPU to fail the test and the server cannot output any video signal to the display, resulting in nothing displayed on the screen.

[0004] The above problems may occur individually or simultaneously, but the most difficult problem for users is that when a CPU failure occurs, there is no display on the monitor, resulting in the inability to locate and diagnose the fault. This not only has a great impact on normal use, but also creates a great obstacle to troubleshooting after the problem occurs.

[0005] Therefore, in order to solve the above-mentioned problems, a convenient, accurate and visual method for detecting processor faults during the power-on self-test phase is urgently needed. Summary of the invention

[0006] Based on the above technical problems, the embodiments of the present application provide a processor fault detection method, device, equipment, medium and product, aiming to conveniently and accurately detect processor faults with visual results, so that the fault can be located in time when a processor fault occurs during the power-on self-test phase.

[0007] A first aspect of an embodiment of the present application provides a processor failure detection method, which is applied to a basic input and output system of a server, and the method includes:

[0008] During the power-on self-test phase of the basic input / output system, the processor type and processor microcode of the server are read, wherein the processor type is used to describe basic information of the processor, and the processor microcode is used to describe an operating mode of the processor;

[0009] Comparing the processor type with a preset type, and when the processor type is inconsistent with the preset type, determining that the processor is faulty, and reporting error information of the processor type mismatch to the baseboard management controller of the server;

[0010] The processor microcode is read, and when the processor microcode is not read, an error message of unsuccessful microcode reading is reported to a baseboard management controller of the server;

[0011] Determine whether the microcode loading of the processor is successful, and when the microcode loading of the processor fails, report error information of the unsuccessful microcode loading to the baseboard management controller of the server.

[0012] Optionally, the method further comprises:

[0013] Print the error information reported by the basic input and output system on the self-test page;

[0014] The error information reported by the basic input and output system is displayed on the screen, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of microcode reading failure, and error information of microcode loading failure.

[0015] Optionally, the method further comprises:

[0016] When a screen fails, the baseboard management controller of the server parses the error information reported by the basic input and output system, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading;

[0017] The analysis result is displayed through a user interface of the baseboard management controller of the server.

[0018] Optionally, the processor type is compared with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and error information of the processor type mismatch is reported to a baseboard management controller of the server. The method includes:

[0019] Comparing the processor type with corresponding preset types in sequence, the processor type including a first processor type, a second processor type, a third processor type, and a fourth processor type;

[0020] When the first processor type is inconsistent with the first preset type, determining that the processor is faulty, and reporting error information of the first processor type mismatch to the baseboard management controller of the server;

[0021] When the second processor type is inconsistent with the second preset type, determining that the processor is faulty, and reporting error information of the second processor type mismatch to the baseboard management controller of the server;

[0022] When the third processor type is inconsistent with the third preset type, determining that the processor is faulty, and reporting error information of the third processor type mismatch to the baseboard management controller of the server;

[0023] When the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and error information of the fourth processor type mismatch is reported to the baseboard management controller of the server.

[0024] Optionally, before comparing the processor type with the corresponding preset types in sequence, the method further includes:

[0025] In a power-on self-test phase of the basic input / output system, an initial value of a flag bit is set to "no", the flag bit being used to indicate whether to report an error message of a processor type mismatch to a baseboard management controller of the server;

[0026] Comparing the processor type with the corresponding preset type in sequence, and assigning a value to the flag bit according to the comparison result;

[0027] Read the current value of the flag bit;

[0028] When the flag bit is assigned a value of no, the processor does not have a fault and continues to execute the power-on self-test phase of the basic input and output system;

[0029] When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information of processor type mismatch is reported to the baseboard management controller of the server.

[0030] Optionally, the processor type is sequentially compared with corresponding preset types, and the flag bit is assigned a value according to the comparison result. The method includes:

[0031] Reading the first processor type, comparing the first processor type with the first preset type, and when the first processor type and the first preset type are consistent, proceeding to the next step of comparing the processor type with the preset type;

[0032] When the first processor type is inconsistent with the first preset type, assigning the flag bit a value of yes, and proceeding to the next step of comparing the processor type with the preset type;

[0033] Read the flag bit assignment;

[0034] When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information of the first processor type mismatch is reported to the baseboard management controller of the server.

[0035] Optionally, proceeding to the next step of comparing the processor type with the preset type, the method includes:

[0036] reading the second processor type, comparing the second processor type with the second preset type,

[0037] When the second processor type is consistent with the second preset type, proceeding to the next step of comparing the processor type with the preset type;

[0038] When the second processor type is inconsistent with the second preset type, the flag bit is assigned a value of yes, and the next processor type and preset type comparison step is continued.

[0039] Read the flag bit assignment;

[0040] When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information of a mismatch in the second processor type is reported to the baseboard management controller of the server.

[0041] Optionally, determining whether the microcode loading of the processor is successful, and when the microcode loading of the processor fails, reporting error information of the microcode loading failure to the baseboard management controller of the server, the method includes:

[0042] Reading the processor microcode, and setting the address and size of the processor microcode;

[0043] Determining whether the processor microcode is loaded successfully according to the address and size of the processor microcode;

[0044] When the processor microcode loading fails, error information of the microcode loading failure is reported to the baseboard management controller of the server.

[0045] Optionally, the method further comprises:

[0046] When there are multiple processors, during the power-on self-test phase of the basic input and output system, the processor type and processor microcode are read;

[0047] The processor type of each processor is compared with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and error information of the processor type mismatch is reported to the baseboard management controller of the server.

[0048] Optionally, the method further comprises:

[0049] Reading the processor microcode of each processor, and when the processor microcode is not read, reporting error information of unsuccessful microcode reading to the baseboard management controller of the server;

[0050] It is determined whether the processor microcode of each processor is loaded successfully. When the processor microcode loading fails, an error message of the microcode loading failure is reported to the baseboard management controller of the server.

[0051] Optionally, after reporting the error information to the baseboard management controller of the server, the method further includes:

[0052] After receiving the error information, the baseboard management controller of the server records a problem log;

[0053] According to the problem log, the error information is read to locate the fault location.

[0054] A second aspect of an embodiment of the present application provides a processor fault detection device, the device comprising:

[0055] A reading module, used for reading the processor type and processor microcode of the server during the power-on self-test phase of the basic input and output system;

[0056] A processor type comparison module, used to compare the processor type with a preset type, and when the processor type is inconsistent with the preset type, determine that the processor is faulty, and report error information of the processor type mismatch to the baseboard management controller of the server;

[0057] A processor microcode reading module, used for reading the processor microcode, and reporting an error message of unsuccessful microcode reading to the baseboard management controller of the server when the processor microcode is not read;

[0058] The processor microcode loading module determines whether the processor microcode loading is successful, and when the processor microcode loading fails, reports the error information of the microcode loading failure to the baseboard management controller of the server.

[0059] Optionally, the processor fault detection device further includes:

[0060] An error information printing module, used for printing the error information reported by the basic input and output system on the self-check page;

[0061] The error information display module is used to display the error information reported by the basic input and output system on the screen. The error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading.

[0062] Optionally, the processor fault detection device further includes:

[0063] An error information parsing module, used for parsing the error information reported by the basic input and output system by the baseboard management controller of the server when a screen failure occurs, wherein the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading;

[0064] The analysis result display module is used to display the analysis result through the user interface of the baseboard management controller of the server.

[0065] Optionally, the processor type comparison module further includes:

[0066] A processor type comparison submodule, used to compare the processor type with corresponding preset types in sequence, the processor type including a first processor type, a second processor type, a third processor type, and a fourth processor type;

[0067] A first processor fault determination submodule, for determining that the processor is faulty when the first processor type is inconsistent with the first preset type, and reporting error information of the first processor type mismatch to the baseboard management controller of the server;

[0068] A second processor fault determination submodule, for determining that the processor is faulty when the second processor type is inconsistent with the second preset type, and reporting error information of the second processor type mismatch to the baseboard management controller of the server;

[0069] A third processor fault determination submodule, for determining that the processor is faulty when the third processor type is inconsistent with the third preset type, and reporting error information of the third processor type mismatch to the baseboard management controller of the server;

[0070] The fourth processor fault determination submodule is used to determine that the processor is faulty when the fourth processor type is inconsistent with the fourth preset type, and report error information of the fourth processor type mismatch to the baseboard management controller of the server.

[0071] Optionally, the processor type comparison module further includes:

[0072] A flag bit setting submodule, used to set the initial value of the flag bit to "no" during the power-on self-test phase of the basic input / output system, wherein the flag bit is used to indicate whether to report an error message of processor type mismatch to the baseboard management controller of the server;

[0073] A flag bit assignment submodule, used to compare the processor type with the corresponding preset type in sequence, and assign a value to the flag bit according to the comparison result;

[0074] A flag bit reading submodule, used to read the current value of the flag bit;

[0075] A first fault judgment submodule, for, when the flag bit is assigned a value of "no", the processor does not have a fault and continues to execute the power-on self-test phase of the basic input and output system;

[0076] The second fault judgment submodule is used to determine that a processor fault exists when the flag bit is assigned a value of yes, and report error information of a processor type mismatch to the baseboard management controller of the server.

[0077] Optionally, the flag bit assignment submodule further includes:

[0078] A first processor type reading unit, configured to read the first processor type, compare the first processor type with the first preset type, and proceed to the next processor type and preset type comparison step when the first processor type and the first preset type are consistent;

[0079] A first flag bit assignment unit, configured to assign the flag bit to yes when the first processor type is inconsistent with the first preset type, and proceed to the next step of comparing the processor type with the preset type;

[0080] A flag bit reading unit, used for reading the flag bit value;

[0081] The first error information reporting unit is used to determine that the processor is faulty when the flag bit is assigned a value of yes, and report the first processor type mismatch error information to the baseboard management controller of the server.

[0082] Optionally, the flag bit assignment submodule further includes:

[0083] A second processor type reading unit, configured to read the second processor type, compare the second processor type with the second preset type, and proceed to the next processor type and preset type comparison step when the second processor type and the second preset type are consistent;

[0084] A second flag bit assignment unit is used to assign a flag bit value of yes when the second processor type is inconsistent with the second preset type, and proceed to the next processor type and preset type comparison step

[0085] A flag bit reading unit, used for reading the flag bit value;

[0086] The second error information reporting unit is used to determine that the processor is faulty when the flag bit is assigned a value of yes, and report the error information of the second processor type mismatch to the baseboard management controller of the server.

[0087] Optionally, the processor microcode loading module includes:

[0088] A setting submodule, used for reading the processor microcode and setting the address and size of the processor microcode;

[0089] A processor microcode loading judgment submodule, used to judge whether the processor microcode is loaded successfully according to the address and size of the processor microcode;

[0090] The microcode loading failure reporting submodule is used to report the error information of the microcode loading failure to the baseboard management controller of the server when the microcode loading of the processor fails.

[0091] Optionally:

[0092] The reading module is also used to read each processor type and processor microcode during the power-on self-test phase of the basic input and output system when there are multiple processors;

[0093] The processor type comparison module is also used to compare the processor type of each processor with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty and an error message of processor type mismatch is reported to the baseboard management controller of the server.

[0094] Optionally:

[0095] The processor microcode reading module is further used to read the processor microcode of each processor, and when the processor microcode is not read, report the error information of the microcode reading failure to the baseboard management controller of the server;

[0096] The processor microcode loading module is also used to determine whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error information of the unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0097] Optionally, the processor fault detection device further includes:

[0098] A problem log recording module, used for the baseboard management controller of the server to record a problem log after receiving the error information;

[0099] The problem log reading module is used to read the error information and locate the fault position according to the problem log.

[0100] A third aspect of an embodiment of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, a processor fault detection method as in the first aspect of an embodiment of the present application is implemented.

[0101] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the processor fault detection method of the first aspect of the embodiment of the present application is implemented.

[0102] A fifth aspect of an embodiment of the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the processor fault detection method of the first aspect of an embodiment of the present application.

[0103] Through the processor fault detection method of the embodiment of the present application, during the power-on self-test phase of the basic input and output system, the processor type and processor microcode are read, and when the processor type is inconsistent with the preset type, or when the processor microcode is not read, or when the processor microcode fails to load, it is determined that the processor has a fault, and the error information corresponding to the above problem is reported to the baseboard management controller of the server, and the error information result can be displayed on the screen, or the result can be parsed through the user interface of the baseboard management controller of the server.

[0104] In this application, based on the problem that the related art cannot locate and display the processor fault in the power-on self-test phase, a method for detecting the processor through the basic input and output system is proposed for various problems that may occur in the processor, and when a processor fault problem occurs, the detection result can be displayed through the screen or the user interface of the baseboard management controller of the server. Through this method, when encountering a server fault problem, the problem can no longer be accurately located due to the inability to obtain problem information, but the fault problem can be efficiently and quickly located and processed, which not only improves work efficiency, but also enhances the user experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0105] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0106] Figure 1 is a flow chart of a processor fault detection method proposed in one embodiment of the present application;

[0107] Figure 2 It is a schematic diagram of a hardware architecture proposed in an embodiment of the present application;

[0108] Figure 3 is a flowchart for determining a processor type proposed in an embodiment of the present application;

[0109] Figure 4 is a judgment flow chart of a processor microcode provided by an embodiment of the present application;

[0110] Figure 5 is a structural block diagram of a processor fault detection device provided by an embodiment of the present application;

[0111] Figure 6 It is a schematic diagram of an electronic device shown in an embodiment of the present application. DETAILED DESCRIPTION

[0112] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0113] In the drawings, the size of the constituent elements, the thickness of the layer or the area may be exaggerated for the sake of clarity. Therefore, any implementation of the present disclosure is not necessarily limited to the size shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and any implementation of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0114] Please refer to Figure 1 , Figure 1 This is a flowchart of a processor fault detection method of the present application. Figure 1 As shown, the method is applied to the basic input and output system of the server, and may include steps S101 to S104:

[0115] Step 101: During the power-on self-test phase of the basic input / output system, read the processor type and processor microcode of the server, wherein the processor type is used to describe basic information of the processor, and the processor microcode is used to describe an operating mode of the processor;

[0116] Step 102: Compare the processor type with a preset type. When the processor type is inconsistent with the preset type, determine that the processor is faulty, and report error information of the processor type mismatch to the baseboard management controller of the server.

[0117] Step 103: reading the processor microcode, and when the processor microcode is not read, reporting error information of unsuccessful microcode reading to the baseboard management controller of the server;

[0118] Step 104: Determine whether the microcode loading of the processor is successful. When the microcode loading of the processor fails, report error information of the microcode loading failure to the baseboard management controller of the server.

[0119] In the related art, if a processor fails during the power-on self-test phase of the basic input / output system, the processor may not be correctly identified or initialized. As a core component, once the processor fails or fails to start normally, the server where the processor is located may not start normally, and may not be able to execute basic operating instructions normally. Or the server may be repeatedly restarted, but due to the problem that the server cannot start, the system falls into an endless loop of repeated restarts, or suddenly freezes during the process. For the above problems, since when the processor fails, the display interface is often unable to receive the processor's signal, resulting in no display output, therefore, when the processor fails, it not only affects the normal use of the user, but also makes it difficult to locate the fault due to the lack of display.

[0120] Therefore, a method for detecting processor failure is proposed in the present application. Through the method proposed in the present application, the problems that may occur during the startup process of the processor can be detected by reading the processor type and the processor microcode during the power-on self-test phase of the basic input and output system. If there is no problem with the processor, the subsequent steps of the power-on self-test phase will continue. However, once it is detected that there may be a problem with the processor, the corresponding error information will be reported to the baseboard management controller of the server, and the detection results can also be displayed to the user through the screen or the user interface of the baseboard management controller of the server, avoiding the problem that the processor failure is difficult to locate and handle due to the inability to display fault information during the system startup phase. In this way, the user can locate the fault more promptly and accurately when the processor fails, and make corresponding processing in the future.

[0121] In a specific embodiment, Figure 2 As shown, Figure 2 The present invention is a hardware architecture diagram proposed in an embodiment of the present application. The processor fault detection method proposed in the present application is applied to a server and is specifically implemented by a basic input and output system (BIOS) firmware stored on a server motherboard. During the server startup process, the BIOS starts a self-test (POST) phase when the server is started. In this phase, the processor (i.e., CPU) mounted in the server is detected for faults by the processor fault detection method proposed in the present application. The BIOS determines whether the CPU type is consistent with the preset type stored in the server by obtaining the CPU type and the CPU microcode, and whether the CPU microcode can be normally obtained and loaded, thereby determining whether there is a CPU fault. Once the BIOS determines that there is a CPU fault, the fault and specific error information will be sent to a baseboard management controller (i.e., BMC) in the server. The BMC will back up the error information, and the user can see the error information through the display screen connected to the server, and can see the specific error information by accessing the user interface (BMC WEB) corresponding to the BMC.

[0122] Step S101: During the power-on self-test phase of the basic input / output system, the processor type and processor microcode of the server are read, wherein the processor type is used to describe basic information of the processor, and the processor microcode is used to describe an operating mode of the processor.

[0123] In the embodiment of the present application, during the process of starting up the user's device (such as a server), the power-on self-test phase of the basic input / output system is an important step in the startup of the device. When the device starts to start up, the power-on self-test phase begins to start up, which is used to check and initialize the main hardware components of the server to ensure that these hardware can work properly. During the power-on self-test phase, the basic input / output system reads the processor type, which is used to describe the various attribute values ​​of various basic information of the processor, and is used to determine whether the processor is a processor that matches the server. The basic input / output system also reads the processor microcode, which is a type of processor firmware used to describe the operating mode of the processor. The processor microcodes are different in different processors, but need to match the server system. The processor microcode is detected to determine whether the processor matches the server.

[0124] Step 102: Compare the processor type with a preset type. When the processor type is inconsistent with the preset type, determine that the processor is faulty, and report error information of the processor type mismatch to the baseboard management controller of the server.

[0125] In the embodiment of the present application, after reading various processor types related to the processor, it is also necessary to compare with the preset type, which is stored in the server and is used to determine whether the connected processor matches the server. When the processor type is consistent with the preset type, it means that the processor matches the server, and the subsequent self-check operation can continue; when the processor type is inconsistent with the preset type, it will be determined that the processor is faulty, and the corresponding processor type mismatch error information will be reported to the baseboard management controller of the server, and the baseboard management controller of the server will continue to store these error messages and display them through the screen or user interface.

[0126] Step 103: Read the processor microcode, and when the processor microcode is not read, report an error message indicating that the microcode reading is unsuccessful to the baseboard management controller of the server.

[0127] In an embodiment of the present application, when the processor microcode is read, there are two situations: readable or not read. When the processor microcode can be read, subsequent verification work is performed based on the read processor microcode; when the processor microcode of the processor is not read, it is determined that the processor is faulty at this time, and the specific cause of the fault, that is, the error information of unsuccessful microcode reading, is reported to the baseboard management controller of the server for subsequent storage and display.

[0128] Step 104: Determine whether the microcode loading of the processor is successful. When the microcode loading of the processor fails, report error information of the microcode loading failure to the baseboard management controller of the server.

[0129] In an embodiment of the present application, after reading the processor microcode of the processor, it is necessary to load and verify the processor microcode. When the processor microcode is loaded successfully, it is determined that the information related to the processor microcode is correct at this time, and other self-check steps are continued; when the processor microcode fails to load, it is determined that the processor is faulty at this time, and the specific cause of the fault, that is, the error information of unsuccessful microcode loading is reported to the baseboard management controller of the server for subsequent storage and display.

[0130] In an optional embodiment, the processor may be a CPU, the basic input and output system may be a BIOS, and the power-on self-test stage may be a POST stage after the server is powered on, that is, in the POST stage, the BIOS reads and determines the processor type and processor microcode of the CPU to determine whether the CPU has a fault. The baseboard management controller of the server may be a BMC, which is used to parse and record various error information, and may also display the recorded error information to users through the BMC WEB.

[0131] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which specifically includes the following contents:

[0132] First, when the above error information is obtained, the error information reported by the basic input and output system is printed on the self-check page.

[0133] In an embodiment of the present application, according to the method described in steps S101-S104, when a fault is detected in the processor and specific corresponding error information of processor type mismatch, microcode reading failure or microcode loading failure is obtained, the obtained error information will first be printed in a self-test page and transmitted to the baseboard management controller of the server. The baseboard management controller of the server processes the error information and stores or displays it accordingly.

[0134] Then, the error information reported by the basic input and output system is displayed on the screen, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of microcode reading failure, and error information of microcode loading failure.

[0135] In the embodiment of the present application, after the baseboard management controller of the server obtains the error information of processor type mismatch, microcode reading failure or microcode loading failure transmitted by the basic input and output system, these error messages will be displayed on the screen first to realize that the processor fails during the power-on self-test phase. These error messages can be displayed to the user quickly and efficiently, making it convenient for users to perform specific troubleshooting according to the error information, and facilitating the location of the fault and the repair of the fault.

[0136] It should be noted that the screen mentioned in the present application may refer to a display connected to a personal host, or may be a remote display, etc. The specific display method corresponding to the screen described here should not be a limitation of the present application.

[0137] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which specifically includes the following contents:

[0138] First, when a screen fails, the baseboard management controller of the server parses error information reported by the basic input and output system, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of microcode reading failure, and error information of microcode loading failure;

[0139] Then, the analysis result is displayed through the user interface of the baseboard management controller of the server.

[0140] In the embodiment of the present application, as described above, after the baseboard management controller of the server obtains the error information reported by the basic input and output system, it will first perform preliminary processing on the error information of processor type mismatch, the error information of unsuccessful microcode reading or the error information of unsuccessful microcode loading, and display the error information to the user through the display screen. However, when the screen also fails at the same time, the embodiment of the present application also proposes a method of parsing the error information through the baseboard management controller of the server, and displaying the parsing result to the user through a user interface accessible to the user, which is the error information.

[0141] In an optional embodiment, as described above, the user can obtain the server fault information and records such as the time of the fault by accessing the BMC WEB of the BMC, which can also be obtained through the BMC WEB, so that the user can fully analyze possible problems.

[0142] It should be noted that the visual display of error information proposed in the present application includes both displaying the error information through a screen and displaying the error information through a user interface of the baseboard management controller of the server. The two can exist at the same time and back up each other to ensure the reliability of the processor fault detection method proposed in the present application.

[0143] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which compares the processor type with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor has a fault, and the error information of the processor type mismatch is reported to the baseboard management controller of the server, which specifically includes the following contents:

[0144] First, the processor types are compared with corresponding preset types in sequence, and the processor types include a first processor type, a second processor type, a third processor type, and a fourth processor type.

[0145] In an embodiment of the present application, the processor type includes more than one type. For each processor type, a corresponding preset type is stored in the server. Therefore, it is necessary to compare each processor type with the preset type to determine whether the processor has a fault, and when a fault occurs, the error information that a specific processor type does not match the preset type is reported to the baseboard management controller of the server.

[0146] Then, when the first processor type is inconsistent with the first preset type, it is determined that the processor is faulty, and error information of the first processor type mismatch is reported to the baseboard management controller of the server; when the second processor type is inconsistent with the second preset type, it is determined that the processor is faulty, and error information of the second processor type mismatch is reported to the baseboard management controller of the server; when the third processor type is inconsistent with the third preset type, it is determined that the processor is faulty, and error information of the third processor type mismatch is reported to the baseboard management controller of the server; when the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and error information of the fourth processor type mismatch is reported to the baseboard management controller of the server.

[0147] In an embodiment of the present application, each processor type is compared with a preset type. When any processor type is inconsistent with the preset type, it is determined that the processor is faulty, and the inconsistent processor type information is reported to the baseboard management controller of the server for subsequent more accurate fault location.

[0148] In an optional embodiment, the first processor type may be CBO Count / List, the second processor type may be M3KTI Count, the third processor type may be Processor Socket Ways, and the fourth processor type may be Stepping.

[0149] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which specifically includes the following contents before comparing the processor type with the corresponding preset type in sequence:

[0150] First, during the power-on self-test phase of the basic input / output system, an initial value of a flag is set to "no", and the flag is used to indicate whether to report an error message of a processor type mismatch to the baseboard management controller of the server.

[0151] In the embodiment of the present application, after determining whether the processor type does not match the preset type, the basic input and output system needs to determine whether the above information needs to be reported to the baseboard management controller of the server. Therefore, in the present application, the value of the flag bit is determined to determine whether it is necessary to report to the baseboard management controller of the server. First, during the power-on self-test phase, the basic input and output system needs to set the initial value of the flag bit to no, indicating that it is not necessary to report the processor fault information to the baseboard management controller of the server at this time.

[0152] Then, the processor type is compared with the corresponding preset type in turn, and the flag bit is assigned a value according to the comparison result;

[0153] In the embodiment of the present application, as described above, after comparing each processor type with its corresponding preset type, it is determined whether the processor is faulty based on the comparison result, and based on the result of the determination whether the processor is faulty, the flag bit is assigned a value as a basis for determining whether the processor fault information needs to be reported to the baseboard management controller of the server.

[0154] Finally, read the current value of the flag bit: when the flag bit is assigned a value of no, the processor is not faulty and the power-on self-test phase of the basic input and output system continues to be executed; when the flag bit is assigned a value of yes, it is determined that the processor is faulty and an error message of processor type mismatch is reported to the baseboard management controller of the server.

[0155] In the embodiment of the present application, after completing the comparison of the expected corresponding preset types of each processor type, the flag bit assignment will be checked. If the flag bit assignment value is no, it means that the comparison result of each processor type and its preset type is consistent, and the processor is not faulty, then the other detection contents of the power-on self-test phase of the basic input and output system can continue to be executed; but if the flag bit assignment value is yes, it means that the comparison result of the processor type and its preset type is inconsistent, indicating that the processor is faulty at this time, and the specific error information of one or more processor type mismatches needs to be reported to the baseboard management controller of the server for subsequent user problem analysis.

[0156] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which compares the processor type with the corresponding preset type in sequence, and assigns a value to the flag bit according to the comparison result, and specifically includes the following contents:

[0157] First, read the first processor type, compare the first processor type with the first preset type, and when the first processor type and the first preset type are consistent, proceed to the next step of comparing the processor type with the preset type;

[0158] Then, when the first processor type is inconsistent with the first preset type, the flag bit is assigned a value of yes, and the next step of comparing the processor type with the preset type is performed;

[0159] Finally, the flag bit value is read, and when the flag bit value is yes, it is determined that the processor is faulty, and error information of the first processor type mismatch is reported to the baseboard management controller of the server.

[0160] In the embodiment of the present application, as described above, it is necessary to compare each processor type with its corresponding preset type in turn. Taking the first processor type as an example, when the first processor type is consistent with the first preset type, it means that the first processor type matches, and then the judgment of the second processor type is continued. When the first processor type is inconsistent with the first preset type, it is judged that the first processor type does not match at this time, and the mismatch information is recorded and the initial value of the flag bit is changed to yes. When the flag bit is yes, it is determined that the first processor is faulty at this time, and the corresponding mismatch information needs to be reported to the baseboard management controller of the server for further analysis.

[0161] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which continues to perform the next processor type and preset type comparison step, and specifically also includes the following contents:

[0162] First, read the second processor type, compare the second processor type with the second preset type, and when the second processor type and the second preset type are consistent, proceed to the next step of comparing the processor type with the preset type;

[0163] Then, when the second processor type is inconsistent with the second preset type, the flag bit is assigned a value of yes, and the next processor type and preset type comparison step is continued.

[0164] Finally, the flag bit value is read, and when the flag bit value is yes, it is determined that the processor is faulty, and error information of the second processor type mismatch is reported to the baseboard management controller of the server.

[0165] In the embodiment of the present application, as described above, it is necessary to compare and judge each processor type with its corresponding preset type in turn. After completing the judgment of the first processor type, it is necessary to judge the second processor type. The specific implementation process is similar to the first processor type judgment process and will not be repeated here.

[0166] For example, the specific implementation process is as follows Figure 3 As shown, Figure 3 This is a flowchart for judging a processor type proposed in an embodiment of the present application. First, the initial value of the flag bit needs to be assigned to "no", and then each processor type is judged in turn. When the processor type does not match the preset type, the flag bit assignment is modified to "yes", and the matching judgment of the next processor type is performed; when the processor type matches the preset type, the matching judgment of the next processor type is performed directly. After the matching judgment of each processor type is completed, it is necessary to judge the flag bit assignment. If the assignment is "no", the process ends. If the assignment is "yes", the specific processor mismatch information is reported to the baseboard management controller of the server.

[0167] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which determines whether the microcode loading of the processor is successful. When the microcode loading of the processor fails, the error information of the unsuccessful microcode loading is reported to the baseboard management controller of the server, which specifically includes the following contents:

[0168] First, the processor microcode is read, and the address and size of the processor microcode are set.

[0169] In the embodiment of the present application, as described above, when the processor microcode can be read, it is necessary to continue to perform loading judgment on the processor microcode. First, it is necessary to read the microcode of the processor, and according to the read processor microcode, the address and size of the processor microcode are set for the subsequent judgment process.

[0170] In an optional embodiment, through the basic input and output system, according to different operating systems, PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize are set to express the address and size of the processor microcode, and subsequent judgments are made based on the settings.

[0171] Then, according to the address and size of the processor microcode, it is determined whether the processor microcode is loaded successfully; when the processor microcode fails to load, an error message indicating that the microcode loading is unsuccessful is reported to the baseboard management controller of the server.

[0172] In an embodiment of the present application, after the address and size of the processor microcode are set, it is necessary to use the relevant information of the set processor microcode to determine whether the processor microcode is loaded successfully. When the processor microcode can be loaded successfully, it is determined that the processor microcode has passed the verification and the judgment of other steps in the power-on self-test can be performed; when the processor microcode fails to load, it is determined that the processor is faulty at this time, and the error information of the unsuccessful microcode loading needs to be reported to the baseboard management controller of the server.

[0173] For example, the specific implementation process is as follows Figure 4 As shown, Figure 4 This is a judgment flow chart of a processor microcode proposed in an embodiment of the present application. First, the processor microcode needs to be read. When the processor microcode cannot be read successfully, it is determined that the processor is faulty at this time, and the error information of unsuccessful microcode reading is reported to the baseboard management controller of the server; when the microcode is read successfully, the address and size need to be set according to the read processor microcode. After the setting is completed, the processor microcode loading is judged. When the processor microcode can be loaded successfully, it is judged that the processor microcode has passed the verification, and the judgment of other steps in the power-on self-test can be performed; when the processor microcode fails to load, it is determined that the processor is faulty at this time, and the error information of unsuccessful microcode loading needs to be reported to the baseboard management controller of the server.

[0174] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which specifically includes the following contents:

[0175] When there are multiple processors, during the power-on self-test phase of the basic input and output system, the processor type and processor microcode are read;

[0176] The processor type of each processor is compared with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and error information of the processor type mismatch is reported to the baseboard management controller of the server.

[0177] In addition to the above, it also includes:

[0178] Reading the processor microcode of each processor, and when the processor microcode is not read, reporting error information of unsuccessful microcode reading to the baseboard management controller of the server;

[0179] It is determined whether the processor microcode of each processor is loaded successfully. When the processor microcode loading fails, an error message of the microcode loading failure is reported to the baseboard management controller of the server.

[0180] In the embodiment of the present application, in a server environment, there may be multiple different processors, each processor performs its own corresponding function. Similarly, when the basic input and output system performs the power-on self-test stage, it is necessary to perform processor fault detection on each processor included to ensure that the system can work normally, and when the processor fails, it can be specifically detected which processor has what kind of fault. The specific method is also as described above, each processor type is compared with the preset type, each processor microcode is read, and each processor microcode is judged whether it is successfully loaded. When the above detection steps are passed, the subsequent power-on self-test steps are continued. When a processor detection step fails, the specific error information needs to be reported to the baseboard management controller of the server for subsequent problem location and diagnosis.

[0181] In combination with the above embodiments, in one implementation, the present application further provides a processor fault detection method, which, after reporting the error information to the baseboard management controller of the server, specifically also includes the following contents:

[0182] After receiving the error information, the baseboard management controller of the server records a problem log; and reads the error information according to the problem log to locate the fault position.

[0183] In the embodiment of the present application, after the baseboard management controller of the server receives the error information, not only can the error information be displayed to the user through a screen or a user interface to facilitate the user to perform timely fault location and fault analysis, but the error information can also be stored based on the baseboard management controller of the server and recorded in a problem log. When it is necessary to analyze the processor failure later, the processor failures that have occurred in the past can be reviewed according to the problem log stored in the baseboard management controller of the server, which is convenient for information integration, seeking common points from multiple historical problems, and locating the fault problem more accurately, which is beneficial to the user's subsequent use.

[0184] Based on the same design concept, an embodiment of the present application provides a processor fault detection device. Figure 5 , Figure 5 1 is a structural block diagram of a processor fault detection device provided by an embodiment of the present application. Figure 5 As shown, the device comprises:

[0185] A reading module, used for reading the processor type and processor microcode of the server during the power-on self-test phase of the basic input and output system;

[0186] A processor type comparison module, used to compare the processor type with a preset type, and when the processor type is inconsistent with the preset type, determine that the processor is faulty, and report error information of the processor type mismatch to the baseboard management controller of the server;

[0187] A processor microcode reading module, used for reading the processor microcode, and reporting an error message of unsuccessful microcode reading to the baseboard management controller of the server when the processor microcode is not read;

[0188] The processor microcode loading module determines whether the processor microcode loading is successful, and when the processor microcode loading fails, reports the error information of the microcode loading failure to the baseboard management controller of the server.

[0189] Optionally, the processor fault detection device further includes:

[0190] An error information printing module, used for printing the error information reported by the basic input and output system on the self-check page;

[0191] The error information display module is used to display the error information reported by the basic input and output system on the screen. The error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading.

[0192] Optionally, the processor fault detection device further includes:

[0193] An error information parsing module, used for parsing the error information reported by the basic input and output system by the baseboard management controller of the server when a screen failure occurs, wherein the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading;

[0194] The analysis result display module is used to display the analysis result through the user interface of the baseboard management controller of the server.

[0195] Optionally, the processor type comparison module further includes:

[0196] A processor type comparison submodule, used to compare the processor type with corresponding preset types in sequence, the processor type including a first processor type, a second processor type, a third processor type, and a fourth processor type;

[0197] A first processor fault determination submodule, for determining that the processor is faulty when the first processor type is inconsistent with the first preset type, and reporting error information of the first processor type mismatch to the baseboard management controller of the server;

[0198] A second processor fault determination submodule, for determining that the processor is faulty when the second processor type is inconsistent with the second preset type, and reporting error information of the second processor type mismatch to the baseboard management controller of the server;

[0199] A third processor fault determination submodule, for determining that the processor is faulty when the third processor type is inconsistent with the third preset type, and reporting error information of the third processor type mismatch to the baseboard management controller of the server;

[0200] The fourth processor fault determination submodule is used to determine that the processor is faulty when the fourth processor type is inconsistent with the fourth preset type, and report error information of the fourth processor type mismatch to the baseboard management controller of the server.

[0201] Optionally, the processor type comparison module further includes:

[0202] A flag bit setting submodule, used to set the initial value of the flag bit to "no" during the power-on self-test phase of the basic input / output system, wherein the flag bit is used to indicate whether to report an error message of processor type mismatch to the baseboard management controller of the server;

[0203] A flag bit assignment submodule, used to compare the processor type with the corresponding preset type in sequence, and assign a value to the flag bit according to the comparison result;

[0204] A flag bit reading submodule, used to read the current value of the flag bit;

[0205] A first fault judgment submodule, for, when the flag bit is assigned a value of "no", the processor does not have a fault and continues to execute the power-on self-test phase of the basic input and output system;

[0206] The second fault judgment submodule is used to determine that a processor fault exists when the flag bit is assigned a value of yes, and report error information of a processor type mismatch to the baseboard management controller of the server.

[0207] Optionally, the flag bit assignment submodule further includes:

[0208] A first processor type reading unit, configured to read the first processor type, compare the first processor type with the first preset type, and proceed to the next processor type and preset type comparison step when the first processor type and the first preset type are consistent;

[0209] A first flag bit assignment unit, configured to assign the flag bit to yes when the first processor type is inconsistent with the first preset type, and proceed to the next step of comparing the processor type with the preset type;

[0210] A flag bit reading unit, used for reading the flag bit value;

[0211] The first error information reporting unit is used to determine that the processor is faulty when the flag bit is assigned a value of yes, and report the first processor type mismatch error information to the baseboard management controller of the server.

[0212] Optionally, the flag bit assignment submodule further includes:

[0213] A second processor type reading unit, configured to read the second processor type, compare the second processor type with the second preset type, and proceed to the next processor type and preset type comparison step when the second processor type and the second preset type are consistent;

[0214] A second flag bit assignment unit is used to assign a flag bit value of yes when the second processor type is inconsistent with the second preset type, and proceed to the next processor type and preset type comparison step

[0215] A flag bit reading unit, used for reading the flag bit value;

[0216] The second error information reporting unit is used to determine that the processor is faulty when the flag bit is assigned a value of yes, and report the error information of the second processor type mismatch to the baseboard management controller of the server.

[0217] Optionally, the processor microcode loading module includes:

[0218] A setting submodule, used for reading the processor microcode and setting the address and size of the processor microcode;

[0219] A processor microcode loading judgment submodule, used to judge whether the processor microcode is loaded successfully according to the address and size of the processor microcode;

[0220] The microcode loading failure reporting submodule is used to report the error information of the microcode loading failure to the baseboard management controller of the server when the microcode loading of the processor fails.

[0221] Optionally:

[0222] The reading module is also used to read each processor type and processor microcode during the power-on self-test phase of the basic input and output system when there are multiple processors;

[0223] The processor type comparison module is also used to compare the processor type of each processor with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty and an error message of processor type mismatch is reported to the baseboard management controller of the server.

[0224] Optionally:

[0225] The processor microcode reading module is further used to read the processor microcode of each processor, and when the processor microcode is not read, report the error information of the microcode reading failure to the baseboard management controller of the server;

[0226] The processor microcode loading module is also used to determine whether the processor microcode loading of each processor is successful. When the processor microcode loading fails, the error information of the unsuccessful microcode loading is reported to the baseboard management controller of the server.

[0227] Optionally, the processor fault detection device further includes:

[0228] A problem log recording module, used for the baseboard management controller of the server to record a problem log after receiving the error information;

[0229] The problem log reading module is used to read the error information and locate the fault position according to the problem log.

[0230] Based on the same design concept, another embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the processor fault detection method described in any of the above embodiments of the present application are implemented.

[0231] Based on the same design concept, another embodiment of the present application provides an electronic device, such as Figure 6 shown. Figure 6 This is a schematic diagram of an electronic device shown in an embodiment of the present application. The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes, the steps in the processor fault detection method described in any of the above embodiments of the present application are implemented.

[0232] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0233] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0234] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present application may adopt the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the embodiments of the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0235] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0236] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0237] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0238] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0239] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0240] The above is a detailed introduction to a processor fault detection method, device, equipment, medium and product provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A processor fault detection method, characterized in that: Basic input and output systems for servers, including: During the power-on self-test phase of the basic input / output system, the processor type and processor microcode of the server are read, wherein the processor type is used to describe basic information of the processor, and the processor microcode is used to describe an operating mode of the processor; Comparing the processor type with a preset type, and when the processor type is inconsistent with the preset type, determining that the processor is faulty, and reporting error information of the processor type mismatch to the baseboard management controller of the server; The processor microcode is read, and when the processor microcode is not read, an error message of unsuccessful microcode reading is reported to a baseboard management controller of the server; Determine whether the microcode loading of the processor is successful, and when the microcode loading of the processor fails, report error information of the unsuccessful microcode loading to the baseboard management controller of the server.

2. A processor fault detection method according to claim 1, characterized in that: Also includes: Print the error information reported by the basic input and output system on the self-test page; The error information reported by the basic input and output system is displayed on the screen, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of microcode reading failure, and error information of microcode loading failure.

3. A processor fault detection method according to claim 2, characterized in that: Also includes: When a screen fails, the baseboard management controller of the server parses the error information reported by the basic input and output system, and the error information reported by the basic input and output system includes at least one of the following: error information of processor type mismatch, error information of unsuccessful microcode reading, and error information of unsuccessful microcode loading; The analysis result is displayed through a user interface of the baseboard management controller of the server.

4. A processor fault detection method according to claim 1, characterized in that: The processor type is compared with a preset type, and when the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and error information of the processor type mismatch is reported to a baseboard management controller of the server, including: Comparing the processor type with corresponding preset types in sequence, the processor type including a first processor type, a second processor type, a third processor type, and a fourth processor type; When the first processor type is inconsistent with the first preset type, determining that the processor is faulty, and reporting error information of the first processor type mismatch to the baseboard management controller of the server; When the second processor type is inconsistent with the second preset type, determining that the processor is faulty, and reporting error information of the second processor type mismatch to the baseboard management controller of the server; When the third processor type is inconsistent with the third preset type, determining that the processor is faulty, and reporting error information of the third processor type mismatch to the baseboard management controller of the server; When the fourth processor type is inconsistent with the fourth preset type, it is determined that the processor is faulty, and error information of the fourth processor type mismatch is reported to the baseboard management controller of the server.

5. A processor fault detection method according to claim 4, characterized in that: Before comparing the processor type with the corresponding preset type in sequence, the method further includes: In a power-on self-test phase of the basic input / output system, an initial value of a flag bit is set to "no", the flag bit being used to indicate whether to report an error message of a processor type mismatch to a baseboard management controller of the server; Comparing the processor type with the corresponding preset type in sequence, and assigning a value to the flag bit according to the comparison result; Read the current value of the flag bit; When the flag bit is assigned a value of no, the processor does not have a fault and continues to execute the power-on self-test phase of the basic input and output system; When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information of processor type mismatch is reported to the baseboard management controller of the server.

6. A processor fault detection method according to claim 5, characterized in that: Comparing the processor type with the corresponding preset type in sequence, and assigning a value to the flag bit according to the comparison result, including: Reading the first processor type, comparing the first processor type with the first preset type, and when the first processor type and the first preset type are consistent, proceeding to the next step of comparing the processor type with the preset type; When the first processor type is inconsistent with the first preset type, assigning the flag bit a value of yes, and proceeding to the next step of comparing the processor type with the preset type; Read the flag bit assignment; When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information of the first processor type mismatch is reported to the baseboard management controller of the server.

7. A processor fault detection method according to claim 6, characterized in that: Continue to the next step of comparing the processor type to the preset type, including: Reading the second processor type, comparing the second processor type with the second preset type, and when the second processor type and the second preset type are consistent, proceeding to the next step of comparing the processor type with the preset type; When the second processor type is inconsistent with the second preset type, the flag bit is assigned a value of yes, and the next processor type and preset type comparison step is continued. Read the flag bit assignment; When the flag bit is assigned a value of yes, it is determined that the processor is faulty, and error information that the second processor type does not match is reported to the baseboard management controller of the server.

8. A processor fault detection method according to claim 1, characterized in that: Determining whether the microcode loading of the processor is successful, and when the microcode loading of the processor fails, reporting error information of the microcode loading failure to the baseboard management controller of the server, including: Reading the processor microcode, and setting the address and size of the processor microcode; Determining whether the processor microcode is loaded successfully according to the address and size of the processor microcode; When the processor microcode loading fails, error information of the microcode loading failure is reported to the baseboard management controller of the server.

9. A processor fault detection method according to claim 1, characterized in that: Also includes: When there are multiple processors, during the power-on self-test phase of the basic input and output system, the type of each processor and the processor microcode are read; The processor type of each processor is compared with a preset type. When the processor type is inconsistent with the preset type, it is determined that the processor is faulty, and error information of the processor type mismatch is reported to the baseboard management controller of the server.

10. A processor fault detection method according to claim 9, characterized in that: Also includes: Reading the processor microcode of each processor, and when the processor microcode is not read, reporting error information of unsuccessful microcode reading to the baseboard management controller of the server; It is determined whether the processor microcode of each processor is loaded successfully. When the processor microcode loading fails, an error message of the microcode loading failure is reported to the baseboard management controller of the server.

11. A processor fault detection method according to any one of claims 1 to 10, characterized in that: After reporting the error information to the baseboard management controller of the server, the method further includes: After receiving the error information, the baseboard management controller of the server records a problem log; According to the problem log, the error information is read to locate the fault location.

12. A processor fault detection device, characterized in that: The device comprises: A reading module, used for reading the processor type and processor microcode of the server during the power-on self-test phase of the basic input and output system; A processor type comparison module, used to compare the processor type with a preset type, and when the processor type is inconsistent with the preset type, determine that the processor is faulty, and report error information of the processor type mismatch to the baseboard management controller of the server; A processor microcode reading module, used for reading the processor microcode, and reporting an error message of unsuccessful microcode reading to the baseboard management controller of the server when the processor microcode is not read; The processor microcode loading module determines whether the processor microcode loading is successful, and when the processor microcode loading fails, reports the error information of the microcode loading failure to the baseboard management controller of the server.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the computer program is executed by the processor, the processor fault detection method according to any one of claims 1 to 11 is implemented.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the processor fault detection method according to any one of claims 1 to 11 is implemented.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the processor fault detection method according to any one of claims 1 to 11 is implemented.

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