Bootstrap circuit, drive system and motor device

Abstract

The present invention provides a bootstrap circuit, a driving system and a motor device, wherein the bootstrap circuit includes a voltage isolation unit, a charge pump unit and a charge-discharge unit; the voltage isolation unit receives a first voltage signal and a first driving signal respectively, outputs the first voltage signal at a reduced voltage based on the first driving signal, and isolates the first voltage signal from the charge pump unit; the charge pump unit is arranged between the voltage isolation unit and the charge-discharge unit, receives a control signal, and under the action of the control signal, performs charge compensation on the charge-discharge unit in a discharge state based on the output voltage of the voltage isolation unit; the charge-discharge unit is connected to the charge pump unit, receives a second voltage signal, and regulates the charge or discharge of the charge-discharge unit based on the second voltage signal. The voltage difference between the input and output ends of the charge pump unit in the present invention is much less than 50V, so it is easy to implement in the integrated circuit process, the circuit design is relatively easy, and it can be widely applied to different application scenarios.

Description

Technical Field

[0001] The present invention relates to the field of circuit switch control, and in particular to a bootstrap circuit, a drive system and a motor device. Background Art

[0002] The bootstrap circuit is a circuit design commonly used in the field of power electronics, especially in half-bridge drive circuits. Its core principle is to use storage cells to store and transfer charges, and to boost the voltage in a charge-discharge manner, thereby providing sufficient drive voltage for the device. However, since the charge is continuously consumed during the discharge process, the output drive voltage is unstable, which may cause the device to malfunction. Therefore, a charge pump is often added in the prior art, which extracts the charge of the input voltage through the charge pump and replenishes the consumed charge during the discharge process of the storage unit to ensure the stability of the drive voltage.

[0003] However, in actual applications, depending on the application environment, the voltage range of the charge pump input can range from 5V to 1000V, while the voltage range of the charge pump output is usually between 5V and 20V; therefore, if the voltage range of the charge pump input exceeds 70V, the voltage difference across the charge pump may exceed 50V. Since analog integrated circuit devices are difficult to manufacture at a breakdown voltage exceeding 50V and the application conditions are subject to many restrictions, if the voltage difference exceeds 50V, it will pose a major challenge to the design of integrated circuits. This not only limits its applicability in a variety of application scenarios, but is also not conducive to the miniaturization and integration of circuit systems.

[0004] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a bootstrap circuit, a drive system and a motor device, which are used to solve the problems of large charge pump voltage difference in the bootstrap circuit in the prior art.

[0006] To achieve the above object and other related objects, the present invention provides a bootstrap circuit, comprising:

[0007] A voltage isolation unit, a charge pump unit, and a charge and discharge unit;

[0008] The voltage isolation unit receives a first voltage signal and a first driving signal respectively, steps down the first voltage signal based on the first driving signal and outputs the first voltage signal, and isolates the first voltage signal from the charge pump unit;

[0009] The charge pump unit is arranged between the voltage isolation unit and the charge-discharge unit, receives a control signal, and under the action of the control signal, performs charge compensation on the charge-discharge unit in a discharge state based on the output voltage of the voltage isolation unit; the voltage isolation unit includes any one of a MOS tube, an IGBT tube, and a BJT transistor;

[0010] The charging and discharging unit is connected to the charge pump unit, receives a second voltage signal, and regulates charging or discharging of the charging and discharging unit based on the second voltage signal;

[0011] Wherein, the first voltage signal and the second voltage signal are both realized by power supply outside the bootstrap circuit.

[0012] Optionally, the voltage isolation unit further includes a clamping structure for clamping the output voltage of the voltage isolation unit.

[0013] Optionally, the charging and discharging unit includes a capacitor.

[0014] To achieve the above-mentioned object and other related objects, the present invention provides a driving system, comprising: a first transistor, a second transistor, a first driving module, a second driving module and the bootstrap circuit;

[0015] The first transistor is disposed between the first voltage signal and the output terminal of the driving system, and receives the first driving signal to be turned on;

[0016] The second transistor is arranged between the output terminal of the driving system and the reference ground, and receives a second driving signal to be turned on;

[0017] The first driving module is connected in parallel with the charging and discharging unit, and the charging and discharging unit discharges to supply power to the first driving module and output the first driving signal;

[0018] The second driving module is disposed between the second voltage signal and a reference ground, and is powered by the second voltage signal and outputs the second driving signal.

[0019] Optionally, the first driving module further receives a first logic signal, and controls the output of the first driving signal based on the first logic signal; the second driving module further receives a second logic signal, and controls the output of the second driving signal based on the second logic signal.

[0020] Optionally, when any one of the first transistor and the second transistor is turned on, the other transistor is turned off.

[0021] Optionally, the first transistor and the second transistor are both configured as NMOS transistors.

[0022] Optionally, the voltage isolation unit is configured as an NMOS tube.

[0023] To achieve the above-mentioned object and other related objects, the present invention provides a driving system, comprising: a motor load, a logic circuit and the driving system as described above;

[0024] The logic circuit is used to generate the control signal and output it to the drive system;

[0025] The output end of the driving system is connected to the motor load for driving the motor load to work.

[0026] As described above, the bootstrap circuit, drive system and motor device of the present invention have the following beneficial effects:

[0027] 1. In the present invention, by setting a voltage isolation unit, the voltage difference between the input and output ends of the charge pump unit is much smaller than 50V, so it is easy to implement in the integrated circuit process, the circuit design is relatively easy, and it can be widely used in different application scenarios, which is conducive to the integration and miniaturization of the circuit system.

[0028] 2. In the present invention, by setting the voltage isolation unit, the charge pump unit will not introduce voltage ripple and noise at the load end, thereby avoiding the reduction of the signal-to-noise ratio of the RF system due to the design of the charge pump unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Shown is a structural schematic diagram of a half-bridge drive circuit.

[0030] Figure 2 Shown is a structural schematic diagram of another half-bridge drive circuit.

[0031] Figure 3 Shown is a schematic framework diagram of a driving system of the present invention.

[0032] Figure 4 Shown is a structural schematic diagram of a driving system of the present invention.

[0033] Figure 5 Display as Figure 2 FIG. 5 is a schematic diagram showing the relationship between the charge pump operating current and the load end noise in the half-bridge drive circuit shown in FIG.

[0034] Figure 6 Shown is a simulation test diagram of the voltage difference across the charge pump unit in the present invention.

[0035] Figure 7Shown is a simulation test diagram of the current value of the charge pump unit in the present invention.

[0036] Figure 8 Shown is a simulation test diagram of the voltage value of the output signal in the present invention.

[0037] Component number description

[0038] 1-half-bridge driving circuit; 11-first driver; 12-second driver; 13-charge pump; 2-half-bridge driving circuit; 3-driving system; 31-bootstrap circuit; 311-voltage isolation unit; 312-charge pump unit; 313-charging and discharging unit; 32-first transistor; 33-second transistor; 34-first driving module; 35-second driving module. DETAILED DESCRIPTION

[0039] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0040] See also Figure 1 to Figure 8 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0041] Comparative Example 1

[0042] like Figure 1 As shown, this comparative example provides a half-bridge driving circuit 1, including: a first NMOS transistor NH, a second NMOS transistor NL, a first driver 11, a second driver 12, a diode D1 and a bootstrap capacitor C.

[0043] like Figure 1 As shown, the first NMOS tube NH is used as a high-side power tube of the half-bridge circuit, with a gate connected to the output end of the first driver 11, a drain connected to the input voltage, and a source as the output end of the half-bridge drive circuit 1 and outputting an output signal Vo; the second NMOS tube NL is used as a low-side power tube of the half-bridge circuit, with a gate connected to the output end of the second driver 12, a source connected to the reference ground GND, and a drain connected to the output end of the half-bridge drive circuit 1. In use, the first NMOS tube NH and the second NMOS tube NL are both turned on based on the gate voltage provided by the corresponding driver, and when one NMOS tube is turned on, the other NMOS tube is turned off.

[0044] Specifically, the first end of the first driver 11 is connected to the driving voltage node VH, the second end is connected to the source of the first NMOS tube NH, the third end receives the high-level control signal HIN, the fourth end is connected to the gate of the first NMOS tube NH, and is powered based on the driving voltage node VH and drives the first NMOS tube NH to conduct when receiving the high-level control signal HIN. The first end of the second driver 12 is connected to the working voltage VDD, the second end is connected to the source of the second NMOS tube NL, the third end receives the low-level control signal LIN, the fourth end is connected to the gate of the second NMOS tube NL, and is powered based on the working voltage VDD and drives the second NMOS tube NL to conduct when receiving the low-level control signal LIN. Among them, the driving voltage node VH is set as the output node after the working voltage VDD flows through the diode D1.

[0045] Specifically, the first plate of the bootstrap capacitor C is connected to the driving voltage node VH, and the second plate is connected to the source of the first NMOS tube NH; when the first NMOS tube NH is turned off and the second NMOS tube NL is turned on, the potential of the output signal Vo of the half-bridge drive circuit 1 is pulled down to the reference ground GND, and the working voltage VDD charges the bootstrap capacitor C through the diode D1. When the first NMOS tube NH is turned on and the second NMOS tube NL is turned off, the potential of the output signal Vo of the half-bridge drive circuit 1 is raised to the input voltage VIN. At this time, the potential of the first plate of the bootstrap capacitor C (driving voltage node VH) is raised to a potential greater than the power supply VIN. The potential of the working voltage VDD is lower than the driving voltage node VH and cannot supply power to the bootstrap capacitor C. Therefore, the working current of the first driver 11 comes from the charge stored in the bootstrap capacitor C, and the bootstrap capacitor C discharges to provide the working current for the first driver 11. During the conduction period of the high-side power tube in the half-bridge drive circuit 1, the charge stored in the bootstrap capacitor supplies power to the first driver 11.

[0046] In this comparative example, because the working current of the first driver 11 is not 0, the charge stored in the bootstrap capacitor C will be gradually consumed, so the voltage on the bootstrap capacitor C will slowly decrease until the normal operation of the first driver 11 cannot be maintained. In order to maintain the continuous conduction of the high-side power tube, this comparative example 1 adds a charge pump 13 to supplement the charge of the bootstrap capacitor C during the discharge process. In this comparative example, the input end of the charge pump 13 is connected to the input voltage VIN and draws current from the input voltage VIN, and the output end of the charge pump 13 is connected to the driving voltage node VH. The charge pump 13 performs a boost operation to boost its output voltage to a voltage higher than the input power supply voltage VIN and supplies power to the driving voltage node VH.

[0047] When the second NMOS transistor NL is turned on and the first NMOS NH is turned off, the potential of the driving voltage node VH is V H =V DD-V D1 ; V DD is the potential of the operating voltage VDD, V D1 is the forward conduction voltage drop of diode D1, which is about 0.7V. Under such conditions, the voltage difference Vx across the charge pump 13 in the circuit satisfies: Vx=V IN -V H =V IN -V DD +V D1 .

[0048] Generally speaking, the breakdown voltage between the gate and source of an NMOS tube is generally lower than 20V, and the threshold voltage of an NMOS tube is generally about 2V. In order to ensure the normal operation of the NMOS tube, the operating voltage VDD of the second driver 12 is usually between 5V and 20V. However, depending on the application scenario, the voltage value of the input voltage VIN is between 5V and 1000V. If the input voltage VIN is higher than 70V, the voltage difference Vx across the charge pump 13 will be greater than 50V. Due to the difficulty of integrated circuit process development, there are very few types of analog integrated circuit devices with a breakdown voltage higher than 50V, and their application conditions are also subject to many restrictions. Therefore, if the voltage difference Vx across the charge pump 13 is greater than 50V, it will bring great difficulties to the integrated circuit design, making it difficult to apply to a variety of application scenarios and not conducive to the integration and miniaturization of the circuit system.

[0049] Comparative Example 2

[0050] In order to solve the problem of large voltage difference between the two ends of the charge pump, this comparative example provides another half-bridge driving circuit 2, which is basically the same as the comparative example 1, except that the input terminal of the charge pump 13 is connected at a different position.

[0051] Specifically, the input end of the charge pump 13 is connected to the source of the first NMOS transistor NH, that is, current is drawn from the output end of the half-bridge drive circuit 2, and the driving voltage node VH is powered after performing a boost operation. At this time, the voltage difference Vx across the charge pump 13 is V o -V H =-V DD +V D1 , the voltage difference across the charge pump 13 is much smaller than 50V, thus avoiding the problem in the first comparative example.

[0052] Since the charge pump 13 needs to periodically switch its internal switch to complete the charge transfer for charging and discharging the capacitor, the charge is transferred from the input end to the output end. However, at the moment when the charge pump 13 switches to charge the capacitor, a large charging current spike will be generated, and the charging current is provided by the input end (the source of the first NMOS tube) of the charge pump 13. Because the output end of the half-bridge drive circuit 2 and the input voltage VIN are separated by the first NMOS tube NH, and the first NMOS tube NH has a certain on-resistance, the charging current spike of the charge pump 13 will cause the Vo node to generate a downward voltage ripple. The larger the on-resistance of the first NMOS tube NH, the larger the downward voltage ripple of the Vo node; the larger the charging current spike of the charge pump 13, the larger the downward voltage ripple of the Vo node. For RF applications, the Vo node will be connected to the RF amplifier load, and the voltage ripple of the Vo node will introduce noise to the RF amplifier, resulting in a reduction in the signal-to-noise ratio of the RF system.

[0053] like Figure 5 As shown in the figure, the relationship between the current value of the charge pump 13 and the load-end noise (Vo node) is that since the internal current value of the charge pump 13 is a periodic pulse current value, when this current flows through the first NMOS tube NH, the source voltage of the first NMOS tube NH will be changed due to the internal resistance of the first NMOS tube NH, that is, pulse voltage noise will appear at the Vo node.

[0054] Example

[0055] In order to solve the problems existing in the comparative example 1 and the comparative example 2 at the same time, this embodiment provides a bootstrap circuit 31. Figure 3 and Figure 4 As shown, the bootstrap circuit 31 of this embodiment includes: a voltage isolation unit 311 , a charge pump unit 312 and a charge-discharge unit 313 .

[0056] like Figure 3 and Figure 4 As shown, the voltage isolation unit 311 receives the first voltage signal V1 and the first driving signal respectively, steps down the first voltage signal V1 based on the first driving signal and outputs it, and isolates the first voltage signal V1 from the charge pump unit 312 .

[0057] Specifically, the first voltage signal V1 is realized by external power supply of the bootstrap circuit 31. In this embodiment, the first voltage signal V1 is set to a power supply voltage VIN, whose voltage value is between 5V and 1000V, and can be derived from the power supply voltage of the chip or the power supply voltage of the semiconductor device.

[0058] Specifically, the voltage isolation unit 311 includes any one of a MOS transistor, an IGBT transistor, and a BJT transistor.

[0059] As an example, in this embodiment, the voltage isolation unit 311 is set to be a first NMOS tube NM1, whose drain is connected to the first voltage signal V1, the gate receives the first driving signal, and the source is connected to the input end of the charge pump unit 312. By adjusting the gate voltage loaded on the first NMOS tube NM1, the first NMOS tube NM1 is turned on or off and the voltage is stepped down and output to the input end of the charge pump unit 312. Compared with the comparative example 1, the charge pump unit 312 in this embodiment is not directly connected to the first voltage signal V1, avoiding the voltage difference problem that may exist in the circuit of the charge pump unit 312.

[0060] Specifically, the voltage isolation unit 311 further includes a clamping structure for clamping the output voltage of the voltage isolation unit 311 .

[0061] As an example, in this embodiment, if Figure 4 As shown, the clamping structure is configured as a clamping diode D2, whose cathode is connected to the gate of the first NMOS transistor NM1, and whose anode is connected to the source of the first NMOS transistor NM1, and clamps the potential of the anode through the unidirectional conductive characteristic.

[0062] In the present embodiment, the voltage isolation unit 311 is set to reduce the voltage of the first voltage signal V1, thereby ensuring that the input end of the charge pump unit 312 is not directly connected to the power supply voltage VIN and the voltage value is suppressed, so that the voltage difference across the charge pump unit 312 is reduced, reducing the difficulty of integrated circuit process development, and ensuring that the charge pump unit 312 that meets the withstand voltage conditions can be manufactured under conventional processes; at the same time, since in the present embodiment, the charge pump unit 312 and the power supply voltage VIN are not in direct contact, the power supply voltage VIN can be set to a voltage value exceeding 70V, which can effectively improve the application scenarios of the bootstrap circuit 31 and even the drive system 3 using the bootstrap circuit 31.

[0063] like Figure 3 and Figure 4 As shown, the charge pump unit 312 is disposed between the voltage isolation unit 311 and the charge-discharge unit 313 , receives a control signal, and under the action of the control signal, performs charge compensation on the charge-discharge unit 313 in a discharge state based on the output voltage of the voltage isolation unit 311 .

[0064] As an example, a charge pump is a circuit that uses the charging and discharging of capacitors to achieve voltage conversion. It increases or decreases the input voltage level through switched capacitor technology and is usually composed of only capacitors and switches (such as field effect transistors or FETs). The charge pump can be used to boost, buck, or generate negative voltage. The MOSFET switch array inside it controls the charging and discharging of fast capacitors in a certain way, so that the input voltage is multiplied or reduced by a certain factor to obtain the required output voltage. In this embodiment, the charge pump unit 312 performs a boost operation to ensure subsequent use.

[0065] It should be noted that the input and output of the charge pump unit 312 exist in the hardware circuit, and the voltage difference exists continuously, and is not limited to the discharge process of the charge-discharge unit 313. The setting of the charge pump unit 312 of this embodiment needs to consider the potential setting of the input and output of the charge pump unit 312 in any use. Therefore, in this embodiment, the voltage isolation unit 311 is set to avoid the input of the charge pump unit 312 directly connected to the first voltage signal V1, effectively avoiding the problem of excessive voltage difference.

[0066] like Figure 3 and Figure 4 As shown, the charge-discharge unit 313 is connected to the second voltage signal V2 and the charge pump unit 312 , and the charge-discharge unit 313 is regulated to charge or discharge by the second voltage signal V2 .

[0067] Specifically, the second voltage signal V2 is realized by the external power supply of the bootstrap circuit 31. In this embodiment, the second voltage signal V2 is set to the working voltage VDD, which is usually between 5V and 20V, and can be realized by the power supply inside the semiconductor device.

[0068] Specifically, Figure 4 As shown, the charge and discharge unit 313 is set as a capacitor C1, whose upper plate is connected to the second voltage signal V2 and the charge pump unit 312. When the second voltage signal V2 exists and the voltage is higher than the upper plate voltage of the capacitor C1, the capacitor performs a charging operation, and the charge source is the second voltage signal V2; when the second voltage signal V2 does not exist or the voltage is less than the upper plate voltage of the capacitor C1, the capacitor performs a discharging operation, and in order to compensate for the charge loss at this time, the charge pump unit 312 is turned on for replenishment.

[0069] It should be noted that the configuration of the charge and discharge unit 313 is not limited to this embodiment, and any configuration that can perform charging or discharging is within the protection scope of this embodiment.

[0070] Combination Figure 6 The simulation diagram of the present embodiment is used to illustrate the voltage difference between the two ends of the charge pump unit 312 in the bootstrap circuit 31: Figure 6 As shown, in this embodiment, a power supply voltage VIN of 100V is provided. Under this power supply voltage VIN, the first drive signal is first low level (10.750448V) and then high level (110.5126V) from left to right. When the first drive signal is at a low level (before 2.0ms), the charge pump unit 312 does not work, and the voltage difference between its two ends is basically coincident, which is about 546.54148mV; when the first drive signal is at a high level (after 2.0ms), the charge pump unit 312 is turned on for supplementation, and the voltage difference between its two ends is relatively large. However, since the voltage isolation unit 311 is provided in this embodiment, the input voltage of the charge pump unit 312 is 99.99994V, and the output voltage of the charge pump unit 312 is 110.5126V, and the voltage difference between them is only about 10V, which is much lower than the case where the voltage difference between the two ends is 50V in the comparative example 1.

[0071] like Figure 3 and Figure 4 As shown, this embodiment further provides a driving system 3, including: a first transistor 32, a second transistor 33, a first driving module 34, a second driving module 35 and the above-mentioned bootstrap circuit 31.

[0072] like Figure 3 and Figure 4 As shown, the first transistor 32 is disposed between the first voltage signal V1 and the output terminal of the driving system 3, and is turned on by receiving the first driving signal. The second transistor 33 is disposed between the output terminal of the driving system 3 and the reference ground GND, and is turned on by receiving the second driving signal.

[0073] Specifically, when any one of the first transistor and the second transistor is turned on, the other transistor is turned off. A half-bridge circuit is a topological structure of a power electronic circuit, which consists of two switching devices that share a common connection point, called the neutral point or midpoint of the half-bridge. The two switching devices work in a complementary manner, that is, when one switch is turned on, the other switch is turned off, and they will not be turned on at the same time to avoid a short circuit. In half a cycle, one switch is turned on, and energy is transferred from the power supply to the load. In the other half cycle, the other switch is turned on, and energy can continue to be transferred or fed back from the load to the power supply.

[0074] As an example, the first transistor 32 and the second transistor 33 are both configured as NMOS transistors. Figure 4As shown, the first transistor 32 is set as the second NMOS tube NM2, and the second transistor 33 is set as the third NMOS tube NM3. The drain of the second NMOS tube NM2 is connected to the power supply voltage VIN, the gate receives the first drive signal, and the source outputs the output signal Vo of the drive system 3; the drain of the third NMOS tube NM3 outputs the output signal Vo of the drive system 3, the gate receives the second drive signal, and the source is grounded.

[0075] In this embodiment, when the second NMOS transistor NM2 is turned off and the third NMOS transistor NM3 is turned on, the potential of the output signal Vo is pulled down to the reference ground GND, and the working voltage VDD charges the capacitor C1 through the diode D1. When the second NMOS transistor NM2 is turned on and the third NMOS transistor NM3 is turned off, the potential of the output signal Vo is raised to the input voltage VIN. At this time, the potential of the first plate of the capacitor C1 is raised to a potential greater than the power supply VIN, and the working voltage VDD cannot supply power to the bootstrap capacitor C, so the working current of the first driving module 34 comes from the charge stored in the capacitor C1, and the capacitor C1 discharges to provide the working current for the first driving module 34.

[0076] In this embodiment, the voltage isolation unit 311 is set as an NMOS transistor. In this embodiment, it is preferred to set the voltage isolation unit 311 and the first transistor 32 to be of the same transistor type, so as to facilitate control by the same driving signal, thereby ensuring that the start-up process of the voltage isolation unit 311 and the conduction process of the first transistor 32 are consistent.

[0077] It should be noted that when the second NMOS tube NM2 is turned off and the third NMOS tube NM3 is turned on, the output signal Vo is pulled down to 0 potential, and the voltage at the output end of the charge pump unit 312 (the voltage node of the upper plate of the charge and discharge unit 313) satisfies VH=VDD-VD1, wherein VDD is the potential of the power supply voltage VDD, and VD1 is the forward conduction voltage difference of the diode D1, which is about 0.7V. The first gate voltage Vgh of the high-side NMOS tube (the second NMOS tube NM2) is pulled down by the first driving module 34, so that the gate voltage Vgh is equal to the output signal Vo potential, so the potential of the first gate voltage Vgh is also 0. The clamping diode D2 is forward-conducted, so the potential of the source voltage Vs2 of the first NMOS tube NM1 is pulled down to a maximum of 0.7V (the forward conduction voltage of the clamping diode D2 is about 0.7V). At this time, the voltage difference between the input and output of the charge pump unit 312 is Vx=VS2-VH=VD2-VDD+VD1, so the voltage difference between the input and output of the charge pump unit 312 is much smaller than 50V, avoiding the voltage difference problem that may exist in the circuit of the charge pump unit 312.

[0078] It should be further explained that, at the moment when the state of the charge pump unit 312 is switched to capacitor charging, a large charging current spike will be generated. Because the input end of the charge pump unit 312 is connected to the source of the first NMOS tube NM1, the charging current is provided by the first NMOS tube NM1, and the voltage ripple caused by the charging current spike of the charge pump unit 312 is located at the source node of the first NMOS tube NM1 (affecting the source voltage V S ), it will not cause voltage ripple at the output signal Vo node, thus not introducing noise at the Vo node.

[0079] Combination Figure 7~Figure 8 This is explained accordingly. Figure 7 As shown, when the power supply voltage VIN is 100V and the first driving signal is at a high level, the charge pump unit 312 starts to work, that is, when it starts to cooperate with the subsequent circuit to perform charge compensation, the working current in the charge pump unit 312 is in the form of a periodic pulse current with a peak value of 12.5mA. However, since the charge pump unit 312 is not directly connected to the second NMOS tube NM2, that is, it is not connected to the output signal Vo node, the pulse wave connects the voltage ripple generated by the transistor and will not introduce noise to the Vo node. Figure 8 The voltage value of the load node Vo shown in FIG. 1 is obviously different from that of the load node Vo in FIG. 1 . At this time, it can be clearly seen that the voltage value of the load node Vo will change with the switching, but there will be no voltage jitter or other noise-introducing problems at the moment of switching.

[0080] like Figure 3 and Figure 4 As shown, the first driving module 34 is connected in parallel with the charging and discharging unit 313, and the first driving module 34 is powered and outputs the first driving signal through the discharge of the charging and discharging unit 313. The second driving module 35 is arranged between the second voltage signal V2 and the reference ground, and the second driving module is powered and outputs the second driving signal through the second voltage signal V2.

[0081] Specifically, the first driving module 34 also receives a first logic signal HIN, and controls the output of the first driving signal based on the first logic signal HIN; the second driving module 35 also receives a second logic signal LIN, and controls the output of the second driving signal based on the second logic signal LIN.

[0082] In this embodiment, since the charge stored in the bootstrap capacitor C will be gradually consumed during this process and cannot maintain the continuous operation of the first driver 11, the present embodiment adds a charge pump unit 312 to supplement the charge of the bootstrap capacitor C during the discharge process. In this embodiment, the input end of the charge pump unit 312 is connected to the input voltage VIN to extract current from the input voltage VIN, and the output end of the charge pump unit 312 is connected to the driving voltage node VH. The charge pump unit 312 performs a boost operation to boost the output voltage of the charge pump unit 312 to a voltage higher than the input power supply voltage VIN and to supply power to the driving voltage node VH.

[0083] Specifically, the driving system 3 further includes a diode D1, the anode of which is connected to the second voltage signal V2 (operating voltage VDD), and the cathode of which is connected to the charge-discharge unit 313. In this embodiment, the diode D1 is used to prevent the voltage of the charge-discharge unit 313 from being reversely output to the second voltage signal V2.

[0084] It should be noted that there is also a certain forward conduction voltage difference between both ends of the diode D1, which is about 0.7V, which accounts for a small proportion when measuring the difference relationship between the first voltage signal V1 and the second voltage signal V2 and can be ignored.

[0085] This embodiment further provides a motor device, including: a motor load, a logic circuit (not shown in the figure) and the above-mentioned drive system 3.

[0086] Specifically, the logic circuit is used to generate a control signal and output it to the driving system 3 , and the control signal controls the charge pump unit 312 to work.

[0087] As an example, in this embodiment, the logic circuit is also used to generate a first logic signal HIN and a second logic signal LIN, which are respectively input to the first driving module 34 and the second driving module 35 to control the operation of the two driving modules respectively, and finally control the two NMOS tubes to operate in a complementary working state.

[0088] It should be noted that, in this embodiment, the setting of the control signal and the first logic signal HIN needs to ensure that the charge pump unit 312 is turned on when the second NMOS transistor NM2 is turned on.

[0089] Specifically, the output end of the driving system 3 is connected to the motor load for driving the motor load to work.

[0090] In this embodiment, the output signal Vo of the driving system 3 is a square wave signal, and the motor is driven to work by the level state of the square wave signal. In this embodiment, the motor is driven to rotate by the square wave signal.

[0091] In summary, the present invention provides a bootstrap circuit, a drive system and a motor device, wherein the bootstrap circuit includes a voltage isolation unit, a charge pump unit and a charge-discharge unit; the voltage isolation unit receives a first voltage and a first drive signal respectively, outputs a first voltage step-down based on the first drive signal, and isolates the first voltage from the charge pump unit; the charge pump unit is arranged between the voltage isolation unit and the charge-discharge unit, receives a control signal, and under the action of the control signal, performs charge compensation on the charge-discharge unit during discharge based on the output voltage of the voltage isolation unit; the charge-discharge unit is connected to a second voltage and the charge pump unit, and the charge or discharge of the charge-discharge unit is regulated by the second voltage. The voltage difference between the input and output ends of the charge pump unit in the present invention is much smaller than 50V, so it is easy to implement in the integrated circuit process, the circuit design is relatively easy, and it can be widely applied to different application scenarios. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0092] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A drive system, characterized in that: The driving system at least comprises: a first transistor, a second transistor, a first driving module, a second driving module and a bootstrap circuit; The bootstrap circuit at least includes: a voltage isolation unit, a charge pump unit and a charge and discharge unit; The voltage isolation unit receives a first voltage signal and a first driving signal respectively, steps down the first voltage signal based on the first driving signal and outputs it, and isolates the first voltage signal from the charge pump unit, so that the voltage difference between the input end and the output end of the charge pump unit is less than 50V; the voltage isolation unit includes any transistor of a MOS tube, an IGBT tube, or a BJT tube; The charge pump unit is disposed between the voltage isolation unit and the charge-discharge unit, receives a control signal, and under the action of the control signal, performs charge compensation on the charge-discharge unit in a discharge state based on the output voltage of the voltage isolation unit; The charging and discharging unit is connected to the charge pump unit, receives a second voltage signal, and regulates charging or discharging of the charging and discharging unit based on the second voltage signal; Wherein, the first voltage signal and the second voltage signal are both realized by power supply outside the bootstrap circuit; The first transistor is disposed between the first voltage signal and the output terminal of the driving system, and receives the first driving signal to be turned on; The second transistor is arranged between the output terminal of the driving system and the reference ground, and receives a second driving signal to be turned on; The first driving module is connected in parallel with the charging and discharging unit, and the charging and discharging unit discharges to supply power to the first driving module and output the first driving signal; The second driving module is disposed between the second voltage signal and a reference ground, and is powered by the second voltage signal and outputs the second driving signal.

2. The drive system according to claim 1, characterized in that: The voltage isolation unit further includes a clamping structure for clamping the output voltage of the voltage isolation unit.

3. The drive system according to claim 1, characterized in that: The charging and discharging unit includes a capacitor.

4. The drive system according to claim 1, characterized in that: The first driving module further receives a first logic signal, and controls the output of the first driving signal based on the first logic signal; the second driving module further receives a second logic signal, and controls the output of the second driving signal based on the second logic signal.

5. The drive system according to claim 4, characterized in that: When any one of the first transistor and the second transistor is turned on, the other transistor is turned off.

6. The driving system according to claim 1, characterized in that: The first transistor and the second transistor are both configured as NMOS transistors.

7. The driving system according to claim 6, characterized in that: The voltage isolation unit is configured as an NMOS tube.

8. A motor device, characterized in that: The motor device comprises a motor load, a logic circuit and a drive system according to any one of claims 1 to 7; The logic circuit is used to generate the control signal and output it to the drive system; The output end of the driving system is connected to the motor load for driving the motor load to work.

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