Power signal stabilization circuit, control method, electronic device and medium

Abstract

The present invention provides a power signal stabilization circuit, control method, electronic device, and medium, which are applied to the field of electronic device technology. The first end of a switching tube is connected to a digital signal processor and a controller; the second end of the switching tube is grounded; the third end of the switching tube is connected to a pull-up resistor, the output end of a high-level signal output circuit, the output end of a low-level signal output circuit, and the signal output end of the electronic device; and the controller is connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit, respectively. The controller is configured to, after obtaining the level state of the digital signal processor, selectively control the high-level signal output circuit to output a high-level signal or control the low-level output circuit to output a low-level signal, thereby ensuring that the level state at the signal output end of the electronic device is the same as the level state at the digital signal processor, achieving power signal stability, performing a current diversion function in the circuit, and further improving safety in use.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic equipment, and in particular to a power signal stabilization circuit, a control method, an electronic device, and a medium. Background Art

[0002] In electronic equipment systems, the power supply within the device is crucial, and the timeliness and accuracy of transmission are also crucial. In current electronic devices, the power supply current sharing not only affects the stability of the device's operation, but also the small power signals that are crucial to the power output, which often affect the operation of the entire device. Abnormalities in some signals can cause the entire device to crash or reduce the operating frequency of the central server within the device.

[0003] In recent years, the small signal circuit design of power modules in electronic equipment has been Figure 1 As shown, the circuit includes a resistor R11, a resistor R12, and a switch Q11 (specifically, a MOS transistor Q11). The first end of the resistor R11 is connected to the first end of the digital signal processor (DSP) and the first end of the switch Q11. The second end of the resistor R11 is connected to the second end of the switch Q11 and to ground. The third end of the switch Q11 is connected to the first end of the resistor R12, and the voltage at the first end of the resistor R12 is limited to 3.3V by a pull-up. The second end of the resistor R12 is connected to the signal output end. As can be seen, the small signal circuit of the power module in an electronic device typically controls the level of the signal pin using a low-voltage transistor, without corresponding protection measures or circuit designs. Therefore, when the small signal circuit of the current power module is connected to an external electronic device, if the voltage level at the signal output end of the electronic device differs from the voltage level of the digital signal processor, it is easy to cause damage to the pin. Alternatively, if the switch breaks down, it may damage the digital signal processor.

[0004] It can be seen that how to achieve the stability of the power supply signal and reduce the probability of device damage is a problem that needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of the embodiments of the present invention is to provide a power signal stabilization circuit, control method, electronic device and medium, which can solve the problem that the small signal circuit design of the existing power module does not have a protection circuit, so when the level state at the signal output end of the electronic device is different from the level state of the digital signal processor, it is easy to cause pin damage, or when the switching tube is broken down, it may cause damage to the digital signal processor.

[0006] To solve the above technical problems, an embodiment of the present invention provides a power signal stabilization circuit, comprising a switch tube, and further comprising: a protection circuit, wherein the protection circuit includes a controller, a high-level signal output circuit, and a low-level signal output circuit;

[0007] Wherein, the first end of the switch tube is connected to the digital signal processor and the controller; the second end of the switch tube is grounded;

[0008] The third end of the switch tube is connected to the first pull-up resistor, the signal output end of the electronic device, the output end of the high-level signal output circuit, and the output end of the low-level signal output circuit;

[0009] The controller is connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit respectively, and is used to control the high-level signal output circuit to output a high-level signal or to control the low-level output circuit to output a low-level signal after obtaining the level state of the digital signal processor.

[0010] In some embodiments, the protection circuit further includes: a voltage regulator protection circuit;

[0011] The input end of the voltage regulator protection circuit is connected to the third end of the switch tube, the first pull-up resistor, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit, and the signal output end of the electronic device;

[0012] The control end of the voltage regulator protection circuit is connected to the controller and is used to discharge the voltage at the signal output end of the electronic device according to the control of the controller.

[0013] In some embodiments, the high-level signal output circuit comprises: a first MOS transistor;

[0014] The gate terminal of the first MOS tube is connected to the controller as the control terminal of the high-level signal output circuit;

[0015] The source of the first MOS tube is connected to the second pull-up resistor;

[0016] The drain of the first MOS tube serves as the output end of the high-level signal output circuit and is connected to the signal output end of the electronic device, the third end of the switch tube and the first pull-up resistor;

[0017] The low-level signal output circuit includes: a first resistor and a second MOS tube;

[0018] Wherein, the first end of the second MOS transistor is connected to the controller as the control end of the low-level signal output circuit;

[0019] The drain of the second MOS tube serves as the output end of the low-level signal output circuit and is connected to the signal output end of the electronic device, the third end of the switch tube and the first pull-up resistor;

[0020] The source of the second MOS tube is connected to the first end of the first resistor;

[0021] A second terminal of the first resistor is grounded.

[0022] In some embodiments, the voltage regulator protection circuit includes: a second resistor and a voltage regulator;

[0023] The first end of the second resistor is connected to the controller as the control end of the voltage regulator protection circuit and is grounded;

[0024] The second end of the second resistor is connected to the positive electrode of the voltage regulator tube;

[0025] The negative electrode of the voltage regulator serves as the input end of the voltage regulator protection circuit and is connected to the signal output end of the electronic device, the third end of the switch tube, the first pull-up resistor, the output end of the high-level signal output circuit and the output end of the low-level signal output circuit.

[0026] In some embodiments, the invention further comprises: a third resistor, a fourth resistor, and a fifth resistor;

[0027] Wherein, the first end of the third resistor is connected to the first end of the switch tube, the digital signal processor and the controller; the second end of the third resistor is connected to the second end of the switch tube and is grounded;

[0028] A first end of the fourth resistor is connected to the third end of the switch tube and the first pull-up resistor; a second end of the fourth resistor is connected to the signal output end of the electronic device, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit, and the input end of the voltage regulator protection circuit;

[0029] A first end of the fifth resistor is connected to the controller;

[0030] The second end of the fifth resistor is connected to the control end of the voltage regulator protection circuit.

[0031] On the other hand, the present invention further provides a power signal stabilization circuit control method, which is applied to the above-mentioned power signal stabilization circuit, comprising:

[0032] obtaining an output voltage at a signal output terminal of the electronic device;

[0033] Determine whether the output voltage is abnormal;

[0034] If the output voltage is an abnormal voltage, the level state of the digital signal processor is obtained;

[0035] If the level state of the digital signal processor is a high level, the high level signal output circuit is controlled to output a high level signal;

[0036] If the level state of the digital signal processor is a low level, the low level signal output circuit is controlled to output a low level signal.

[0037] In some embodiments, the protection circuit includes a voltage regulator diode and further includes:

[0038] When the output voltage is abnormal, the voltage regulator tube is controlled to discharge the abnormal voltage so that the voltage regulator tube generates an interrupt signal;

[0039] If the interrupt signal generated by the voltage regulator tube is received, the step of obtaining the level state of the digital signal processor is entered.

[0040] In some embodiments, after controlling the high / low level signal output circuit to output a high / low level signal if the level state of the digital signal processor is a high level / low level, the method further includes:

[0041] reacquiring an output voltage at a signal output terminal of the electronic device within a preset time;

[0042] If the current output voltage is an abnormal voltage, the alarm system is triggered and the high / low level signal output circuit is continuously controlled to output a high / low level signal.

[0043] In another aspect, the present invention further provides an electronic device, comprising:

[0044] memory for storing computer programs;

[0045] A processor is used to execute a computer program to implement the steps of the above-mentioned power signal stabilization circuit control method.

[0046] On the other hand, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the above-mentioned power signal stabilization circuit control method when executed by a processor.

[0047] On the other hand, the present invention also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the above-mentioned power signal stabilization circuit control method.

[0048] As can be seen from the above technical solution, the present invention provides a power signal stabilization circuit, including a switch tube, and also including: a protection circuit, wherein the protection circuit includes a controller, a high-level signal output circuit and a low-level signal output circuit; wherein the first end of the switch tube is connected to the digital signal processor and the controller; the second end of the switch tube is grounded; the third end of the switch tube is connected to the pull-up resistor, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit and the signal output end of the electronic device; the controller is respectively connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit, and is used to control the high-level signal output circuit to output a high-level signal or the low-level output circuit to output a low-level signal after obtaining the level state of the digital signal processor. It can be seen that the present invention adds a protection circuit to the original power signal stabilization circuit, and the protection circuit, under the action of the controller, selects to control the high-level signal output circuit to output a high-level signal or to control the low-level output circuit to output a low-level signal, thereby ensuring that the level state at the signal output end of the electronic device is the same as the level state at the digital signal processor, achieving stability of the power signal, and avoiding the problem of damage to the digital signal processor caused by the different level states at the signal output end of the electronic device and the digital signal processor. In addition, the access of the protection circuit also plays a role in draining the circuit, further improving the safety of the power signal stabilization circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0050] Figure 1 A circuit diagram of a small signal circuit of a power module in an electronic device provided by the present invention;

[0051] Figure 2 A schematic diagram of a power signal stabilization circuit provided by an embodiment of the present invention;

[0052] Figure 3 A complete schematic diagram of a power signal stabilization circuit provided by an embodiment of the present invention;

[0053] Figure 4 A flow chart of a power signal stabilization circuit control method provided by an embodiment of the present invention;

[0054] Figure 5 A structural diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0055] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0056] The terms "including" and "having," as used in the present description and accompanying drawings, and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements and may include steps or elements that are not listed.

[0057] In order to enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0058] Next, a power signal stabilization circuit provided by an embodiment of the present invention is described in detail. Figure 2 A schematic diagram of a power signal stabilization circuit provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, the power signal stabilization circuit includes: a switch tube M1, and also includes: a protection circuit 1, wherein the protection circuit includes a controller 11, a high-level signal output circuit 12 and a low-level signal output circuit 13. In addition, Figure 2 The device also includes: a digital signal processor 2, a first pull-up resistor RS1 and a signal output terminal 3 of the electronic device. The specific connection relationship of the power signal stabilization circuit is:

[0059] A first end of the switch tube M1 is connected to the digital signal processor 2 and the controller 11; a second end of the switch tube M1 is grounded; a third end of the switch tube M1 is connected to the first pull-up resistor RS1, the output end of the high-level signal output circuit 12, the output end of the low-level signal output circuit 13, and the signal output end 3 of the electronic device; the controller 11 is respectively connected to the control end of the high-level signal output circuit 12 and the control end of the low-level signal output circuit 13, and is used to, after obtaining the level state of the digital signal processor 2, selectively control the high-level signal output circuit 12 to output a high-level signal or control the low-level output circuit 12 to output a low-level signal.

[0060] Among them, the first end of the switch tube M1 is connected to the digital signal processor 2 and the first end of the controller 11; the second end of the controller 11 is connected to the control end of the high-level signal output circuit 12; and the third end of the controller 11 is connected to the control end of the low-level signal output circuit 13.

[0061] The principle of the power supply signal stabilization circuit provided by the present invention is as follows: the digital signal processor 2 outputs a corresponding level signal to the signal output terminal 3 of the electronic device via the switch tube M1. For example, when the digital signal processor 2 is at a high level, the switch tube M1 outputs a high-level signal to the signal output terminal 3 of the electronic device via the connected first pull-up resistor RS1. However, when the voltage at the signal output terminal 3 of the electronic device becomes abnormal, the voltage level at the digital signal processor 2 and the voltage level at the signal output terminal 3 of the electronic device may differ, which can easily damage the digital signal processor 2. Therefore, the present invention obtains the voltage level status of the digital signal processor 2 through the controller 2 and then selectively controls the high-level signal output circuit 12 to output a high-level signal or the low-level signal output circuit 12 to output a low-level signal, thereby achieving voltage signal stabilization protection. For example, when the signal output terminal 3 of the electronic device experiences an abnormality, the controller 11 obtains the voltage level status of the digital signal processor 2. If the digital signal processor is at a high level, the controller 11 controls the high-level signal output circuit 12 to output a high-level signal; if the digital signal processor is at a low level, the controller 11 controls the low-level signal output circuit 13 to output a low-level signal.

[0062] The first pull-up resistor RS1 mentioned in the embodiment of the present invention is used to pull up the voltage at the third terminal of the switch tube M1 to 3.3V.

[0063] It should be noted that the high-level signal output circuit 12 and the low-level signal output circuit 13 provided by the present invention are both conventional high-level and low-level output signals, and the present invention is not limited thereto and can be set according to user needs.

[0064] It should be noted that the switch tube M1 can be a MOS tube or a triode, and can be set according to the needs of the user. Figure 1 The switch tube M1 shown is a MOS tube M1.

[0065] As can be seen from the above technical solution, the present invention provides a power signal stabilization circuit, including a switch tube, and also including: a protection circuit, wherein the protection circuit includes a controller, a high-level signal output circuit and a low-level signal output circuit; wherein the first end of the switch tube is connected to the digital signal processor and the controller; the second end of the switch tube is grounded; the third end of the switch tube is connected to the pull-up resistor, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit and the signal output end of the electronic device; the controller is respectively connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit, and is used to control the high-level signal output circuit to output a high-level signal or the low-level output circuit to output a low-level signal after obtaining the level state of the digital signal processor. It can be seen that the present invention adds a protection circuit to the original power signal stabilization circuit, and the protection circuit, under the action of the controller, selects to control the high-level signal output circuit to output a high-level signal or to control the low-level output circuit to output a low-level signal, thereby ensuring that the level state at the signal output end of the electronic device is the same as the level state at the digital signal processor, achieving stability of the power signal, and avoiding the problem of damage to the digital signal processor caused by the different level states at the signal output end of the electronic device and the digital signal processor. In addition, the access of the protection circuit also plays a role in draining the circuit, further improving the safety of the power signal stabilization circuit.

[0066] In some embodiments, as Figure 3 As shown, the high-level signal output circuit 12 comprises a first MOS transistor Q1. The circuit connection relationship is as follows: the gate terminal of the first MOS transistor Q1 is connected to the controller 11 as the control terminal of the high-level signal output circuit 12; the source terminal of the first MOS transistor Q1 is connected to the second pull-up resistor RS2; and the drain terminal of the first MOS transistor Q1 is connected to the signal output terminal 3 of the electronic device, the third terminal of the switch transistor M1, and the first pull-up resistor RS1 as the output terminal of the high-level signal output circuit 12.

[0067] The principle of the circuit is as follows: when the controller 11 determines that the voltage of the signal output terminal 3 of the electronic device is abnormal, it obtains the level state of the digital signal processor 2. If the level state of the digital signal processor 2 is high at this time, the controller 11 realizes a high-level output through the first MOS tube Q1 of the high-level signal output circuit 12 and the connected second pull-up resistor RS2.

[0068] The second pull-up resistor RS2 connected to the first MOS transistor Q1 is used to pull up the voltage at the source of the first MOS transistor Q1 to 3.3V.

[0069] In some embodiments, as Figure 3As shown, the low-level signal output circuit 13 includes: a first resistor R1 and a second MOS transistor Q2. The circuit connection relationship is as follows: the first end of the second MOS transistor Q2 is connected to the controller 11 as the control end of the low-level signal output circuit 13; the drain of the second MOS transistor Q2 is connected to the signal output terminal 3 of the electronic device, the third end of the switch transistor M1, and the first pull-up resistor RS1 as the output end of the low-level signal output circuit 13; the source of the second MOS transistor Q2 is connected to the first end of the first resistor R1; and the second end of the first resistor R1 is grounded.

[0070] The principle of the circuit is as follows: when the controller 11 determines that the voltage at the signal output terminal 3 of the electronic device is abnormal, it obtains the level state of the digital signal processor 2. If the level state of the digital signal processor 2 is low at this time, the controller 11 realizes a high-level output through the second MOS tube Q2 of the low-level signal output circuit 13 itself and the connected first resistor R1.

[0071] The first resistor R1 connected to the second MOS transistor Q2 functions to divide the voltage, so as to ensure the normal operation of the second MOS transistor Q2.

[0072] It should be noted that the embodiment provided by the present invention is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs.

[0073] The present invention provides a specific high-level signal output circuit structure and a low-level signal output circuit structure. Under this structure, a controller can control the corresponding high-level signal output circuit to output a high-level signal or the low-level signal output circuit to output a low-level signal according to the level state of a digital signal processor.

[0074] In some embodiments, as Figure 3 As shown, the protection circuit 1 also includes a voltage regulator protection circuit. The circuit connections are as follows: the input terminal of the voltage regulator protection circuit is connected to the third terminal of the switch tube M1, the first pull-up resistor RS1, the output terminal of the high-level signal output circuit 12, the output terminal of the low-level signal output circuit 13, and the signal output terminal 3 of the electronic device; and the control terminal of the voltage regulator protection circuit is connected to the controller 11, for discharging the voltage at the signal output terminal 3 of the electronic device according to the control of the controller 11.

[0075] in, Figure 3The voltage-stabilizing diode protection circuit shown in the figure specifically includes: a second resistor R2 and a voltage-stabilizing diode D. Therefore, the circuit connection relationship is as follows: the first end of the second resistor R2, serving as the control end of the voltage-stabilizing diode protection circuit, is connected to the controller 11 (specifically, it is connected to the fourth end of the controller 11) and is grounded; the second end of the second resistor R2 is connected to the positive electrode of the voltage-stabilizing diode D; and the negative electrode of the voltage-stabilizing diode D, serving as the input end of the voltage-stabilizing diode protection circuit, is connected to the signal output terminal 3 of the electronic device, the third end of the switch M1, the first pull-up resistor RS1, the output end of the high-level signal output circuit 12, and the output end of the low-level signal output circuit 13.

[0076] The circuit works as follows: When controller 11 detects an abnormal voltage at signal output terminal 3 of an electronic device, it controls second resistor R2 and voltage regulator diode D in the voltage regulator protection circuit to discharge the voltage at signal output terminal 3 of the electronic device, preventing the abnormal voltage at signal output terminal 3 from causing breakdown of switch transistor M1 and thereby damaging the digital signal processor. After discharging the voltage, an interrupt signal is generated and sent to controller 11. Upon receiving the interrupt signal, controller 11 obtains the level status of digital signal processor 2.

[0077] Among them, the function of the voltage regulator D is to discharge the abnormal voltage at the signal output terminal 3 of the electronic equipment to maintain voltage stability, and the function of the second resistor R2 connected to the voltage regulator D is to divide the voltage to ensure the normal operation of the voltage regulator D.

[0078] besides, Figure 3 The electronic device further includes: a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The circuit connection relationship is as follows: a first end of the third resistor R3 is connected to the first end of the switch tube M1, the digital signal processor 2, and the controller 1; a second end of the third resistor R3 is connected to the second end of the switch tube M1 and to ground; a first end of the fourth resistor R4 is connected to the third end of the switch tube M1 and the first pull-up resistor RS1; a second end of the fourth resistor R4 is connected to the signal output terminal 3 of the electronic device, the output end of the high-level signal output circuit 12, the output end of the low-level signal output circuit 13, and the input end of the voltage-stabilizing diode protection circuit; a first end of the fifth resistor R5 is connected to the controller 11 (specifically, connected to the fourth end of the controller 11); and a second end of the fifth resistor R5 is connected to the control end of the voltage-stabilizing diode protection circuit, that is, connected to the first end of the second resistor R2.

[0079] The third resistor R3, the fourth resistor R4 and the fifth resistor R5 all function as voltage dividers to ensure the normal operation of the voltage stabilizing protection circuit and prevent the voltage in the circuit from impacting the voltage stabilizing protection circuit.

[0080] It should be noted that the embodiment provided by the present invention is only one possible implementation method, but is not limited to this implementation method and can be set according to user needs.

[0081] In addition, it should be noted that after the controller 11 controls the high-level signal output circuit 12 or the low-level signal output circuit 12 to output the corresponding high-level and low-level signals, it is necessary to re-acquire the output voltage at the signal output terminal 3 of the electronic device within a preset time; if the current output voltage is still an abnormal voltage, the alarm system is triggered, and the high / low-level signal output circuit is continuously controlled to output a high / low-level signal. If the voltage is normal, the protection circuit 1 is not working. The reason is that during the operation of the circuit, there may be a phenomenon of instantaneous voltage change caused by static electricity. At this time, the normal operation of the circuit is instantly switched to the operation of the protection circuit. After the phenomenon of instantaneous voltage change caused by static electricity ends, the original circuit is used again to work, and the protection circuit 1 is not working, that is, the protection circuit 1 is not connected to the overall circuit, which reduces the power consumption of the circuit to a certain extent.

[0082] In summary, the present invention provides a power signal stabilization circuit, which includes a switching tube and a protection circuit, wherein the protection circuit includes a controller, a third resistor, a fourth resistor, a fifth resistor, a high-level signal output circuit, a low-level signal output circuit, and a voltage-stabilizing tube protection circuit; wherein the high-level signal output circuit is a first MOS tube; the low-level signal output circuit includes: a first resistor and a second MOS tube; and the voltage-stabilizing tube protection circuit includes: a second resistor and a voltage-stabilizing tube. The specific connection relationship of the circuit is as follows: the first end of the third resistor is connected to the digital signal processor, the first end of the controller, and the first end of the switch tube; the second end of the third resistor is connected to the second end of the switch tube and is grounded; the third end of the switch tube is connected to the first pull-up resistor and the first end of the fourth resistor; the second end of the fourth resistor is connected to the drain of the first MOS tube, the drain of the second MOS tube, the negative electrode of the voltage regulator tube, and the signal output end of the electronic device; the second end of the controller is connected to the gate of the second MOS tube; the third end of the controller is connected to the gate of the third MOS tube; the fourth end of the controller is connected to the first end of the fifth resistor; the source of the first MOS tube is connected to the second pull-up resistor; the source of the second MOS tube is connected to the first end of the first resistor; the second end of the first resistor is grounded; the second end of the fifth resistor is connected to the first end of the second resistor and is grounded; and the second end of the second resistor is connected to the positive electrode of the voltage regulator tube. When the controller determines that the voltage at the signal output terminal of the electronic device is an abnormal voltage, it first controls the voltage regulator protection circuit to discharge the abnormal voltage, and then obtains the level state of the digital signal processor after receiving the interrupt signal generated by the voltage regulator protection circuit due to the discharge of the abnormal voltage, thereby controlling the corresponding high-level signal output circuit to output a high-level signal or the low-level signal output circuit to output a low-level signal according to the level state of the digital signal processor. As can be seen from this, the present invention adds a protection circuit to the original power signal stabilization circuit. Under the action of the controller, the protection circuit selectively controls the high-level signal output circuit to output a high-level signal or controls the low-level output circuit to output a low-level signal, thereby ensuring that the level state at the signal output terminal of the electronic device is the same as the level state at the digital signal processor, achieving the stability of the power signal, and avoiding the problem of damage to the digital signal processor caused by the different level states at the signal output terminal of the electronic device and the digital signal processor. In addition, the connection of the protection circuit also plays a role in draining the circuit, further improving the safety of the power signal stabilization circuit.

[0083] On the other hand, the present invention also provides a power signal stabilization circuit control method, which is applied to the above-mentioned power signal stabilization circuit. Figure 4 A flow chart of a power signal stabilization circuit control method provided by an embodiment of the present invention is shown in FIG. Figure 4 As shown, the following steps are included:

[0084] S10: Acquire an output voltage at a signal output terminal of the electronic device.

[0085] S11: Determine whether the output voltage is abnormal.

[0086] S12: If the output voltage is an abnormal voltage, obtain the level state of the digital signal processor.

[0087] S13: If the level state of the digital signal processor is a high level, control the high level signal output circuit to output a high level signal.

[0088] S14: If the level state of the digital signal processor is a low level, control the low level signal output circuit to output a low level signal.

[0089] In an embodiment, the method provided by an embodiment of the present invention is applied to a power supply signal stabilization circuit, which includes: a switch tube, a controller, a high-level signal output circuit, and a low-level signal output circuit. The first end of the switch tube is connected to a digital signal processor and the controller; the second end of the switch tube is grounded; the third end of the switch tube is connected to a first pull-up resistor, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit, and the signal output end of the electronic device; and the controller is connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit, respectively, and is configured to, after obtaining the level state of the digital signal processor, selectively control the high-level signal output circuit to output a high-level signal or control the low-level output circuit to output a low-level signal. Under this structure, the controller first obtains the output voltage at the signal output terminal of the electronic device and makes a judgment on it. If the output voltage at the signal output terminal of the electronic device is an abnormal voltage (for example, high voltage), the digital signal processor is easily damaged at this time. Therefore, the level state of the digital signal processor is obtained at this time, and when the level state of the digital signal processor is high, the high-level signal output circuit is controlled to output a high-level signal to ensure signal stability; when the level state of the digital signal processor is low, the low-level signal output circuit is controlled to output a low-level signal to maintain signal stability.

[0090] In summary, the present invention provides a power signal stabilization circuit control method, comprising: obtaining an output voltage at a signal output terminal of an electronic device; determining whether the output voltage is an abnormal voltage; if the output voltage is an abnormal voltage, obtaining a level state of a digital signal processor; if the level state of the digital signal processor is a high level, controlling a high-level signal output circuit to output a high-level signal; and if the level state of the digital signal processor is a low level, controlling a low-level signal output circuit to output a low-level signal. Thus, the present invention has made improvements in both structure and method compared to the prior art. The present invention adds a protection circuit to the original power signal stabilization circuit. Under the action of a controller, the protection circuit selectively controls the high-level signal output circuit to output a high-level signal or controls the low-level output circuit to output a low-level signal, thereby ensuring that the level state at the signal output terminal of the electronic device is the same as the level state at the digital signal processor, achieving power signal stability, and avoiding the problem of damage to the digital signal processor caused by the different level states at the signal output terminal of the electronic device and the digital signal processor. Furthermore, the connection of the protection circuit also serves as a current diversion function in the circuit, further improving the safety of the power signal stabilization circuit.

[0091] In some embodiments, if the protection circuit also includes a voltage regulator, the specific steps of the power signal stabilization circuit control method provided by the present invention also include: when the output voltage is abnormal, controlling the voltage regulator to discharge the abnormal voltage so that the voltage regulator generates an interrupt signal; if the interrupt signal generated by the voltage regulator is received, then entering the step of obtaining the level state of the digital signal processor. The principle is that the voltage regulator can discharge the abnormal voltage at the signal output terminal of the electronic device and generate an interrupt signal. The main purpose of the interrupt signal is to inform the controller that the abnormal voltage at the signal output terminal of the current electronic device has been discharged, so that the controller can execute subsequent steps.

[0092] In addition, because static electricity may cause instantaneous voltage changes during circuit operation, it is necessary to re-acquire the output voltage at the signal output terminal of the electronic device within a preset time after controlling the high / low level signal output circuit to output a high / low level signal. If the current output voltage is abnormal, the alarm system is triggered and the high / low level signal output circuit is continuously controlled to output a high / low level signal. If the current output voltage is normal, the protection circuit is disconnected, allowing the digital signal processor to continue to actively take over the setting of small signals. This step reduces the power consumption of the circuit to a certain extent.

[0093] 100ms is usually the polling period of circuit communication, so the preset time may be 100ms, but the present invention is not limited thereto and may be set according to user needs.

[0094] In addition, the controller must regularly monitor the operating status of the high-level signal output circuit, low-level signal output circuit, and voltage regulator protection circuit to prevent abnormal voltages at the electronic device's signal output terminals, which could cause the voltage regulator protection circuit, high-level signal output circuit, and low-level signal output circuit to malfunction. Furthermore, when the high-level signal output circuit, low-level signal output circuit, and voltage regulator protection circuit are operating normally, the controller triggers the corresponding alarm system, allowing operators to determine the current status of the power signal stabilization circuit.

[0095] The controller also needs to record the operating status and operating time of the high-level signal output circuit, low-level signal output circuit, and voltage regulator protection circuit, and update them in real time. After the power signal stabilization circuit completes its operation, the record table is uploaded to a host computer or other electronic device as an operation log of the power signal stabilization circuit, so that operators can query it at any time.

[0096] Thus, the present invention selectively controls the high-level signal output circuit to output a high-level signal or the low-level signal output circuit to output a low-level signal under the action of the controller, thereby ensuring that the level state at the signal output terminal of the electronic device is the same as the level state at the digital signal processor, achieving power signal stability, and avoiding the problem of damage to the digital signal processor caused by the difference in level state between the signal output terminal of the electronic device and the digital signal processor. In addition, the connection of the protection circuit also plays a role in draining the circuit, further improving the safety of the power signal stabilization circuit.

[0097] Figure 5 A structural diagram of an electronic device provided by an embodiment of the present invention, such as Figure 5 As shown, the electronic device includes: a memory 60 for storing computer programs;

[0098] The processor 61 is configured to implement the steps of the power signal stabilization circuit control method of the above embodiment when executing a computer program.

[0099] The electronic device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0100] The processor 61 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 61 may be implemented using at least one of the following hardware forms: a digital signal processing (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 61 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing content required to be displayed on the display screen. In some embodiments, the processor 61 may also include an artificial intelligence (AI) processor for handling computational operations related to machine learning.

[0101] The memory 60 may include one or more computer-readable storage media, which may be non-transitory. The memory 60 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 60 is at least used to store the following computer program 601, wherein, after the computer program is loaded and executed by the processor 61, it can implement the relevant steps of the power signal stabilization circuit control method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 60 may also include an operating system 602 and data 603, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 602 may include Windows, Unix, Linux, etc.

[0102] In some embodiments, the electronic device may further include a display screen 62 , an input / output interface 63 , a communication interface 64 , a power supply 65 , and a communication bus 66 .

[0103] Those skilled in the art will understand that Figure 5 The structure shown in the figure does not constitute a limitation of the electronic device, and may include more or fewer components than shown in the figure.

[0104] It is understood that if the power signal stabilization circuit control method in the above-mentioned embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the current technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the various embodiments of the method of the present invention. The aforementioned storage medium includes: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, a magnetic disk, or an optical disk, and other media that can store program code.

[0105] Based on this, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the power signal stabilization circuit control method as described above are implemented.

[0106] The above describes in detail an electronic device provided by an embodiment of the present invention. The various embodiments are described in a progressive manner throughout this specification, with each embodiment focusing on its differences from other embodiments. Reference can be made to the descriptions of the embodiments for similar or identical parts. The devices disclosed in the embodiments are described briefly because they correspond to the methods disclosed in the embodiments. For relevant details, refer to the descriptions of the methods.

[0107] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0108] The above is a detailed introduction to a power signal stabilization circuit, control method, electronic device and medium provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A power signal stabilization circuit, comprising a switch tube, characterized in that: Also includes: A protection circuit, wherein the protection circuit includes a controller, a high-level signal output circuit, and a low-level signal output circuit; Wherein, the first end of the switch tube is connected to the digital signal processor and the controller; the second end of the switch tube is grounded; The third end of the switch tube is connected to the first pull-up resistor, the signal output end of the electronic device, the output end of the high-level signal output circuit, and the output end of the low-level signal output circuit; The controller is connected to the control end of the high-level signal output circuit and the control end of the low-level signal output circuit respectively, and is used to control the high-level signal output circuit to output a high-level signal or to control the low-level output circuit to output a low-level signal after obtaining the level state of the digital signal processor.

2. The power signal stabilization circuit according to claim 1, wherein: The protection circuit further includes: a voltage regulator protection circuit; The input end of the voltage-stabilizing tube protection circuit is connected to the third end of the switching tube, the first pull-up resistor, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit, and the signal output end of the electronic device; The control end of the voltage-stabilizing diode protection circuit is connected to the controller and is used to discharge the voltage at the signal output end of the electronic device according to the control of the controller.

3. The power signal stabilization circuit according to claim 1, wherein: The high-level signal output circuit comprises: a first MOS tube; Wherein, the gate terminal of the first MOS transistor is connected to the controller as the control terminal of the high-level signal output circuit; The source of the first MOS tube is connected to the second pull-up resistor; The drain of the first MOS transistor serves as the output end of the high-level signal output circuit and is connected to the signal output end of the electronic device, the third end of the switch transistor, and the first pull-up resistor; The low-level signal output circuit includes: a first resistor and a second MOS transistor; Wherein, the first end of the second MOS transistor is connected to the controller as the control end of the low-level signal output circuit; The drain of the second MOS transistor serves as the output end of the low-level signal output circuit and is connected to the signal output end of the electronic device, the third end of the switch transistor and the first pull-up resistor; The source of the second MOS transistor is connected to the first end of the first resistor; A second end of the first resistor is grounded.

4. The power signal stabilization circuit according to claim 2, wherein: The voltage regulator protection circuit includes: a second resistor and a voltage regulator; Wherein, the first end of the second resistor is connected to the controller as the control end of the voltage regulator protection circuit and is grounded; The second end of the second resistor is connected to the positive electrode of the voltage regulator tube; The negative electrode of the voltage-stabilizing diode serves as the input end of the voltage-stabilizing diode protection circuit and is connected to the signal output end of the electronic device, the third end of the switching tube, the first pull-up resistor, the output end of the high-level signal output circuit, and the output end of the low-level signal output circuit.

5. The power signal stabilization circuit according to claim 2 or 4, characterized in that: Also includes: a third resistor, a fourth resistor, and a fifth resistor; Wherein, the first end of the third resistor is connected to the first end of the switch tube, the digital signal processor and the controller; the second end of the third resistor is connected to the second end of the switch tube and is grounded; The first end of the fourth resistor is connected to the third end of the switching tube and the first pull-up resistor; the second end of the fourth resistor is connected to the signal output end of the electronic device, the output end of the high-level signal output circuit, the output end of the low-level signal output circuit, and the input end of the voltage regulator protection circuit; The first end of the fifth resistor is connected to the controller; The second end of the fifth resistor is connected to the control end of the voltage regulator protection circuit.

6. A power signal stabilization circuit control method, characterized in that: The power signal stabilization circuit according to claim 1 comprises: obtaining an output voltage at a signal output terminal of the electronic device; determining whether the output voltage is an abnormal voltage; If the output voltage is the abnormal voltage, obtaining a level state of a digital signal processor; If the level state of the digital signal processor is a high level, controlling the high level signal output circuit to output a high level signal; If the level state of the digital signal processor is a low level, the low level signal output circuit is controlled to output a low level signal.

7. The power signal stabilization circuit control method according to claim 6, characterized in that: The protection circuit includes a voltage regulator tube and further includes: When the output voltage is the abnormal voltage, controlling the voltage regulator to discharge the abnormal voltage so that the voltage regulator generates an interrupt signal; If the interrupt signal generated by the voltage regulator is received, the step of obtaining the level state of the digital signal processor is entered.

8. The power signal stabilization circuit control method according to claim 6, characterized in that: After controlling the high / low level signal output circuit to output the high / low level signal if the level state of the digital signal processor is the high level / low level, the method further includes: reacquiring the output voltage at the signal output terminal of the electronic device within a preset time; If the current output voltage is the abnormal voltage, the alarm system is triggered, and the high / low level signal output circuit is continuously controlled to output the high / low level signal.

9. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the power signal stabilization circuit control method according to any one of claims 6 to 8.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by the processor, the steps of the power signal stabilization circuit control method according to any one of claims 6 to 8 are implemented.

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