Superlattice infrared focal plane detector preparation method and lower electrode manufacturing device

Abstract

The invention provides a method for preparing a superlattice infrared focal plane detector and a lower electrode manufacturing device thereof, belonging to the technical field of superlattice infrared detector preparation; the problem of poor climbing effect of the lower electrode of the focal plane of the infrared detector prepared by the electron beam evaporation method is solved; the method comprises a wafer carrier, a wafer clamp and an evaporation source crucible placed in an electron beam evaporation table, the wafer clamp comprises a platform and a vertical rod, one end of the platform is rotatably connected to the wafer carrier so that the angle between the platform and the wafer carrier is adjustable, the other end of the platform is connected to the wafer carrier through the vertical rod, and the vertical rod is perpendicular to the wafer carrier; the outer surface of the platform is used to place wafers of different sizes; an evaporation source crucible is placed below the wafer carrier, and electron beam source vapor is deposited on the wafer surface through the evaporation source crucible; the invention is applied to the preparation of infrared detectors.

Description

Technical Field

[0001] The invention provides a method for preparing a superlattice infrared focal plane detector and a lower electrode manufacturing device thereof, belonging to the technical field of preparing superlattice infrared detectors. Background Art

[0002] Due to its ability to penetrate smoke, strong anti-interference ability and all-weather operation, infrared detectors have been widely used in many fields of national defense and national economy. With the continuous development of new demands, infrared detectors have a good market prospect. Type II superlattice infrared detector is a new type of infrared detector that has emerged in recent years and is the preferred material for preparing a new generation of infrared detectors.

[0003] The manufacturing process of the existing type II superlattice infrared detector includes: using the molecular beam epitaxy (MBE) process to grow the required epitaxial material on the GaSb substrate 1, etching the lower electrode portion of the focal plane to the lower electrode ohmic contact layer 2 by ICP etching, making the upper electrode 4 and the lower electrode 5, and making indium pillars 6 on the upper electrode 4 and the lower electrode 5, thus completing the epitaxial material end chip process. Making indium pillars 6 on the readout circuit 7, and interconnecting the readout circuit 7 and the epitaxial material end chip by flip-chip welding using a flip-chip welding machine, thus completing the focal plane chip process. The structure of the focal plane chip completed by the existing process is as follows: Figure 1 shown.

[0004] The lower electrode 5 of the focal plane of the existing type II superlattice infrared detector needs to extend to the top of the table 3 on the edge of the focal plane by climbing, ensuring that the height of the indium column above the lower electrode 5 is consistent with the height of the indium column above the upper electrode 4, thereby ensuring that the epitaxial material end chip and the readout circuit 7 can be well connected during flip-chip soldering interconnection. The existing electrode manufacturing method uses electron beam evaporation to evaporate the electrode to ensure the convenience of electrode stripping operation, but the method of manufacturing electrodes by electron beam evaporation is limited by its equipment principle and has poor step coverage, resulting in poor climbing effect of the lower electrode of some focal plane chips, which in turn affects the conductivity of the focal plane chip and ultimately affects the comprehensive performance of the focal plane chip. Summary of the invention

[0005] In order to solve the problem of poor climbing effect of the lower electrode of the focal plane of an infrared detector prepared by an electron beam evaporation method, the present invention provides a method for preparing a superlattice infrared focal plane detector and a lower electrode manufacturing device thereof.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is: a device for manufacturing the lower electrode of a superlattice infrared focal plane detector, comprising a wafer carrier, a wafer clamp and an evaporation source crucible placed in an electron beam evaporation table, wherein the wafer clamp comprises a platform and a vertical rod, one end of the platform is rotatably connected to the wafer carrier so that the angle between the platform and the wafer carrier is adjustable, and the other end of the platform is connected to the wafer carrier through the vertical rod, and the vertical rod is perpendicular to the wafer carrier;

[0007] The outer surface of the platform is used to place wafers of different sizes;

[0008] An evaporation source crucible is placed below the wafer carrier, and electron beam source vapor is deposited onto the wafer surface through the evaporation source crucible.

[0009] One end of the vertical rod is movably connected to the wafer carrier, and the other end of the vertical rod is fixedly connected to the platform. The angle between the platform and the wafer carrier is adjusted by adjusting the length of the vertical rod.

[0010] One end of the vertical rod is movably connected to the platform, and the other end of the vertical rod is fixedly connected to the wafer carrier. The angle between the platform and the wafer carrier is adjusted by adjusting the position of the platform on the vertical rod.

[0011] The platform is a square platform.

[0012] The top of the wafer carrier is connected with a rotating mechanism so that the wafer carrier can rotate 360 ​​degrees.

[0013] A method for preparing a superlattice infrared focal plane detector comprises the following steps:

[0014] S1: growing epitaxial wafers of superlattice materials on a substrate of type II superlattice materials using a molecular beam epitaxy process;

[0015] S2: dry-etching the epitaxial wafer using an inductively coupled plasma etching process to etch the lower electrode region to the lower electrode ohmic contact layer;

[0016] S3: Confirm the table etching angle θ2 by measuring the angle through a scanning electron microscope, use photoresist as a mask, and make metal electrodes in the upper and lower electrode areas;

[0017] The electron beam evaporation electrode was produced by using the superlattice infrared focal plane detector lower electrode production device. By adjusting the angle θ1 between the platform and the wafer carrier to ensure θ1+θ3=150°±5°, the climbing effect of the lower electrode produced by electron beam evaporation was guaranteed.

[0018] Where θ3 is the inclination angle of the table, satisfying θ2+θ3=180°;

[0019] S4: Use photoresist as a mask to make indium pillars in the upper and lower electrode areas;

[0020] S5: After the focal plane process on the material side is completed, the bonding with the readout circuit is completed through the flip-chip welding process to obtain the focal plane chip.

[0021] Adjust the angle θ1 between the platform and the wafer carrier to ensure that θ1+θ3=150°.

[0022] 70°≤θ3≤80°.

[0023] After the focal plane at the material end is bonded and flip-chip interconnected with the readout circuit, the substrate is ground and polished, and then an anti-reflection film is produced on the substrate.

[0024] It also includes S6: After the manufactured focal plane chip is connected to the FPGA, camera and display through Dewar flask packaging and refrigerator cooling, the infrared detector is prepared.

[0025] The beneficial effects of the present invention compared with the prior art are as follows: the present invention uses a lower electrode manufacturing device to ensure that the sum of the table inclination angle and the angle between the platform and the wafer carrier is a relatively fixed value when the lower electrode is evaporated by electron beam, thereby ensuring the metal thickness of the evaporated lower electrode, effectively improving the climbing effect of the lower electrode of the focal plane, and ensuring the comprehensive performance stability of the focal plane of the superlattice infrared detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The present invention will be further described below in conjunction with the accompanying drawings:

[0027] Figure 1 It is a schematic diagram of the focal plane chip structure completed by using the existing process;

[0028] Figure 2 A schematic diagram of the mesa etching angle after the mesa etching is completed;

[0029] Figure 3 The structure of the device of the present invention is shown in FIG. Figure 1 ;

[0030] Figure 4 The structure of the device of the present invention is shown in FIG. Figure 2 ;

[0031] Figure 5 The metal thickness of the mesa sidewall measured by scanning electron microscopy (SEM) at different angles between the platform and the wafer carrier when the mesa inclination angle is 80°;

[0032] Figure 6 The metal thickness of the mesa sidewall measured by scanning electron microscopy (SEM) at different angles between the platform and the wafer carrier when the mesa inclination angle is 70°;

[0033] In the figure: 1 is GaSb substrate, 2 is lower electrode ohmic contact layer, 3 is table, 4 is upper electrode, 5 is lower electrode, 6 is indium column, 7 is readout circuit, 8 is wafer carrier, 9 is platform, 10 is wafer, 11 is evaporation source crucible, and 12 is vertical pole. DETAILED DESCRIPTION

[0034] like Figure 2 As shown in the figure, after the mesa 3 in the preparation of the focal plane of the superlattice infrared detector is dry-etched, the shape of the single mesa 3 is a trapezoid. Due to the difference in the composition of the epitaxial materials of the focal planes of different specifications, different processes need to be used in the dry etching of the focal plane to ensure the best etching results. Different dry etching processes will produce Figure 2 The different mesa etching angles shown are recorded as θ2 and the mesa inclination angle as θ3, where θ2+θ3=180°, and the size of θ2 affects the climbing effect of the electron beam evaporation of the lower electrode 5. When the mesa etching angle θ2 is relatively large, the mesa inclination angle θ3 is relatively small, which is conducive to the climbing of the lower electrode 5; conversely, when the mesa etching angle θ2 is relatively small, the mesa inclination angle θ3 is relatively large, which is not conducive to the climbing of the lower electrode 5.

[0035] like Figure 3 and 4 As shown, the present invention provides a device for manufacturing the lower electrode of a superlattice infrared focal plane detector, comprising a wafer carrier 8, a wafer clamp and an evaporation source crucible 11 placed in an electron beam evaporation table, wherein the wafer carrier 8 and the evaporation source crucible 11 are components in an existing electron beam evaporation table, and the wafer carrier 8 is rotatable 360 ​​degrees. Figure 3 and 4 The direction of the arrow in is the rotation direction of the wafer carrier 8. The wafer clamp includes a platform 9 and a vertical rod 12. One end of the platform 9 is rotatably connected to the wafer carrier 8, and the other end of the platform 9 is connected to the wafer carrier 8 through the vertical rod 12, so that the angle between the platform 9 and the wafer carrier 8 is adjustable. The vertical rod 12 is perpendicular to the wafer carrier 8. Wafers 10 of different sizes can be placed on the outer surface of the platform 9. An evaporation source crucible 11 is placed under the wafer carrier 8, and the electron beam source vapor is deposited on the surface of the wafer 10 through the evaporation source crucible 11.

[0036] One end of the vertical rod 12 is movably connected to the wafer carrier 8, and the other end of the vertical rod 12 is fixedly connected to the platform 9. The angle between the platform 9 and the wafer carrier 8 can be adjusted by adjusting the length of the vertical rod 12. Alternatively, one end of the vertical rod 12 is movably connected to the platform 9, and the other end of the vertical rod 12 is fixedly connected to the wafer carrier 8. The angle between the platform 9 and the wafer carrier 8 can also be adjusted by adjusting the position of the platform 9 on the vertical rod 12.

[0037] like Figure 4As shown, the angle between the platform 9 and the wafer carrier 8 is recorded as θ1, and the size of θ1 can be adjusted accordingly by adjusting the length of the vertical rod 12 or the position of the platform 9 on the vertical rod 12.

[0038] The relationship between θ3 and θ1 is discussed below based on specific experiments.

[0039] 1) Using a sample with a table tilt angle of θ3 = 80°, set different angles of θ1 (50°, 60°, 70°, 80°), and electron beam evaporate 300nm of metal Ti. The thickness of the metal on the side wall of the table is measured by SEM to evaluate the electrode climbing effect. The measurement diagram is as follows Figure 5 The measurement results are shown in Table 1 below.

[0040]

[0041] Table 1.

[0042] The numbers in Table 1 correspond to Figure 5 The four survey drawings 1#, 2#, 3#, and 4# in Figure 5 As can be seen from Table 1, when the table inclination angle θ3 = 80° and θ1 is 70°, the metal thickness of the table side wall is the thickest, indicating that the metal evaporated from the lower electrode 5 has the best climbing effect.

[0043] 2) Using a sample with a table tilt angle of θ3 = 70°, set different angles of θ1 (70°, 75°, 80°, 85°), electron beam evaporate 300nm of metal Ti, and measure the table side wall metal thickness by SEM to evaluate the electrode climbing effect. The measurement diagram is as follows Figure 6 The measurement results are shown in Table 2 below.

[0044]

[0045] Table 2.

[0046] The numbers in Table 1 correspond to Figure 6 The four survey drawings 1#, 2#, 3#, and 4# in Figure 6 As can be seen from Table 2, when the table inclination angle θ3 = 70° and θ1 is 80°, the metal thickness of the table side wall is the thickest, indicating that the metal evaporated from the lower electrode 5 has the best climbing effect.

[0047] The above experimental verification shows that when θ3+θ1=150°, the lower electrode 5 produced by electron beam evaporation can have the best climbing effect. However, in actual production, considering the measurement error of the table inclination angle θ3, when 145°≤θ3+θ1≤155° is set, the lower electrode 5 can have a better climbing effect.

[0048] The present invention also proposes a method for preparing a superlattice infrared focal plane detector. Based on the above device and conclusion, the lower electrode 5 is obtained by electron beam evaporation, which includes the following steps:

[0049] S1: The epitaxial wafer of the superlattice material is grown on the substrate of the type II superlattice material by using the molecular beam epitaxy (MBE) process. After the epitaxial wafer is grown, the epitaxial wafer is cleaned by using acetone, alcohol, and isopropanol solutions by megasonic waves, and then the epitaxial wafer is blown dry by a nitrogen gun. Then, a 500nm thick silicon oxide film is grown on the epitaxial wafer by using the plasma enhanced chemical vapor deposition (PECVD) process as a hard mask to etch the epitaxial wafer, and the mask pattern of the focal plane table 3 is transferred to the silicon oxide film by the photolithography process.

[0050] In this embodiment, a GaSb substrate 1 is used as the substrate of the type II superlattice material.

[0051] The photolithography process conditions here are: using photoresist positive photoresist AZ6130, the film thickness is about 4um; epitaxial wafer water vapor baking: temperature 95℃, time 300s; film speed 4000rpm, time 30s; exposure: using MJB4 manual machine 75mJ constant dose mode, exposure time 3s; development: using AZ300MIF developer for development, time 35s; hardening film: temperature 120℃, time 10min.

[0052] Then, a 500nm thick silicon oxide film is etched using a reactive ion etching machine (RIE) to form a hard mask pattern. The RIE etching process conditions are: process gas: trifluoromethane 25sccm, carbon tetrafluoride 25sccm, RF power 135W, process chamber pressure 30mTorr, and etching rate of about 40nm / min. After the silicon oxide film is etched, the remaining photoresist mask on the silicon oxide film is removed using the degumming liquid acetone to form the required silicon oxide hard mask pattern.

[0053] S2: Use inductively coupled plasma etching (ICP) process to dry etch the epitaxial wafer and etch the lower electrode area to the lower electrode ohmic contact layer 2. The etching mask uses silicon oxide hard mask to achieve better etching effect. ICP process conditions are: process gas: chlorine 5sccm, methane 12sccm, argon 5sccm, vacuum pressure 5mTorr, substrate temperature 200℃, ICP power 600W, RF power 35W.

[0054] S3: Confirm the table etching angle by measuring the angle through SEM, use photoresist as a mask, and make metal electrodes in the upper and lower electrode areas.

[0055] The photolithography conditions are as follows: negative photoresist L300 was used as the photoresist, the coating speed was 4000 rpm, and the time was 30 s; the pre-baking temperature was 95°C, and the time was 8 min; the exposure: the MJB4 manual machine was used in 75 mJ constant dose mode, and the exposure time was 9 s; the post-baking temperature was 105°C, and the time was 8 min; the development: the AZ300MIF developer was used, and the development time was 35 s.

[0056] After the upper and lower electrodes are photolithographically processed, electron beam evaporation is used to evaporate the electrode metal. The metal electrode film used is TiPtAu, with thicknesses of 50nm, 50nm, and 300nm, respectively, and the TiPtAu evaporation rates are 5A / s, 5A / s, and 10A / s, respectively. After the coating is completed, acetone solution is used as a stripping solution to strip the metal outside the electrode area, and finally the desired electrode metal is formed.

[0057] When the electrode is evaporated by electron beam, the angle θ1 between the platform 9 and the wafer carrier 8 is adjusted to ensure that θ1+θ3=150°±5°, so that the lower electrode 5 produced by electron beam evaporation can have the best climbing effect.

[0058] S4: Use photoresist as a mask to manufacture indium pillars 6 in the manufactured upper and lower electrode regions.

[0059] The photolithography conditions are as follows: negative photoresist SUN1300 is used, the coating speed is 2000rpm, and the time is 30s; the pre-baking time is 95℃ and the temperature is 8min; the exposure: using MJB4 manual machine 120mJ constant dose mode, the exposure time is 9s; the post-baking temperature is 110℃ and the time is 2min; the development: using AZ300MIF developer, the development time is 35s.

[0060] After the photolithography of the indium column 6 is completed, metal indium is deposited, and the thickness of the metal indium is 6um. The metal indium coating is carried out by electron beam evaporation, and the evaporation rate is 30A / s. After the metal indium coating is completed, an acetone solution is used as a stripping solution to strip the metal outside the desired indium column 6 area, and finally the desired indium column 6 is formed.

[0061] S5: After the focal plane process on the material side is completed, bonding with the readout circuit 7 is completed through a flip-chip bonding process.

[0062] After the chip bonding and flip-chip interconnection, the GaSb substrate 1 is ground and polished to about 30 um, and then an anti-reflection film is produced on the GaSb substrate 1.

[0063] Finally, the infrared detector is prepared by packaging it in a Dewar flask and cooling it in a refrigerator, connecting it to the FPGA, camera and display.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a superlattice infrared focal plane detector, characterized in that: The steps include: S1: growing epitaxial wafers of superlattice materials on a substrate of type II superlattice materials using a molecular beam epitaxy process; S2: dry-etching the epitaxial wafer using an inductively coupled plasma etching process to etch the lower electrode region to the lower electrode ohmic contact layer, wherein a silicon oxide hard mask is used as an etching mask; S3: Confirm the table etching angle θ2 by measuring the angle through a scanning electron microscope, use photoresist as a mask, and make metal electrodes in the upper and lower electrode areas; Electron beam evaporation electrodes are manufactured using a superlattice infrared focal plane detector lower electrode manufacturing device, the device comprising a wafer carrier, a wafer fixture and an evaporation source crucible placed in an electron beam evaporation table, the wafer fixture comprising a platform and a vertical rod, one end of the platform is rotatably connected to the wafer carrier so that the angle between the platform and the wafer carrier is adjustable, the other end of the platform is connected to the wafer carrier through a vertical rod, and the vertical rod is perpendicular to the wafer carrier; The outer surface of the platform is used to place wafers of different sizes; An evaporation source crucible is placed below the wafer carrier, and electron beam source vapor is deposited onto the wafer surface through the evaporation source crucible; By adjusting the angle θ1 between the platform and the wafer carrier, θ1+θ3=150°±5° is ensured to ensure the climbing effect of the lower electrode produced by electron beam evaporation; Where θ3 is the inclination angle of the table, satisfying θ2+θ3=180°, 70°≤θ3≤80°; S4: Use photoresist as a mask to make indium pillars in the upper and lower electrode areas; S5: After the focal plane process on the material side is completed, the bonding with the readout circuit is completed through the flip-chip welding process to obtain the focal plane chip.

2. The method for preparing a superlattice infrared focal plane detector according to claim 1, characterized in that: Adjust the angle θ1 between the platform and the wafer carrier to ensure that θ1+θ3=150°.

3. The method for preparing a superlattice infrared focal plane detector according to claim 1, characterized in that: After the focal plane at the material end is bonded and flip-chip interconnected with the readout circuit, the substrate is ground and polished, and then an anti-reflection film is produced on the substrate.

4. The method for preparing a superlattice infrared focal plane detector according to claim 3, characterized in that: It also includes S6: After the manufactured focal plane chip is connected to the FPGA, camera and display through Dewar flask packaging and refrigerator cooling, the infrared detector is prepared.

5. The method for preparing a superlattice infrared focal plane detector according to claim 1, characterized in that: One end of the vertical rod is movably connected to the wafer carrier, and the other end of the vertical rod is fixedly connected to the platform. The angle between the platform and the wafer carrier is adjusted by adjusting the length of the vertical rod.

6. The method for preparing a superlattice infrared focal plane detector according to claim 1, characterized in that: One end of the vertical rod is movably connected to the platform, and the other end of the vertical rod is fixedly connected to the wafer carrier. The angle between the platform and the wafer carrier is adjusted by adjusting the position of the platform on the vertical rod.

7. The method for preparing a superlattice infrared focal plane detector according to claim 5 or 6, characterized in that: The platform is a square platform.

8. The method for preparing a superlattice infrared focal plane detector according to claim 7, characterized in that: The top of the wafer carrier is connected with a rotating mechanism so that the wafer carrier can rotate 360 ​​degrees.

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