Failure analysis sample treatment method and failure analysis method
By delaminating, grounding, grinding and plating the conductive layer of the test samples in semiconductor manufacturing, the problem of long metal wire burning under electron beam irradiation is solved, the accuracy and success rate of failure analysis are improved, and the cost is reduced.
Patent Information
- Application Number
- CN202411215534.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2024-12-10
AI Technical Summary
During semiconductor manufacturing, long metal wires are prone to burn under electron beam irradiation, resulting in failure analysis sample preparation failure, affecting the analysis accuracy.
The test sample is delayered to the first metal layer, ground the charge away, pre-positioned the failure position, ground to the second metal layer and plated with the conductive layer, positioning and marking the failure position to avoid burning of the metal wire due to charge accumulation.
Through the use of the conductive layer, the metal wire is burned away, the original morphology of the failure position is retained, the accuracy and success rate of failure analysis are improved, and the cost is reduced.
Smart Images
Figure CN119108380A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor manufacturing, and in particular to a failure analysis sample processing method and a failure analysis method. Background Art
[0002] The semiconductor manufacturing process is divided into the front-end device process and the back-end metal interconnection process. The function of the back-end metal interconnection layer is to lead out the front-end device for testing or operation. In the semiconductor manufacturing process, the back-end metal interconnection line often fails by short circuit or open circuit, which is mainly due to design problems and process problems. In order to evaluate the design structure and monitor the process stability on the line, it is necessary to extract the complex product structure separately or reorganize it as a unit to form a repeated, large-area, easy-to-test structure. A large number of corresponding electrical parameters are obtained by electrical testing of these test structures. These electrical parameters are analyzed to find and solve problems in advance. This structure is called a test structure (Test-key). The test structure is almost present at all levels of the manufacturing process, has a variety of structures, and has the characteristics of easy testing and easy failure analysis.
[0003] Usually the test structure is composed of two layers of metal wires, the lower layer is an ultra-long metal wire with a smaller CD (characteristic dimension), and multiple metal wires are densely arranged in parallel. The upper metal wire arranged in the middle of the test structure is a dummy metal wire. The metal wire of the lower layer is led out through a through hole at the edge of the test structure to form different chain structures and connected to different pads (Pad) to monitor the open circuit of the metal wire itself or the short circuit between metal wires. The area of the entire test structure is very large (about 260μm*150μm). During the failure analysis sample processing, when the lower metal wire is analyzed, each metal wire is an independently suspended ultra-long metal wire (about 260μm).
[0004] Necessary analytical instruments in the failure analysis process include: Scanning Electron Microscope (SEM) for observation, Focused Ion Beam (FIB) for cutting samples, Nano Prober for measurement and failure location, etc. These devices all use electron beams. When the electron beam is irradiated to the surface of a sample with a long metal wire, it is very easy to cause local overheating of the defective position due to charge accumulation, thereby causing the metal wire to burn out. For example, the defective position that caused the test structure to break was found on a 260μm long metal wire, but the defective position was burned, resulting in the failure to complete the TEM (Transmission Electron Microscope) sample preparation, and the accurate cause of the failure could not be seen from the physical properties, resulting in a decrease in the accuracy of failure analysis.
[0005] Based on this, how to prevent the long metal wire from burning after being irradiated by the electron beam, resulting in the inability to complete sample preparation and thus affecting the accuracy of failure analysis has become a technical problem that technical personnel in this field need to solve. Summary of the invention
[0006] The purpose of the present invention is to provide a failure analysis sample processing method and a failure analysis method to solve the problem that a long metal wire is burned under electron beam irradiation, resulting in the inability to complete sample preparation and affecting the accuracy of failure analysis.
[0007] In order to achieve the above object, the present invention provides a failure analysis sample processing method, comprising:
[0008] Delayer the test sample to the first metal layer, retaining the complete test structure;
[0009] Grounding the test sample to conduct away the charges on the surface of the first metal layer;
[0010] Pre-positioning the failure position of the test sample;
[0011] Grinding the test sample to above the second metal layer, and plating a conductive layer on the ground surface of the test sample;
[0012] The failure position is located and marked.
[0013] Optionally, grounding the test sample to conduct away the charge on the surface of the first metal layer includes:
[0014] The pads at both ends of the test sample are grounded, and the charges accumulated on the surface of the first metal layer are conducted away by using a laser beam or a focused ion beam.
[0015] Optionally, the pre-positioning the failure position of the test sample includes:
[0016] The test sample is subjected to an AVC test or an EBAC test by using a nanoprobe machine to locate the position range of the failure position.
[0017] Optionally, an AVC test is performed on the first metal layer using a nanoprobe machine to find VC abnormal points on the first metal layer, and the failure position is located on one of the metal wires.
[0018] Optionally, after locating the failure position to a certain metal wire, the sample is ground to above the second metal layer, and the conductive layer is plated on the surface of the test sample;
[0019] The nanoprobe machine is used to perform an AVC test on the second metal layer to locate the failure position.
[0020] Optionally, an EBAC test is performed on the test sample using a nanoprobe machine, and the failure position is located based on the light and dark differences in the EBAC image.
[0021] Optionally, grinding the test sample to above the second metal layer and plating a conductive layer on the surface of the test sample includes:
[0022] Grinding the test sample to above the second metal layer and retaining the metal dielectric layer;
[0023] The conductive layer is plated on the surface of the test sample using a coating machine.
[0024] Optionally, the thickness of the metal dielectric layer is 15 nm to 25 nm.
[0025] Optionally, the conductive layer includes conductive carbon, and the thickness of the conductive carbon is 10 nm to 30 nm.
[0026] In order to achieve the above object, the present invention also provides a failure analysis method, comprising:
[0027] Using the failure analysis sample processing method as described above, the failure position of the test sample is located;
[0028] The FIB machine was used to prepare TEM samples, and the failure causes and failure mechanisms were analyzed.
[0029] Compared with the existing failure location methods, the failure analysis sample processing method and failure analysis method provided in this application have the following advantages:
[0030] The failure analysis sample processing method provided in the present application can timely conduct away the charge accumulated on the surface of the test sample by grinding the test sample to the second metal layer and coating the surface of the test sample with a conductive layer, thereby avoiding the burning of the metal wire due to charge accumulation, thereby preserving the original morphology of the failure position and finding the cause of failure more accurately; and the conductive layer does not affect the observation of SEM and TEM machines, thereby improving the success rate of failure analysis and reducing the cost of failure analysis.
[0031] The failure analysis method provided in the present application, by using the above-mentioned failure analysis sample processing method, plates a conductive layer on the surface of the test sample, thereby avoiding the burning of the metal wire due to charge accumulation, thereby improving the accuracy and success rate of the failure analysis, and at the same time, avoiding the increase in costs caused by damage to the test sample. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 A flow chart of a failure analysis sample processing method provided by an embodiment of the present invention;
[0033] Figure 2 A flowchart of a failure analysis method provided by an embodiment of the present invention;
[0034] Figure 3 A schematic diagram of grounding a pad of a test sample provided in an embodiment of the present invention;
[0035] Figure 4 A schematic diagram of using a scanning electron microscope to observe and locate a failure position provided by an embodiment of the present invention;
[0036] Figure 5 A schematic diagram of locating a failure position by using an EBAC test provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0037] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.
[0038] As used in this specification, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used to include the meaning of "and / or", the term "several" is generally used to include the meaning of "at least one", and the term "at least two" is generally used to include the meaning of "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" and "third" may explicitly or implicitly include one or at least two of the features, "one end" and "the other end" and "the proximal end" and "the distal end" generally refer to two corresponding parts, which include not only the endpoints, and the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral body; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. In addition, as used in this specification, an element disposed on another element generally only indicates that there is a connection, coupling, cooperation or transmission relationship between the two elements, and the connection, coupling, cooperation or transmission between the two elements may be direct or indirect through an intermediate element, and it cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, one element may be in any orientation such as inside, outside, above, below or on one side of another element, unless the content clearly indicates otherwise. The terms "upper", "lower", "top" and "bottom" are generally relative position relationships arranged in the direction of gravity; the terms "vertical, vertical direction" generally refer to the direction of gravity, which is generally perpendicular to the ground, and "horizontal, horizontal plane direction" generally refers to the direction parallel to the ground; for ordinary technicians in this field, the specific meanings of the above terms in this specification can be understood according to specific circumstances.
[0039] The purpose of the present invention is to provide a failure analysis sample processing method and a failure analysis method to solve the problem that a long metal wire is burned under electron beam irradiation, resulting in the inability to complete sample preparation and affecting the accuracy of failure analysis.
[0040] Those skilled in the art can understand that for a test sample containing an extra-long metal wire, the area of the entire test sample is about 260μm*150μm. During the failure analysis of the test sample, after the test sample is delaminated to the lower layer, each metal wire is an independently suspended extra-long metal wire (with a length of 260μm). An extra-long independently suspended metal wire is more likely to burn due to charge accumulation, and the original morphology of the failure position on the burned test sample is destroyed. During the subsequent failure analysis, the operator is often unable to accurately find the cause of the failure, resulting in the failure of the failure analysis and increasing the cost of the failure analysis. Based on this, the present embodiment, when the test sample is ground to the lower metal layer, a conductive layer is plated on the surface of the test sample to conduct away the charge accumulated on the surface of the metal wire, thereby avoiding the burning of the metal wire, retaining the original morphology of the failure position, and improving the success rate of the failure analysis.
[0041] Please refer to Figure 1 The present invention provides a method for processing failure analysis samples, comprising:
[0042] Step S1: De-layering the test sample to the first metal layer, retaining the complete test structure;
[0043] Step S2: grounding the test sample to conduct away the charge on the surface of the first metal layer;
[0044] Step S3: pre-positioning the failure position of the test sample;
[0045] Step S4: grinding the test sample to above the second metal layer, and coating a conductive layer on the ground surface of the test sample;
[0046] Step S5: Locate the failure position and form a mark.
[0047] It should be noted that in the present embodiment, the test sample is a large-area chain structure having a first metal layer and a second metal layer, wherein the first metal layer is located one level above the second metal layer; the first metal layer and the second metal layer are both ultra-long metal wires. Those skilled in the art can understand that de-layering refers to the process of removing the multi-layer structure in the sample layer by layer using different processing methods (such as ion etching, chemical liquid etching, mechanical grinding, etc.). Through grinding and de-layering, the sample can be checked layer by layer to see if there are defects, and through subsequent testing, the circuit wiring structure of each layer can be clearly analyzed. In step S5, after locating the failure position, a laser beam can be used to form a mark near the failure position to identify the failure position. In other embodiments, other methods can also be used to mark the failure position, and this embodiment does not limit this.
[0048] The failure analysis sample processing method provided in the present embodiment is to ground the test sample after de-layering the test sample to the first metal layer, thereby conducting away the charge accumulated on the surface of the metal wire, and after pre-positioning the failure position of the test sample, grind the test sample to above the second metal layer, and plate a conductive layer on the surface of the test sample, thereby avoiding the burning of the metal wire due to the accumulated charge on the surface, retaining the original morphology of the failure position of the test sample, further improving the success rate and accuracy of the failure analysis, and avoiding the increase in the failure analysis cost caused by the burning of the metal wire; and the original morphology of the failure position can be retained, and the cause of the failure can be found more accurately, and the conductive layer will not affect the observation of the SEM machine and the TEM machine.
[0049] As an alternative embodiment, please refer to Figure 3 , ground the test sample and conduct away the charge on the surface of the first metal layer, including:
[0050] Step S20: grounding the pads at both ends of the test sample, and using a laser beam or a focused ion beam to conduct away the charges accumulated on the surface of the first metal layer.
[0051] It should be noted that Figure 3 In the illustrated example, a chain structure is used as an example, Pad07B and Pad24B (i.e., pads at both ends) at both ends of the test structure are grounded, and the charges accumulated on the surface of the first metal layer are conducted away by a laser beam (Laser) or a focused ion beam (Focused Ion Beam, FIB), thereby preventing the failure position from being burned due to the charges accumulated on the surface. In other embodiments, those skilled in the art may also select a suitable method to conduct away the charges accumulated on the surface of the metal wire based on the actual application scenario. The method provided in this embodiment is only for illustration and should not be regarded as a limitation on the method of conducting away the charges.
[0052] Please refer to Figure 4 and Figure 5 , pre-position the failure position of the test sample, including:
[0053] Step S30: Perform an AVC test or an EBAC test on the test sample using a nanoprobe machine to locate the position range of the failure position.
[0054] The specific steps for performing AVC test and EBAC test are described below.
[0055] In an optional embodiment, the first metal layer is subjected to an AVC test using a nanoprobe machine, and the VC (Voltage Contrast) abnormal point is found on the first metal layer, and the failure position is located on one of the metal wires. Further, after the failure position is located on a certain metal wire, the sample is ground to above the second metal layer, and a conductive layer is plated on the surface of the test sample; the second metal layer is subjected to an AVC test using a nanoprobe machine to locate the failure position.
[0056] It should be noted that the AVC (Active Voltage Contrast) test is an active measurement method, which involves applying an external excitation or voltage to the sample to be tested and observing the response of the sample; by applying an external voltage to a high-resistance contact chain, different potentials will appear on the two parts of the contact chain, thereby producing significantly different voltage contrasts. In this embodiment, since the AVC test can only observe the voltage contrast of the current layer, the failure position can only be pre-positioned on the first metal layer and the failure position is located on a certain metal wire; then, the test structure is ground to the second metal layer, and after a conductive layer is attached to the surface of the test structure, the AVC test is performed on the second metal layer again, so that the test position can be accurately located according to the light and dark differences in the voltage contrast (such as Figure 4 The above steps can be completed by a nanoprobe machine and a SEM (Scanning Electron Microscope).
[0057] In another optional embodiment, a nanoprobe machine is used to perform an EBAC test on the test sample, and the failure position is located based on the light and dark differences in the EBAC image.
[0058] It should be noted that the EBAC (Electron Beam Absorbed Current) test is to pass the electron beam through the metal dielectric layer, accumulate charges in the metal layer, and form a current due to the bribe formed by the probe, and finally determine the failure position of the test sample through the current image. In this embodiment, since the current image formed by the EBAC test can directly see the failure position of the second metal layer, it is only necessary to perform an EBAC test on the first metal layer to complete the positioning of the failure position (such as Figure 5 shown).
[0059] In an alternative embodiment, grinding the test sample to above the second metal layer and plating a conductive layer on the surface of the test sample comprises:
[0060] Step S40: grinding the test sample to above the second metal layer and retaining the metal dielectric layer;
[0061] Step S41: using a coating machine to coat a conductive layer on the surface of the test sample.
[0062] It should be noted that the metal dielectric layer (Inter Metal Dielectric, IMD) is a structure arranged between metal layers. It is a low dielectric constant material with a low capacitance value, which can reduce the distributed capacitance and play an important role in reducing the delay time of the interconnection line. In step S40, the test sample is ground to the upper part of the second metal layer, and the metal dielectric layer is retained. The thickness of the metal dielectric layer is 15nm to 25nm. In this embodiment, the conductive layer is conductive carbon, and its thickness is between 10nm and 30nm. Among them, conductive carbon has a lower resistivity, which can make the material have certain conductive properties and is used in different conductive or antistatic products. In this embodiment, a layer of conductive carbon is plated on the surface of the test sample so that the charge accumulated on the metal wire can be conducted away. In some other embodiments, the conductive layer can also be other materials with similar properties, which is not limited in this embodiment.
[0063] In another embodiment, please refer to Figure 2 The present invention also provides a failure analysis method, comprising:
[0064] Step S100: using the failure analysis sample processing method as described above to locate the failure position of the test sample;
[0065] Step S200: TEM sample preparation is performed using a FIB machine, and failure causes and failure mechanisms are analyzed.
[0066] It should be noted that after locating the failure position using the above failure analysis sample processing method, TEM sample preparation can be performed using a FIB machine, and observation can be performed using a TEM (Transmission Electron Microscope) machine to analyze and obtain the specific failure cause and failure mechanism.
[0067] With such a configuration, by using the above-mentioned failure analysis sample processing method, a conductive layer is plated on the surface of the test sample to avoid the burning of the metal wire due to charge accumulation, thereby improving the accuracy and success rate of the failure analysis, and at the same time, avoiding the increase in costs caused by damage to the test sample.
[0068] In summary, in the failure analysis sample processing method and the failure analysis method provided in the embodiments of the present invention, the failure analysis sample processing method includes: de-layering the test sample to the first metal layer, retaining the complete test structure; grounding the test sample to conduct away the charge on the surface of the first metal layer; pre-positioning the failure position of the test sample; grinding the test sample to above the second metal layer, and plating a conductive layer on the ground surface of the test sample; locating the failure position and forming a mark.
[0069] With such a configuration, by grinding the test sample to above the second metal layer and coating the ground surface of the test sample with a conductive layer, the charge accumulated on the surface of the test sample can be promptly conducted away to avoid the burning of the metal wire due to charge accumulation, thereby preserving the original morphology of the failure position and finding the cause of the failure more accurately; and the conductive layer does not affect the observation of the SEM and TEM machines, thereby improving the success rate of failure analysis and reducing the cost of failure analysis.
[0070] Furthermore, by using the above-mentioned failure analysis sample processing method, a conductive layer is plated on the surface of the test sample to avoid the burning of the metal wire due to charge accumulation, thereby improving the accuracy and success rate of failure analysis, and at the same time, avoiding the increase in costs caused by damage to the test sample.
[0071] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A method for processing failure analysis samples, characterized in that: include: Delayer the test sample to the first metal layer, retaining the complete test structure; Grounding the test sample to conduct away the charges on the surface of the first metal layer; Pre-positioning the failure position of the test sample; Grinding the test sample to above the second metal layer, and plating a conductive layer on the ground surface of the test sample; The failure position is located and marked.
2. The failure analysis sample processing method according to claim 1, characterized in that: The step of grounding the test sample to conduct away the charges on the surface of the first metal layer comprises: The pads at both ends of the test sample are grounded, and the charges accumulated on the surface of the first metal layer are conducted away by using a laser beam or a focused ion beam.
3. The failure analysis sample processing method according to claim 1, characterized in that: The pre-positioning of the failure position of the test sample comprises: The test sample is subjected to an AVC test or an EBAC test by using a nanoprobe machine to locate the position range of the failure position.
4. The failure analysis sample processing method according to claim 3, characterized in that: The first metal layer is subjected to an AVC test by using a nanoprobe machine to find a VC abnormal point on the first metal layer, and the failure position is located on one of the metal wires.
5. The failure analysis sample processing method according to claim 4, characterized in that: After locating the failure position to a certain metal wire, grinding the sample to above the second metal layer, and coating the conductive layer on the surface of the test sample; The nanoprobe machine is used to perform an AVC test on the second metal layer to locate the failure position.
6. The failure analysis sample processing method according to claim 3, characterized in that: The test sample is subjected to EBAC testing using a nanoprobe machine, and the failure position is located based on the light and dark differences in the EBAC image.
7. The failure analysis sample processing method according to claim 1, characterized in that: The step of grinding the test sample to above the second metal layer and plating a conductive layer on the surface of the test sample comprises: Grinding the test sample to above the second metal layer and retaining the metal dielectric layer; The conductive layer is plated on the surface of the test sample using a coating machine.
8. The failure analysis sample processing method according to claim 7, characterized in that: The thickness of the metal dielectric layer is 15nm-25nm.
9. The failure analysis sample processing method according to claim 7, characterized in that: The conductive layer includes conductive carbon, and the thickness of the conductive carbon is 10nm-30nm.
10. A failure analysis method, characterized in that: include: Using the failure analysis sample processing method according to any one of claims 1 to 9, locating the failure position of the test sample; The FIB machine was used to prepare TEM samples, and the failure causes and failure mechanisms were analyzed.