Data transmission method and device, computer device and storage medium
By dividing the transmitted information into three parts and mapping them to the indexes and elements of the block sparse superimposed vector code, the data transmission problem in scenarios with insufficient spectrum resources and time-delay sensitivity is solved, achieving high-reliability and high-spectral-efficiency data transmission, which is suitable for complex channel environments such as vehicle-to-everything (V2X) networks.
Patent Information
- Application Number
- CN202411285676.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-13
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2044-09-13
AI Technical Summary
In sixth-generation mobile communication systems, insufficient spectrum resources lead to low data transmission throughput, and it is difficult to achieve a balance between reliability and transmission latency in latency-sensitive communication scenarios. Existing sparse vector codes have low decoding reliability and spectral efficiency.
A block sparse superposition vector code is adopted, which divides the transmitted information into three parts, which are respectively mapped to the index of the target submatrix, the index of the non-zero block, and the element value of the non-zero element. The transmission and decoding are carried out through pseudo-random expansion and inverse discrete Fourier transform. A three-stage decoding rule is designed to improve the decoding success probability and spectral efficiency.
It improves the reliability and spectral efficiency of data transmission, reduces transmission latency, and is suitable for high-mobility scenarios such as vehicle networking and emergency rescue systems. It has a higher decoding success rate and less time and frequency resource requirements.
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Figure CN119109556B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of wireless communication, in particular to a data transmission method and device, a computer device and a storage medium. BACKGROUND
[0002] With the development of economic society, people's demand for wireless communication quality is increasing day by day. In the sixth generation (6G) mobile communication system, the number of devices grows exponentially, and the massive device connection brings great challenges to the traditional communication system.
[0003] On the one hand, the limited spectrum resource limits the throughput of data transmission between devices, and it is urgent to explore new dimensions of physical resources to make up for the problem of insufficient spectrum resources.
[0004] On the other hand, in the delay-sensitive communication scenarios such as emergency rescue, remote medical treatment and automatic driving, the reliability and transmission delay of data transmission play a crucial role in people's life and property safety. However, the related long packet transmission mode is difficult to achieve a balance between reliability and transmission delay. In order to ensure reliability, a large number of resources need to be allocated to signaling, retransmission and error checking, resulting in high transmission delay and low spectrum efficiency. Under the limitation of limited block length, the sparsity of the parity check matrix of the low-density parity check code will be damaged, and the polar code will not be able to completely polarize the channel, resulting in significant loss of coding gain.
[0005] Therefore, it is urgent to develop a new data transmission method to meet the demand of the next generation of wireless communication for high spectrum efficiency, high reliability and low delay. SUMMARY
[0006] Therefore, the present application provides a data transmission method, device, computer device and storage medium to solve the problems of low spectrum efficiency, low reliability and long delay in related technologies.
[0007] In a first aspect, the present application provides a data transmission method, comprising:
[0008] obtaining a codebook matrix constructed in advance; the codebook matrix is divided into a preset number of sub-matrices;
[0009] selecting a target sub-matrix from the preset number of sub-matrices;
[0010] mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain an encoding result; the preset mapping rule comprises: dividing the transmission information into a first part, a second part and a third part; mapping the first part to the index of the target sub-matrix, mapping the second part to the index of the non-zero block, and mapping the third part to the element value of the non-zero element;
[0011] performing pseudo-random spreading on the encoding result to obtain a target block sparse superposition vector code;
[0012] mapping the target block sparse superposition vector code onto subcarriers for transmission;
[0013] performing decoding on the received signal according to a preset decoding rule to obtain a decoding result.
[0014] In an optional implementation, the pseudo-random spreading on the encoding result to obtain a target block sparse superposition vector code comprises:
[0015] performing pseudo-random spreading on the encoding result according to the codebook matrix to obtain a target block sparse superposition vector code.
[0016] In an optional implementation, the mapping of the transmission information onto the target submatrix according to a preset mapping rule to obtain an encoding result comprises:
[0017] mapping the first part onto an index of a target submatrix, randomly selecting K non-zero blocks with a length of L from the target submatrix, mapping the second part onto indexes of the K non-zero blocks with the length of L, and mapping the third part onto element values of KL non-zero elements through modulation to obtain an encoding result.
[0018] In an optional implementation, the decoding of the received signal according to a preset decoding rule to obtain a decoding result comprises:
[0019] determining a correlation value of each submatrix in the preset number of submatrices with the received signal;
[0020] determining an index of a submatrix corresponding to a maximum value in the correlation value of each submatrix with the received signal as a target index;
[0021] performing decoding on the received signal according to the target index to obtain a first part;
[0022] constructing a new submatrix according to the target index;
[0023] performing decoding on the received signal according to indexes of K non-zero blocks with a length of L determined in the new submatrix to obtain a second part;
[0024] determining element values of KL non-zero elements in the new submatrix;
[0025] performing decoding on the received signal through demodulation on the element values of the KL non-zero elements determined in the new submatrix to obtain a third part;
[0026] determining the decoding result according to the first part, the second part and the third part obtained through decoding.
[0027] In an alternative embodiment, the decoding the received signal according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part comprises:
[0028] S1: initializing the residual and the number of iterations: k=1;
[0029] S2: dividing the new sub-matrix into C blocks, and determining the correlation value of each block in the C blocks with the residual; C=B / L;
[0030] S3: determining the index of the block corresponding to the maximum value in the correlation value of each block with the residual as the index of the non-zero block obtained in the k-th iteration;
[0031] S4: determining whether the number of iterations is equal to K, and when the number of iterations is equal to K, obtaining the indexes of the K non-zero blocks of length L, and performing S5; when the number of iterations is less than K, updating the residual, increasing the number of iterations by 1, and repeating S2-S4;
[0032] S5: decoding the received signal according to the indexes of the K non-zero blocks of length L to obtain the second part.
[0033] In an alternative embodiment, the determining the element values of the KL non-zero elements in the new sub-matrix comprises:
[0034] determining the element values of the KL non-zero elements according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix.
[0035] In an alternative embodiment, the mapping the target block sparse superposition vector code to the sub-carriers for transmission comprises:
[0036] mapping the target block sparse superposition vector code to M sub-carriers; the power of the sub-carriers corresponding to the K non-zero blocks of length L in the M sub-carriers is non-zero, and the power of the sub-carriers other than the sub-carriers corresponding to the K non-zero blocks of length L in the M sub-carriers is zero;
[0037] performing inverse discrete Fourier transform on the M sub-carriers to obtain a time domain signal sequence;
[0038] transmitting the time domain signal sequence.
[0039] In a second aspect, the present application provides a data transmission device, which comprises:
[0040] a first processing module configured to acquire a codebook matrix constructed in advance; the codebook matrix is divided into a preset number of sub-matrices;
[0041] The second processing module is used to select a target submatrix from the preset number of submatrixes;
[0042] The transmission information is mapped to the target submatrix according to a preset mapping rule to obtain the encoding result; the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part; mapping the first part to the index of the target submatrix, mapping the second part to the index of the non-zero block, and mapping the third part to the element value of the non-zero element;
[0043] The third processing module is used to perform pseudo-random expansion on the encoding result to obtain the target block sparse superposition vector code;
[0044] The fourth processing module is used to map the sparse superposition vector code of the target block onto a subcarrier for transmission;
[0045] The fifth processing module is used to decode the acquired received signal according to the preset decoding rules to obtain the decoding result.
[0046] Thirdly, the present invention provides a computer device, comprising: a memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the data transmission method of the first aspect or any corresponding embodiment described above.
[0047] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to perform the data transmission method of the first aspect or any corresponding embodiment described above.
[0048] The technical solution provided by this invention has the following technical effects:
[0049] Based on the technical solution of this invention, by dividing the transmitted information into different parts and mapping them to the indices of the target submatrix, the indices of the non-zero blocks, and the element values of the non-zero elements, effective encoding of the transmitted information is achieved, thereby transmitting more information bits and improving transmission reliability. The technical solution of this invention uses a preset mapping rule to map the transmitted information into the submatrix and decodes the received signal according to a preset decoding rule, resulting in a higher probability of successful decoding at the receiving end compared to traditional sparse vector codes. With the same number of non-zero elements, the block sparse superposition vector code requires fewer time-frequency resources than the sparse vector code, and its spectral efficiency is higher than that of the sparse vector code, thus reducing transmission delay. Attached Figure Description
[0050] In order to more clearly illustrate the technical solutions in the specific embodiments of the present application or the related art, the following will briefly introduce the drawings needed to be used in the specific embodiments or the related art description. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.
[0051] Figure 1 is a flowchart of a data transmission method according to an embodiment of the present application;
[0052] Figure 2 is a flowchart of a mapping process according to an embodiment of the present application;
[0053] Figure 3 is a flowchart of a decoding process according to an embodiment of the present application;
[0054] Figure 4 is a simulation comparison result diagram according to an embodiment of the present application;
[0055] Figure 5 is a structural block diagram of a data transmission device according to an embodiment of the present application;
[0056] Figure 6 is a hardware structure diagram of a computer device according to an embodiment of the present application. DETAILED DESCRIPTION
[0057] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the following will combine the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.
[0058] Sparse vector code has the advantages of smooth adjustment of spectrum efficiency, high reliability, short transmission delay and low decoding complexity. The traditional data transmission method maps information bits to a given constellation diagram, and then modulates the constellation points corresponding to the information bits to subcarriers for transmission. Unlike the traditional method, the sparse vector code maps the information bits to the non-zero index resources of a sparse vector, then pseudo-randomly extends the sparse vector to obtain a low-dimensional transmission vector, and finally maps the low-dimensional transmission vector to the time-frequency resources for transmission. Compared with the traditional method, the sparse vector code has two important advantages. First, the power in the sparse vector code is concentrated on a small number of non-zero elements, and the effective power of the received non-zero elements is higher, which helps to improve the decoding reliability of the receiving end. Second, in addition to the time-frequency resources, the sparse vector code also uses the index resources to carry additional information bits, thereby improving the spectrum efficiency of data transmission.
[0059] However, most of the related sparse vector codes improve the reliability of data transmission by designing complex decoding algorithms. These methods usually need to pay a large amount of computing resources to obtain the improvement of reliability, and the complex decoding algorithm will cause the processing delay to be high. In addition, the sparse vector code only uses a random sparse mapping mode to map the transmission bits to the sparse vector, and the decoding reliability and spectrum efficiency are still low. Therefore, while ensuring high reliability and low delay, designing a data transmission method with high spectrum efficiency is still a technical problem to be solved.
[0060] Therefore, the embodiment of the present application provides a data transmission method, device, computer equipment and storage medium to solve the above problems.
[0061] According to the embodiment of the present application, a data transmission method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0062] Figure 1 is a flowchart of the data transmission method according to the embodiment of the present application.
[0063] As Figure 1 shown, the data transmission method provided in the embodiment of the present application comprises:
[0064] S101: Obtain a pre-constructed codebook matrix.
[0065] In this embodiment, the codebook matrix is divided into a preset number of submatrices.
[0066] In the embodiment, the codebook matrix can be divided into a preset number D of sub-matrices. In the embodiment, the specific value of the preset number is not limited and can be designed and modified according to actual needs. As an example, when D = 8, the codebook matrix can be divided into 8 sub-matrices.
[0067] In the embodiment, a sparse vector with a length of N can be obtained, and the sparse vector with the length of N is divided into a preset number D of blocks, and a single block corresponds to a single sub-matrix. The codebook matrix can be flexibly designed according to different application requirements and channel characteristics, and can better adapt to various communication scenarios.
[0068] S102: selecting a target sub-matrix from the preset number of sub-matrices, and mapping the transmission information to the target sub-matrix according to a preset mapping rule to obtain an encoding result.
[0069] In the embodiment, the preset mapping rule includes: dividing the transmission information into a first part, a second part and a third part. The first part is mapped to the index of the target sub-matrix, the second part is mapped to the index of the non-zero block, and the third part is mapped to the element value of the non-zero element.
[0070] In the embodiment, the transmission information is encoded according to the preset encoding rule to obtain the encoding result. The preset encoding rule can include the technical solutions in S101-S102: obtaining a pre-constructed codebook matrix, selecting a target sub-matrix from the preset number of sub-matrices, and mapping the transmission information to the target sub-matrix according to a preset mapping rule. In the embodiment, the transmission information can be mapped to multiple sub-matrices according to the preset mapping rule.
[0071] In the embodiment, a sub-matrix can be randomly selected from the preset number of sub-matrices as the target sub-matrix. The transmission information can be divided into a first part, a second part and a third part according to the number of resources available for carrying information bits of each part. The first part includes b1 bits of information, the second part includes b2 bits of information, and the third part includes b3 bits of information.
[0072] In the embodiment, S102 maps the transmission information to the target sub-matrix according to the preset mapping rule to obtain the encoding result, specifically including:
[0073] The first part is mapped to the index of the target sub-matrix. K non-zero blocks with a length of L are randomly selected from the target sub-matrix. The second part is mapped to the index of the K non-zero blocks with the length of L. The third part is mapped to the element value of the KL non-zero elements through modulation to obtain the encoding result.
[0074] In the embodiment, the modulation can include soft symbol modulation, and the soft symbol modulation can include phase modulation or amplitude modulation.
[0075] In the embodiment, according to the preset mapping rule, the total number of transmission bits is b = b1 + b2 + b3, the total number of transmission bits in the encoding result is b = b1 + b2 + b3, and the number of bits mapped in each part is respectively:
[0076]
[0077] b3 = KLlog2(M mod )
[0078] Wherein, b1 represents the number of bits mapped to the index of the target submatrix, b2 represents the number of bits mapped to the index of the K non-zero blocks with length L, b3 represents the number of bits mapped to the element value of the KL non-zero elements, M mod represents the order of modulation, represents the floor function, D represents the number of submatrices, N represents the length of the sparse vector, B = N / D represents the number of columns of the target submatrix, and D, N and B are all integers.
[0079] In the embodiment, if D = 8, one submatrix is selected for mapping and encoding, and there are 8 target submatrices that can be selected, corresponding to 8 encoding modes.
[0080] As shown in Figure 2 , the mapping process is: the target submatrix selected from the preset number of submatrices is the second submatrix, the second submatrix has B columns, K non-zero blocks with length L are randomly selected from the B columns, and there are (B / L, K) modes in total, so that the number of bits b2 mapped to the index of the second submatrix can be obtained. According to the index of the K non-zero blocks with length L, only b3 bits of information need to be mapped to the element value of the KL non-zero elements. The above mapping process is actually a modulation process, and different order modulation modes can be used. When the order of modulation is M mod , b3 can be obtained.
[0081] S103: Perform pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code.
[0082] In the embodiment, the spectral efficiency of the target block sparse superposition vector code can be calculated according to the total number of transmission bits in the encoding result:
[0083]
[0084] Wherein, M BSSC represents the transmission block length of the target block sparse superposition vector code, SE BSSC represents the spectral efficiency of the target block sparse superposition vector code, and the spectral efficiency of the traditional sparse vector code is:
[0085]
[0086] where SE SVC denotes the spectral efficiency of the conventional sparse vector code, M SVC denotes the transmission block length of the conventional sparse vector code.
[0087] In the present embodiment, the block sparse superposition vector code adopts a non-zero block mapping mode, and the probability of successful decoding at the receiving end is higher than that of the conventional sparse vector code. In the case of the same non-zero elements, the block sparse superposition vector code requires less time-frequency resources than the sparse vector code, i.e., M BSSC <M SVC In addition, compared with the sparse vector code, the block sparse superposition vector code maps additional bit information to the index of the target submatrix and the element value of the non-zero element in addition to mapping bit information to the index of the non-zero block, thereby transmitting more bit information. The spectral efficiency of the block sparse superposition vector code is higher than that of the sparse vector code.
[0088] In the present embodiment, S103 performs pseudo-random expansion on the encoding result to obtain the target block sparse superposition vector code, specifically including: performing pseudo-random expansion on the encoding result according to the codebook matrix to obtain the target block sparse superposition vector code. Unlike the conventional sparse vector code, in the present embodiment, the non-zero elements in the encoding result are randomly expanded in the form of blocks, rather than being randomly expanded one by one. This pseudo-random expansion of the encoding result according to the codebook matrix of the block sparse superposition vector code provides additional block structure information, which can be used to design high-precision decoding rules. In order to reduce the storage cost, the codebook matrix in the present embodiment can adopt a random Hadamard matrix, the elements of which are composed of 1 and -1 and subject to Bernoulli distribution. As an example: a codebook matrix G composed of four submatrices G1, G2, G3 and G4 with a size of M=3 and N=16 is as follows:
[0089]
[0090] In the present embodiment, the process of pseudo-random expansion of the encoding result according to the codebook matrix is as follows:
[0091]
[0092] wherein, is the target block sparse superposition vector code obtained after pseudo-random expansion of the K non-zero blocks, s=[s1, s2, …s d ,…s D is a sparse vector in the block sparse superposition vector code, is a codebook matrix, is the dthsubmatrix, is the support set of the kth nonzero block corresponding to the dth matrix, and denotes the modulo operation, is the support set of all nonzero elements, where d * denotes the selected target sub-matrix.
[0093] S104: Map the target block sparse superposition vector code to subcarriers for transmission.
[0094] S105: Decode the obtained received signal according to a preset decoding rule to obtain a decoding result.
[0095] In an optional embodiment, the mapping of the target block sparse superposition vector code to subcarriers for transmission in S104 specifically includes:
[0096] Sa1: Map the target block sparse superposition vector code to M subcarriers.
[0097] In this embodiment, the power of the subcarriers corresponding to the K nonzero blocks with a length of L in the M subcarriers is nonzero, and the power of the subcarriers other than the subcarriers corresponding to the K nonzero blocks with a length of L in the M subcarriers is zero. The power of the subcarriers being nonzero indicates that the subcarriers are in an activated state, and the power of the subcarriers being zero indicates that the subcarriers are in an inactivated state.
[0098] Sa2: Perform inverse discrete Fourier transform on the M subcarriers to obtain a time-domain signal sequence.
[0099] Sa3: Transmit the time-domain signal sequence.
[0100] In this embodiment, the time-domain signal sequence can be transmitted by an antenna.
[0101] In this embodiment, in a high-mobility scenario such as the Internet of Vehicles, the wireless channel simultaneously exhibits frequency-selective and time-selective fading characteristics, and the obtained received signal is:
[0102] y = FH T F H Gs + w = Φs + w
[0103] wherein, denotes a measurement matrix, s denotes a block sparse signal, which includes K nonzero blocks with a length of L, F is a discrete Fourier transform matrix, G is a codebook matrix, H T is a time-domain channel matrix, denotes a received signal, denotes an additive white Gaussian noise vector with a mean of 0 and a variance of σ 2 I M denotes a unit matrix with a dimension of M, H represents a complex Gaussian distribution. Due to the rich scattering environment and time-varying channel gain in the vehicle-to-everything (V2X) scenario, H... T Set as a pseudo-circular matrix, its (p,q)th element is: [H T ] p,q =h p,mod(p-q,M) p,q∈[0,M-1], mod(pq,M) means taking the remainder after dividing pq by M, h p,mod(p-q,M) This represents the time-domain channel gain of the p-th channel path at time mod(pq,M).
[0104] In order to recover transmitted information from low-dimensional received signals, this invention proposes a three-stage preset decoding rule, including non-zero submatrix identification, non-zero block index identification, and soft symbol demodulation. Figure 3 A flowchart of the three-stage decoding process is provided.
[0105] In one optional implementation, step S105, which decodes the received signal according to a preset decoding rule to obtain a decoding result, specifically includes:
[0106] Sb1: Determine the correlation value between each submatrix in a preset number of submatrixes and the received signal.
[0107] In this embodiment, before executing Sb1, it is first necessary to acquire the received signal y, the measurement matrix Φ, the preset number of submatrices D, the number of columns of the submatrices B, the number of non-zero blocks K, and the length L of a single non-zero block.
[0108] In this embodiment, it can be achieved through Determine the correlation value between each of the preset number of submatrices and the received signal.
[0109] Sb2: Determine the index of the submatrix corresponding to the maximum value among the correlation values of each submatrix and the received signal as the target index.
[0110] In this embodiment, it can be based on Select the index of the submatrix corresponding to the maximum value. The indices of non-zero submatrices can be identified based on the above Sb1-Sb2 technical solutions.
[0111] Sb3: The first part is obtained by decoding the received signal according to the target index.
[0112] In this embodiment, it can be based on the target index. The received signal is decoded to obtain the first part of b1 bits of information.
[0113] Sb4: Construct a new submatrix based on the target index. This can be done based on the target index. Construct a new submatrix
[0114]
[0115] Sb5: decoding the received signal according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part.
[0116] In the embodiment, the indexes of the K non-zero blocks can be identified according to the technical solutions of Sb3-Sb5.
[0117] Sb6: determining the element values of the KL non-zero elements in the new sub-matrix.
[0118] In the embodiment, the element values of the KL non-zero elements can be determined according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix.
[0119] Sb7: decoding the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain the third part.
[0120] In the embodiment, the demodulation can be soft symbol demodulation, and the soft symbol demodulation can include phase demodulation or amplitude demodulation. The element values of the KL non-zero elements can be demodulated according to the technical solutions of Sb6-Sb7.
[0121] Sb8: determining the decoding result according to the first part, the second part and the third part.
[0122] In the embodiment, the decoding result is obtained by combining the first part, the second part and the third part.
[0123] In an optional implementation, Sb5 decodes the received signal according to the indexes of the K non-zero blocks of length L determined in the new sub-matrix to obtain the second part, and specifically includes:
[0124] S1: initializing the residual and the iteration number: k = 1.
[0125] In the embodiment, the residual is initialized as r (1) = y.
[0126] S2: dividing the new sub-matrix into C blocks, and determining the correlation value of each block in the C blocks with the residual. C = B / L.
[0127] In the embodiment, the new sub-matrix can be divided into B / L = C blocks by column, and the correlation value of each block in the C blocks with the residual can be determined according to the following formula: wherein c = 1, 2, …, C.
[0128] S3: determining the correlation value of each block with the residual r(k) The index of the block corresponding to the maximum value in the correlation value is determined as the index of the non-zero block obtained in the kth iteration
[0129] In this embodiment, when the technical solution of S3 is performed, the index value of the non-zero element obtained in the kth iteration can be calculated The element value of the non-zero element in the kth iteration is determined according to the index value of the non-zero element
[0130] S4: Determine whether the iteration number is equal to K, and obtain the index of the K non-zero blocks with length L when the iteration number is equal to K, and perform S5. When the iteration number is less than K, update the residual The iteration number is incremented by 1, and S2-S4 are repeatedly performed.
[0131] S5: Decode the received signal according to the index of the K non-zero blocks with length L to obtain the second part.
[0132] In this embodiment, S2-S4 are repeatedly performed until K iterations are completed. Finally, the index of the K non-zero blocks with length L is obtained And the element value of the KL non-zero elements According to the index of the K non-zero blocks with length L, the second part of b2 bits of information is decoded from the received signal. The third part of b3 bits of information is obtained by soft symbol demodulation on the element value of the KL non-zero elements.
[0133] The present application is directed to data transmission for high mobility vehicle networking devices, and the technical solution of the proposed data transmission method is as follows:
[0134] A new mapping rule is designed, which divides the transmission information into three parts, one part of the transmission information is mapped to the index of the target sub-matrix, one part of the transmission information is mapped to the index of the K non-zero blocks, and the remaining transmission information is mapped to the element value of the KL non-zero elements. The difference between this mapping rule and the traditional method is that the transmission information is mapped to the index of the non-zero block, instead of randomly mapping the transmission information to the index of a single non-zero element.
[0135] Traditional methods, such as sparse vector code, are only suitable for low-speed or static scenarios, while the block sparse superposition vector code proposed in the technical solution of the present application is suitable for high mobility scenarios, such as vehicle networking, unmanned flow systems, emergency rescue systems, etc. These application scenarios usually present complex and variable channel environments. Therefore, the data transmission method proposed in the present application has a wider application range than traditional methods.
[0136] A three-stage decoding rule is designed for the proposed block sparse superposition vector code, which utilizes the block structure sparse prior knowledge generated in the encoding process and can realize accurate decoding.
[0137] Benefiting from the designed mapping rule, the data transmission method proposed in the application requires much less transmission resources than the traditional sparse vector code, thereby improving the spectral efficiency of data transmission.
[0138] The simulation results verify the performance advantages of the proposed technical solution over related methods on different physical channels. Figure 4 The simulation comparison results of the block error rate (BLER) performance of the technical solution of the application and the traditional method under different signal-to-noise ratios (SNRs) are shown. In all comparison schemes, the total number of non-zero elements is set to 2, the number of transmitted information bits is b = 14 bits, the length of the transmission block is M = 40 subcarriers, and the Quadrature Phase Shift Keying (QPSK) modulation method is used for the comparison schemes except the sparse vector code. The sparse vector length (N) of the sparse vector code scheme, the enhanced sparse vector code scheme, the constellation-rotated sparse vector code scheme, and the block sparse superposition vector code scheme proposed in the application is 182, 46, 46, and 1088, respectively. For the block sparse superposition vector code scheme, the number of submatrices is 32, the number of columns of each submatrix is 34, the number of non-zero blocks K = 1, and the non-zero block length L = 2. It can be seen from the simulation results that the block error rate performance of the block sparse superposition vector code scheme proposed in the application is better than that of the traditional schemes under different signal-to-noise ratios. Figure 4 It can be seen that the block error rate performance of the block sparse superposition vector code scheme proposed in the application is better than that of the traditional schemes under different signal-to-noise ratios. For example, when the block error rate is 10 -4 The block sparse superposition vector code proposed in the application requires an SNR that is about 1.8 dB lower than that of the constellation-rotated sparse vector code. This shows that the technical solution of the block sparse superposition vector code proposed in the application has higher reliability than the traditional method.
[0139] It should be noted that the contents not described in detail in the specification of the application belong to the common technical knowledge of those skilled in the art.
[0140] In the embodiment, a data transmission device is also provided, which is used to implement the above-mentioned embodiments and optional implementation manners, and has been described above. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware or a combination of software and hardware is also possible and is contemplated.
[0141] Figure 5 is a structural block diagram of a data transmission device according to an embodiment of the application.
[0142] The embodiment provides a data transmission device, as shown in the figure, the data transmission device comprises: Figure 5 A first processing module 11 is configured to acquire a codebook matrix constructed in advance. The codebook matrix is divided into a preset number of sub-matrices.
[0143] A second processing module 12 is configured to select a target sub-matrix from the preset number of sub-matrices. The transmission information is mapped to the target sub-matrix according to a preset mapping rule to obtain an encoding result. The preset mapping rule comprises: dividing the transmission information into a first part, a second part and a third part; mapping the first part to the index of the target sub-matrix, mapping the second part to the index of the non-zero block, and mapping the third part to the element value of the non-zero element.
[0144] A third processing module 13 is configured to perform pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code.
[0145] A fourth processing module 14 is configured to map the target block sparse superposition vector code to a subcarrier for transmission.
[0146] A fifth processing module 15 is configured to decode the received signal obtained according to a preset decoding rule to obtain a decoding result.
[0147] In an optional implementation, the second processing module 12 is specifically configured to map the first part to the index of the target sub-matrix. K non-zero blocks with a length of L are randomly selected from the target sub-matrix. The second part is mapped to the index of the K non-zero blocks with the length of L. The third part is mapped to the element value of KL non-zero elements through modulation to obtain the encoding result.
[0148] In an optional implementation, the third processing module 13 is specifically configured to perform pseudo-random expansion on the encoding result according to the codebook matrix to obtain the target block sparse superposition vector code.
[0149] In an optional implementation, the fourth processing module 14 comprises:
[0150] A first processing unit is configured to map the target block sparse superposition vector code to M subcarriers. The power of the subcarriers corresponding to the K non-zero blocks with the length of L in the M subcarriers is non-zero, and the power of the subcarriers other than the subcarriers corresponding to the K non-zero blocks with the length of L in the M subcarriers is zero.
[0151] A second processing unit is configured to perform inverse discrete Fourier transform on the M subcarriers to obtain a time domain signal sequence.
[0152] A third processing unit is configured to transmit the time domain signal sequence.
[0153] A third processing unit is configured to transmit the time domain signal sequence.
[0154] In an alternative embodiment, the fifth processing module 15 comprises:
[0155] a first processing unit configured to determine a correlation value of each of the preset number of sub-matrices with the received signal.
[0156] a second processing unit configured to determine an index of a sub-matrix corresponding to a maximum value in the correlation values of each of the sub-matrices with the received signal as a target index.
[0157] a third processing unit configured to decode the received signal according to the target index to obtain a first part.
[0158] a fourth processing unit configured to construct a new sub-matrix according to the target index.
[0159] a fifth processing unit configured to decode the received signal according to indices of K non-zero blocks of length L determined in the new sub-matrix to obtain a second part.
[0160] a sixth processing unit configured to determine element values of KL non-zero elements in the new sub-matrix.
[0161] a seventh processing unit configured to decode the received signal by demodulating the element values of the KL non-zero elements determined in the new sub-matrix to obtain a third part.
[0162] an eighth processing unit configured to determine a decoding result according to the first part, the second part and the third part.
[0163] In an alternative embodiment, the fifth processing unit in the fifth processing module 15 is specifically configured to perform the following steps:
[0164] S1: initialize a residual and an iteration number: k = 1.
[0165] S2: divide the new sub-matrix into C blocks, and determine a correlation value of each of the C blocks with the residual. C = B / L.
[0166] S3: determine an index of a block corresponding to a maximum value in the correlation values of each of the blocks with the residual as an index of a non-zero block obtained in the kth iteration.
[0167] S4: determine whether the iteration number is equal to K. When the iteration number is equal to K, the indices of the K non-zero blocks of length L are obtained, and S5 is performed. When the iteration number is less than K, the residual is updated, the iteration number is incremented by 1, and S2-S4 are repeatedly performed.
[0168] S5: decode the received signal according to the indices of the K non-zero blocks of length L to obtain the second part.
[0169] In an alternative implementation, the sixth processing unit in the fifth processing module 15 is specifically used to determine the element values of KL non-zero elements based on the indices of K non-zero blocks of length L determined in the new submatrix.
[0170] Further functional descriptions of the above modules and units are the same as those in the corresponding embodiments described above, and will not be repeated here.
[0171] In this embodiment, the data transmission device is presented in the form of a functional unit. Here, a unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.
[0172] This invention also provides a computer device having the above-described features. Figure 5 The data transmission device shown.
[0173] Please see Figure 6 , Figure 6 This is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention, such as... Figure 6 As shown, the computer device includes one or more processors 10, memory 20, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The components communicate with each other via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processor can process instructions executed within the computer device, including instructions stored in or on memory to display graphical information of a GUI on external input / output devices (such as display devices coupled to the interfaces).
[0174] In one alternative implementation, multiple processors and / or multiple buses can be used with multiple memories and multiple storage devices, if needed. Similarly, multiple computer devices can be connected, each providing some of the necessary operations (e.g., as a server array, a group of blade servers, or a multiprocessor system). Figure 6 Take a processor 10 as an example.
[0175] Processor 10 may be a central processing unit, a network processor, or a combination thereof. Processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The programmable logic device may be a complex programmable logic device (CAMP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.
[0176] The memory 20 stores instructions executable by the at least one processor 10 to cause the at least one processor 10 to perform the methods illustrated by the above embodiments.
[0177] The memory 20 can include a program storage area and a data storage area. The program storage area can store an operating system, application programs required by at least one function. The data storage area can store data created according to the use of the computer device, etc. In addition, the memory 20 can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In an alternative implementation, the memory 20 can optionally include a memory disposed remotely from the processor 10, which can be connected to the computer device through a network. Examples of the above network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0178] The memory 20 can include a volatile memory, such as a random access memory. The memory can also include a non-volatile memory, such as a flash memory, a hard disk, or a solid-state disk. The memory 20 can further include a combination of the above-mentioned kinds of memories.
[0179] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or communication networks.
[0180] The embodiments of the present application also provide a computer readable storage medium. The above method according to the embodiments of the present application can be implemented in hardware, firmware, or recorded in a storage medium, or be implemented as computer code originally stored in a remote storage medium or a non-transitory machine readable storage medium and downloaded to a local storage medium, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid-state disk, etc. Further, the storage medium can further include a combination of the above-mentioned kinds of memories. It can be understood that the computer, the processor, the microprocessor controller, or the programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method illustrated by the above embodiments is implemented.
[0181] Part of the present application can be applied as a computer program product, for example, computer program instructions, when executed by a computer, through the operation of the computer, can invoke or provide the method and / or technical solutions according to the present application. Those skilled in the art should understand that the form of computer program instructions in computer readable medium includes but is not limited to source files, executable files, installation package files and the like, and accordingly, the way of computer program instructions executed by computer includes but is not limited to: the computer directly executes the instructions, or the computer compiles the instructions and then executes the corresponding compiled program, or the computer reads and executes the instructions, or the computer reads and installs the instructions and then executes the corresponding installed program. Here, the computer readable medium can be any available computer readable storage medium or communication medium accessible to the computer.
[0182] Although the embodiments of the present application are described in conjunction with the drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.
Claims
1. A data transmission method, characterized by, The data transmission method comprises: obtaining a pre-constructed codebook matrix; the codebook matrix is divided into a preset number of sub-matrices; selecting a target sub-matrix from the preset number of sub-matrices; mapping transmission information to the target sub-matrix according to a preset mapping rule to obtain an encoding result; the preset mapping rule comprises: dividing the transmission information into a first part, a second part and a third part; mapping the first part to the index of the target sub-matrix, mapping the second part to the index of a non-zero block, and mapping the third part to the element value of a non-zero element; the non-zero block is a non-zero block randomly selected from the target sub-matrix, and the non-zero element is a non-zero element in the non-zero block; performing pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code; mapping the target block sparse superposition vector code onto a subcarrier for transmission; decoding the received signal according to a preset decoding rule to obtain a decoding result.
2. The method of claim 1, wherein, The pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code comprises: performing pseudo-random expansion on the encoding result according to the codebook matrix to obtain a target block sparse superposition vector code.
3. The method of claim 1, wherein, The mapping of the transmission information to the target sub-matrix according to the preset mapping rule to obtain an encoding result comprises: mapping the first part to the index of the target sub-matrix; randomly selecting K non-zero blocks with a length of L from the target sub-matrix; mapping the second part to the index of the K non-zero blocks with a length of L; and mapping the third part to the element value of KL non-zero elements through modulation to obtain an encoding result.
4. The method of claim 3, wherein, The decoding of the received signal according to the preset decoding rule to obtain a decoding result comprises: determining the correlation value of each sub-matrix in the preset number of sub-matrices with the received signal; determining the index of the sub-matrix corresponding to the maximum value in the correlation value of each sub-matrix with the received signal as a target index; decoding the received signal according to the target index to obtain a first part; constructing a new sub-matrix according to the target index; decoding the received signal according to the index of the K non-zero blocks with a length of L determined in the new sub-matrix to obtain a second part; determining the element value of KL non-zero elements in the new sub-matrix; decoding the received signal by demodulating the element value of the KL non-zero elements determined in the new sub-matrix to obtain a third part; determining the decoding result according to the first part, the second part and the third part obtained by decoding.
5. The method of claim 4, wherein, The decoding of the received signal according to the index of the K non-zero blocks with a length of L determined in the new sub-matrix to obtain a second part comprises: S1: initializing a residual and an iteration number: k=1; S2: dividing the new sub-matrix into C blocks, and determining the correlation value of each block in the C blocks with the residual; C=B / L; B represents the number of columns of the new sub-matrix; S3: determining the index of the block corresponding to the maximum value in the correlation value of each block with the residual as the index of the non-zero block obtained by the kth iteration; S4: determining whether the iteration number is equal to K, obtaining indexes of K non-zero blocks with length L when the iteration number is equal to K, and performing S5; updating the residual, increasing the iteration number by 1, and repeating S2-S4 when the iteration number is less than K; S5: decoding the received signal according to the indexes of the K non-zero blocks with length L to obtain a second part.
6. The method of claim 3, wherein, The element value of the KL non-zero elements determined in the new sub-matrix includes: The element value of the KL non-zero elements is determined according to the indexes of the K non-zero blocks with length L determined in the new sub-matrix.
7. The method of claim 3, wherein, The target block sparse superposition vector code is mapped to the sub-carriers for transmission, including: The target block sparse superposition vector code is mapped to M sub-carriers; the power of the sub-carriers corresponding to the K non-zero blocks with length L in the M sub-carriers is non-zero, and the power of the sub-carriers other than the sub-carriers corresponding to the K non-zero blocks with length L in the M sub-carriers is zero; After inverse discrete Fourier transform is performed on the M sub-carriers, a time domain signal sequence is obtained; The time domain signal sequence is transmitted.
8. A data transmission apparatus, characterized by comprising: The data transmission device includes: A first processing module configured to obtain a codebook matrix constructed in advance; the codebook matrix is divided into a preset number of sub-matrices; A second processing module configured to select a target sub-matrix from the preset number of sub-matrices; According to a preset mapping rule, the transmission information is mapped to the target sub-matrix to obtain an encoding result; the preset mapping rule includes: the transmission information is divided into a first part, a second part and a third part; the first part is mapped to the index of the target sub-matrix, the second part is mapped to the index of the non-zero block, and the third part is mapped to the element value of the non-zero element; the non-zero block is a non-zero block randomly selected from the target sub-matrix, and the non-zero element is a non-zero element in the non-zero block; A third processing module configured to perform pseudo-random expansion on the encoding result to obtain a target block sparse superposition vector code; A fourth processing module configured to map the target block sparse superposition vector code to sub-carriers for transmission; A fifth processing module configured to decode a received signal obtained according to a preset decoding rule to obtain a decoding result.
9. A computer device, comprising: It includes: A memory and a processor, which are communicatively connected, the memory stores computer instructions, and the processor executes the computer instructions to perform the steps of the data transmission method in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for causing a computer to perform the steps of the data transmission method in any one of claims 1 to 7.
Citation Information
Patent Citations
Sparse matrix data structure
US20150067009A1