Display panel and display device

By setting the second conductive pattern and the third conductive pattern in the conductive layer of the display panel, combined with the conductive adhesive material, the problems of complexity and high cost of display panel packaging in the prior art are solved, and effective for driving chips of different specifications are achieved Improved packaging and signal delivery efficiency.

CN119110636APending Publication Date: 2024-12-10BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202411216831.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

When the existing display panel meets the packaging requirements of display driver chips of different specifications, the preparation process is complex and costly, and cannot be effectively simplified.

Method used

By setting the second conductive pattern and the third conductive pattern in the conductive layer of the display panel, the size of the binding terminal is extended, and the conductive adhesive material is used to increase the conductive connection area, simplify the contact between the packaging bumps and the binding terminal, and meet different specifications Driver chip packaging requirements.

Benefits of technology

It has achieved simplified preparation process, reduced production costs, and can effectively package driver chips of larger sizes to avoid the risk of water vapor intrusion and improve signal transmission efficiency.

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Abstract

The embodiment of the invention provides a display panel and a display device, which are applied to the field of display, and can meet the packaging size requirement of a driving chip while simplifying the preparation process, thereby achieving the purpose of saving the cost. The display panel comprises a display area and a first binding area arranged on at least one side of the display area. The display panel comprises a substrate and a conductive layer, the conductive layer is arranged on one side of the substrate, the conductive layer comprises a plurality of binding terminals, the binding terminals are located in a first binding area and are configured to be in binding connection with a driving chip, each binding terminal comprises a first conductive pattern and a second conductive pattern, and the first conductive pattern and the second conductive pattern are arranged on the substrate. The first conductive pattern is in contact with the second conductive pattern, a third conductive pattern is arranged on one side, far away from the substrate, of the second conductive pattern, and the surface of one side, far away from the second conductive pattern, of the third conductive pattern is flush with the surface of one side, farthest away from the substrate, of the first conductive pattern.
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Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] At present, OLED (Organic Light-Emitting Diode) display devices are widely used due to their characteristics of self-luminescence, fast response, wide viewing angle, bendability and ability to be manufactured on flexible substrates. With the development of display technology, the technical application of the bendable characteristics of OLED has become one of the current development trends. Summary of the invention

[0003] The purpose of the embodiments of the present disclosure is to provide a display panel and a display device, which can simplify the manufacturing process while meeting the packaging size requirements of the driver chip, thereby achieving the purpose of cost saving.

[0004] To achieve the above objectives, the embodiments of the present disclosure provide the following technical solutions:

[0005] The first aspect of the present disclosure provides a display panel. The display panel includes a display area and a first binding area arranged on at least one side of the display area. The display panel includes a substrate and a conductive layer, wherein the conductive layer is arranged on one side of the substrate, the conductive layer includes a plurality of binding terminals, the plurality of binding terminals are located in the first binding area, the binding terminals are configured to be bound and connected with a driver chip, each of the binding terminals includes a first conductive pattern and a second conductive pattern, the first conductive pattern is in contact with the second conductive pattern, and a third conductive pattern is arranged on the side of the second conductive pattern away from the substrate, the third conductive pattern is away from the surface of the side of the second conductive pattern, and is flush with the surface of the side of the first conductive pattern farthest from the substrate.

[0006] In the display panel provided by some embodiments of the present disclosure, by providing the second conductive pattern and the third conductive pattern, the manufacturing process of the display panel can be simplified, thereby reducing the production cost, while meeting the packaging size requirements of the driver chip.

[0007] In some embodiments, an orthographic projection of a surface of the third conductive pattern close to the second conductive pattern on the substrate coincides with an orthographic projection of a surface of the second conductive pattern close to the third conductive pattern on the substrate.

[0008] In some embodiments, the third conductive pattern contacts the first conductive pattern.

[0009] In some embodiments, the material of the third conductive pattern is conductive glue.

[0010] In some embodiments, the display panel also includes: a gate layer, a first source-drain metal layer, and a second source-drain metal layer stacked in sequence between the substrate and the conductive layer; wherein the second source-drain metal layer includes a fourth conductive pattern, the fourth conductive pattern is located in the first binding area, and the first conductive pattern is connected to the fourth conductive pattern; the first source-drain metal layer includes a fifth conductive pattern, the fifth conductive pattern is located in the first binding area, and the fifth conductive pattern is connected to the fourth conductive pattern; the gate layer includes a sixth conductive pattern, the sixth conductive pattern is located in the first binding area, and the fifth conductive pattern is electrically connected to the sixth conductive pattern.

[0011] In some embodiments, the display panel includes a second binding area, the gate layer also includes a connecting line, one end of the connecting line is connected to the sixth conductive pattern, and the other end of the connecting line is connected to the second binding area; the other end of the connecting line is configured to connect to a flexible circuit board.

[0012] In some embodiments, the display panel also includes a touch layer arranged on the side of the second source and drain metal layer away from the substrate, and the touch layer is the conductive layer; the touch layer includes multiple touch electrodes located in the display area and multiple binding terminals located in the first binding area.

[0013] A second aspect of the present disclosure provides a display device, comprising a display panel as described in any of the above embodiments and a driver chip, wherein the driver chip is disposed on a side of the conductive layer away from the substrate, and the driver chip is located in the first binding area, and the driver chip comprises a plurality of package bumps, each of which is electrically connected to a corresponding binding terminal.

[0014] The beneficial effects of the above-mentioned display device are the same as the beneficial effects of the display panel provided by any embodiment of the first aspect of the present disclosure, and will not be repeated here.

[0015] In some embodiments, the size of the package bump in the extension direction thereof is smaller than or equal to the size of the corresponding binding terminal in the extension direction thereof.

[0016] In some embodiments, the orthographic projection of the package bump on the substrate is located within the orthographic projection range of the corresponding binding terminal on the substrate.

[0017] In some embodiments, a conductive connection layer is further included, and the conductive connection layer is arranged between the binding terminal and the package bump. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required to be used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the product involved in the embodiments of the present disclosure, the actual process of the method, the actual timing of the signal, etc.

[0019] Figure 1 is a planar structural diagram of a display device according to some embodiments of the present disclosure;

[0020] Figure 2 is a structural diagram of a driver chip according to some embodiments of the present disclosure;

[0021] Figure 3 is a structural diagram of a binding terminal according to some embodiments of the present disclosure;

[0022] Figure 4 is a cross-sectional structural diagram of a display panel according to some embodiments of the present disclosure;

[0023] Figure 5 A cross-sectional structural diagram of binding a display driver chip to a display panel in some embodiments of the related art;

[0024] Figure 6 is another structural diagram of a driver chip according to some embodiments of the present disclosure;

[0025] Figure 7 is a comparative structural diagram of a driver chip according to some embodiments of the present disclosure;

[0026] Figure 8 is another cross-sectional structural diagram of a display panel according to some embodiments of the present disclosure;

[0027] Fig. 9 is another cross-sectional structural diagram of a display panel according to some embodiments of the present disclosure;

[0028] Fig.10 is a cross-sectional structural diagram of a display device according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0029] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.

[0030] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0031] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0032] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The term "coupled" indicates, for example, that two or more components are in direct physical or electrical contact. The term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0033] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0034] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0035] The use of "adapted to" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0036] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0037] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0038] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0039] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0040] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are exaggerated for clarity. Therefore, variations in the shapes relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0041] With the development of the display field, the application of display driver chips (Display Driver Integrated Circuit, referred to as: DDIC) is becoming more and more extensive, and has become one of the current research hotspots. Since the display driver chip has the functions of receiving the image information of the host, driving the display panel and image processing, and it has a wide variety of types and a variety of different specifications and sizes, the display panel in the related art can only meet the packaging of a display driver chip of one specification. Exemplarily, the display driver chip is packaged on the display panel through the COP (Chip On Pi, chip on screen packaging) process. When the specification size of the display driver chip changes, it is necessary to redesign the film layer of the COP packaging area corresponding to the display panel. For example, it is necessary to re-prepare the film layer of the COP packaging area to meet the size requirements of the package of the display driver chip. In this way, in the process of preparing the display panel, the preparation process is complicated, and correspondingly, it will also bring about the problem of increased cost. Therefore, it is necessary to design a display panel that meets the size requirements of the display driver chip packaging while simplifying the preparation process.

[0042] Based on this, some embodiments of the present disclosure provide a display panel and a display device, which can simplify the preparation process of the display panel while meeting the packaging size requirements of the display driver chip by changing the film layer structure of the packaging area of ​​the display panel, thereby saving production costs.

[0043] The display panel and the display device provided by the present disclosure are respectively introduced below.

[0044] like Figure 1 As shown, some embodiments of the present disclosure provide a display device 1000. The display device provided by the embodiments of the present disclosure can be any device that displays whether it is moving (e.g., video) or fixed (e.g., still image) and whether it is text or image. More specifically, it is expected that the embodiments can be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants (English: Personal Digital Assistant, referred to as: PDA), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, cameras, game consoles, watches, clocks, calculators, TV monitors, flat panel displays, computer monitors, car displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rear-view cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (e.g., displays of images of a piece of jewelry), and any products or components with display functions.

[0045] The display device 1000 may be any one of a flat display device, a curved display device, a foldable display device or a rollable display device.

[0046] The following takes the display device 1000 as a flexible display device as an example to schematically illustrate some embodiments of the present disclosure, but the implementation of the present disclosure is not limited thereto, and any other display device 1000 may also be considered as long as the same technical concept is applied.

[0047] The flexible display device 1000 includes a touch display device and a non-touch display device. In the embodiments of the present disclosure, the touch display device is mainly used as an example for exemplary description.

[0048] like Figure 1 As shown, the display device 1000 includes a display panel 100. Figure 1 and Figure 4 The display panel 100 includes a display area and a first binding area B1 disposed on at least one side of the display area AA. The display panel 100 includes a substrate 1 and a conductive layer 2, wherein the conductive layer 2 is disposed on one side of the substrate 1, and the conductive layer 2 includes a plurality of binding terminals 21, and the plurality of binding terminals 21 are located in the first binding area B1, and the binding terminals 21 are configured to be bound and connected with the driving chip 200, and each binding terminal 21 includes a first conductive pattern 201 and a second conductive pattern 202, and the first conductive pattern 201 is in contact with the second conductive pattern 202, and a third conductive pattern 203 is disposed on a side of the second conductive pattern 202 away from the substrate 1, and a surface of the third conductive pattern 203 on a side away from the second conductive pattern 202 is flush with a surface of the first conductive pattern 201 on a side farthest from the substrate 1.

[0049] Exemplarily, the material of the substrate 1 is a transparent material. For example, the substrate 1 may be a transparent flexible substrate.

[0050] In some examples, the substrate 1 may be a single-layer structure or a stacked structure, and the substrate 1 may include a plurality of flexible base layers and a plurality of buffer layers arranged alternately, wherein the material of the flexible base layer includes polyimide, and the material of the buffer layer may include silicon nitride and / or silicon oxide to achieve the effect of blocking water and oxygen and blocking alkaline ions.

[0051] like Figure 5 As shown, Figure 5 FIG. 2 is a cross-sectional structure diagram of a display driving chip 200 ′ bound to a display panel in the related art. Figure 5It can be seen that the binding pattern 201' is used to bind the display driver chip 200'. The binding pattern 201' is connected to the binding bump 210' of the display driver chip 200'. To ensure the binding effect of the two, the sizes of the binding pattern 201' and the binding bump 210' need to match. The sizes of the binding bump 210' included in the display driver chip 200' of different specifications are also different. Figure 5 It can be seen that the size of the binding pattern 201' is limited, so the size of the display driver chip 200' that can be bound is limited and the specification size is single. If a display driver chip 200' of a larger size specification is bound, the binding bump 210' of the display driver chip 200' will be partially exposed, which will cause the risk of water vapor intrusion. Therefore, in order to realize that the binding pattern 201' can bind a display driver chip 200' of a larger size, it is necessary to set the size of the binding pattern 201' to be compatible with the specification of the display driver chip 200'. Since the film surfaces of other film layers in the area where the binding pattern 201' is located are uneven, if the size of the binding pattern 201' is directly increased, the surface of the side of the binding pattern 201' close to the binding bump 210' will have a height difference with the binding bump 210', which will still cause the binding bump 210' of the display driver chip 200' to be partially exposed, and the above problem cannot be solved. Based on this, relevant technical personnel can think of re-preparing other film layers in the area where the binding pattern 201' is located, so that the film thickness of other film layers in the area where the binding pattern 201' is located meets the height requirement, thereby meeting the packaging requirements of the display driver chip 200' of a larger size. Such a setting will greatly increase the production cost. At the same time, multiple masking is required in the process of preparing each film layer, so there will also be a problem of waste of mask resources.

[0052] In the present application, continue to refer to Figure 4 The inventor of the present application has found through research that by setting the second conductive pattern 202, the first conductive pattern 201 and the second conductive pattern 202 are in contact and serve as the binding terminal 21, thereby achieving binding with the driver chip 200. It should be noted that the first conductive pattern 201 in the present application is the binding pattern 201' in the related art. Compared with the related art, the present application adds the second conductive pattern 202. The first conductive pattern 201 and the second conductive pattern 202 are in contact and serve as the binding terminal 21, which is equivalent to extending the size of the binding terminal 21. The size of the binding terminal 21 matches the size of the corresponding package bump 210 of the driver chip 200, thereby increasing the contact area with the driver chip 200, thereby achieving a relatively large Figure 5The effective packaging of the driver chip 200 with a larger size specification of the display driver chip 200' shown in FIG. It should be noted that the size of the binding terminal 21 refers to the size in the extension direction of the binding terminal 21, and the size of the package bump of the driver chip refers to the size of the package bump 210 in its extension direction. When the two are bound, the extension direction of the binding terminal is consistent with the extension direction of the package bump 210.

[0053] For example, the first conductive pattern 201 and the second conductive pattern 202 are located in the same film layer and can be prepared using one mask plate, which can simplify the preparation process and can be prepared without multiple masks. Figure 5 Based on other film layers in the area where the binding pattern 201' is located, it is possible to achieve a relatively Figure 5 The display driver chip 200 ′ shown in FIG. 1 is a package of a driver chip with a larger size specification, saving production costs.

[0054] It can be understood that since the first conductive pattern 201 and the second conductive pattern 202 are prepared from the same film layer, that is, the first conductive pattern 201 and the second conductive pattern 202 have the same film thickness, according to Figure 4 It can be obtained that the surfaces of other film layers in the area where the first conductive pattern 201 and the second conductive pattern 202 are located are uneven. Therefore, there is a certain height difference between the first conductive pattern 201 and the second conductive pattern 202. The third conductive pattern 203 is set to solve the step difference problem between the first conductive pattern 201 and the second conductive pattern 202. The third conductive pattern 203 is far away from the surface of the second conductive pattern 202 and is flush with the surface of the first conductive pattern 201 farthest from the substrate 1. When binding the driver chip 200, the package bumps of the driver chip 200 are in contact with both the first conductive pattern 201 and the third conductive pattern 203, so that the driver chip 200 is more firmly bound to the first conductive pattern 201 and the third conductive pattern 203; the third conductive pattern 203 also has a conductive function and can increase the conductive area. The package bumps of the driver chip 200 are connected to the second conductive pattern 202 through the third conductive pattern 203, thereby improving the signal transmission efficiency between the second conductive pattern 202 and the driver chip 200.

[0055] For example, refer to Figure 2 , Figure 6 and Figure 7 ,in, Figure 2 The chip shown is, for example, a RAMLESSIC chip. Figure 6 The chip shown is, for example, a fully loaded memory chip (FULLRAM IC). Both chips include a plurality of package bumps, the package bumps including an input package bump A1 and an output package bump A2. Figure 7 , Figure 7It is a comparison diagram of two chips. The output package bumps A2 of the two chips are consistent in size in the extension direction, while the input package bumps A1 have different sizes in the extension direction. The size of the input package bump A1 without a memory chip in the extension direction is, for example, 825 μm, and the size of the input package bump A1 fully loaded with memory chips in the extension direction is, for example, 950 μm. That is to say, the difference in the size of the input package bump A1 of the two chips in the extension direction is 125 μm. It can be understood that the above-mentioned second conductive pattern 202 is the extended part of the binding terminal 21, that is, the size of the second conductive pattern 202 in the extension direction of the binding terminal 21 is 125 μm. At this time, the binding terminal 21 can meet the packaging requirements of the input package bump A1 fully loaded with memory chips.

[0056] It should be noted that, refer to Figure 3 , Figure 3 For Figure 2 The structure diagram of the binding terminal of the driver chip is shown in FIG. 1 , the conductive layer 2 includes a plurality of binding terminals, wherein the above-mentioned binding terminal 21 is an input binding terminal C1, and the conductive layer also includes an output binding terminal C2, such as Figure 2 and Figure 3 As shown, the input binding terminal C1 is bound and connected to the input package bump A1 of the driver chip 200, and the output binding terminal is bound and connected to the output package bump A2 of the chip, wherein the input binding terminal C1 is used to receive power signals and image data signals, and the output binding terminal C2 is used to transmit gate drive signals and data voltage signals.

[0057] In some embodiments, reference Figure 4 The third conductive pattern 203 has no contact with the first conductive pattern 201, and the orthographic projection of the third conductive pattern 203 on the substrate 1 partially overlaps with the orthographic projection of the second conductive pattern 202 on the substrate 1, and the orthographic projection of the third conductive pattern 203 on the side away from the first conductive pattern 201 on the substrate 1 partially overlaps with the orthographic projection of the second conductive pattern 202 on the substrate 1. The orthographic projection of the input package bump A1 of the driver chip 200 on the substrate 1 is located within the orthographic projection range of the first conductive pattern 201 and the third conductive pattern 203 on the substrate 1 to ensure that the input package bump A1 of the driver chip 200 will not be exposed, to avoid the risk of water vapor intrusion, and to achieve effective display of the binding of the driver chip.

[0058] In some embodiments, reference Figure 8 The orthographic projection of the surface of the third conductive pattern 203 close to the second conductive pattern 202 on the substrate 1 coincides with the orthographic projection of the surface of the second conductive pattern 202 close to the third conductive pattern 203 on the substrate 1 .

[0059] For example, Figure 8As shown, the orthographic projection of the surface of the third conductive pattern 203 close to the second conductive pattern 202 on the substrate 1 coincides with the orthographic projection of the surface of the second conductive pattern 202 close to the third conductive pattern 203 on the substrate 1. Since the surface of the third conductive pattern 203 close to the second conductive pattern 202 and the surface of the second conductive pattern 202 close to the third conductive pattern 203 are close to and in contact with each other, that is to say, the above arrangement can ensure that the contact area between the second conductive pattern 202 and the third conductive pattern 203 is maximized, thereby improving the signal transmission efficiency between the second conductive pattern 202 and the third conductive pattern 203.

[0060] It should be noted that, refer to Figure 8 The third conductive pattern 203 and the first conductive pattern 201 are in contact with each other at their sides close to each other, that is, there is no gap between the third conductive pattern 203 and the first conductive pattern 201, and the third conductive pattern 203 and the first conductive pattern 201 are continuous and uninterrupted on the surface away from the substrate 1, which can increase the contact area between the third conductive pattern 203, the first conductive pattern 201 and the input package bump A1 of the driver chip, thereby improving the signal transmission efficiency.

[0061] In some embodiments, continue to refer to Figure 8 , the material of the third conductive pattern 203 is conductive glue.

[0062] For example, the conductive adhesive may be anisotropic conductive film (ACF). That is, the third conductive pattern 203 has not only a conductive function but also an adhesive function, and can bind the driving chip 200 more firmly.

[0063] It should be noted that, since the conductive adhesive is obtained by curing the adhesive material, the conductive adhesive film can be used directly, that is, the conductive adhesive can be directly applied to the device to be bonded. For example, the conductive adhesive can be directly applied to the surface of the second conductive pattern 202 away from the substrate 1. The material of the third conductive pattern 203 is conductive adhesive, which can save the mask process and thus save costs compared to the third conductive pattern 203 made of metal.

[0064] In some embodiments, continue to refer to Figure 8 and Fig. 9The display panel 100 also includes: a gate layer 3, a first source-drain metal layer 4, and a second source-drain metal layer 5, which are sequentially stacked between the substrate 1 and the conductive layer 2; wherein the second source-drain metal layer 5 includes a fourth conductive pattern 204, the fourth conductive pattern 204 is located in the first binding area B1, and the first conductive pattern 201 is connected to the fourth conductive pattern 204; the first source-drain metal layer 4 includes a fifth conductive pattern 205, the fifth conductive pattern 205 is located in the first binding area B1, and the fifth conductive pattern 205 is connected to the fourth conductive pattern 204; the gate layer 3 includes a sixth conductive pattern 206, the sixth conductive pattern 206 is located in the first binding area B1, and the fifth conductive pattern 205 is electrically connected to the sixth conductive pattern 206.

[0065] It should be noted that an insulating layer is provided between two adjacent metal layers. Figure 8 and Fig. 9 The display panel 100 also includes a first insulating layer 6, a second insulating layer 7 and a third insulating layer 8 which are arranged in sequence along a direction away from the substrate 1. That is, the first insulating layer 6 is located between the gate layer 3 and the first source-drain metal layer 4, the second insulating layer 7 is located between the first source-drain metal layer 4 and the second source-drain metal layer 5, and the third insulating layer 8 is located between the second source-drain metal layer 5 and the conductive layer 2.

[0066] Exemplarily, the materials of the first insulating layer 6 , the second insulating layer 7 and the third insulating layer 8 may include but are not limited to silicon nitride or silicon oxide, which is not limited here.

[0067] Among them, in the first binding area B1, the first conductive pattern 201 is connected to the fourth conductive pattern 204 through a via hole penetrating the third insulating layer 8, and the fifth conductive pattern 205 is directly connected to the fourth conductive pattern 204, that is, the second insulating layer 7 is not arranged in the first binding area B1, that is, the part of the second insulating layer 7 in the first binding area B1 is etched away, so that the fifth conductive pattern 205 is directly contacted and connected with the fourth conductive pattern 204, and the fifth conductive pattern 205 is electrically connected to the sixth conductive pattern 206 through a via hole penetrating the first insulating layer 6. According to the above description, the first conductive pattern 201 can transmit the transmission signal to the sixth conductive pattern 206 through the fourth conductive pattern 204 and the fifth conductive pattern 205 in sequence.

[0068] Through the above configuration, the conductive layer 2 as the uppermost metal layer of the display panel 100 contacts the driving chip 200 , and further connects the driving chip 200 to the substrate 1 through the fourth conductive pattern 204 , the fifth conductive pattern 205 and the sixth conductive pattern 206 .

[0069] In some embodiments, reference Fig.10 and Figure 1The display panel 100 includes a second binding area B2, and the gate layer 3 also includes a connecting line 32, one end of the connecting line 32 is connected to the sixth conductive pattern 206, and the other end of the connecting line 32 is connected to the second binding area B2; the other end of the connecting line 32 is configured to connect to the flexible circuit board 30.

[0070] For example, Fig.10 and Figure 1 As shown, one end of the connecting line 32 is connected to the sixth conductive pattern 206, and the other end is connected to the flexible circuit board 30, that is, the flexible circuit board 30 can transmit signals to the sixth conductive pattern 206, and further, the sixth conductive pattern 206 can transmit the signals to be transmitted to the fifth conductive pattern 205, the fourth conductive pattern 204 and the first conductive pattern 201 accordingly.

[0071] It should be noted that the flexible circuit board 30 can transmit signals, such as voltage signals or image signals. Exemplarily, the flexible circuit board 30 is configured to transmit the voltage signal or image signal to the sixth conductive pattern 206, and transmit the above signal to the driver chip 200 via the sixth conductive pattern 206, the fifth conductive pattern 205, the fourth conductive pattern 204 and the first conductive pattern 201. After receiving the above signal, the driver chip 200 processes the internal signal and outputs the signal to the display panel 100.

[0072] In some embodiments, reference Fig. 9 The display panel 100 further includes a touch layer 9 disposed on the side of the second source / drain metal layer 5 away from the substrate 1, and the touch layer 9 is a conductive layer 2; the touch layer 9 includes a plurality of touch electrodes 22 located in the display area AA and a plurality of binding terminals 21 located in the first binding area B1.

[0073] For example, refer to Fig. 9 , since the above-mentioned display panel 100 can be a touch display panel or a non-touch display panel. When the display panel 100 is a touch display panel, the conductive layer 2 can directly reuse the touch layer 9, and then set a plurality of binding terminals 21 in the first binding area B1. Similarly, when the display panel 100 is a non-touch display panel, for example, the second source-drain metal layer 5 can be directly reused as the conductive layer 2; in some embodiments, when the display panel 100 does not set the second source-drain metal layer 5, for example, the first source-drain metal layer 4 can be directly reused as the conductive layer 2.

[0074] It should be noted that the touch layer 9 may further include a plurality of touch wirings, and the plurality of touch wirings are configured to connect the touch electrodes to the touch driving chip to realize the transmission of touch signals.

[0075] In some embodiments, reference Fig. 9The display panel 100 further includes an active layer 11 disposed between the substrate 1 and the gate layer 3, wherein in the display area AA, the display panel 100 includes a pixel driving circuit layer 40, and the pixel driving circuit layer 40 is configured to drive the pixel to emit light, thereby realizing display. The pixel driving circuit layer 40 includes a plurality of transistors TFT, the active layer 11 includes an active layer pattern 101 of the transistor, the gate layer 3 includes a gate pattern 31 of the transistor, the first source-drain metal layer 4 includes a source pattern 41 and a drain pattern 42 of the transistor, and the source pattern 41 and the drain pattern 42 of the transistor penetrate the via holes of the first insulating layer 6 and the second insulating layer 7 and are connected to the active layer pattern 101. The second source-drain metal layer 5 may include a plurality of signal lines.

[0076] Some embodiments of the present disclosure further provide a display device 1000, such as Figure 1 and Fig.10 As shown, the display device 1000 includes the display panel 100 provided by any of the above embodiments. Therefore, the display device 1000 provided by the present invention has all the beneficial effects of the display panel 100 provided by any of the above embodiments, which will not be described in detail here.

[0077] Reference Figure 4 The display device 1000 further includes a driving chip 200, which is disposed on a side of the conductive layer 2 away from the substrate 1, and the driving chip 200 is located in the first binding area B1, combined with Figure 3 and Figure 7 The driving chip 200 includes a plurality of package bumps 210 , and each of the package bumps 210 is electrically connected to a corresponding binding terminal 21 .

[0078] Exemplarily, the driver chip 200 is electrically connected to the binding terminal 21 of the display panel 100 via the package bump 210, and the package bump 210 is configured to receive the input signal of the flexible circuit board 30, and the input signal can carry image data corresponding to the image to be displayed on the display panel 100 and other control data for controlling the operation of the driver chip 200.

[0079] In some embodiments, Figure 4 As shown, combined Figure 7 The dimension d1 of the package bump 210 in its extending direction is less than or equal to the dimension d2 of the corresponding binding terminal 21 in its extending direction.

[0080] For example, refer to Figure 4 , the extension direction is the X direction, the size of the package bump 210 in its extension direction is d1, and the size of the binding terminal 21 in its extension direction is d2. Figure 4, the dimension d1 of the package bump 210 in its extension direction in the direction close to the substrate 1 is smaller than the dimension d1 of the package bump 210 in its extension direction in the direction away from the substrate 1, and the above d1 is less than or equal to d2. For example, when d1 is less than d2, d1 at this time can be the dimension of the package bump 210 along its extension direction X close to the surface of the substrate 1. When d1 is equal to d2, d1 can be the dimension of the package bump 210 along its extension direction X away from the surface of the substrate 1. This setting can ensure that the package bump 210 can be completely bound to the binding terminal 21.

[0081] It should be noted that the dimension d1 of the above-mentioned package bump 210 in its extension direction is the average dimension of the package bump 210 in its extension direction. Exemplarily, d1 is half of the sum of the dimension of the package bump 210 in its extension direction in the direction close to the substrate 1 and the dimension of the package bump 210 in its extension direction in the direction away from the substrate 1.

[0082] In some embodiments, Figure 4 As shown, the orthographic projection of the package bump 210 on the substrate 1 is located within the orthographic projection range of the corresponding binding terminal 21 on the substrate 1 .

[0083] Exemplarily, the above arrangement can ensure that the package bumps 210 can be completely bound to the binding terminals 21, thereby avoiding the risk of failure caused by partial exposure of the package bumps 210 outside the binding terminals 21 and exposure to water vapor intrusion.

[0084] In some embodiments, a conductive connection layer 50 is further included, and the conductive connection layer 50 is disposed between the binding terminal 21 and the package bump 210 .

[0085] It should be noted that the material of the conductive connection layer 50 may be conductive glue, and the conductive connection layer 50 is used to connect the package bumps 210 and the binding terminals 21 .

[0086] In some embodiments, Figure 1 and Fig.10 As shown, the display panel 100 is a flexible display panel, and the display panel 100 is electrically connected to the driving chip 200 by bending the flexible display panel.

[0087] For example, refer to Fig.10 The first binding area B1 and the second binding area B2 of the display panel 100 can be bent to the back of the display panel 100, so the driving chip arranged in the first binding area B1 and the flexible circuit board located in the second binding area B2 are arranged on the back of the portion of the display panel in the display area AA. With this arrangement, the display device 1000 can further achieve a narrower border.

[0088] In some embodiments, the side of the driver chip 200 away from the display panel 100 further includes a packaging layer, which can block water vapor and oxygen and has a certain protective effect on the driver chip 200.

[0089] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0090] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be thought of by any person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a first binding area arranged on at least one side of the display area; the display panel comprises: substrate; A conductive layer, wherein the conductive layer is arranged on one side of the substrate, the conductive layer includes a plurality of binding terminals, the plurality of binding terminals are located in the first binding area, the binding terminals are configured to be bound and connected to the driver chip, each of the binding terminals includes a first conductive pattern and a second conductive pattern, the first conductive pattern is in contact with the second conductive pattern, and a third conductive pattern is arranged on a side of the second conductive pattern away from the substrate, the third conductive pattern is away from a side surface of the second conductive pattern and is flush with a side surface of the first conductive pattern farthest from the substrate.

2. The display panel according to claim 1, characterized in that: An orthographic projection of a surface of the third conductive pattern close to the second conductive pattern on the substrate coincides with an orthographic projection of a surface of the second conductive pattern close to the third conductive pattern on the substrate.

3. The display panel according to claim 1, characterized in that: The third conductive pattern contacts the first conductive pattern.

4. The display panel according to claim 1, characterized in that: The material of the third conductive pattern is conductive glue.

5. The display panel according to any one of claims 1 to 4, characterized in that: The display panel further includes: a gate layer, a first source-drain metal layer, and a second source-drain metal layer stacked in sequence between the substrate and the conductive layer; Wherein, the second source-drain metal layer includes a fourth conductive pattern, the fourth conductive pattern is located in the first binding region, and the first conductive pattern is connected to the fourth conductive pattern; The first source-drain metal layer includes a fifth conductive pattern, the fifth conductive pattern is located in the first binding region, and the fifth conductive pattern is connected to the fourth conductive pattern; The gate layer includes a sixth conductive pattern, the sixth conductive pattern is located in the first binding region, and the fifth conductive pattern is electrically connected to the sixth conductive pattern.

6. The display panel according to claim 5, characterized in that: The display panel includes a second binding area, and the gate layer also includes a connecting line, one end of which is connected to the sixth conductive pattern, and the other end of which is connected to the second binding area; the other end of the connecting line is configured to connect to a flexible circuit board.

7. The display panel according to claim 5, characterized in that: The display panel further comprises a touch layer disposed on a side of the second source-drain metal layer away from the substrate, and the touch layer is the conductive layer; The touch layer includes a plurality of touch electrodes located in the display area and a plurality of binding terminals located in the first binding area.

8. A display device, characterized in that: include: The display panel according to any one of claims 1 to 7; A driving chip is arranged on a side of the conductive layer away from the substrate, and the driving chip is located in the first binding area. The driving chip includes a plurality of packaging bumps, and each of the packaging bumps is electrically connected to a corresponding binding terminal.

9. The display device according to claim 8, characterized in that: The size of the package bump in the extension direction is smaller than or equal to the size of the corresponding binding terminal in the extension direction.

10. The display device according to claim 8, characterized in that: The orthographic projection of the package bump on the substrate is located within the orthographic projection range of the corresponding binding terminal on the substrate.

11. The display device according to claim 8, characterized in that It also includes a conductive connection layer, which is arranged between the binding terminal and the packaging bump.