Interface expansion device for USB quick charging and data communication

Abstract

The invention relates to an interface expansion device for USB (Universal Serial Bus) quick charging and data communication, which comprises more than one input interface, more than one output interface, more than one switch module, a protocol control handshake module and a power supply module, data ends of the more than one output interface are respectively connected with a signal end of the protocol control handshake module, power supplies of the more than one input interface are respectively connected with an input end of the power supply module, the more than one switch module is respectively connected with an output end of the power supply module, and power supply ends of the output interfaces are respectively connected with the switch module. The control end of the switch module is connected with the data end of the protocol control handshake module. According to the invention, the extended USB interface not only can support high-speed data communication, but also can support Type-C rapid charging.

Description

Technical Field

[0001] The invention relates to an interface expansion device, in particular to an interface expansion device for USB fast charging and data communication, belonging to the scientific and technical field of computer peripheral equipment. Background Art

[0002] A USB HUB (also called a USB hub) is a hardware device that expands a single USB port into multiple USB ports, allowing users to connect multiple USB devices to a computer or other host device. Its function is to increase the number of USB interfaces and manage the data transmission of multiple devices. With the development of technology, traditional USB HUBs have gradually shown their inherent shortcomings. Depending on the product, they are mainly manifested in the following points: (1) Traditional USB communication only supports USBHUB charging and data communication expansion, but only supports 5V charging mode and does not support the currently popular fast charging solution; (2) Traditional USB HUBs only have USB charging expansion ports. Although they support one port to multiple ports for charging, they do not support data communication or cannot achieve data communication interface compatibility; (3) The charging input end of traditional USB expansion ports is a Type-A port. With the popularization of Type-C ports, there are more and more Type-C adapters and devices, and traditional USB HUBs are gradually unable to meet the demand.

[0003] In addition to the USB HUB, there are also two or more charging cable structures in the prior art. Please refer to the attached Figure 1 Among them, P1 is connected to a computer or a charger, and acts as a power supply device (USB-PD Source) to provide power to the system; H1 is the charging distribution body, which distributes the charging capacity of P1 to the powered devices connected to P3 and P4; P3 and P4 can only be powered devices (USB-PD Sink), which is not flexible enough to use. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the USB expansion device in the prior art that is not flexible in use, the present invention provides a USB fast charging and data communication interface expansion device, so that the expanded USB interface can support both high-speed data communication and fast charging.

[0005] The technical solution adopted by the present invention to solve its technical problems is: an interface expansion device for USB fast charging and data communication, the interface expansion device includes more than one input interface, more than one output interface, more than one switch module, a protocol control handshake module and a power module, the data end in more than one input interface is respectively connected to the signal end of the protocol control handshake module, the data end in more than one output interface is respectively connected to the signal end of the protocol control handshake module, the power supply of more than one input interface is respectively connected to the input end of the power module, more than one switch module is respectively connected to the output end of the power module, the power supply end of the output interface is respectively connected to the switch module, and the control end of the switch module is connected to the data end of the protocol control handshake module.

[0006] The technical solution adopted by the present invention to solve the technical problem further includes: The input interface adopts a USB-A interface or a Type-C interface, and the input interface adopts a male head structure.

[0007] The output interface adopts a USB-A interface or a Type-C interface, and the output interface adopts a male head structure.

[0008] The power supply module includes a DC-DC module and an LDO module. The power input ends of the DC-DC module and the LDO module are respectively connected to the power supply end of the input interface. The power output end of the LDO module provides internal power for the protocol control handshake module. The power output end of the DC-DC module is connected to the output interface through the switch module to provide power to the output interface.

[0009] The switch module includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube, the source of the first MOS tube is connected to the power supply end of the input interface, the drain of the first MOS tube is connected to the power supply end of the output interface, the gate of the first MOS tube is connected to the drain of the second MOS tube, the drain of the second MOS tube is connected to the power supply end of the input interface through a current limiting resistor R2, the source of the second MOS tube is grounded, the gate of the second MOS tube is connected to a data end of the protocol control handshake module through a current limiting resistor R4, and the gate of the second MOS tube is simultaneously connected to the power supply end of the protocol control handshake module. The third MOS tube is connected to the power output terminal of the power module, the source of the third MOS tube is connected to the source of the fourth MOS tube, and is connected to the source of the fifth MOS tube through the resistor R3. The gate of the third MOS tube and the gate of the fourth MOS tube are both connected to the source of the fifth MOS tube. The drain of the fourth MOS tube is connected to the power terminal of the first output interface P3, the source of the fifth MOS tube is grounded, the gate of the fifth MOS tube is connected to a data terminal of the protocol control handshake module through the current limiting resistor R7, and the gate of the fifth MOS tube is grounded through the resistor R8 at the same time.

[0010] A light emitting diode and a current limiting resistor are connected in series between the power supply end of the output interface and the ground.

[0011] The interface expansion device also includes a USB interface and a switching module. The switching module adopts a four-way single-pole double-throw analog switch chip. The first channel of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the first output interface, the second channel of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the second output interface, the common end of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the input interface, and the enable end of the single-pole double-throw analog switch chip U4 is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the first output interface, the second channel of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the second output interface, the common end of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the input interface, and the enable end of the single-pole double-throw analog switch chip U5 is connected to a data end of the protocol control handshake module. The enable end is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the second output interface, the second channel of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the first output interface, the common end of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the USB interface, and the enable end of the single-pole double-throw analog switch chip U6 is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the second output interface, the second channel of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the first output interface, the common end of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the USB interface, and the enable end of the single-pole double-throw analog switch chip U7 is connected to a data end of the protocol control handshake module.

[0012] The enable ends of the single-pole double-throw analog switch chip U4, the single-pole double-throw analog switch chip U5, the single-pole double-throw analog switch chip U6 and the single-pole double-throw analog switch chip U7 are connected to the data end of the same protocol control handshake module.

[0013] The interface expansion device further comprises a USB interface P2 and a USB interface P5, wherein the USB interface P2 is connected to the first output interface, and the USB interface P5 is connected to the second output interface.

[0014] The interface expansion device also includes a HUB chip U8, the USB positive data end of the HUB chip U8 is connected to the positive data end of the input interface, the USB negative data end of the HUB chip U8 is connected to the negative data end of the input interface, the output interfaces are respectively connected to the data interfaces of the HUB chip U8, and the power output end of the power module is connected to the power end of the HUB chip U8.

[0015] The beneficial effect of the present invention is that the present invention enables the expanded USB interface to support both high-speed data communication and Type-C fast charging.

[0016] The present invention will be further described below in conjunction with the accompanying drawings and specific implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The present invention is a block diagram of a one-to-two or one-to-multiple charging cable structure in the prior art.

[0018] Figure 2 It is a structural block diagram of a one-to-two or one-to-multiple charging cable in the present invention.

[0019] Figure 3 This is the signal flow diagram before the power supply role is switched in the present invention.

[0020] Figure 4 This is a signal flow diagram after the power supply role is switched in the present invention.

[0021] Figure 5 This is a signal flow diagram before data role switching of the present invention.

[0022] Figure 6 This is a signal flow diagram after data role switching of the present invention.

[0023] Figure 7 This is a circuit structure block diagram of Embodiment 1 of the present invention (one USB interface, data line / OTG switching mode).

[0024] Figure 8 This is a schematic diagram of the circuit of the charger / computer access part in the first embodiment of the present invention.

[0025] Fig. 9 This is a schematic diagram of the IC / OTG power supply circuit of Example 1 of the present invention.

[0026] Fig.10 This is a schematic diagram of the data line / OTG switching circuit of the first embodiment of the present invention.

[0027] Fig.11 This is a schematic diagram of the circuit of the USB interface portion of the first embodiment of the present invention.

[0028] Fig.12 This is a partial circuit schematic diagram of a protocol control handshake module according to an embodiment of the present invention.

[0029] Fig.13 This is a schematic diagram of a DC-DC circuit in accordance with an embodiment of the present invention.

[0030] Fig.14 This is a schematic diagram of the circuit of the first charging output portion of Embodiment 1 of the present invention.

[0031] Fig.15 This is a schematic diagram of the circuit of the second charging output portion of Example 1 of the present invention.

[0032] Fig.16 This is a circuit structure block diagram of Embodiment 2 of the present invention (two USB interfaces, even-number OTG mode).

[0033] Fig.17 This is a schematic diagram of the circuit of the charger / computer access part of the second embodiment of the present invention.

[0034] Fig.18 This is a schematic diagram of the IC / OTG power supply circuit of the second embodiment of the present invention.

[0035] Fig.19 This is a schematic diagram of the circuit of the first USB interface portion of the second embodiment of the present invention.

[0036] Fig. 20 This is a schematic diagram of the circuit of the second USB interface of the second embodiment of the present invention.

[0037] Fig.21 This is a partial circuit schematic diagram of the protocol control handshake module of the second embodiment of the present invention.

[0038] Fig. 22 This is a schematic diagram of a DC-DC circuit in accordance with a second embodiment of the present invention.

[0039] Fig.23 This is a schematic diagram of the circuit of the first charging output portion of the second embodiment of the present invention.

[0040] Fig.24 This is a schematic diagram of the circuit of the second charging output portion of the second embodiment of the present invention.

[0041] Fig.25 This is a circuit structure block diagram of Embodiment 3 of the present invention (no USB interface, dual data connection mode).

[0042] Fig.26 This is a schematic diagram of the circuit of the charger / computer access part of the third embodiment of the present invention.

[0043] Fig. 27 This is a schematic circuit diagram of the IC / OTG power supply part of embodiment 3 of the present invention.

[0044] Fig.28 This is a partial circuit schematic diagram of the USB-HUB according to the third embodiment of the present invention.

[0045] Fig.29 This is a partial circuit schematic diagram of the protocol control handshake module of Example 3 of the present invention.

[0046] Fig.30 This is a schematic diagram of the DC-DC circuit of the third embodiment of the present invention.

[0047] Fig.31 This is a schematic diagram of the circuit of the first charging output portion of Embodiment 3 of the present invention.

[0048] Fig.32 This is a schematic diagram of the circuit of the second charging output portion of Embodiment 3 of the present invention. DETAILED DESCRIPTION

[0049] This embodiment is a preferred implementation mode of the present invention. Other embodiments whose principles and basic structures are the same or similar to those of this embodiment are within the protection scope of the present invention.

[0050] Please refer to the attached Figure 2 To Attachment Fig.32 The present invention mainly protects an interface expansion device for USB fast charging and data communication, which mainly includes more than one input interface, more than one output interface, more than one switch module, a protocol control handshake module and a power module. The data end in more than one input interface is respectively connected to the signal end of the protocol control handshake module to communicate signals with the protocol control handshake module. The data end in more than one output interface is respectively connected to the signal end of the protocol control handshake module. The power supply of more than one input interface is respectively connected to the input end of the power module for power input. More than one switch module is respectively connected to the output end of the power module. The power end of the output interface is respectively connected to the switch module. The control end of the switch module is connected to the data end of the protocol control handshake module. The switch module is controlled to work through the protocol control handshake module.

[0051] In this embodiment, the input interface can also be defined as a P1 access device. When the present invention is used as a power supply device, that is, the role of the input interface in power supply is Source (that is, input source, used for power input), and power is provided to other modules and output interfaces through the input interface; when the present invention is used as a data transmission device, that is, the role of the input interface in data transmission is Host (that is, used to connect to the host), and is usually used as a DFP (Downstream Facing Port), which is generally used as a port for power supply and data transmission to the downstream. In the prior art, the DFP port is usually a port on a host device (such as a computer, a charger). In the present invention, it is connected to the protocol control handshake module in the present invention, is a part of the present invention, and acts as a data input port and a power input port.

[0052] In this embodiment, the input interface can adopt a USB-A interface (i.e., a universal USB interface) or a Type-C interface, which is used to connect to devices such as a charger (to provide power supply) or a computer (to transmit data, and can also be other devices such as laptops, tablets or other electronic products). In this embodiment, the input interface usually adopts a male head structure.

[0053] In this embodiment, the output interface can also be defined as a P3 powered device and a P4 powered device. During specific implementation, one or more can be set according to actual needs. The P3 powered device and the P4 powered device can be a PD Source, i.e., a Power Delivery Source, a power provider or a power sender, or a PD Sink, i.e., a Power Delivery Sink, a power receiver.

[0054] In this embodiment, the output interface may be a USB-A interface (ie, a universal USB interface) or a Type-C interface, and the output interface generally adopts a male connector structure.

[0055] In this embodiment, the switch module, the protocol control handshake module and the power module are arranged on the circuit board, which can be defined as the MCU main board H1. The part of the MCU main board H1 connected to P1 is fixedly a PD Sink, which receives the Source cap sent by P1. The input interface is preferably connected to the MCU main board H1 by a cable to increase its convenience of use. In specific implementation, the input interface can also be arranged on the MCU main board H1; the part of the MCU main board H1 connected to P3 and P4 has two parts, PD Source and PD Sink, which can realize the switching of USB PD power supply, that is, Power Role Wsap. When P1 is not connected to a charger or a computer, the part of the main board connected to P3 and P4 is PD Sink by default (it can also be selected as PD Source by default through R5 in the schematic diagram). The devices connected to P3 and P4 are used as power supply terminals and enter OTG mode. From the perspective of data transmission role, the devices connected to P3 and P4 are Host (DFP); after P1 is connected and communicates with the MCU main board H1, the MCU main board H1 communicates with P3 and P4 again, and the power supply role is switched through Power Role Swap (RP Swap). Swap), switch P3 and P4 from the power supply segment to the power receiving end. After the switch, the P3 and P4 devices can enter the charging state and can enter fast charging; the change of the power supply role does not mean the change of the data transmission role. When the MCU motherboard H1 does not send a data role switch Data Role Wsap (DR Wsap) request to P3 and P4, the data roles of P3 and P4 remain unchanged. After sending the data role switch request, the devices connected to P3 and P4 can switch between the host and the device Device (UFP). The data role switch of the devices connected to P3 and P4 can be achieved through external buttons, or the default role can be set by software.

[0056] In this embodiment, the protocol control handshake module adopts a microcontroller U1, which has internal data processing functions. The microcontroller U1 uses a PD wireless charging dedicated microcontroller model CH641, which has the advantages of wide voltage, single-line debugging, low power consumption, and streamlined peripherals. In specific implementation, other models or other series of controllers can also be selected.

[0057] In this embodiment, the power supply module mainly includes a DC-DC module and an LDO module. The power input ends of the DC-DC module and the LDO module are respectively connected to the power supply of the input interface. The power output end of the LDO module provides internal power for modules such as the protocol control handshake module. The power output end of the DC-DC module is connected to the output interface through the switch module to provide power to the output interface.

[0058] In this embodiment, the LDO module is a 5V LDO, and a linear voltage regulator chip U3 can be used. The linear voltage regulator chip U3 can use a line core voltage regulator chip of model TH7550 or LR8341-A50. In specific implementation, other models or other series of voltage regulator chips can also be selected for replacement. In this embodiment, the power input end of the linear voltage regulator chip U3 is connected to the power end of the input interface (in this embodiment, the VBUS_IN interface), and the power output end of the linear voltage regulator chip U3 outputs a +5V power supply to power the IC and / or OTG.

[0059] In this embodiment, the DC-DC module uses a linear constant current chip U2, and the linear constant current chip U2 uses a linear constant current chip of model ESOP8. During specific implementation, other models or other series of voltage stabilizing chips can also be selected for replacement. The power input end of the linear constant current chip U2 is connected to the power end of the input interface (in this embodiment, the VBUS_IN interface), and the feedback end (i.e., the FB interface) of the linear constant current chip U2 is connected to a universal data end of the protocol control handshake module. The output voltage of the linear constant current chip U2 is controlled by the protocol control handshake module. The power output end of the linear constant current chip U2 is connected to the switch module, and is connected to the output interface through the switch module to provide power to the output interface.

[0060] In this embodiment, more than one group of switch modules are provided. Usually, the number of switch modules provided is the same as the number of output interfaces. The circuit structure of the first group of switch modules will be described below using the first group of switch modules as an example. The circuit structure of other switch modules is the same as that of the first group of switch modules. The first group of switch modules includes a first MOS tube Q1, a second MOS tube Q4, a third MOS tube Q2, a fourth MOS tube Q3 and a fifth MOS tube Q5. The first MOS tube Q1 adopts a P-channel enhancement type MOS tube with a model number of 3419. The source of the first MOS tube Q1 is connected to the power supply end of the input interface (in this embodiment, the VBUS_IN interface), the drain of the first MOS tube Q1 is connected to the power supply end of the first output interface P3 (in this embodiment, the VBUS interface), the gate of the first MOS tube Q1 is connected to the drain of the second MOS tube Q4, the second MOS tube Q4 adopts an N-channel enhancement type MOS tube with a model number of 2N7002, the drain of the second MOS tube Q4 is connected to the power supply end of the input interface (in this embodiment, the VBUS_IN interface) through a current limiting resistor R2, the source of the second MOS tube Q4 is grounded, and the gate of the second MOS tube Q4 is connected to a data end of the protocol control handshake module through a current limiting resistor R4 (as a Gate3 signal). , the gate of the second MOS tube Q4 is grounded through the resistor R6 at the same time; the third MOS tube Q2 and the fourth MOS tube Q3 both adopt a P-channel enhancement type MOS tube of model 3419, the drain of the third MOS tube Q2 is connected to the power output end of the linear constant current chip U2, the source of the third MOS tube Q2 is connected to the source of the fourth MOS tube Q3, and is connected to the source of the fifth MOS tube Q5 through the resistor R3, the gate of the third MOS tube Q2 and the gate of the fourth MOS tube Q3 are both connected to the source of the fifth MOS tube Q5, the drain of the fourth MOS tube Q3 is connected to the power end of the first output interface P3 (in this embodiment, the VBUS interface), the fifth MOS tube Q5‌ adopts an N-channel enhancement type MOS tube of model 2N7002, the source of the fifth MOS tube Q5 is grounded, the gate of the fifth MOS tube Q5 is connected to a data end of the protocol control handshake module through the current limiting resistor R7 (as the Gate1 signal), and the gate of the fifth MOS tube Q5 is grounded at the same time through the resistor R8. The first output interface P3 can be controlled by the first group of switch modules to output the input interface power or the power processed by the DC-DC module, and can be controlled to switch between the two.

[0061] In this embodiment, a light emitting diode LED1 and a current limiting resistor R12 are connected in series between a power supply terminal (in this embodiment, a VBUS interface) of the first output interface P3 and the ground.

[0062] The above structure is the basic circuit structure of the present invention. When it is implemented specifically, there are other additional structures to form different circuit forms. The present invention will be further described below with several specific implementation methods.

[0063] Example 1: Please refer to the attached Figure 6 To Attachment Fig.15, this embodiment can be used as a data line / OTG, and can be switched. In this embodiment, a USB interface is added to the above basic circuit (in this embodiment, a USB-A female socket is used, and a TYPE-C female socket or a male connector structure can also be used in specific implementation), which is defined as P2. A switching module is also added to the above basic circuit. In this embodiment, the switching module uses a four-way single-pole double-throw analog switch chip. In specific implementation, the number of single-pole double-throw analog switch chips used is selected according to actual needs. In this embodiment, the first channel (CH0 port) of the single-pole double-throw analog switch chip U4 is connected to the negative data end (ie, Dm0) of the first output interface, the second channel (CH1 port) of the single-pole double-throw analog switch chip U4 is connected to the negative data end (ie, Dm1) of the second output interface, and the common end (COM) of the single-pole double-throw analog switch chip U4 The single-pole double-throw analog switch chip U4 is connected to a data terminal of the protocol control handshake module; the first channel (CH0 port) of the single-pole double-throw analog switch chip U5 is connected to the positive data terminal (i.e., Dp0) of the first output interface, the second channel (CH1 port) of the single-pole double-throw analog switch chip U5 is connected to the positive data terminal (i.e., Dp1) of the second output interface, the common terminal (COM port) of the single-pole double-throw analog switch chip U5 is connected to the positive data terminal (i.e., IN_Dp) of the input interface, and the enable terminal of the single-pole double-throw analog switch chip U5 is connected to a data terminal of the protocol control handshake module. The single-pole double-throw analog switch chip U4 and the single-pole double-throw analog switch chip U5 are controlled to work through the protocol control handshake module, thereby switching the input interface to be connected to the first output interface or the second output interface. The first channel (CH0 port) of the single-pole double-throw analog switch chip U6 is connected to the negative data terminal (i.e., Dm1) of the second output interface, the second channel (CH1 port) of the single-pole double-throw analog switch chip U6 is connected to the negative data terminal (i.e., Dm0) of the first output interface, the common terminal (COM port) of the single-pole double-throw analog switch chip U6 is connected to the negative data terminal (i.e., Dm) of the USB interface, and the enable terminal of the single-pole double-throw analog switch chip U6 is connected to a data terminal of the protocol control handshake module; the first channel (CH0 port) of the single-pole double-throw analog switch chip U7 is connected to the positive terminal (i.e., Dm0) of the second output interface. The single-pole double-throw analog switch chip U6 and the single-pole double-throw analog switch chip U7 are connected to the data terminal (i.e., Dp1), the second channel (CH1 port) of the single-pole double-throw analog switch chip U7 is connected to the positive data terminal (i.e., Dp0) of the first output interface, the common terminal (COM port) of the single-pole double-throw analog switch chip U7 is connected to the positive data terminal (i.e., Dp) of the USB interface, and the enable terminal of the single-pole double-throw analog switch chip U7 is connected to a data terminal of the protocol control handshake module. The single-pole double-throw analog switch chip U6 and the single-pole double-throw analog switch chip U7 are controlled to work through the protocol control handshake module, thereby switching the USB interface to be connected to the first output interface or the second output interface.

[0064] In this embodiment, the enable ends of the single-pole double-throw analog switch chip U4, the single-pole double-throw analog switch chip U5, the single-pole double-throw analog switch chip U6 and the single-pole double-throw analog switch chip U7 are connected to the data end of the same protocol control handshake module, and can simultaneously control the switching between the four interfaces, that is: when the USB interface is connected to the first output interface, the input interface is connected to the second output interface, and when the USB interface is connected to the second output interface, the input interface is connected to the first output interface.

[0065] When the devices connected to P3 and P4 both support USB data communication, the devices can be switched to DFP (i.e., Downstream Facing Port, a port pointing to the downstream power supply and data transmission) or UFP (i.e., Upstream Facing Port, a port pointing to the upstream power supply and data transmission). For example, when P3 is in OTG (On-The-Go, allowing data transmission between devices without a host) mode, i.e., DFP, a USB peripheral can be connected to P2. If P1 is connected to a computer, the MCU motherboard H1 can request the P3 device to switch the data role and power role from DFP to UFP, and then control the analog switch in the single-pole double-throw analog switch chip U7, so that the USB data of P1 and P3 are connected, P1 and P3 enter the data line mode, and the computer connected to P1 can charge and transmit data to the P3 device; at this time, the P4 device is still in DFP mode. After the charging role is switched, P4 can be charged, P2 is connected to a USB flash drive, and the P4 device can read the P2 USB flash drive. The data roles of P3 and P4 can also be switched again by pressing buttons.

[0066] Example 2: Please refer to the attached Fig.16 To Attachment Fig.24 This embodiment is an even-number OTG mode. In this embodiment, two USB interfaces are added to the above basic circuit (in this embodiment, a USB-A female socket is adopted, and a TYPE-C female socket or a male connector structure may also be adopted in specific implementation), which are defined as USB interface P2 and USB interface P5. USB interface P2 is connected to the first output interface, and USB interface P5 is connected to the second output interface. In this embodiment, USB interface P2 and USB interface P5 are arranged on the MCU mainboard H1.

[0067] In this application mode, when devices connected to P3 and P4 only switch the power supply mode but not the data mode, the devices of P3 and P4 are always DFP in the data transmission role and can read the USB peripheral information connected to P2 and P5. When P1 is connected, P3 and P4 need to switch the functional mode from power supply to power consumption.

[0068] Example 3: Please refer to the attached Fig.25 To Attachment Fig.32, this embodiment is a dual data connection mode (without USB interface). In this embodiment, a HUB chip U8 is added to the above basic circuit. The HUB chip U8 adopts a ZXB332 chip. In specific implementation, other models or other series of HUB chips can also be selected instead. In this embodiment, the USB positive data end (DPU interface) of the HUB chip U8 is connected to the positive data end (i.e., IN_Dp) of the input interface, the USB negative data end (DMU interface) of the HUB chip U8 is connected to the negative data end (i.e., IN_Dm) of the input interface, the first group of data interfaces of the HUB chip U8 is connected to the first output interface, that is: the Dp1 port of the HUB chip U8 is connected to the Dp0 port of the first output interface, the Dm1 port of the HUB chip U8 is connected to the Dm0 port of the first output interface, and the second group of data interfaces of the HUB chip U8 is connected to the second output interface, that is: the Dp2 port of the HUB chip U8 is connected to the Dp1 port of the second output interface, and the Dm2 port of the HUB chip U8 is connected to the Dm2 port of the second output interface. The power output end of the LDO module is connected to the power end of the HUB chip U8 to supply power to the HUB chip U8.

[0069] In this application mode, when P3 and P4 are UFP by default, if P1 is connected to a computer, P3 and P4 can communicate with the computer via data cable at the same time, USB expansion (HUB), when P1 is connected to a charger, P3 and P4 can enter fast charging mode.

[0070] In addition to the above-mentioned embodiments, the present invention may also have other embodiments, such as the specific number and connection relationship of each module. The fast charging protocol power receiving handshake module is connected to the fast charging protocol charging handshake module (fast charging protocol power receiving handshake module, i.e. the communication part connected to P1 in H1; the fast charging protocol charging handshake module, i.e. the part connected to P3 and P4 in H1) + DC-DC module. The charging plus DC-DC module can be one or more, and the DC-DC module can also be 0 or 1; the USB discharge + data communication module can be one or more, and the USB discharge + data communication module can be combined into one USB port output or multiple USB port outputs; the USB discharge + data communication module is connected to the USB device protocol handshake module with charging and data communication functions.

[0071] The present invention enables the expanded USB interface to support both high-speed data communication and Type-C fast charging.

Claims

1. A USB fast charging and data communication interface expansion device, characterized by: The interface expansion device includes more than one input interface, more than one output interface, more than one switch module, a protocol control handshake module and a power supply module. The data end in more than one input interface is respectively connected to the signal end of the protocol control handshake module, the data end in more than one output interface is respectively connected to the signal end of the protocol control handshake module, the power supply of more than one input interface is respectively connected to the input end of the power supply module, more than one switch module is respectively connected to the output end of the power supply module, the power supply end of the output interface is respectively connected to the switch module, and the control end of the switch module is connected to the data end of the protocol control handshake module.

2. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The input interface adopts a USB-A interface or a Type-C interface, and the input interface adopts a male head structure.

3. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The output interface adopts a USB-A interface or a Type-C interface, and the output interface adopts a male head structure.

4. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The power supply module includes a DC-DC module and an LDO module. The power input ends of the DC-DC module and the LDO module are respectively connected to the power supply end of the input interface. The power output end of the LDO module provides internal power for the protocol control handshake module. The power output end of the DC-DC module is connected to the output interface through the switch module to provide power to the output interface.

5. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The switch module includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube, the source of the first MOS tube is connected to the power supply end of the input interface, the drain of the first MOS tube is connected to the power supply end of the output interface, the gate of the first MOS tube is connected to the drain of the second MOS tube, the drain of the second MOS tube is connected to the power supply end of the input interface through a current limiting resistor R2, the source of the second MOS tube is grounded, the gate of the second MOS tube is connected to a data end of the protocol control handshake module through a current limiting resistor R4, and the gate of the second MOS tube is simultaneously connected to the power supply end of the protocol control handshake module. The third MOS tube is connected to the power output terminal of the power module, the source of the third MOS tube is connected to the source of the fourth MOS tube, and is connected to the source of the fifth MOS tube through the resistor R3. The gate of the third MOS tube and the gate of the fourth MOS tube are both connected to the source of the fifth MOS tube. The drain of the fourth MOS tube is connected to the power terminal of the first output interface P3, the source of the fifth MOS tube is grounded, the gate of the fifth MOS tube is connected to a data terminal of the protocol control handshake module through the current limiting resistor R7, and the gate of the fifth MOS tube is grounded through the resistor R8 at the same time.

6. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: A light emitting diode and a current limiting resistor are connected in series between the power supply end of the output interface and the ground.

7. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The interface expansion device also includes a USB interface and a switching module. The switching module adopts a four-way single-pole double-throw analog switch chip. The first channel of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the first output interface, the second channel of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the second output interface, the common end of the single-pole double-throw analog switch chip U4 is connected to the negative data end of the input interface, and the enable end of the single-pole double-throw analog switch chip U4 is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the first output interface, the second channel of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the second output interface, the common end of the single-pole double-throw analog switch chip U5 is connected to the positive data end of the input interface, and the enable end of the single-pole double-throw analog switch chip U5 is connected to a data end of the protocol control handshake module. The enable end is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the second output interface, the second channel of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the first output interface, the common end of the single-pole double-throw analog switch chip U6 is connected to the negative data end of the USB interface, and the enable end of the single-pole double-throw analog switch chip U6 is connected to a data end of the protocol control handshake module; the first channel of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the second output interface, the second channel of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the first output interface, the common end of the single-pole double-throw analog switch chip U7 is connected to the positive data end of the USB interface, and the enable end of the single-pole double-throw analog switch chip U7 is connected to a data end of the protocol control handshake module.

8. The USB fast charging and data communication interface expansion device according to claim 7, characterized in that: The enable ends of the single-pole double-throw analog switch chip U4, the single-pole double-throw analog switch chip U5, the single-pole double-throw analog switch chip U6 and the single-pole double-throw analog switch chip U7 are connected to the data end of the same protocol control handshake module.

9. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The interface expansion device further includes a USB interface P2 and a USB interface P5, wherein the USB interface P2 is connected to the first output interface, and the USB interface P5 is connected to the second output interface.

10. The USB fast charging and data communication interface expansion device according to claim 1, characterized in that: The interface expansion device also includes a HUB chip U8, the USB positive data end of the HUB chip U8 is connected to the positive data end of the input interface, the USB negative data end of the HUB chip U8 is connected to the negative data end of the input interface, the output interfaces are respectively connected to the data interfaces of the HUB chip U8, and the power output end of the power module is connected to the power end of the HUB chip U8.

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